2 Copyright (c) Realtek Semiconductor Corp. All rights reserved.
8 Implement Rate Adaptive functions for common operations.
12 ---------- --------------- -------------------------------
13 2011-08-12 Page Create.
16 #include "odm_precomp.h"
18 /* Rate adaptive parameters */
20 static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {
21 {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */
22 {6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */
23 {6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */
24 {8, 7, 6, 4, 0, 6}, /* 75 , idx = 3 */
25 {10, 9, 8, 6, 0, 8}, /* 71 , idx = 4 */
26 {10, 9, 8, 4, 0, 8}, /* 66 , idx = 5 */
27 {10, 9, 8, 2, 0, 8}, /* 62 , idx = 6 */
28 {10, 9, 8, 0, 0, 8}, /* 59 , idx = 7 */
29 {18, 17, 16, 8, 0, 16}, /* 53 , idx = 8 */
30 {26, 25, 24, 16, 0, 24}, /* 50 , idx = 9 */
31 {34, 33, 32, 24, 0, 32}, /* 47 , idx = 0x0a */
32 {34, 31, 28, 20, 0, 32}, /* 43 , idx = 0x0b */
33 {34, 31, 27, 18, 0, 32}, /* 40 , idx = 0x0c */
34 {34, 31, 26, 16, 0, 32}, /* 37 , idx = 0x0d */
35 {34, 30, 22, 16, 0, 32}, /* 32 , idx = 0x0e */
36 {34, 30, 24, 16, 0, 32}, /* 26 , idx = 0x0f */
37 {49, 46, 40, 16, 0, 48}, /* 20 , idx = 0x10 */
38 {49, 45, 32, 0, 0, 48}, /* 17 , idx = 0x11 */
39 {49, 45, 22, 18, 0, 48}, /* 15 , idx = 0x12 */
40 {49, 40, 24, 16, 0, 48}, /* 12 , idx = 0x13 */
41 {49, 32, 18, 12, 0, 48}, /* 9 , idx = 0x14 */
42 {49, 22, 18, 14, 0, 48}, /* 6 , idx = 0x15 */
43 {49, 16, 16, 0, 0, 48}
44 }; /* 3, idx = 0x16 */
46 static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32};
49 static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {
50 {4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
51 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
52 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */
53 {0x0a, 0x0a, 0x0b, 0x0c, 0x0a,
54 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x14, /* SS<TH */
55 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x11, 0x13, 0x15,
56 9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13}
59 static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {
60 0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e,
61 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */
62 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15,
63 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15};
65 static u8 RSSI_THRESHOLD[RATESIZE] = {
67 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
68 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a,
69 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c};
71 static u16 N_THRESHOLD_HIGH[RATESIZE] = {
73 24, 36, 48, 72, 96, 144, 192, 216,
74 60, 80, 100, 160, 240, 400, 560, 640,
75 300, 320, 480, 720, 1000, 1200, 1600, 2000};
76 static u16 N_THRESHOLD_LOW[RATESIZE] = {
78 12, 18, 24, 36, 48, 72, 96, 108,
79 30, 40, 50, 80, 120, 200, 280, 320,
80 150, 160, 240, 360, 500, 600, 800, 1000};
82 static u8 DROPING_NECESSARY[RATESIZE] = {
84 1, 2, 3, 4, 5, 6, 7, 8,
85 1, 2, 3, 4, 5, 6, 7, 8,
86 5, 6, 7, 8, 9, 10, 11, 12};
88 static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60};
89 static u16 DynamicTxRPTTiming[6] = {
90 0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 , 0x927c}; /* 200ms-1200ms */
92 /* End Rate adaptive parameters */
94 static void odm_SetTxRPTTiming_8188E(
95 struct odm_dm_struct *dm_odm,
96 struct odm_ra_info *pRaInfo,
102 for (idx = 0; idx < 5; idx++)
103 if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
106 if (extend == 0) { /* back to default timing */
108 } else if (extend == 1) {/* increase the timing */
112 } else if (extend == 2) {/* decrease the timing */
116 pRaInfo->RptTime = DynamicTxRPTTiming[idx];
118 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime));
121 static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
123 u8 RateID, LowestRate, HighestRate;
126 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
127 if (NULL == pRaInfo) {
128 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
131 RateID = pRaInfo->PreRate;
132 LowestRate = pRaInfo->LowestRate;
133 HighestRate = pRaInfo->HighestRate;
135 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
136 (" RateID =%d LowestRate =%d HighestRate =%d RateSGI =%d\n",
137 RateID, LowestRate, HighestRate, pRaInfo->RateSGI));
138 if (RateID > HighestRate) {
139 RateID = HighestRate;
140 } else if (pRaInfo->RateSGI) {
141 pRaInfo->RateSGI = 0;
142 } else if (RateID > LowestRate) {
144 for (i = RateID-1; i > LowestRate; i--) {
145 if (pRaInfo->RAUseRate & BIT(i)) {
151 } else if (RateID <= LowestRate) {
155 if (pRaInfo->RAWaitingCounter == 1) {
156 pRaInfo->RAWaitingCounter += 1;
157 pRaInfo->RAPendingCounter += 1;
158 } else if (pRaInfo->RAWaitingCounter == 0) {
161 pRaInfo->RAWaitingCounter = 0;
162 pRaInfo->RAPendingCounter = 0;
165 if (pRaInfo->RAPendingCounter >= 4)
166 pRaInfo->RAPendingCounter = 4;
168 pRaInfo->DecisionRate = RateID;
169 odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2);
170 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
171 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
172 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
173 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDown_8188E()\n"));
177 static int odm_RateUp_8188E(
178 struct odm_dm_struct *dm_odm,
179 struct odm_ra_info *pRaInfo
182 u8 RateID, HighestRate;
185 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
186 if (NULL == pRaInfo) {
187 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
190 RateID = pRaInfo->PreRate;
191 HighestRate = pRaInfo->HighestRate;
192 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
193 (" RateID =%d HighestRate =%d\n",
194 RateID, HighestRate));
195 if (pRaInfo->RAWaitingCounter == 1) {
196 pRaInfo->RAWaitingCounter = 0;
197 pRaInfo->RAPendingCounter = 0;
198 } else if (pRaInfo->RAWaitingCounter > 1) {
199 pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA;
202 odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0);
203 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n"));
205 if (RateID < HighestRate) {
206 for (i = RateID+1; i <= HighestRate; i++) {
207 if (pRaInfo->RAUseRate & BIT(i)) {
212 } else if (RateID == HighestRate) {
213 if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1))
214 pRaInfo->RateSGI = 1;
215 else if ((pRaInfo->SGIEnable) != 1)
216 pRaInfo->RateSGI = 0;
218 RateID = HighestRate;
221 if (pRaInfo->RAWaitingCounter == (4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
222 pRaInfo->RAWaitingCounter = 0;
224 pRaInfo->RAWaitingCounter++;
226 pRaInfo->DecisionRate = RateID;
227 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID));
228 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
229 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n"));
233 static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo)
237 RateID = pRaInfo->DecisionRate;
238 pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
239 pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
242 static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
243 struct odm_ra_info *pRaInfo
246 u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0;
247 /* u32 pool_retry; */
248 static u8 DynamicTxRPTTimingCounter;
250 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n"));
252 if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */
253 if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) ||
254 (pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) {
255 pRaInfo->RAWaitingCounter = 0;
256 pRaInfo->RAPendingCounter = 0;
258 /* Start RA decision */
259 if (pRaInfo->PreRate > pRaInfo->HighestRate)
260 RateID = pRaInfo->HighestRate;
262 RateID = pRaInfo->PreRate;
263 if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID])
267 PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */
269 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
270 (" NscDown init is %d\n", pRaInfo->NscDown));
271 pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0];
272 pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1];
273 pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2];
274 pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3];
275 pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4];
276 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
277 (" NscDown is %d, total*penalty[5] is %d\n",
278 pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
279 if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
280 pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
282 pRaInfo->NscDown = 0;
285 PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
286 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
287 (" NscUp init is %d\n", pRaInfo->NscUp));
288 pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0];
289 pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1];
290 pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2];
291 pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3];
292 pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4];
293 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
294 ("NscUp is %d, total*up[5] is %d\n",
295 pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
296 if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
297 pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
301 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
302 (" RssiStaRa = %d RtyPtID =%d PenaltyID1 = 0x%x PenaltyID2 = 0x%x RateID =%d NscDown =%d NscUp =%d SGI =%d\n",
303 pRaInfo->RssiStaRA, RtyPtID, PenaltyID1, PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI));
304 if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||
305 (pRaInfo->DROP > DROPING_NECESSARY[RateID]))
306 odm_RateDown_8188E(dm_odm, pRaInfo);
307 else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])
308 odm_RateUp_8188E(dm_odm, pRaInfo);
310 if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
311 pRaInfo->DecisionRate = pRaInfo->HighestRate;
313 if ((pRaInfo->DecisionRate) == (pRaInfo->PreRate))
314 DynamicTxRPTTimingCounter += 1;
316 DynamicTxRPTTimingCounter = 0;
318 if (DynamicTxRPTTimingCounter >= 4) {
319 odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1);
320 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
321 ODM_DBG_LOUD, ("<===== Rate don't change 4 times, Extend RPT Timing\n"));
322 DynamicTxRPTTimingCounter = 0;
325 pRaInfo->PreRate = pRaInfo->DecisionRate; /* YJ, add, 120120 */
327 odm_ResetRaCounter_8188E(pRaInfo);
329 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDecision_8188E()\n"));
332 static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
333 { /* Wilson 2011/10/26 */
334 struct adapter *adapt = dm_odm->Adapter;
338 switch (pRaInfo->RateID) {
339 case RATR_INX_WIRELESS_NGB:
340 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff015;
342 case RATR_INX_WIRELESS_NG:
343 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010;
345 case RATR_INX_WIRELESS_NB:
346 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff005;
348 case RATR_INX_WIRELESS_N:
349 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000;
351 case RATR_INX_WIRELESS_GB:
352 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff5;
354 case RATR_INX_WIRELESS_G:
355 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0;
357 case RATR_INX_WIRELESS_B:
358 pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
361 MaskFromReg = usb_read32(adapt, REG_ARFR0);
362 pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
365 MaskFromReg = usb_read32(adapt, REG_ARFR1);
366 pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
369 MaskFromReg = usb_read32(adapt, REG_ARFR2);
370 pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
373 MaskFromReg = usb_read32(adapt, REG_ARFR3);
374 pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
377 pRaInfo->RAUseRate = (pRaInfo->RateMask);
381 if (pRaInfo->RAUseRate) {
382 for (i = RATESIZE; i >= 0; i--) {
383 if ((pRaInfo->RAUseRate)&BIT(i)) {
384 pRaInfo->HighestRate = i;
389 pRaInfo->HighestRate = 0;
392 if (pRaInfo->RAUseRate) {
393 for (i = 0; i < RATESIZE; i++) {
394 if ((pRaInfo->RAUseRate) & BIT(i)) {
395 pRaInfo->LowestRate = i;
400 pRaInfo->LowestRate = 0;
402 if (pRaInfo->HighestRate > 0x13)
403 pRaInfo->PTModeSS = 3;
404 else if (pRaInfo->HighestRate > 0x0b)
405 pRaInfo->PTModeSS = 2;
406 else if (pRaInfo->HighestRate > 0x0b)
407 pRaInfo->PTModeSS = 1;
409 pRaInfo->PTModeSS = 0;
410 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
411 ("ODM_ARFBRefresh_8188E(): PTModeSS =%d\n", pRaInfo->PTModeSS));
413 if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
414 pRaInfo->DecisionRate = pRaInfo->HighestRate;
416 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
417 ("ODM_ARFBRefresh_8188E(): RateID =%d RateMask =%8.8x RAUseRate =%8.8x HighestRate =%d, DecisionRate =%d\n",
418 pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate, pRaInfo->DecisionRate));
422 static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo)
424 pRaInfo->PTTryState = 0;
425 switch (pRaInfo->PTModeSS) {
427 if (pRaInfo->DecisionRate >= 0x19)
428 pRaInfo->PTTryState = 1;
431 if (pRaInfo->DecisionRate >= 0x11)
432 pRaInfo->PTTryState = 1;
435 if (pRaInfo->DecisionRate >= 0x0a)
436 pRaInfo->PTTryState = 1;
439 if (pRaInfo->DecisionRate >= 0x03)
440 pRaInfo->PTTryState = 1;
443 pRaInfo->PTTryState = 0;
447 if (pRaInfo->RssiStaRA < 48) {
448 pRaInfo->PTStage = 0;
449 } else if (pRaInfo->PTTryState == 1) {
450 if ((pRaInfo->PTStopCount >= 10) ||
451 (pRaInfo->PTPreRssi > pRaInfo->RssiStaRA + 5) ||
452 (pRaInfo->PTPreRssi < pRaInfo->RssiStaRA - 5) ||
453 (pRaInfo->DecisionRate != pRaInfo->PTPreRate)) {
454 if (pRaInfo->PTStage == 0)
455 pRaInfo->PTStage = 1;
456 else if (pRaInfo->PTStage == 1)
457 pRaInfo->PTStage = 3;
459 pRaInfo->PTStage = 5;
461 pRaInfo->PTPreRssi = pRaInfo->RssiStaRA;
462 pRaInfo->PTStopCount = 0;
464 pRaInfo->RAstage = 0;
465 pRaInfo->PTStopCount++;
468 pRaInfo->PTStage = 0;
469 pRaInfo->RAstage = 0;
471 pRaInfo->PTPreRate = pRaInfo->DecisionRate;
474 static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo)
483 num_total = pRaInfo->TOTAL * PT_PENALTY[5];
484 for (j = 0; j <= 4; j++) {
485 numsc += pRaInfo->RTY[j] * PT_PENALTY[j];
486 if (numsc > num_total)
491 temp_stage = (pRaInfo->PTStage + 1) >> 1;
493 stage_id = temp_stage-j;
497 pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2;
498 if (pRaInfo->PTSmoothFactor > 192)
499 pRaInfo->PTSmoothFactor = 192;
500 stage_id = pRaInfo->PTSmoothFactor >> 6;
501 temp_stage = stage_id*2;
504 if (pRaInfo->DROP > 3)
506 pRaInfo->PTStage = temp_stage;
510 odm_RATxRPTTimerSetting(
511 struct odm_dm_struct *dm_odm,
515 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n"));
517 if (dm_odm->CurrminRptTime != minRptTime) {
518 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
519 (" CurrminRptTime = 0x%04x minRptTime = 0x%04x\n", dm_odm->CurrminRptTime, minRptTime));
520 rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime);
521 dm_odm->CurrminRptTime = minRptTime;
523 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" <===== odm_RATxRPTTimerSetting()\n"));
528 struct odm_dm_struct *dm_odm
531 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
533 dm_odm->RaSupport88E = true;
536 int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
538 struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
539 u8 WirelessMode = 0xFF; /* invalid value */
540 u8 max_rate_idx = 0x13; /* MCS7 */
542 if (dm_odm->pWirelessMode != NULL)
543 WirelessMode = *(dm_odm->pWirelessMode);
545 if (WirelessMode != 0xFF) {
546 if (WirelessMode & ODM_WM_N24G)
548 else if (WirelessMode & ODM_WM_G)
550 else if (WirelessMode & ODM_WM_B)
554 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
555 ("ODM_RAInfo_Init(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n",
556 WirelessMode, max_rate_idx));
558 pRaInfo->DecisionRate = max_rate_idx;
559 pRaInfo->PreRate = max_rate_idx;
560 pRaInfo->HighestRate = max_rate_idx;
561 pRaInfo->LowestRate = 0;
563 pRaInfo->RateMask = 0xffffffff;
564 pRaInfo->RssiStaRA = 0;
565 pRaInfo->PreRssiStaRA = 0;
566 pRaInfo->SGIEnable = 0;
567 pRaInfo->RAUseRate = 0xffffffff;
568 pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
569 pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
570 pRaInfo->RateSGI = 0;
571 pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */
572 pRaInfo->RptTime = 0x927c;
580 pRaInfo->RAWaitingCounter = 0;
581 pRaInfo->RAPendingCounter = 0;
582 pRaInfo->PTActive = 1; /* Active when this STA is use */
583 pRaInfo->PTTryState = 0;
584 pRaInfo->PTStage = 5; /* Need to fill into HW_PWR_STATUS */
585 pRaInfo->PTSmoothFactor = 192;
586 pRaInfo->PTStopCount = 0;
587 pRaInfo->PTPreRate = 0;
588 pRaInfo->PTPreRssi = 0;
589 pRaInfo->PTModeSS = 0;
590 pRaInfo->RAstage = 0;
594 int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
598 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n"));
599 dm_odm->CurrminRptTime = 0;
601 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++)
602 ODM_RAInfo_Init(dm_odm, macid);
607 u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)
609 if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
611 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
612 ("macid =%d SGI =%d\n", macid, dm_odm->RAInfo[macid].RateSGI));
613 return dm_odm->RAInfo[macid].RateSGI;
616 u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid)
620 if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
622 DecisionRate = dm_odm->RAInfo[macid].DecisionRate;
623 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
624 (" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate));
628 u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid)
632 if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
634 PTStage = dm_odm->RAInfo[macid].PTStage;
635 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
636 ("macid =%d PTStage = 0x%x\n", macid, PTStage));
640 void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable)
642 struct odm_ra_info *pRaInfo = NULL;
644 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
645 ("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n",
646 macid, RateID, RateMask, SGIEnable));
647 if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
650 pRaInfo = &(dm_odm->RAInfo[macid]);
651 pRaInfo->RateID = RateID;
652 pRaInfo->RateMask = RateMask;
653 pRaInfo->SGIEnable = SGIEnable;
654 odm_ARFBRefresh_8188E(dm_odm, pRaInfo);
657 void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
659 struct odm_ra_info *pRaInfo = NULL;
661 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
662 (" macid =%d Rssi =%d\n", macid, Rssi));
663 if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
666 pRaInfo = &(dm_odm->RAInfo[macid]);
667 pRaInfo->RssiStaRA = Rssi;
670 void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime)
672 struct adapter *adapt = dm_odm->Adapter;
674 usb_write16(adapt, REG_TX_RPT_TIME, minRptTime);
677 void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)
679 struct odm_ra_info *pRAInfo = NULL;
682 u32 valid = 0, ItemNum = 0;
683 u16 minRptTime = 0x927c;
685 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
686 ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n",
687 macid_entry0, macid_entry1, TxRPT_Len));
689 ItemNum = TxRPT_Len >> 3;
693 if (MacId >= ASSOCIATE_ENTRY_NUM)
695 else if (MacId >= 32)
696 valid = (1 << (MacId - 32)) & macid_entry1;
698 valid = (1 << MacId) & macid_entry0;
700 pRAInfo = &(dm_odm->RAInfo[MacId]);
702 pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
703 pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
704 pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
705 pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
706 pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
707 pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
708 pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] +
709 pRAInfo->RTY[2] + pRAInfo->RTY[3] +
710 pRAInfo->RTY[4] + pRAInfo->DROP;
711 if (pRAInfo->TOTAL != 0) {
712 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
713 ("macid =%d Total =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d D0 =%d valid0 =%x valid1 =%x\n",
714 MacId, pRAInfo->TOTAL,
715 pRAInfo->RTY[0], pRAInfo->RTY[1],
716 pRAInfo->RTY[2], pRAInfo->RTY[3],
717 pRAInfo->RTY[4], pRAInfo->DROP,
718 macid_entry0 , macid_entry1));
719 if (pRAInfo->PTActive) {
720 if (pRAInfo->RAstage < 5)
721 odm_RateDecision_8188E(dm_odm, pRAInfo);
722 else if (pRAInfo->RAstage == 5) /* Power training try state */
723 odm_PTTryState_8188E(pRAInfo);
724 else /* RAstage == 6 */
725 odm_PTDecision_8188E(pRAInfo);
727 /* Stage_RA counter */
728 if (pRAInfo->RAstage <= 5)
731 pRAInfo->RAstage = 0;
733 odm_RateDecision_8188E(dm_odm, pRAInfo);
735 ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
736 ("macid =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d drop =%d valid0 =%x RateID =%d SGI =%d\n",
745 pRAInfo->DecisionRate,
748 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL = 0!!!!\n"));
752 if (minRptTime > pRAInfo->RptTime)
753 minRptTime = pRAInfo->RptTime;
755 pBuffer += TX_RPT2_ITEM_SIZE;
757 } while (MacId < ItemNum);
759 odm_RATxRPTTimerSetting(dm_odm, minRptTime);
761 ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n"));