1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 ******************************************************************************/
17 #include <linux/firmware.h>
18 #include <linux/vmalloc.h>
19 #include <drv_types.h>
20 #include <rtw_efuse.h>
22 #include <rtl8188e_hal.h>
26 void iol_mode_enable(struct adapter *padapter, u8 enable)
31 /* Enable initial offload */
32 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
33 usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
35 if (!padapter->bFWReady) {
36 DBG_88E("bFWReady == false call reset 8051...\n");
37 _8051Reset88E(padapter);
41 /* disable initial offload */
42 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
43 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
47 s32 iol_execute(struct adapter *padapter, u8 control)
51 unsigned long start = 0;
53 control = control&0x0f;
54 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
55 usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
58 while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
59 jiffies_to_msecs(jiffies - start) < 1000) {
63 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
64 status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
65 if (reg_0x88 & control<<4)
70 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
73 iol_mode_enable(padapter, 1);
74 usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
75 rst = iol_execute(padapter, CMD_INIT_LLT);
76 iol_mode_enable(padapter, 0);
81 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
83 s32 result = _SUCCESS;
85 DBG_88E("==> %s\n", __func__);
86 if (rtw_IOL_applied(padapter)) {
87 iol_mode_enable(padapter, 1);
88 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
89 if (result == _SUCCESS)
90 result = iol_execute(padapter, CMD_EFUSE_PATCH);
92 iol_mode_enable(padapter, 0);
97 #define MAX_REG_BOLCK_SIZE 196
99 void _8051Reset88E(struct adapter *padapter)
103 u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
104 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2)));
105 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2)));
106 DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
109 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
111 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
113 /* Init Fw LPS related. */
114 padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
116 /* Init H2C counter. by tynli. 2009.12.09. */
117 pHalData->LastHMEBoxNum = 0;
120 static void rtl8188e_free_hal_data(struct adapter *padapter)
122 kfree(padapter->HalData);
123 padapter->HalData = NULL;
126 static void ReadChipVersion8188E(struct adapter *padapter)
129 struct HAL_VERSION ChipVersion;
130 struct hal_data_8188e *pHalData;
132 pHalData = GET_HAL_DATA(padapter);
134 value32 = usb_read32(padapter, REG_SYS_CFG);
135 ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
136 ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
137 ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
139 dump_chip_info(ChipVersion);
141 pHalData->VersionID = ChipVersion;
142 pHalData->rf_type = RF_1T1R;
143 pHalData->NumTotalRFPath = 1;
145 MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
148 static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
150 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
151 struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
153 case HAL_ODM_STA_INFO:
155 struct sta_info *psta = pValue1;
158 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
159 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
160 ODM_RAInfo_Init(podmpriv, psta->mac_id);
162 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
163 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
167 case HAL_ODM_P2P_STATE:
168 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
170 case HAL_ODM_WIFI_DISPLAY_STATE:
171 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
178 static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
181 DBG_88E("Enable notch filter\n");
182 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
184 DBG_88E("Disable notch filter\n");
185 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
188 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
190 pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
192 pHalFunc->dm_init = &rtl8188e_init_dm_priv;
194 pHalFunc->read_chip_version = &ReadChipVersion8188E;
196 pHalFunc->set_bwmode_handler = &phy_set_bw_mode;
197 pHalFunc->set_channel_handler = &phy_sw_chnl;
199 pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
201 pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
203 pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
204 pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
205 pHalFunc->read_rfreg = &phy_query_rf_reg;
207 pHalFunc->sreset_init_value = &sreset_init_value;
208 pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
210 pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
212 pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
217 /* LLT R/W/Init function */
220 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
222 s32 status = _SUCCESS;
224 u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
225 u16 LLTReg = REG_LLT_INIT;
227 usb_write32(padapter, LLTReg, value);
231 value = usb_read32(padapter, LLTReg);
232 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
235 if (count > POLLING_LLT_THRESHOLD) {
236 RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
246 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
250 u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
252 if (rtw_IOL_applied(padapter)) {
253 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
255 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
256 status = _LLTWrite(padapter, i, i + 1);
257 if (_SUCCESS != status)
262 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
263 if (_SUCCESS != status)
266 /* Make the other pages as ring buffer */
267 /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
268 /* Otherwise used as local loopback buffer. */
269 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
270 status = _LLTWrite(padapter, i, (i + 1));
271 if (_SUCCESS != status)
275 /* Let last entry point to the start entry of ring buffer */
276 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
277 if (_SUCCESS != status) {
286 Hal_InitPGData88E(struct adapter *padapter)
288 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
290 if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
291 if (!is_boot_from_eeprom(padapter)) {
292 /* Read EFUSE real map to shadow. */
293 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
295 } else {/* autoload fail */
296 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
297 /* update to default value 0xFF */
298 if (!is_boot_from_eeprom(padapter))
299 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
304 Hal_EfuseParseIDCode88E(
305 struct adapter *padapter,
309 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
312 /* Checl 0x8129 again for making sure autoload status!! */
313 EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
314 if (EEPROMId != RTL_EEPROM_ID) {
315 DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
316 pEEPROM->bautoload_fail_flag = true;
318 pEEPROM->bautoload_fail_flag = false;
321 DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
324 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
326 u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
328 memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
331 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
332 /* 2.4G default value */
333 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
334 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
335 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
337 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
339 pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
340 pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
342 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
343 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
344 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
345 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
352 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
353 /* 2.4G default value */
354 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
355 pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
356 if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
357 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
359 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
360 pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
361 if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
362 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
364 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
366 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
367 if (PROMContent[eeAddr] == 0xFF) {
368 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
370 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
371 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
372 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
375 if (PROMContent[eeAddr] == 0xFF) {
376 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
378 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
379 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
380 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
382 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
385 if (PROMContent[eeAddr] == 0xFF) {
386 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
388 pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
389 if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
390 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
393 if (PROMContent[eeAddr] == 0xFF) {
394 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
396 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
397 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
398 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
402 if (PROMContent[eeAddr] == 0xFF) {
403 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
405 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
406 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
407 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
410 if (PROMContent[eeAddr] == 0xFF) {
411 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
413 pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
414 if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
415 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
423 static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
430 if (chnl < 3) /* Channel 1-2 */
432 else if (chnl < 6) /* Channel 3-5 */
434 else if (chnl < 9) /* Channel 6-8 */
436 else if (chnl < 12) /* Channel 9-11 */
438 else if (chnl < 14) /* Channel 12-13 */
440 else if (chnl == 14) /* Channel 14 */
444 /* probably, this branch is suitable only for 5 GHz */
456 else if (chnl <= 104)
458 else if (chnl <= 112)
460 else if (chnl <= 120)
462 else if (chnl <= 128)
464 else if (chnl <= 136)
466 else if (chnl <= 144)
468 else if (chnl <= 153)
470 else if (chnl <= 161)
472 else if (chnl <= 177)
478 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
481 padapter->pwrctrlpriv.bHWPowerdown = false;
482 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
484 /* hw power down mode selection , 0:rf-off / 1:power down */
486 if (padapter->registrypriv.hwpdn_mode == 2)
487 padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
489 padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
491 /* decide hw if support remote wakeup function */
492 /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
493 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
495 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
496 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup);
498 DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
502 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
504 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
505 struct txpowerinfo24g pwrInfo24G;
506 u8 rfPath, ch, group;
509 Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
512 pHalData->bTXPowerDataReadFromEEPORM = true;
514 for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
515 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
516 bIn24G = Hal_GetChnlGroup88E(ch, &group);
518 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
520 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
522 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
525 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
526 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]);
527 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]);
530 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
531 pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
532 pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
533 pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
534 pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
535 DBG_88E("======= TxCount %d =======\n", TxCount);
536 DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
537 DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
538 DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
539 DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
543 /* 2010/10/19 MH Add Regulator recognize for CU. */
545 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */
546 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
547 pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
549 pHalData->EEPROMRegulatory = 0;
551 DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
554 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
556 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
559 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
560 if (pHalData->CrystalCap == 0xFF)
561 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
563 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
565 DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
568 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
570 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
573 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
576 pHalData->BoardType = 0;
577 DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
580 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
582 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
585 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
586 if (pHalData->EEPROMVersion == 0xFF)
587 pHalData->EEPROMVersion = EEPROM_Default_Version;
589 pHalData->EEPROMVersion = 1;
591 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
592 ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
593 pHalData->EEPROMVersion));
596 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
598 padapter->mlmepriv.ChannelPlan =
599 hal_com_get_channel_plan(padapter,
600 hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
601 padapter->registrypriv.channel_plan,
602 RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
604 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
607 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
609 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
612 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
614 pHalData->EEPROMCustomerID = 0;
615 pHalData->EEPROMSubCustomerID = 0;
617 DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
620 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
622 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
623 struct registry_priv *registry_par = &pAdapter->registrypriv;
626 /* Antenna Diversity setting. */
627 if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */
628 pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
629 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
630 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
632 pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */
635 if (registry_par->antdiv_type == 0) {
636 /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
637 pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
638 if (pHalData->TRxAntDivType == 0xFF)
639 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
641 pHalData->TRxAntDivType = registry_par->antdiv_type;
644 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
645 pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
647 pHalData->AntDivCfg = 0;
648 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */
650 DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
653 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
655 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
657 /* ThermalMeter from EEPROM */
659 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
661 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
663 if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
664 pHalData->bAPKThermalMeterIgnore = true;
665 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
667 DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);