drivers/staging/rtl8192e/rtl8192e/rtl_dm.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * This program is distributed in the hope that it will be useful, but WITHOUT
   5  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   6  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   7  * more details.
   8  *
   9  * You should have received a copy of the GNU General Public License along with
  10  * this program; if not, write to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  12  *
  13  * The full GNU General Public License is included in this distribution in the
  14  * file called LICENSE.
  15  *
  16  * Contact Information:
  17  * wlanfae <wlanfae@realtek.com>
  18 ******************************************************************************/
  19 #include "rtl_core.h"
  20 #include "rtl_dm.h"
  21 #include "r8192E_hw.h"
  22 #include "r8192E_phy.h"
  23 #include "r8192E_phyreg.h"
  24 #include "r8190P_rtl8256.h"
  25 #include "r8192E_cmdpkt.h"
  26
  27 /*---------------------------Define Local Constant---------------------------*/
  28 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
  29         0x5e4322,
  30         0x5e4322,
  31         0x5ea44f,
  32         0x5e4322,
  33         0x604322,
  34         0xa44f,
  35         0x5e4322,
  36         0x5e4332
  37 };
  38
  39 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
  40         0x5e4322,
  41         0x5e4322,
  42         0x5e4322,
  43         0x5e4322,
  44         0x604322,
  45         0xa44f,
  46         0x5e4322,
  47         0x5e4322
  48 };
  49
  50 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
  51         0x5e4322,
  52         0xa44f,
  53         0x5ea44f,
  54         0x5e4322,
  55         0x604322,
  56         0x5e4322,
  57         0x5e4322,
  58         0x5e4332
  59 };
  60
  61 const u32 dm_tx_bb_gain[TxBBGainTableLength] = {
  62         0x7f8001fe, /* 12 dB */
  63         0x788001e2, /* 11 dB */
  64         0x71c001c7,
  65         0x6b8001ae,
  66         0x65400195,
  67         0x5fc0017f,
  68         0x5a400169,
  69         0x55400155,
  70         0x50800142,
  71         0x4c000130,
  72         0x47c0011f,
  73         0x43c0010f,
  74         0x40000100,
  75         0x3c8000f2,
  76         0x390000e4,
  77         0x35c000d7,
  78         0x32c000cb,
  79         0x300000c0,
  80         0x2d4000b5,
  81         0x2ac000ab,
  82         0x288000a2,
  83         0x26000098,
  84         0x24000090,
  85         0x22000088,
  86         0x20000080,
  87         0x1a00006c,
  88         0x1c800072,
  89         0x18000060,
  90         0x19800066,
  91         0x15800056,
  92         0x26c0005b,
  93         0x14400051,
  94         0x24400051,
  95         0x1300004c,
  96         0x12000048,
  97         0x11000044,
  98         0x10000040, /* -24 dB */
  99 };
 100
 101 const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8] = {
 102         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
 103         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
 104         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
 105         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
 106         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
 107         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
 108         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 109         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
 110         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 111         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
 112         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 113         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
 114         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 115         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
 116         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 117         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
 118         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 119         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
 120         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 121         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 122         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 123         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
 124         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
 125 };
 126
 127 const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8] = {
 128         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 129         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 130         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 131         {0x2d, 0x2d, 0x27, 0x17, 0x00, 0x00, 0x00, 0x00},
 132         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 133         {0x28, 0x28, 0x22, 0x14, 0x00, 0x00, 0x00, 0x00},
 134         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 135         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 136         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 137         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 138         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 139         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 140         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 141         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 142         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 143         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 144         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 145         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 146         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 147         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 148         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 149         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 150         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
 151 };
 152
 153 /*---------------------------Define Local Constant---------------------------*/
 154
 155
 156 /*------------------------Define global variable-----------------------------*/
 157 struct dig_t dm_digtable;
 158
 159 struct drx_path_sel DM_RxPathSelTable;
 160 /*------------------------Define global variable-----------------------------*/
 161
 162
 163 /*------------------------Define local variable------------------------------*/
 164 /*------------------------Define local variable------------------------------*/
 165
 166
 167
 168 /*---------------------Define local function prototype-----------------------*/
 169 static  void    dm_check_rate_adaptive(struct net_device *dev);
 170
 171 static  void    dm_init_bandwidth_autoswitch(struct net_device *dev);
 172 static  void    dm_bandwidth_autoswitch(struct net_device *dev);
 173
 174
 175 static  void    dm_check_txpower_tracking(struct net_device *dev);
 176
 177
 178
 179
 180
 181 static  void    dm_bb_initialgain_restore(struct net_device *dev);
 182
 183
 184 static  void    dm_bb_initialgain_backup(struct net_device *dev);
 185
 186 static  void dm_dig_init(struct net_device *dev);
 187 static  void dm_ctrl_initgain_byrssi(struct net_device *dev);
 188 static  void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
 189 static  void dm_ctrl_initgain_byrssi_by_driverrssi(struct net_device *dev);
 190 static  void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
 191 static  void dm_initial_gain(struct net_device *dev);
 192 static  void dm_pd_th(struct net_device *dev);
 193 static  void dm_cs_ratio(struct net_device *dev);
 194
 195 static  void dm_init_ctstoself(struct net_device *dev);
 196 static  void dm_Init_WA_Broadcom_IOT(struct net_device *dev);
 197
 198 static  void    dm_check_edca_turbo(struct net_device *dev);
 199
 200 static  void dm_check_pbc_gpio(struct net_device *dev);
 201
 202
 203 static  void dm_check_rx_path_selection(struct net_device *dev);
 204 static  void dm_init_rxpath_selection(struct net_device *dev);
 205 static  void dm_rxpath_sel_byrssi(struct net_device *dev);
 206
 207
 208 static void dm_init_fsync(struct net_device *dev);
 209 static void dm_deInit_fsync(struct net_device *dev);
 210
 211 static  void dm_check_txrateandretrycount(struct net_device *dev);
 212 static  void dm_check_ac_dc_power(struct net_device *dev);
 213 static void dm_check_fsync(struct net_device *dev);
 214 static void dm_CheckRfCtrlGPIO(void *data);
 215 static void dm_fsync_timer_callback(unsigned long data);
 216
 217 /*---------------------Define local function prototype-----------------------*/
 218
 219 static  void    dm_init_dynamic_txpower(struct net_device *dev);
 220 static  void    dm_dynamic_txpower(struct net_device *dev);
 221
 222
 223 static  void dm_send_rssi_tofw(struct net_device *dev);
 224 static  void    dm_ctstoself(struct net_device *dev);
 225 /*---------------------------Define function prototype------------------------*/
 226
 227 void init_hal_dm(struct net_device *dev)
 228 {
 229         struct r8192_priv *priv = rtllib_priv(dev);
 230
 231         priv->DM_Type = DM_Type_ByDriver;
 232
 233         priv->undecorated_smoothed_pwdb = -1;
 234
 235         dm_init_dynamic_txpower(dev);
 236
 237         rtl92e_init_adaptive_rate(dev);
 238
 239         dm_dig_init(dev);
 240         rtl92e_dm_init_edca_turbo(dev);
 241         dm_init_bandwidth_autoswitch(dev);
 242         dm_init_fsync(dev);
 243         dm_init_rxpath_selection(dev);
 244         dm_init_ctstoself(dev);
 245         if (IS_HARDWARE_TYPE_8192SE(dev))
 246                 dm_Init_WA_Broadcom_IOT(dev);
 247
 248         INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq,
 249                               (void *)dm_CheckRfCtrlGPIO, dev);
 250 }
 251
 252 void rtl92e_dm_deinit(struct net_device *dev)
 253 {
 254
 255         dm_deInit_fsync(dev);
 256
 257 }
 258
 259 void rtl92e_dm_watchdog(struct net_device *dev)
 260 {
 261         struct r8192_priv *priv = rtllib_priv(dev);
 262
 263         if (priv->being_init_adapter)
 264                 return;
 265
 266         dm_check_ac_dc_power(dev);
 267
 268         dm_check_pbc_gpio(dev);
 269         dm_check_txrateandretrycount(dev);
 270         dm_check_edca_turbo(dev);
 271
 272         dm_check_rate_adaptive(dev);
 273         dm_dynamic_txpower(dev);
 274         dm_check_txpower_tracking(dev);
 275
 276         dm_ctrl_initgain_byrssi(dev);
 277         dm_bandwidth_autoswitch(dev);
 278
 279         dm_check_rx_path_selection(dev);
 280         dm_check_fsync(dev);
 281
 282         dm_send_rssi_tofw(dev);
 283         dm_ctstoself(dev);
 284 }
 285
 286 static void dm_check_ac_dc_power(struct net_device *dev)
 287 {
 288         struct r8192_priv *priv = rtllib_priv(dev);
 289         static char *ac_dc_script = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
 290         char *argv[] = {ac_dc_script, DRV_NAME, NULL};
 291         static char *envp[] = {"HOME=/",
 292                         "TERM=linux",
 293                         "PATH=/usr/bin:/bin",
 294                          NULL};
 295
 296         if (priv->ResetProgress == RESET_TYPE_SILENT) {
 297                 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF),
 298                          "GPIOChangeRFWorkItemCallBack(): Silent Reset!!!!!!!\n");
 299                 return;
 300         }
 301
 302         if (priv->rtllib->state != RTLLIB_LINKED)
 303                 return;
 304         call_usermodehelper(ac_dc_script, argv, envp, UMH_WAIT_PROC);
 305
 306         return;
 307 };
 308
 309
 310 void rtl92e_init_adaptive_rate(struct net_device *dev)
 311 {
 312
 313         struct r8192_priv *priv = rtllib_priv(dev);
 314         struct rate_adaptive *pra = &priv->rate_adaptive;
 315
 316         pra->ratr_state = DM_RATR_STA_MAX;
 317         pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
 318         pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
 319         pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
 320
 321         pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
 322         pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
 323         pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
 324
 325         if (priv->CustomerID == RT_CID_819x_Netcore)
 326                 pra->ping_rssi_enable = 1;
 327         else
 328                 pra->ping_rssi_enable = 0;
 329         pra->ping_rssi_thresh_for_ra = 15;
 330
 331
 332         if (priv->rf_type == RF_2T4R) {
 333                 pra->upper_rssi_threshold_ratr          =       0x8f0f0000;
 334                 pra->middle_rssi_threshold_ratr         =       0x8f0ff000;
 335                 pra->low_rssi_threshold_ratr            =       0x8f0ff001;
 336                 pra->low_rssi_threshold_ratr_40M        =       0x8f0ff005;
 337                 pra->low_rssi_threshold_ratr_20M        =       0x8f0ff001;
 338                 pra->ping_rssi_ratr     =       0x0000000d;
 339         } else if (priv->rf_type == RF_1T2R) {
 340                 pra->upper_rssi_threshold_ratr          =       0x000fc000;
 341                 pra->middle_rssi_threshold_ratr         =       0x000ff000;
 342                 pra->low_rssi_threshold_ratr            =       0x000ff001;
 343                 pra->low_rssi_threshold_ratr_40M        =       0x000ff005;
 344                 pra->low_rssi_threshold_ratr_20M        =       0x000ff001;
 345                 pra->ping_rssi_ratr     =       0x0000000d;
 346         }
 347
 348 }
 349
 350
 351 static void dm_check_rate_adaptive(struct net_device *dev)
 352 {
 353         struct r8192_priv *priv = rtllib_priv(dev);
 354         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
 355         struct rate_adaptive *pra = &priv->rate_adaptive;
 356         u32 currentRATR, targetRATR = 0;
 357         u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
 358         bool bshort_gi_enabled = false;
 359         static u8 ping_rssi_state;
 360
 361         if (!priv->up) {
 362                 RT_TRACE(COMP_RATE,
 363                          "<---- dm_check_rate_adaptive(): driver is going to unload\n");
 364                 return;
 365         }
 366
 367         if (pra->rate_adaptive_disabled)
 368                 return;
 369
 370         if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
 371             priv->rtllib->mode == WIRELESS_MODE_N_5G))
 372                 return;
 373
 374         if (priv->rtllib->state == RTLLIB_LINKED) {
 375
 376                 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz &&
 377                                      pHTInfo->bCurShortGI40MHz) ||
 378                                     (!pHTInfo->bCurTxBW40MHz &&
 379                                      pHTInfo->bCurShortGI20MHz);
 380
 381                 pra->upper_rssi_threshold_ratr =
 382                                 (pra->upper_rssi_threshold_ratr & (~BIT31)) |
 383                                 ((bshort_gi_enabled) ? BIT31 : 0);
 384
 385                 pra->middle_rssi_threshold_ratr =
 386                                 (pra->middle_rssi_threshold_ratr & (~BIT31)) |
 387                                 ((bshort_gi_enabled) ? BIT31 : 0);
 388
 389                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
 390                         pra->low_rssi_threshold_ratr =
 391                                 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) |
 392                                 ((bshort_gi_enabled) ? BIT31 : 0);
 393                 } else {
 394                         pra->low_rssi_threshold_ratr =
 395                                 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) |
 396                                 ((bshort_gi_enabled) ? BIT31 : 0);
 397                 }
 398                 pra->ping_rssi_ratr =
 399                                 (pra->ping_rssi_ratr & (~BIT31)) |
 400                                 ((bshort_gi_enabled) ? BIT31 : 0);
 401
 402                 if (pra->ratr_state == DM_RATR_STA_HIGH) {
 403                         HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
 404                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 405                                         (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
 406                 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
 407                         HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
 408                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 409                                         (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
 410                 } else {
 411                         HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
 412                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 413                                         (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
 414                 }
 415
 416                 if (priv->undecorated_smoothed_pwdb >=
 417                     (long)HighRSSIThreshForRA) {
 418                         pra->ratr_state = DM_RATR_STA_HIGH;
 419                         targetRATR = pra->upper_rssi_threshold_ratr;
 420                 } else if (priv->undecorated_smoothed_pwdb >=
 421                            (long)LowRSSIThreshForRA) {
 422                         pra->ratr_state = DM_RATR_STA_MIDDLE;
 423                         targetRATR = pra->middle_rssi_threshold_ratr;
 424                 } else {
 425                         pra->ratr_state = DM_RATR_STA_LOW;
 426                         targetRATR = pra->low_rssi_threshold_ratr;
 427                 }
 428
 429                 if (pra->ping_rssi_enable) {
 430                         if (priv->undecorated_smoothed_pwdb <
 431                             (long)(pra->ping_rssi_thresh_for_ra+5)) {
 432                                 if ((priv->undecorated_smoothed_pwdb <
 433                                      (long)pra->ping_rssi_thresh_for_ra) ||
 434                                     ping_rssi_state) {
 435                                         pra->ratr_state = DM_RATR_STA_LOW;
 436                                         targetRATR = pra->ping_rssi_ratr;
 437                                         ping_rssi_state = 1;
 438                                 }
 439                         } else {
 440                                 ping_rssi_state = 0;
 441                         }
 442                 }
 443
 444                 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
 445                         targetRATR &=  0xf00fffff;
 446
 447                 currentRATR = rtl92e_readl(dev, RATR0);
 448                 if (targetRATR !=  currentRATR) {
 449                         u32 ratr_value;
 450
 451                         ratr_value = targetRATR;
 452                         RT_TRACE(COMP_RATE,
 453                                  "currentRATR = %x, targetRATR = %x\n",
 454                                  currentRATR, targetRATR);
 455                         if (priv->rf_type == RF_1T2R)
 456                                 ratr_value &= ~(RATE_ALL_OFDM_2SS);
 457                         rtl92e_writel(dev, RATR0, ratr_value);
 458                         rtl92e_writeb(dev, UFWP, 1);
 459
 460                         pra->last_ratr = targetRATR;
 461                 }
 462
 463         } else {
 464                 pra->ratr_state = DM_RATR_STA_MAX;
 465         }
 466 }
 467
 468 static void dm_init_bandwidth_autoswitch(struct net_device *dev)
 469 {
 470         struct r8192_priv *priv = rtllib_priv(dev);
 471
 472         priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
 473         priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
 474         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
 475         priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
 476 }
 477
 478 static void dm_bandwidth_autoswitch(struct net_device *dev)
 479 {
 480         struct r8192_priv *priv = rtllib_priv(dev);
 481
 482         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
 483            !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable)
 484                 return;
 485         if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
 486                 if (priv->undecorated_smoothed_pwdb <=
 487                     priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
 488                         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
 489         } else {
 490                 if (priv->undecorated_smoothed_pwdb >=
 491                     priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
 492                         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
 493         }
 494 }
 495
 496 static u32 OFDMSwingTable[OFDM_Table_Length] = {
 497         0x7f8001fe,
 498         0x71c001c7,
 499         0x65400195,
 500         0x5a400169,
 501         0x50800142,
 502         0x47c0011f,
 503         0x40000100,
 504         0x390000e4,
 505         0x32c000cb,
 506         0x2d4000b5,
 507         0x288000a2,
 508         0x24000090,
 509         0x20000080,
 510         0x1c800072,
 511         0x19800066,
 512         0x26c0005b,
 513         0x24400051,
 514         0x12000048,
 515         0x10000040
 516 };
 517
 518 static u8       CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
 519         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
 520         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
 521         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
 522         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 523         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 524         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 525         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 526         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 527         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 528         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 529         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 530         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
 531 };
 532
 533 static u8       CCKSwingTable_Ch14[CCK_Table_length][8] = {
 534         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 535         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 536         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 537         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 538         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 539         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 540         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 541         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 542         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 543         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 544         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 545         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
 546 };
 547
 548 #define         Pw_Track_Flag                           0x11d
 549 #define         Tssi_Mea_Value                          0x13c
 550 #define         Tssi_Report_Value1                      0x134
 551 #define         Tssi_Report_Value2                      0x13e
 552 #define         FW_Busy_Flag                            0x13f
 553
 554 static void dm_tx_update_tssi_weak_signal(struct net_device *dev, u8 RF_Type)
 555 {
 556         struct r8192_priv *p = rtllib_priv(dev);
 557
 558         if (RF_Type == RF_2T4R) {
 559                 if ((p->rfa_txpowertrackingindex > 0) &&
 560                     (p->rfc_txpowertrackingindex > 0)) {
 561                         p->rfa_txpowertrackingindex--;
 562                         if (p->rfa_txpowertrackingindex_real > 4) {
 563                                 p->rfa_txpowertrackingindex_real--;
 564                                 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 565                                                   bMaskDWord,
 566                                                   dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 567                         }
 568
 569                         p->rfc_txpowertrackingindex--;
 570                         if (p->rfc_txpowertrackingindex_real > 4) {
 571                                 p->rfc_txpowertrackingindex_real--;
 572                                 rtl92e_set_bb_reg(dev,
 573                                                   rOFDM0_XCTxIQImbalance,
 574                                                   bMaskDWord,
 575                                                   dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
 576                         }
 577                 } else {
 578                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 579                                           bMaskDWord,
 580                                           dm_tx_bb_gain[4]);
 581                         rtl92e_set_bb_reg(dev,
 582                                           rOFDM0_XCTxIQImbalance,
 583                                           bMaskDWord, dm_tx_bb_gain[4]);
 584                 }
 585         } else {
 586                 if (p->rfa_txpowertrackingindex > 0) {
 587                         p->rfa_txpowertrackingindex--;
 588                         if (p->rfa_txpowertrackingindex_real > 4) {
 589                                 p->rfa_txpowertrackingindex_real--;
 590                                 rtl92e_set_bb_reg(dev,
 591                                                   rOFDM0_XATxIQImbalance,
 592                                                   bMaskDWord,
 593                                                   dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 594                         }
 595                 } else {
 596                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 597                                           bMaskDWord, dm_tx_bb_gain[4]);
 598                 }
 599         }
 600 }
 601
 602 static void dm_tx_update_tssi_strong_signal(struct net_device *dev, u8 RF_Type)
 603 {
 604         struct r8192_priv *p = rtllib_priv(dev);
 605
 606         if (RF_Type == RF_2T4R) {
 607                 if ((p->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&
 608                     (p->rfc_txpowertrackingindex < TxBBGainTableLength - 1)) {
 609                         p->rfa_txpowertrackingindex++;
 610                         p->rfa_txpowertrackingindex_real++;
 611                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 612                                           bMaskDWord,
 613                                           dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 614                         p->rfc_txpowertrackingindex++;
 615                         p->rfc_txpowertrackingindex_real++;
 616                         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
 617                                           bMaskDWord,
 618                                           dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
 619                 } else {
 620                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 621                                           bMaskDWord,
 622                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 623                         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
 624                                           bMaskDWord,
 625                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 626                 }
 627         } else {
 628                 if (p->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
 629                         p->rfa_txpowertrackingindex++;
 630                         p->rfa_txpowertrackingindex_real++;
 631                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 632                                           bMaskDWord,
 633                                           dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 634                 } else {
 635                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 636                                           bMaskDWord,
 637                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 638                 }
 639         }
 640 }
 641
 642 static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
 643 {
 644         struct r8192_priv *priv = rtllib_priv(dev);
 645         bool    bHighpowerstate, viviflag = false;
 646         struct dcmd_txcmd tx_cmd;
 647         u8      powerlevelOFDM24G;
 648         int     i = 0, j = 0, k = 0;
 649         u8      RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
 650         u32     Value;
 651         u8      Pwr_Flag;
 652         u16     Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
 653         u32     delta = 0;
 654
 655         RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
 656         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 657         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 658         priv->rtllib->bdynamic_txpower_enable = false;
 659         bHighpowerstate = priv->bDynamicTxHighPower;
 660
 661         powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
 662         RF_Type = priv->rf_type;
 663         Value = (RF_Type<<8) | powerlevelOFDM24G;
 664
 665         RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n",
 666                  powerlevelOFDM24G);
 667
 668
 669         for (j = 0; j <= 30; j++) {
 670
 671                 tx_cmd.Op               = TXCMD_SET_TX_PWR_TRACKING;
 672                 tx_cmd.Length   = 4;
 673                 tx_cmd.Value            = Value;
 674                 rtl92e_send_cmd_pkt(dev, (u8 *)&tx_cmd, DESC_PACKET_TYPE_INIT,
 675                                     sizeof(struct dcmd_txcmd));
 676                 mdelay(1);
 677                 for (i = 0; i <= 30; i++) {
 678                         Pwr_Flag = rtl92e_readb(dev, Pw_Track_Flag);
 679
 680                         if (Pwr_Flag == 0) {
 681                                 mdelay(1);
 682
 683                                 if (priv->bResetInProgress) {
 684                                         RT_TRACE(COMP_POWER_TRACKING,
 685                                                  "we are in silent reset progress, so return\n");
 686                                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 687                                         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 688                                         return;
 689                                 }
 690                                 if (priv->rtllib->eRFPowerState != eRfOn) {
 691                                         RT_TRACE(COMP_POWER_TRACKING,
 692                                                  "we are in power save, so return\n");
 693                                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 694                                         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 695                                         return;
 696                                 }
 697
 698                                 continue;
 699                         }
 700
 701                         Avg_TSSI_Meas = rtl92e_readw(dev, Tssi_Mea_Value);
 702
 703                         if (Avg_TSSI_Meas == 0) {
 704                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 705                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 706                                 return;
 707                         }
 708
 709                         for (k = 0; k < 5; k++) {
 710                                 if (k != 4)
 711                                         tmp_report[k] = rtl92e_readb(dev,
 712                                                          Tssi_Report_Value1+k);
 713                                 else
 714                                         tmp_report[k] = rtl92e_readb(dev,
 715                                                          Tssi_Report_Value2);
 716
 717                                 RT_TRACE(COMP_POWER_TRACKING,
 718                                          "TSSI_report_value = %d\n",
 719                                          tmp_report[k]);
 720
 721                                if (tmp_report[k] <= 20) {
 722                                         viviflag = true;
 723                                         break;
 724                                 }
 725                         }
 726
 727                         if (viviflag) {
 728                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 729                                 viviflag = false;
 730                                 RT_TRACE(COMP_POWER_TRACKING,
 731                                          "we filted this data\n");
 732                                 for (k = 0; k < 5; k++)
 733                                         tmp_report[k] = 0;
 734                                 break;
 735                         }
 736
 737                         for (k = 0; k < 5; k++)
 738                                 Avg_TSSI_Meas_from_driver += tmp_report[k];
 739
 740                         Avg_TSSI_Meas_from_driver *= 100 / 5;
 741                         RT_TRACE(COMP_POWER_TRACKING,
 742                                  "Avg_TSSI_Meas_from_driver = %d\n",
 743                                  Avg_TSSI_Meas_from_driver);
 744                         TSSI_13dBm = priv->TSSI_13dBm;
 745                         RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n",
 746                                  TSSI_13dBm);
 747
 748                         if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
 749                                 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
 750                         else
 751                                 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
 752
 753                         if (delta <= E_FOR_TX_POWER_TRACK) {
 754                                 priv->rtllib->bdynamic_txpower_enable = true;
 755                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 756                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 757                                 RT_TRACE(COMP_POWER_TRACKING,
 758                                          "tx power track is done\n");
 759                                 RT_TRACE(COMP_POWER_TRACKING,
 760                                          "priv->rfa_txpowertrackingindex = %d\n",
 761                                          priv->rfa_txpowertrackingindex);
 762                                 RT_TRACE(COMP_POWER_TRACKING,
 763                                          "priv->rfa_txpowertrackingindex_real = %d\n",
 764                                          priv->rfa_txpowertrackingindex_real);
 765                                 RT_TRACE(COMP_POWER_TRACKING,
 766                                          "priv->CCKPresentAttentuation_difference = %d\n",
 767                                          priv->CCKPresentAttentuation_difference);
 768                                 RT_TRACE(COMP_POWER_TRACKING,
 769                                          "priv->CCKPresentAttentuation = %d\n",
 770                                          priv->CCKPresentAttentuation);
 771                                 return;
 772                         }
 773                         if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
 774                                 dm_tx_update_tssi_weak_signal(dev, RF_Type);
 775                         else
 776                                 dm_tx_update_tssi_strong_signal(dev, RF_Type);
 777
 778                         if (RF_Type == RF_2T4R) {
 779                                 priv->CCKPresentAttentuation_difference
 780                                         = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
 781                         } else {
 782                                 priv->CCKPresentAttentuation_difference
 783                                         = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
 784                         }
 785
 786                         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
 787                                 priv->CCKPresentAttentuation =
 788                                          priv->CCKPresentAttentuation_20Mdefault +
 789                                          priv->CCKPresentAttentuation_difference;
 790                         else
 791                                 priv->CCKPresentAttentuation =
 792                                          priv->CCKPresentAttentuation_40Mdefault +
 793                                          priv->CCKPresentAttentuation_difference;
 794
 795                         if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
 796                                 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
 797                         if (priv->CCKPresentAttentuation < 0)
 798                                 priv->CCKPresentAttentuation = 0;
 799
 800                         if (priv->CCKPresentAttentuation > -1 &&
 801                             priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
 802                                 if (priv->rtllib->current_network.channel == 14 &&
 803                                     !priv->bcck_in_ch14) {
 804                                         priv->bcck_in_ch14 = true;
 805                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 806                                 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
 807                                         priv->bcck_in_ch14 = false;
 808                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 809                                 } else
 810                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 811                         }
 812                         RT_TRACE(COMP_POWER_TRACKING,
 813                                  "priv->rfa_txpowertrackingindex = %d\n",
 814                                  priv->rfa_txpowertrackingindex);
 815                         RT_TRACE(COMP_POWER_TRACKING,
 816                                  "priv->rfa_txpowertrackingindex_real = %d\n",
 817                                  priv->rfa_txpowertrackingindex_real);
 818                         RT_TRACE(COMP_POWER_TRACKING,
 819                                  "priv->CCKPresentAttentuation_difference = %d\n",
 820                                  priv->CCKPresentAttentuation_difference);
 821                         RT_TRACE(COMP_POWER_TRACKING,
 822                                  "priv->CCKPresentAttentuation = %d\n",
 823                                  priv->CCKPresentAttentuation);
 824
 825                         if (priv->CCKPresentAttentuation_difference <= -12 ||
 826                             priv->CCKPresentAttentuation_difference >= 24) {
 827                                 priv->rtllib->bdynamic_txpower_enable = true;
 828                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 829                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 830                                 RT_TRACE(COMP_POWER_TRACKING,
 831                                          "tx power track--->limited\n");
 832                                 return;
 833                         }
 834
 835                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 836                         Avg_TSSI_Meas_from_driver = 0;
 837                         for (k = 0; k < 5; k++)
 838                                 tmp_report[k] = 0;
 839                         break;
 840                 }
 841                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 842         }
 843         priv->rtllib->bdynamic_txpower_enable = true;
 844         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 845 }
 846
 847 static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device *dev)
 848 {
 849 #define ThermalMeterVal 9
 850         struct r8192_priv *priv = rtllib_priv(dev);
 851         u32 tmpRegA, TempCCk;
 852         u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
 853         int i = 0, CCKSwingNeedUpdate = 0;
 854
 855         if (!priv->btxpower_trackingInit) {
 856                 tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
 857                                             bMaskDWord);
 858                 for (i = 0; i < OFDM_Table_Length; i++) {
 859                         if (tmpRegA == OFDMSwingTable[i]) {
 860                                 priv->OFDM_index[0] = (u8)i;
 861                                 RT_TRACE(COMP_POWER_TRACKING,
 862                                          "Initial reg0x%x = 0x%x, OFDM_index = 0x%x\n",
 863                                          rOFDM0_XATxIQImbalance, tmpRegA,
 864                                          priv->OFDM_index[0]);
 865                         }
 866                 }
 867
 868                 TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, bMaskByte2);
 869                 for (i = 0; i < CCK_Table_length; i++) {
 870                         if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
 871                                 priv->CCK_index = (u8) i;
 872                                 RT_TRACE(COMP_POWER_TRACKING,
 873                                          "Initial reg0x%x = 0x%x, CCK_index = 0x%x\n",
 874                                          rCCK0_TxFilter1, TempCCk,
 875                                          priv->CCK_index);
 876                                 break;
 877                         }
 878                 }
 879                 priv->btxpower_trackingInit = true;
 880                 return;
 881         }
 882
 883         tmpRegA = rtl92e_get_rf_reg(dev, RF90_PATH_A, 0x12, 0x078);
 884         RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d\n", tmpRegA);
 885         if (tmpRegA < 3 || tmpRegA > 13)
 886                 return;
 887         if (tmpRegA >= 12)
 888                 tmpRegA = 12;
 889         RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d\n", tmpRegA);
 890         priv->ThermalMeter[0] = ThermalMeterVal;
 891         priv->ThermalMeter[1] = ThermalMeterVal;
 892
 893         if (priv->ThermalMeter[0] >= (u8)tmpRegA) {
 894                 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] -
 895                               (u8)tmpRegA);
 896                 tmpCCK40Mindex = tmpCCK20Mindex - 6;
 897                 if (tmpOFDMindex >= OFDM_Table_Length)
 898                         tmpOFDMindex = OFDM_Table_Length-1;
 899                 if (tmpCCK20Mindex >= CCK_Table_length)
 900                         tmpCCK20Mindex = CCK_Table_length-1;
 901                 if (tmpCCK40Mindex >= CCK_Table_length)
 902                         tmpCCK40Mindex = CCK_Table_length-1;
 903         } else {
 904                 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
 905                 if (tmpval >= 6)
 906                         tmpOFDMindex = tmpCCK20Mindex = 0;
 907                 else
 908                         tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
 909                 tmpCCK40Mindex = 0;
 910         }
 911         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
 912                 tmpCCKindex = tmpCCK40Mindex;
 913         else
 914                 tmpCCKindex = tmpCCK20Mindex;
 915
 916         priv->Record_CCK_20Mindex = tmpCCK20Mindex;
 917         priv->Record_CCK_40Mindex = tmpCCK40Mindex;
 918         RT_TRACE(COMP_POWER_TRACKING,
 919                  "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
 920                  priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
 921
 922         if (priv->rtllib->current_network.channel == 14 &&
 923             !priv->bcck_in_ch14) {
 924                 priv->bcck_in_ch14 = true;
 925                 CCKSwingNeedUpdate = 1;
 926         } else if (priv->rtllib->current_network.channel != 14 &&
 927                    priv->bcck_in_ch14) {
 928                 priv->bcck_in_ch14 = false;
 929                 CCKSwingNeedUpdate = 1;
 930         }
 931
 932         if (priv->CCK_index != tmpCCKindex) {
 933                 priv->CCK_index = tmpCCKindex;
 934                 CCKSwingNeedUpdate = 1;
 935         }
 936
 937         if (CCKSwingNeedUpdate)
 938                 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 939         if (priv->OFDM_index[0] != tmpOFDMindex) {
 940                 priv->OFDM_index[0] = tmpOFDMindex;
 941                 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
 942                                   OFDMSwingTable[priv->OFDM_index[0]]);
 943                 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
 944                          priv->OFDM_index[0],
 945                          OFDMSwingTable[priv->OFDM_index[0]]);
 946         }
 947         priv->txpower_count = 0;
 948 }
 949
 950 void rtl92e_dm_txpower_tracking_wq(void *data)
 951 {
 952         struct r8192_priv *priv = container_of_dwork_rsl(data,
 953                                   struct r8192_priv, txpower_tracking_wq);
 954         struct net_device *dev = priv->rtllib->dev;
 955
 956         if (priv->IC_Cut >= IC_VersionCut_D)
 957                 dm_TXPowerTrackingCallback_TSSI(dev);
 958         else
 959                 dm_TXPowerTrackingCallback_ThermalMeter(dev);
 960 }
 961
 962 static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
 963 {
 964
 965         struct r8192_priv *priv = rtllib_priv(dev);
 966
 967         priv->btxpower_tracking = true;
 968         priv->txpower_count       = 0;
 969         priv->btxpower_trackingInit = false;
 970
 971 }
 972
 973 static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
 974 {
 975         struct r8192_priv *priv = rtllib_priv(dev);
 976
 977
 978         if (priv->rtllib->FwRWRF)
 979                 priv->btxpower_tracking = true;
 980         else
 981                 priv->btxpower_tracking = false;
 982         priv->txpower_count       = 0;
 983         priv->btxpower_trackingInit = false;
 984         RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n",
 985                  priv->btxpower_tracking);
 986 }
 987
 988 void rtl92e_dm_init_txpower_tracking(struct net_device *dev)
 989 {
 990         struct r8192_priv *priv = rtllib_priv(dev);
 991
 992         if (priv->IC_Cut >= IC_VersionCut_D)
 993                 dm_InitializeTXPowerTracking_TSSI(dev);
 994         else
 995                 dm_InitializeTXPowerTracking_ThermalMeter(dev);
 996 }
 997
 998 static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
 999 {
1000         struct r8192_priv *priv = rtllib_priv(dev);
1001         static u32 tx_power_track_counter;
1002
1003         RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
1004         if (rtl92e_readb(dev, 0x11e) == 1)
1005                 return;
1006         if (!priv->btxpower_tracking)
1007                 return;
1008         tx_power_track_counter++;
1009
1010
1011          if (tx_power_track_counter >= 180) {
1012                 queue_delayed_work_rsl(priv->priv_wq,
1013                                        &priv->txpower_tracking_wq, 0);
1014                 tx_power_track_counter = 0;
1015         }
1016
1017 }
1018 static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
1019 {
1020         struct r8192_priv *priv = rtllib_priv(dev);
1021         static u8       TM_Trigger;
1022         u8              TxPowerCheckCnt = 0;
1023
1024         if (IS_HARDWARE_TYPE_8192SE(dev))
1025                 TxPowerCheckCnt = 5;
1026         else
1027                 TxPowerCheckCnt = 2;
1028         if (!priv->btxpower_tracking)
1029                 return;
1030
1031         if (priv->txpower_count  <= TxPowerCheckCnt) {
1032                 priv->txpower_count++;
1033                 return;
1034         }
1035
1036         if (!TM_Trigger) {
1037                 {
1038                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1039                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1040                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1041                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1042                 }
1043                 TM_Trigger = 1;
1044                 return;
1045         }
1046         netdev_info(dev, "===============>Schedule TxPowerTrackingWorkItem\n");
1047         queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1048         TM_Trigger = 0;
1049
1050 }
1051
1052 static void dm_check_txpower_tracking(struct net_device *dev)
1053 {
1054         struct r8192_priv *priv = rtllib_priv(dev);
1055
1056         if (priv->IC_Cut >= IC_VersionCut_D)
1057                 dm_CheckTXPowerTracking_TSSI(dev);
1058         else
1059                 dm_CheckTXPowerTracking_ThermalMeter(dev);
1060 }
1061
1062 static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool  bInCH14)
1063 {
1064         u32 TempVal;
1065         struct r8192_priv *priv = rtllib_priv(dev);
1066         u8 attenuation = (u8)priv->CCKPresentAttentuation;
1067
1068         TempVal = 0;
1069         if (!bInCH14) {
1070                 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][0] +
1071                           (dm_cck_tx_bb_gain[attenuation][1] << 8));
1072
1073                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1074                 TempVal = (u32)((dm_cck_tx_bb_gain[attenuation][2]) +
1075                           (dm_cck_tx_bb_gain[attenuation][3] << 8) +
1076                           (dm_cck_tx_bb_gain[attenuation][4] << 16)+
1077                           (dm_cck_tx_bb_gain[attenuation][5] << 24));
1078                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1079                 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][6] +
1080                           (dm_cck_tx_bb_gain[attenuation][7] << 8));
1081
1082                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1083         } else {
1084                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][0]) +
1085                           (dm_cck_tx_bb_gain_ch14[attenuation][1] << 8));
1086
1087                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1088                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][2]) +
1089                           (dm_cck_tx_bb_gain_ch14[attenuation][3] << 8) +
1090                           (dm_cck_tx_bb_gain_ch14[attenuation][4] << 16)+
1091                           (dm_cck_tx_bb_gain_ch14[attenuation][5] << 24));
1092                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1093                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][6]) +
1094                           (dm_cck_tx_bb_gain_ch14[attenuation][7] << 8));
1095
1096                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1097         }
1098 }
1099
1100 static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev,
1101                                              bool bInCH14)
1102 {
1103         u32 TempVal;
1104         struct r8192_priv *priv = rtllib_priv(dev);
1105
1106         TempVal = 0;
1107         if (!bInCH14) {
1108                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1109                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1] << 8);
1110                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1111                 RT_TRACE(COMP_POWER_TRACKING,
1112                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_TxFilter1,
1113                          TempVal);
1114                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1115                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3] << 8) +
1116                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4] << 16)+
1117                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5] << 24);
1118                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1119                 RT_TRACE(COMP_POWER_TRACKING,
1120                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_TxFilter2,
1121                          TempVal);
1122                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1123                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7] << 8);
1124
1125                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1126                 RT_TRACE(COMP_POWER_TRACKING,
1127                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_DebugPort,
1128                          TempVal);
1129         } else {
1130                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1131                           (CCKSwingTable_Ch14[priv->CCK_index][1] << 8);
1132
1133                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1134                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1135                         rCCK0_TxFilter1, TempVal);
1136                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1137                           (CCKSwingTable_Ch14[priv->CCK_index][3] << 8) +
1138                           (CCKSwingTable_Ch14[priv->CCK_index][4] << 16)+
1139                           (CCKSwingTable_Ch14[priv->CCK_index][5] << 24);
1140                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1141                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1142                         rCCK0_TxFilter2, TempVal);
1143                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1144                           (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
1145
1146                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1147                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1148                         rCCK0_DebugPort, TempVal);
1149         }
1150 }
1151
1152 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
1153 {
1154         struct r8192_priv *priv = rtllib_priv(dev);
1155
1156         if (priv->IC_Cut >= IC_VersionCut_D)
1157                 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
1158         else
1159                 dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
1160 }
1161
1162 static void dm_txpower_reset_recovery(struct net_device *dev)
1163 {
1164         struct r8192_priv *priv = rtllib_priv(dev);
1165
1166         RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
1167         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
1168                           dm_tx_bb_gain[priv->rfa_txpowertrackingindex]);
1169         RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",
1170                  dm_tx_bb_gain[priv->rfa_txpowertrackingindex]);
1171         RT_TRACE(COMP_POWER_TRACKING,
1172                  "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",
1173                  priv->rfa_txpowertrackingindex);
1174         RT_TRACE(COMP_POWER_TRACKING,
1175                  "Reset Recovery : RF A I/Q Amplify Gain is %d\n",
1176                  dm_tx_bb_gain_idx_to_amplify(priv->rfa_txpowertrackingindex));
1177         RT_TRACE(COMP_POWER_TRACKING,
1178                  "Reset Recovery: CCK Attenuation is %d dB\n",
1179                  priv->CCKPresentAttentuation);
1180         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1181
1182         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord,
1183                           dm_tx_bb_gain[priv->rfc_txpowertrackingindex]);
1184         RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",
1185                  dm_tx_bb_gain[priv->rfc_txpowertrackingindex]);
1186         RT_TRACE(COMP_POWER_TRACKING,
1187                  "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",
1188                  priv->rfc_txpowertrackingindex);
1189         RT_TRACE(COMP_POWER_TRACKING,
1190                  "Reset Recovery : RF C I/Q Amplify Gain is %d\n",
1191                  dm_tx_bb_gain_idx_to_amplify(priv->rfc_txpowertrackingindex));
1192 }
1193
1194 void rtl92e_dm_restore_state(struct net_device *dev)
1195 {
1196         struct r8192_priv *priv = rtllib_priv(dev);
1197         u32     reg_ratr = priv->rate_adaptive.last_ratr;
1198         u32 ratr_value;
1199
1200         if (!priv->up) {
1201                 RT_TRACE(COMP_RATE,
1202                          "<---- rtl92e_dm_restore_state(): driver is going to unload\n");
1203                 return;
1204         }
1205
1206         if (priv->rate_adaptive.rate_adaptive_disabled)
1207                 return;
1208         if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
1209               priv->rtllib->mode == WIRELESS_MODE_N_5G))
1210                 return;
1211         ratr_value = reg_ratr;
1212         if (priv->rf_type == RF_1T2R)
1213                 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1214         rtl92e_writel(dev, RATR0, ratr_value);
1215         rtl92e_writeb(dev, UFWP, 1);
1216         if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1217                 dm_txpower_reset_recovery(dev);
1218
1219         dm_bb_initialgain_restore(dev);
1220
1221 }
1222
1223 static void dm_bb_initialgain_restore(struct net_device *dev)
1224 {
1225         struct r8192_priv *priv = rtllib_priv(dev);
1226         u32 bit_mask = 0x7f;
1227
1228         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1229                 return;
1230
1231         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1232         rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask,
1233                           (u32)priv->initgain_backup.xaagccore1);
1234         rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask,
1235                           (u32)priv->initgain_backup.xbagccore1);
1236         rtl92e_set_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask,
1237                           (u32)priv->initgain_backup.xcagccore1);
1238         rtl92e_set_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask,
1239                           (u32)priv->initgain_backup.xdagccore1);
1240         bit_mask  = bMaskByte2;
1241         rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask,
1242                           (u32)priv->initgain_backup.cca);
1243
1244         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n",
1245                  priv->initgain_backup.xaagccore1);
1246         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n",
1247                  priv->initgain_backup.xbagccore1);
1248         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n",
1249                  priv->initgain_backup.xcagccore1);
1250         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n",
1251                  priv->initgain_backup.xdagccore1);
1252         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n",
1253                  priv->initgain_backup.cca);
1254         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1255
1256 }
1257
1258
1259 void rtl92e_dm_backup_state(struct net_device *dev)
1260 {
1261         struct r8192_priv *priv = rtllib_priv(dev);
1262
1263         priv->bswitch_fsync  = false;
1264         priv->bfsync_processing = false;
1265         dm_bb_initialgain_backup(dev);
1266
1267 }
1268
1269
1270 static void dm_bb_initialgain_backup(struct net_device *dev)
1271 {
1272         struct r8192_priv *priv = rtllib_priv(dev);
1273         u32 bit_mask = bMaskByte0;
1274
1275         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1276                 return;
1277
1278         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1279         priv->initgain_backup.xaagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask);
1280         priv->initgain_backup.xbagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask);
1281         priv->initgain_backup.xcagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask);
1282         priv->initgain_backup.xdagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask);
1283         bit_mask  = bMaskByte2;
1284         priv->initgain_backup.cca = (u8)rtl92e_get_bb_reg(dev, rCCK0_CCA, bit_mask);
1285
1286         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n",
1287                  priv->initgain_backup.xaagccore1);
1288         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n",
1289                  priv->initgain_backup.xbagccore1);
1290         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n",
1291                  priv->initgain_backup.xcagccore1);
1292         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n",
1293                  priv->initgain_backup.xdagccore1);
1294         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n",
1295                  priv->initgain_backup.cca);
1296
1297 }
1298
1299 static void dm_dig_init(struct net_device *dev)
1300 {
1301         struct r8192_priv *priv = rtllib_priv(dev);
1302
1303         dm_digtable.dig_enable_flag     = true;
1304
1305         dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1306
1307         dm_digtable.dig_algorithm_switch = 0;
1308
1309         dm_digtable.dig_state           = DM_STA_DIG_MAX;
1310         dm_digtable.dig_highpwr_state   = DM_STA_DIG_MAX;
1311         dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1312         dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
1313
1314         dm_digtable.rssi_low_thresh     = DM_DIG_THRESH_LOW;
1315         dm_digtable.rssi_high_thresh    = DM_DIG_THRESH_HIGH;
1316
1317         dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1318         dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1319
1320         dm_digtable.rssi_val = 50;
1321         dm_digtable.backoff_val = DM_DIG_BACKOFF;
1322         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1323         if (priv->CustomerID == RT_CID_819x_Netcore)
1324                 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1325         else
1326                 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1327 }
1328
1329 static void dm_ctrl_initgain_byrssi(struct net_device *dev)
1330 {
1331
1332         if (dm_digtable.dig_enable_flag == false)
1333                 return;
1334
1335         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1336                 dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
1337         else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1338                 dm_ctrl_initgain_byrssi_by_driverrssi(dev);
1339         else
1340                 return;
1341 }
1342
1343 /*-----------------------------------------------------------------------------
1344  * Function:    dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
1345  *
1346  * Overview:    Driver monitor RSSI and False Alarm to change initial gain.
1347                         Only change initial gain during link in progress.
1348  *
1349  * Input:               IN      PADAPTER        pAdapter
1350  *
1351  * Output:              NONE
1352  *
1353  * Return:              NONE
1354  *
1355  * Revised History:
1356  *      When            Who             Remark
1357  *      03/04/2009      hpfan   Create Version 0.
1358  *
1359  *---------------------------------------------------------------------------*/
1360
1361 static void dm_ctrl_initgain_byrssi_by_driverrssi(
1362         struct net_device *dev)
1363 {
1364         struct r8192_priv *priv = rtllib_priv(dev);
1365         u8 i;
1366         static u8       fw_dig;
1367
1368         if (dm_digtable.dig_enable_flag == false)
1369                 return;
1370
1371         if (dm_digtable.dig_algorithm_switch)
1372                 fw_dig = 0;
1373         if (fw_dig <= 3) {
1374                 for (i = 0; i < 3; i++)
1375                         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1376                 fw_dig++;
1377                 dm_digtable.dig_state = DM_STA_DIG_OFF;
1378         }
1379
1380         if (priv->rtllib->state == RTLLIB_LINKED)
1381                 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
1382         else
1383                 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1384
1385
1386         dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1387         dm_initial_gain(dev);
1388         dm_pd_th(dev);
1389         dm_cs_ratio(dev);
1390         if (dm_digtable.dig_algorithm_switch)
1391                 dm_digtable.dig_algorithm_switch = 0;
1392         dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
1393
1394 }
1395
1396 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
1397         struct net_device *dev)
1398 {
1399         struct r8192_priv *priv = rtllib_priv(dev);
1400         static u32 reset_cnt;
1401         u8 i;
1402
1403         if (dm_digtable.dig_enable_flag == false)
1404                 return;
1405
1406         if (dm_digtable.dig_algorithm_switch) {
1407                 dm_digtable.dig_state = DM_STA_DIG_MAX;
1408                 for (i = 0; i < 3; i++)
1409                         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1410                 dm_digtable.dig_algorithm_switch = 0;
1411         }
1412
1413         if (priv->rtllib->state != RTLLIB_LINKED)
1414                 return;
1415
1416         if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1417                 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1418                 return;
1419         if (priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh) {
1420                 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1421                         (priv->reset_count == reset_cnt))
1422                         return;
1423                 reset_cnt = priv->reset_count;
1424
1425                 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1426                 dm_digtable.dig_state = DM_STA_DIG_OFF;
1427
1428                 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1429
1430                 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x17);
1431                 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x17);
1432                 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x17);
1433                 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x17);
1434
1435                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1436                         rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1437                 else
1438                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1439
1440                 rtl92e_writeb(dev, 0xa0a, 0x08);
1441
1442                 return;
1443         }
1444
1445         if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1446                 u8 reset_flag = 0;
1447
1448                 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1449                     (priv->reset_count == reset_cnt)) {
1450                         dm_ctrl_initgain_byrssi_highpwr(dev);
1451                         return;
1452                 }
1453                 if (priv->reset_count != reset_cnt)
1454                         reset_flag = 1;
1455
1456                 reset_cnt = priv->reset_count;
1457
1458                 dm_digtable.dig_state = DM_STA_DIG_ON;
1459
1460                 if (reset_flag == 1) {
1461                         rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x2c);
1462                         rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x2c);
1463                         rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x2c);
1464                         rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x2c);
1465                 } else {
1466                         rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x20);
1467                         rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x20);
1468                         rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x20);
1469                         rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x20);
1470                 }
1471
1472                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1473                         rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1474                 else
1475                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1476
1477                 rtl92e_writeb(dev, 0xa0a, 0xcd);
1478
1479                 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1480         }
1481         dm_ctrl_initgain_byrssi_highpwr(dev);
1482 }
1483
1484
1485 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev)
1486 {
1487         struct r8192_priv *priv = rtllib_priv(dev);
1488         static u32 reset_cnt_highpwr;
1489
1490         if ((priv->undecorated_smoothed_pwdb >
1491              dm_digtable.rssi_high_power_lowthresh) &&
1492             (priv->undecorated_smoothed_pwdb <
1493              dm_digtable.rssi_high_power_highthresh))
1494                 return;
1495
1496         if (priv->undecorated_smoothed_pwdb >=
1497             dm_digtable.rssi_high_power_highthresh) {
1498                 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
1499                         (priv->reset_count == reset_cnt_highpwr))
1500                         return;
1501                 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
1502
1503                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1504                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1505                 else
1506                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1507         } else {
1508                 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
1509                         (priv->reset_count == reset_cnt_highpwr))
1510                         return;
1511                 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
1512
1513                 if ((priv->undecorated_smoothed_pwdb <
1514                      dm_digtable.rssi_high_power_lowthresh) &&
1515                     (priv->undecorated_smoothed_pwdb >=
1516                     dm_digtable.rssi_high_thresh)) {
1517                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1518                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1519                         else
1520                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1521                 }
1522         }
1523         reset_cnt_highpwr = priv->reset_count;
1524 }
1525
1526 static void dm_initial_gain(struct net_device *dev)
1527 {
1528         struct r8192_priv *priv = rtllib_priv(dev);
1529         u8 initial_gain = 0;
1530         static u8 initialized, force_write;
1531         static u32 reset_cnt;
1532
1533         if (dm_digtable.dig_algorithm_switch) {
1534                 initialized = 0;
1535                 reset_cnt = 0;
1536         }
1537
1538         if (rtllib_act_scanning(priv->rtllib, true) == true) {
1539                 force_write = 1;
1540                 return;
1541         }
1542
1543         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1544                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1545                         long gain_range = dm_digtable.rssi_val + 10 -
1546                                           dm_digtable.backoff_val;
1547                         gain_range = clamp_t(long, gain_range,
1548                                              dm_digtable.rx_gain_range_min,
1549                                              dm_digtable.rx_gain_range_max);
1550                         dm_digtable.cur_ig_value = gain_range;
1551                 } else {
1552                         if (dm_digtable.cur_ig_value == 0)
1553                                 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1554                         else
1555                                 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
1556                 }
1557         } else {
1558                 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1559                 dm_digtable.pre_ig_value = 0;
1560         }
1561
1562         if (priv->reset_count != reset_cnt) {
1563                 force_write = 1;
1564                 reset_cnt = priv->reset_count;
1565         }
1566
1567         if (dm_digtable.pre_ig_value != rtl92e_readb(dev, rOFDM0_XAAGCCore1))
1568                 force_write = 1;
1569
1570         if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
1571             || !initialized || force_write) {
1572                 initial_gain = (u8)dm_digtable.cur_ig_value;
1573                 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
1574                 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
1575                 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
1576                 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
1577                 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
1578                 initialized = 1;
1579                 force_write = 0;
1580         }
1581 }
1582
1583 static void dm_pd_th(struct net_device *dev)
1584 {
1585         struct r8192_priv *priv = rtllib_priv(dev);
1586         static u8 initialized, force_write;
1587         static u32 reset_cnt;
1588
1589         if (dm_digtable.dig_algorithm_switch) {
1590                 initialized = 0;
1591                 reset_cnt = 0;
1592         }
1593
1594         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1595                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1596                         if (dm_digtable.rssi_val >=
1597                             dm_digtable.rssi_high_power_highthresh)
1598                                 dm_digtable.curpd_thstate =
1599                                                         DIG_PD_AT_HIGH_POWER;
1600                         else if (dm_digtable.rssi_val <=
1601                                  dm_digtable.rssi_low_thresh)
1602                                 dm_digtable.curpd_thstate =
1603                                                         DIG_PD_AT_LOW_POWER;
1604                         else if ((dm_digtable.rssi_val >=
1605                                   dm_digtable.rssi_high_thresh) &&
1606                                  (dm_digtable.rssi_val <
1607                                   dm_digtable.rssi_high_power_lowthresh))
1608                                 dm_digtable.curpd_thstate =
1609                                                         DIG_PD_AT_NORMAL_POWER;
1610                         else
1611                                 dm_digtable.curpd_thstate =
1612                                                 dm_digtable.prepd_thstate;
1613                 } else {
1614                         dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1615                 }
1616         } else {
1617                 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1618         }
1619
1620         if (priv->reset_count != reset_cnt) {
1621                 force_write = 1;
1622                 reset_cnt = priv->reset_count;
1623         }
1624
1625         if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
1626             (initialized <= 3) || force_write) {
1627                 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
1628                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1629                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1630                         else
1631                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1632                 } else if (dm_digtable.curpd_thstate ==
1633                            DIG_PD_AT_NORMAL_POWER) {
1634                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1635                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1636                         else
1637                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1638                 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
1639                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1640                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1641                         else
1642                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1643                 }
1644                 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
1645                 if (initialized <= 3)
1646                         initialized++;
1647                 force_write = 0;
1648         }
1649 }
1650
1651 static  void dm_cs_ratio(struct net_device *dev)
1652 {
1653         struct r8192_priv *priv = rtllib_priv(dev);
1654         static u8 initialized, force_write;
1655         static u32 reset_cnt;
1656
1657         if (dm_digtable.dig_algorithm_switch) {
1658                 initialized = 0;
1659                 reset_cnt = 0;
1660         }
1661
1662         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1663                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1664                         if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
1665                                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1666                         else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
1667                                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
1668                         else
1669                                 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
1670                 } else {
1671                         dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1672                 }
1673         } else {
1674                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1675         }
1676
1677         if (priv->reset_count != reset_cnt) {
1678                 force_write = 1;
1679                 reset_cnt = priv->reset_count;
1680         }
1681
1682
1683         if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
1684             !initialized || force_write) {
1685                 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
1686                         rtl92e_writeb(dev, 0xa0a, 0x08);
1687                 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
1688                         rtl92e_writeb(dev, 0xa0a, 0xcd);
1689                 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
1690                 initialized = 1;
1691                 force_write = 0;
1692         }
1693 }
1694
1695 void rtl92e_dm_init_edca_turbo(struct net_device *dev)
1696 {
1697         struct r8192_priv *priv = rtllib_priv(dev);
1698
1699         priv->bcurrent_turbo_EDCA = false;
1700         priv->rtllib->bis_any_nonbepkts = false;
1701         priv->bis_cur_rdlstate = false;
1702 }
1703
1704 static void dm_check_edca_turbo(struct net_device *dev)
1705 {
1706         struct r8192_priv *priv = rtllib_priv(dev);
1707         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1708
1709         static unsigned long lastTxOkCnt;
1710         static unsigned long lastRxOkCnt;
1711         unsigned long curTxOkCnt = 0;
1712         unsigned long curRxOkCnt = 0;
1713
1714         if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
1715                 goto dm_CheckEdcaTurbo_EXIT;
1716         if (priv->rtllib->state != RTLLIB_LINKED)
1717                 goto dm_CheckEdcaTurbo_EXIT;
1718         if (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
1719                 goto dm_CheckEdcaTurbo_EXIT;
1720
1721         {
1722                 u8 *peername[11] = {
1723                         "unknown", "realtek_90", "realtek_92se", "broadcom",
1724                         "ralink", "atheros", "cisco", "marvell", "92u_softap",
1725                         "self_softap"
1726                 };
1727                 static int wb_tmp;
1728
1729                 if (wb_tmp == 0) {
1730                         netdev_info(dev,
1731                                     "%s():iot peer is %s, bssid: %pM\n",
1732                                     __func__, peername[pHTInfo->IOTPeer],
1733                                     priv->rtllib->current_network.bssid);
1734                         wb_tmp = 1;
1735                 }
1736         }
1737         if (!priv->rtllib->bis_any_nonbepkts) {
1738                 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1739                 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1740                 if (pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
1741                         if (curTxOkCnt > 4*curRxOkCnt) {
1742                                 if (priv->bis_cur_rdlstate ||
1743                                     !priv->bcurrent_turbo_EDCA) {
1744                                         rtl92e_writel(dev, EDCAPARA_BE,
1745                                                       edca_setting_UL[pHTInfo->IOTPeer]);
1746                                         priv->bis_cur_rdlstate = false;
1747                                 }
1748                         } else {
1749                                 if (!priv->bis_cur_rdlstate ||
1750                                     !priv->bcurrent_turbo_EDCA) {
1751                                         if (priv->rtllib->mode == WIRELESS_MODE_G)
1752                                                 rtl92e_writel(dev, EDCAPARA_BE,
1753                                                               edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1754                                         else
1755                                                 rtl92e_writel(dev, EDCAPARA_BE,
1756                                                               edca_setting_DL[pHTInfo->IOTPeer]);
1757                                         priv->bis_cur_rdlstate = true;
1758                                 }
1759                         }
1760                         priv->bcurrent_turbo_EDCA = true;
1761                 } else {
1762                         if (curRxOkCnt > 4*curTxOkCnt) {
1763                                 if (!priv->bis_cur_rdlstate ||
1764                                     !priv->bcurrent_turbo_EDCA) {
1765                                         if (priv->rtllib->mode == WIRELESS_MODE_G)
1766                                                 rtl92e_writel(dev, EDCAPARA_BE,
1767                                                               edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1768                                         else
1769                                                 rtl92e_writel(dev, EDCAPARA_BE,
1770                                                               edca_setting_DL[pHTInfo->IOTPeer]);
1771                                         priv->bis_cur_rdlstate = true;
1772                                 }
1773                         } else {
1774                                 if (priv->bis_cur_rdlstate ||
1775                                     !priv->bcurrent_turbo_EDCA) {
1776                                         rtl92e_writel(dev, EDCAPARA_BE,
1777                                                       edca_setting_UL[pHTInfo->IOTPeer]);
1778                                         priv->bis_cur_rdlstate = false;
1779                                 }
1780
1781                         }
1782
1783                         priv->bcurrent_turbo_EDCA = true;
1784                 }
1785         } else {
1786                  if (priv->bcurrent_turbo_EDCA) {
1787                         u8 tmp = AC0_BE;
1788
1789                         priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM,
1790                                                       (u8 *)(&tmp));
1791                         priv->bcurrent_turbo_EDCA = false;
1792                 }
1793         }
1794
1795
1796 dm_CheckEdcaTurbo_EXIT:
1797         priv->rtllib->bis_any_nonbepkts = false;
1798         lastTxOkCnt = priv->stats.txbytesunicast;
1799         lastRxOkCnt = priv->stats.rxbytesunicast;
1800 }
1801
1802 static void dm_init_ctstoself(struct net_device *dev)
1803 {
1804         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1805
1806         priv->rtllib->bCTSToSelfEnable = true;
1807 }
1808
1809 static void dm_ctstoself(struct net_device *dev)
1810 {
1811         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1812         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1813         static unsigned long lastTxOkCnt;
1814         static unsigned long lastRxOkCnt;
1815         unsigned long curTxOkCnt = 0;
1816         unsigned long curRxOkCnt = 0;
1817
1818         if (priv->rtllib->bCTSToSelfEnable != true) {
1819                 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1820                 return;
1821         }
1822         if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
1823                 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1824                 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1825                 if (curRxOkCnt > 4*curTxOkCnt)
1826                         pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1827                 else
1828                         pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
1829
1830                 lastTxOkCnt = priv->stats.txbytesunicast;
1831                 lastRxOkCnt = priv->stats.rxbytesunicast;
1832         }
1833 }
1834
1835
1836 static  void dm_Init_WA_Broadcom_IOT(struct net_device *dev)
1837 {
1838         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1839         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1840
1841         pHTInfo->bWAIotBroadcom = false;
1842         pHTInfo->WAIotTH = WAIotTHVal;
1843 }
1844
1845 static  void    dm_check_pbc_gpio(struct net_device *dev)
1846 {
1847 }
1848
1849 static void dm_CheckRfCtrlGPIO(void *data)
1850 {
1851         struct r8192_priv *priv = container_of_dwork_rsl(data,
1852                                   struct r8192_priv, gpio_change_rf_wq);
1853         struct net_device *dev = priv->rtllib->dev;
1854         u8 tmp1byte;
1855         enum rt_rf_power_state eRfPowerStateToSet;
1856         bool bActuallySet = false;
1857         char *argv[3];
1858         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
1859         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin",
1860                                NULL};
1861
1862         bActuallySet = false;
1863
1864         if ((priv->up_first_time == 1) || (priv->being_init_adapter))
1865                 return;
1866
1867         if (priv->bfirst_after_down) {
1868                 priv->bfirst_after_down = true;
1869                 return;
1870         }
1871
1872         tmp1byte = rtl92e_readb(dev, GPI);
1873
1874         eRfPowerStateToSet = (tmp1byte&BIT1) ?  eRfOn : eRfOff;
1875
1876         if (priv->bHwRadioOff && (eRfPowerStateToSet == eRfOn)) {
1877                 RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio ON\n");
1878                 netdev_info(dev, "gpiochangeRF  - HW Radio ON\n");
1879                 priv->bHwRadioOff = false;
1880                 bActuallySet = true;
1881         } else if (!priv->bHwRadioOff && (eRfPowerStateToSet == eRfOff)) {
1882                 RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio OFF\n");
1883                 netdev_info(dev, "gpiochangeRF  - HW Radio OFF\n");
1884                 priv->bHwRadioOff = true;
1885                 bActuallySet = true;
1886         }
1887
1888         if (bActuallySet) {
1889                 mdelay(1000);
1890                 priv->bHwRfOffAction = 1;
1891                 rtl92e_set_rf_state(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW,
1892                                     true);
1893                 if (priv->bHwRadioOff)
1894                         argv[1] = "RFOFF";
1895                 else
1896                         argv[1] = "RFON";
1897
1898                 argv[0] = RadioPowerPath;
1899                 argv[2] = NULL;
1900                 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
1901         }
1902 }
1903
1904 void rtl92e_dm_rf_pathcheck_wq(void *data)
1905 {
1906         struct r8192_priv *priv = container_of_dwork_rsl(data,
1907                                   struct r8192_priv,
1908                                   rfpath_check_wq);
1909         struct net_device *dev = priv->rtllib->dev;
1910         u8 rfpath = 0, i;
1911
1912         rfpath = rtl92e_readb(dev, 0xc04);
1913
1914         for (i = 0; i < RF90_PATH_MAX; i++) {
1915                 if (rfpath & (0x01<<i))
1916                         priv->brfpath_rxenable[i] = true;
1917                 else
1918                         priv->brfpath_rxenable[i] = false;
1919         }
1920         if (!DM_RxPathSelTable.Enable)
1921                 return;
1922
1923         dm_rxpath_sel_byrssi(dev);
1924 }
1925
1926 static void dm_init_rxpath_selection(struct net_device *dev)
1927 {
1928         u8 i;
1929         struct r8192_priv *priv = rtllib_priv(dev);
1930
1931         DM_RxPathSelTable.Enable = 1;
1932         DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
1933         DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
1934         if (priv->CustomerID == RT_CID_819x_Netcore)
1935                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1936         else
1937                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
1938         DM_RxPathSelTable.disabledRF = 0;
1939         for (i = 0; i < 4; i++) {
1940                 DM_RxPathSelTable.rf_rssi[i] = 50;
1941                 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
1942                 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
1943         }
1944 }
1945
1946 #define PWDB_IN_RANGE   ((cur_cck_pwdb < tmp_cck_max_pwdb) &&   \
1947                         (cur_cck_pwdb > tmp_cck_sec_pwdb))
1948
1949 static void dm_rxpath_sel_byrssi(struct net_device *dev)
1950 {
1951         struct r8192_priv *priv = rtllib_priv(dev);
1952         u8 i, max_rssi_index = 0, min_rssi_index = 0;
1953         u8 sec_rssi_index = 0, rf_num = 0;
1954         u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
1955         u8 cck_default_Rx = 0x2;
1956         u8 cck_optional_Rx = 0x3;
1957         long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
1958         u8 cck_rx_ver2_max_index = 0, cck_rx_ver2_min_index = 0;
1959         u8 cck_rx_ver2_sec_index = 0;
1960         u8 cur_rf_rssi;
1961         long cur_cck_pwdb;
1962         static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
1963         u8 update_cck_rx_path;
1964
1965         if (priv->rf_type != RF_2T4R)
1966                 return;
1967
1968         if (!cck_Rx_Path_initialized) {
1969                 DM_RxPathSelTable.cck_Rx_path = (rtl92e_readb(dev, 0xa07)&0xf);
1970                 cck_Rx_Path_initialized = 1;
1971         }
1972
1973         DM_RxPathSelTable.disabledRF = 0xf;
1974         DM_RxPathSelTable.disabledRF &= ~(rtl92e_readb(dev, 0xc04));
1975
1976         if (priv->rtllib->mode == WIRELESS_MODE_B)
1977                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1978
1979         for (i = 0; i < RF90_PATH_MAX; i++) {
1980                 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
1981
1982                 if (priv->brfpath_rxenable[i]) {
1983                         rf_num++;
1984                         cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
1985
1986                         if (rf_num == 1) {
1987                                 max_rssi_index = min_rssi_index = sec_rssi_index = i;
1988                                 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
1989                         } else if (rf_num == 2) {
1990                                 if (cur_rf_rssi >= tmp_max_rssi) {
1991                                         tmp_max_rssi = cur_rf_rssi;
1992                                         max_rssi_index = i;
1993                                 } else {
1994                                         tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
1995                                         sec_rssi_index = min_rssi_index = i;
1996                                 }
1997                         } else {
1998                                 if (cur_rf_rssi > tmp_max_rssi) {
1999                                         tmp_sec_rssi = tmp_max_rssi;
2000                                         sec_rssi_index = max_rssi_index;
2001                                         tmp_max_rssi = cur_rf_rssi;
2002                                         max_rssi_index = i;
2003                                 } else if (cur_rf_rssi == tmp_max_rssi) {
2004                                         tmp_sec_rssi = cur_rf_rssi;
2005                                         sec_rssi_index = i;
2006                                 } else if ((cur_rf_rssi < tmp_max_rssi) &&
2007                                            (cur_rf_rssi > tmp_sec_rssi)) {
2008                                         tmp_sec_rssi = cur_rf_rssi;
2009                                         sec_rssi_index = i;
2010                                 } else if (cur_rf_rssi == tmp_sec_rssi) {
2011                                         if (tmp_sec_rssi == tmp_min_rssi) {
2012                                                 tmp_sec_rssi = cur_rf_rssi;
2013                                                 sec_rssi_index = i;
2014                                         }
2015                                 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
2016                                            (cur_rf_rssi > tmp_min_rssi)) {
2017                                         ;
2018                                 } else if (cur_rf_rssi == tmp_min_rssi) {
2019                                         if (tmp_sec_rssi == tmp_min_rssi) {
2020                                                 tmp_min_rssi = cur_rf_rssi;
2021                                                 min_rssi_index = i;
2022                                         }
2023                                 } else if (cur_rf_rssi < tmp_min_rssi) {
2024                                         tmp_min_rssi = cur_rf_rssi;
2025                                         min_rssi_index = i;
2026                                 }
2027                         }
2028                 }
2029         }
2030
2031         rf_num = 0;
2032         if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2033                 for (i = 0; i < RF90_PATH_MAX; i++) {
2034                         if (priv->brfpath_rxenable[i]) {
2035                                 rf_num++;
2036                                 cur_cck_pwdb =
2037                                          DM_RxPathSelTable.cck_pwdb_sta[i];
2038
2039                                 if (rf_num == 1) {
2040                                         cck_rx_ver2_max_index = i;
2041                                         cck_rx_ver2_min_index = i;
2042                                         cck_rx_ver2_sec_index = i;
2043                                         tmp_cck_max_pwdb = cur_cck_pwdb;
2044                                         tmp_cck_min_pwdb = cur_cck_pwdb;
2045                                         tmp_cck_sec_pwdb = cur_cck_pwdb;
2046                                 } else if (rf_num == 2) {
2047                                         if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
2048                                                 tmp_cck_max_pwdb = cur_cck_pwdb;
2049                                                 cck_rx_ver2_max_index = i;
2050                                         } else {
2051                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2052                                                 tmp_cck_min_pwdb = cur_cck_pwdb;
2053                                                 cck_rx_ver2_sec_index = i;
2054                                                 cck_rx_ver2_min_index = i;
2055                                         }
2056                                 } else {
2057                                         if (cur_cck_pwdb > tmp_cck_max_pwdb) {
2058                                                 tmp_cck_sec_pwdb =
2059                                                          tmp_cck_max_pwdb;
2060                                                 cck_rx_ver2_sec_index =
2061                                                          cck_rx_ver2_max_index;
2062                                                 tmp_cck_max_pwdb = cur_cck_pwdb;
2063                                                 cck_rx_ver2_max_index = i;
2064                                         } else if (cur_cck_pwdb ==
2065                                                    tmp_cck_max_pwdb) {
2066                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2067                                                 cck_rx_ver2_sec_index = i;
2068                                         } else if (PWDB_IN_RANGE) {
2069                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2070                                                 cck_rx_ver2_sec_index = i;
2071                                         } else if (cur_cck_pwdb ==
2072                                                    tmp_cck_sec_pwdb) {
2073                                                 if (tmp_cck_sec_pwdb ==
2074                                                     tmp_cck_min_pwdb) {
2075                                                         tmp_cck_sec_pwdb =
2076                                                                  cur_cck_pwdb;
2077                                                         cck_rx_ver2_sec_index =
2078                                                                  i;
2079                                                 }
2080                                         } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
2081                                                    (cur_cck_pwdb > tmp_cck_min_pwdb)) {
2082                                                 ;
2083                                         } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
2084                                                 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2085                                                         tmp_cck_min_pwdb = cur_cck_pwdb;
2086                                                         cck_rx_ver2_min_index = i;
2087                                                 }
2088                                         } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
2089                                                 tmp_cck_min_pwdb = cur_cck_pwdb;
2090                                                 cck_rx_ver2_min_index = i;
2091                                         }
2092                                 }
2093
2094                         }
2095                 }
2096         }
2097
2098         update_cck_rx_path = 0;
2099         if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2100                 cck_default_Rx = cck_rx_ver2_max_index;
2101                 cck_optional_Rx = cck_rx_ver2_sec_index;
2102                 if (tmp_cck_max_pwdb != -64)
2103                         update_cck_rx_path = 1;
2104         }
2105
2106         if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
2107                 if ((tmp_max_rssi - tmp_min_rssi) >=
2108                      DM_RxPathSelTable.diff_TH) {
2109                         DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] =
2110                                  tmp_max_rssi+5;
2111                         rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable,
2112                                           0x1<<min_rssi_index, 0x0);
2113                         rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable,
2114                                           0x1<<min_rssi_index, 0x0);
2115                         disabled_rf_cnt++;
2116                 }
2117                 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
2118                         cck_default_Rx = max_rssi_index;
2119                         cck_optional_Rx = sec_rssi_index;
2120                         if (tmp_max_rssi)
2121                                 update_cck_rx_path = 1;
2122                 }
2123         }
2124
2125         if (update_cck_rx_path) {
2126                 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) |
2127                                                 (cck_optional_Rx);
2128                 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000,
2129                                   DM_RxPathSelTable.cck_Rx_path);
2130         }
2131
2132         if (DM_RxPathSelTable.disabledRF) {
2133                 for (i = 0; i < 4; i++) {
2134                         if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) {
2135                                 if (tmp_max_rssi >=
2136                                     DM_RxPathSelTable.rf_enable_rssi_th[i]) {
2137                                         rtl92e_set_bb_reg(dev,
2138                                                           rOFDM0_TRxPathEnable,
2139                                                           0x1 << i, 0x1);
2140                                         rtl92e_set_bb_reg(dev,
2141                                                           rOFDM1_TRxPathEnable,
2142                                                           0x1 << i, 0x1);
2143                                         DM_RxPathSelTable.rf_enable_rssi_th[i]
2144                                                  = 100;
2145                                         disabled_rf_cnt--;
2146                                 }
2147                         }
2148                 }
2149         }
2150 }
2151
2152 static  void    dm_check_rx_path_selection(struct net_device *dev)
2153 {
2154         struct r8192_priv *priv = rtllib_priv(dev);
2155
2156         queue_delayed_work_rsl(priv->priv_wq, &priv->rfpath_check_wq, 0);
2157 }
2158
2159
2160 static void dm_init_fsync(struct net_device *dev)
2161 {
2162         struct r8192_priv *priv = rtllib_priv(dev);
2163
2164         priv->rtllib->fsync_time_interval = 500;
2165         priv->rtllib->fsync_rate_bitmap = 0x0f000800;
2166         priv->rtllib->fsync_rssi_threshold = 30;
2167         priv->rtllib->bfsync_enable = false;
2168         priv->rtllib->fsync_multiple_timeinterval = 3;
2169         priv->rtllib->fsync_firstdiff_ratethreshold = 100;
2170         priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2171         priv->rtllib->fsync_state = Default_Fsync;
2172         priv->framesyncMonitor = 1;
2173
2174         setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,
2175                    (unsigned long) dev);
2176 }
2177
2178
2179 static void dm_deInit_fsync(struct net_device *dev)
2180 {
2181         struct r8192_priv *priv = rtllib_priv(dev);
2182
2183         del_timer_sync(&priv->fsync_timer);
2184 }
2185
2186 static void dm_fsync_timer_callback(unsigned long data)
2187 {
2188         struct net_device *dev = (struct net_device *)data;
2189         struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
2190         u32 rate_index, rate_count = 0, rate_count_diff = 0;
2191         bool            bSwitchFromCountDiff = false;
2192         bool            bDoubleTimeInterval = false;
2193
2194         if (priv->rtllib->state == RTLLIB_LINKED &&
2195             priv->rtllib->bfsync_enable &&
2196             (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2197                 u32 rate_bitmap;
2198
2199                 for (rate_index = 0; rate_index <= 27; rate_index++) {
2200                         rate_bitmap  = 1 << rate_index;
2201                         if (priv->rtllib->fsync_rate_bitmap &  rate_bitmap)
2202                                 rate_count +=
2203                                    priv->stats.received_rate_histogram[1]
2204                                    [rate_index];
2205                 }
2206
2207                 if (rate_count < priv->rate_record)
2208                         rate_count_diff = 0xffffffff - rate_count +
2209                                           priv->rate_record;
2210                 else
2211                         rate_count_diff = rate_count - priv->rate_record;
2212                 if (rate_count_diff < priv->rateCountDiffRecord) {
2213
2214                         u32 DiffNum = priv->rateCountDiffRecord -
2215                                       rate_count_diff;
2216                         if (DiffNum >=
2217                             priv->rtllib->fsync_seconddiff_ratethreshold)
2218                                 priv->ContinueDiffCount++;
2219                         else
2220                                 priv->ContinueDiffCount = 0;
2221
2222                         if (priv->ContinueDiffCount >= 2) {
2223                                 bSwitchFromCountDiff = true;
2224                                 priv->ContinueDiffCount = 0;
2225                         }
2226                 } else {
2227                         priv->ContinueDiffCount = 0;
2228                 }
2229
2230                 if (rate_count_diff <=
2231                     priv->rtllib->fsync_firstdiff_ratethreshold) {
2232                         bSwitchFromCountDiff = true;
2233                         priv->ContinueDiffCount = 0;
2234                 }
2235                 priv->rate_record = rate_count;
2236                 priv->rateCountDiffRecord = rate_count_diff;
2237                 RT_TRACE(COMP_HALDM,
2238                          "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2239                          priv->rate_record, rate_count, rate_count_diff,
2240                          priv->bswitch_fsync);
2241                 if (priv->undecorated_smoothed_pwdb >
2242                     priv->rtllib->fsync_rssi_threshold &&
2243                     bSwitchFromCountDiff) {
2244                         bDoubleTimeInterval = true;
2245                         priv->bswitch_fsync = !priv->bswitch_fsync;
2246                         if (priv->bswitch_fsync) {
2247                                 rtl92e_writeb(dev, 0xC36, 0x1c);
2248                                 rtl92e_writeb(dev, 0xC3e, 0x90);
2249                         } else {
2250                                 rtl92e_writeb(dev, 0xC36, 0x5c);
2251                                 rtl92e_writeb(dev, 0xC3e, 0x96);
2252                         }
2253                 } else if (priv->undecorated_smoothed_pwdb <=
2254                            priv->rtllib->fsync_rssi_threshold) {
2255                         if (priv->bswitch_fsync) {
2256                                 priv->bswitch_fsync  = false;
2257                                 rtl92e_writeb(dev, 0xC36, 0x5c);
2258                                 rtl92e_writeb(dev, 0xC3e, 0x96);
2259                         }
2260                 }
2261                 if (bDoubleTimeInterval) {
2262                         if (timer_pending(&priv->fsync_timer))
2263                                 del_timer_sync(&priv->fsync_timer);
2264                         priv->fsync_timer.expires = jiffies +
2265                                  msecs_to_jiffies(priv->rtllib->fsync_time_interval *
2266                                  priv->rtllib->fsync_multiple_timeinterval);
2267                         add_timer(&priv->fsync_timer);
2268                 } else {
2269                         if (timer_pending(&priv->fsync_timer))
2270                                 del_timer_sync(&priv->fsync_timer);
2271                         priv->fsync_timer.expires = jiffies +
2272                                  msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2273                         add_timer(&priv->fsync_timer);
2274                 }
2275         } else {
2276                 if (priv->bswitch_fsync) {
2277                         priv->bswitch_fsync  = false;
2278                         rtl92e_writeb(dev, 0xC36, 0x5c);
2279                         rtl92e_writeb(dev, 0xC3e, 0x96);
2280                 }
2281                 priv->ContinueDiffCount = 0;
2282                 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2283         }
2284         RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
2285         RT_TRACE(COMP_HALDM,
2286                  "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2287                  priv->rate_record, rate_count, rate_count_diff,
2288                  priv->bswitch_fsync);
2289 }
2290
2291 static void dm_StartHWFsync(struct net_device *dev)
2292 {
2293         u8 rf_timing = 0x77;
2294         struct r8192_priv *priv = rtllib_priv(dev);
2295
2296         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2297         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cf);
2298         priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
2299                                       (u8 *)(&rf_timing));
2300         rtl92e_writeb(dev, 0xc3b, 0x41);
2301 }
2302
2303 static void dm_EndHWFsync(struct net_device *dev)
2304 {
2305         u8 rf_timing = 0xaa;
2306         struct r8192_priv *priv = rtllib_priv(dev);
2307
2308         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2309         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2310         priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
2311                                      (&rf_timing));
2312         rtl92e_writeb(dev, 0xc3b, 0x49);
2313 }
2314
2315 static void dm_EndSWFsync(struct net_device *dev)
2316 {
2317         struct r8192_priv *priv = rtllib_priv(dev);
2318
2319         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2320         del_timer_sync(&(priv->fsync_timer));
2321
2322         if (priv->bswitch_fsync) {
2323                 priv->bswitch_fsync  = false;
2324
2325                 rtl92e_writeb(dev, 0xC36, 0x5c);
2326
2327                 rtl92e_writeb(dev, 0xC3e, 0x96);
2328         }
2329
2330         priv->ContinueDiffCount = 0;
2331         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2332 }
2333
2334 static void dm_StartSWFsync(struct net_device *dev)
2335 {
2336         struct r8192_priv *priv = rtllib_priv(dev);
2337         u32                     rateIndex;
2338         u32                     rateBitmap;
2339
2340         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2341         priv->rate_record = 0;
2342         priv->ContinueDiffCount = 0;
2343         priv->rateCountDiffRecord = 0;
2344         priv->bswitch_fsync  = false;
2345
2346         if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
2347                 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
2348                 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
2349         } else {
2350                 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
2351                 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2352         }
2353         for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2354                 rateBitmap  = 1 << rateIndex;
2355                 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
2356                         priv->rate_record +=
2357                                  priv->stats.received_rate_histogram[1]
2358                                 [rateIndex];
2359         }
2360         if (timer_pending(&priv->fsync_timer))
2361                 del_timer_sync(&priv->fsync_timer);
2362         priv->fsync_timer.expires = jiffies +
2363                                     msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2364         add_timer(&priv->fsync_timer);
2365
2366         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cd);
2367
2368 }
2369
2370 static void dm_check_fsync(struct net_device *dev)
2371 {
2372 #define RegC38_Default                  0
2373 #define RegC38_NonFsync_Other_AP        1
2374 #define RegC38_Fsync_AP_BCM             2
2375         struct r8192_priv *priv = rtllib_priv(dev);
2376         static u8 reg_c38_State = RegC38_Default;
2377         static u32 reset_cnt;
2378
2379         RT_TRACE(COMP_HALDM,
2380                  "RSSI %d TimeInterval %d MultipleTimeInterval %d\n",
2381                  priv->rtllib->fsync_rssi_threshold,
2382                  priv->rtllib->fsync_time_interval,
2383                  priv->rtllib->fsync_multiple_timeinterval);
2384         RT_TRACE(COMP_HALDM,
2385                  "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n",
2386                  priv->rtllib->fsync_rate_bitmap,
2387                  priv->rtllib->fsync_firstdiff_ratethreshold,
2388                  priv->rtllib->fsync_seconddiff_ratethreshold);
2389
2390         if (priv->rtllib->state == RTLLIB_LINKED &&
2391             priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2392                 if (priv->rtllib->bfsync_enable == 0) {
2393                         switch (priv->rtllib->fsync_state) {
2394                         case Default_Fsync:
2395                                 dm_StartHWFsync(dev);
2396                                 priv->rtllib->fsync_state = HW_Fsync;
2397                                 break;
2398                         case SW_Fsync:
2399                                 dm_EndSWFsync(dev);
2400                                 dm_StartHWFsync(dev);
2401                                 priv->rtllib->fsync_state = HW_Fsync;
2402                                 break;
2403                         case HW_Fsync:
2404                         default:
2405                                 break;
2406                         }
2407                 } else {
2408                         switch (priv->rtllib->fsync_state) {
2409                         case Default_Fsync:
2410                                 dm_StartSWFsync(dev);
2411                                 priv->rtllib->fsync_state = SW_Fsync;
2412                                 break;
2413                         case HW_Fsync:
2414                                 dm_EndHWFsync(dev);
2415                                 dm_StartSWFsync(dev);
2416                                 priv->rtllib->fsync_state = SW_Fsync;
2417                                 break;
2418                         case SW_Fsync:
2419                         default:
2420                                 break;
2421
2422                         }
2423                 }
2424                 if (priv->framesyncMonitor) {
2425                         if (reg_c38_State != RegC38_Fsync_AP_BCM) {
2426                                 rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95);
2427
2428                                 reg_c38_State = RegC38_Fsync_AP_BCM;
2429                         }
2430                 }
2431         } else {
2432                 switch (priv->rtllib->fsync_state) {
2433                 case HW_Fsync:
2434                         dm_EndHWFsync(dev);
2435                         priv->rtllib->fsync_state = Default_Fsync;
2436                         break;
2437                 case SW_Fsync:
2438                         dm_EndSWFsync(dev);
2439                         priv->rtllib->fsync_state = Default_Fsync;
2440                         break;
2441                 case Default_Fsync:
2442                 default:
2443                         break;
2444                 }
2445
2446                 if (priv->framesyncMonitor) {
2447                         if (priv->rtllib->state == RTLLIB_LINKED) {
2448                                 if (priv->undecorated_smoothed_pwdb <=
2449                                     RegC38_TH) {
2450                                         if (reg_c38_State !=
2451                                             RegC38_NonFsync_Other_AP) {
2452                                                         rtl92e_writeb(dev,
2453                                                             rOFDM0_RxDetector3,
2454                                                             0x90);
2455
2456                                                 reg_c38_State =
2457                                                      RegC38_NonFsync_Other_AP;
2458                                         }
2459                                 } else if (priv->undecorated_smoothed_pwdb >=
2460                                            (RegC38_TH+5)) {
2461                                         if (reg_c38_State) {
2462                                                 rtl92e_writeb(dev,
2463                                                         rOFDM0_RxDetector3,
2464                                                         priv->framesync);
2465                                                 reg_c38_State = RegC38_Default;
2466                                         }
2467                                 }
2468                         } else {
2469                                 if (reg_c38_State) {
2470                                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2471                                                       priv->framesync);
2472                                         reg_c38_State = RegC38_Default;
2473                                 }
2474                         }
2475                 }
2476         }
2477         if (priv->framesyncMonitor) {
2478                 if (priv->reset_count != reset_cnt) {
2479                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2480                                        priv->framesync);
2481                         reg_c38_State = RegC38_Default;
2482                         reset_cnt = priv->reset_count;
2483                 }
2484         } else {
2485                 if (reg_c38_State) {
2486                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2487                                        priv->framesync);
2488                         reg_c38_State = RegC38_Default;
2489                 }
2490         }
2491 }
2492
2493 /*---------------------------Define function prototype------------------------*/
2494 static void dm_init_dynamic_txpower(struct net_device *dev)
2495 {
2496         struct r8192_priv *priv = rtllib_priv(dev);
2497
2498         priv->rtllib->bdynamic_txpower_enable = true;
2499         priv->bLastDTPFlag_High = false;
2500         priv->bLastDTPFlag_Low = false;
2501         priv->bDynamicTxHighPower = false;
2502         priv->bDynamicTxLowPower = false;
2503 }
2504
2505 static void dm_dynamic_txpower(struct net_device *dev)
2506 {
2507         struct r8192_priv *priv = rtllib_priv(dev);
2508         unsigned int txhipower_threshhold = 0;
2509         unsigned int txlowpower_threshold = 0;
2510
2511         if (priv->rtllib->bdynamic_txpower_enable != true) {
2512                 priv->bDynamicTxHighPower = false;
2513                 priv->bDynamicTxLowPower = false;
2514                 return;
2515         }
2516         if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) &&
2517             (priv->rtllib->mode == IEEE_G)) {
2518                 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
2519                 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
2520         } else {
2521                 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
2522                 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
2523         }
2524
2525         RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n",
2526                  priv->undecorated_smoothed_pwdb);
2527
2528         if (priv->rtllib->state == RTLLIB_LINKED) {
2529                 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) {
2530                         priv->bDynamicTxHighPower = true;
2531                         priv->bDynamicTxLowPower = false;
2532                 } else {
2533                         if (priv->undecorated_smoothed_pwdb <
2534                             txlowpower_threshold && priv->bDynamicTxHighPower)
2535                                 priv->bDynamicTxHighPower = false;
2536                         if (priv->undecorated_smoothed_pwdb < 35)
2537                                 priv->bDynamicTxLowPower = true;
2538                         else if (priv->undecorated_smoothed_pwdb >= 40)
2539                                 priv->bDynamicTxLowPower = false;
2540                 }
2541         } else {
2542                 priv->bDynamicTxHighPower = false;
2543                 priv->bDynamicTxLowPower = false;
2544         }
2545
2546         if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
2547             (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
2548                 RT_TRACE(COMP_TXAGC, "SetTxPowerLevel8190()  channel = %d\n",
2549                          priv->rtllib->current_network.channel);
2550
2551                 rtl92e_set_tx_power(dev, priv->rtllib->current_network.channel);
2552         }
2553         priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
2554         priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
2555
2556 }
2557
2558 static void dm_check_txrateandretrycount(struct net_device *dev)
2559 {
2560         struct r8192_priv *priv = rtllib_priv(dev);
2561         struct rtllib_device *ieee = priv->rtllib;
2562
2563         ieee->softmac_stats.CurrentShowTxate = rtl92e_readb(dev,
2564                                                  Current_Tx_Rate_Reg);
2565
2566         ieee->softmac_stats.last_packet_rate = rtl92e_readb(dev,
2567                                                  Initial_Tx_Rate_Reg);
2568
2569         ieee->softmac_stats.txretrycount = rtl92e_readl(dev,
2570                                                  Tx_Retry_Count_Reg);
2571 }
2572
2573 static void dm_send_rssi_tofw(struct net_device *dev)
2574 {
2575         struct r8192_priv *priv = rtllib_priv(dev);
2576
2577         rtl92e_writeb(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
2578 }