1 /******************************************************************************
4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
5 * Linux device driver for RTL8192SU
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 * Modifications for inclusion into the Linux staging tree are
21 * Copyright(c) 2010 Larry Finger. All rights reserved.
23 * Contact information:
24 * WLAN FAE <wlanfae@realtek.com>
25 * Larry Finger <Larry.Finger@lwfinger.net>
27 ******************************************************************************/
29 #define _RTL8712_XMIT_C_
31 #include "osdep_service.h"
32 #include "drv_types.h"
34 #include "osdep_intf.h"
37 static void dump_xframe(struct _adapter *padapter,
38 struct xmit_frame *pxmitframe);
39 static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz);
41 sint _r8712_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag)
43 phw_txqueue->ac_tag = ac_tag;
46 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
49 phw_txqueue->ff_hwaddr = RTL8712_DMA_BKQ;
52 phw_txqueue->ff_hwaddr = RTL8712_DMA_VIQ;
55 phw_txqueue->ff_hwaddr = RTL8712_DMA_VOQ;
58 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
64 int r8712_txframes_sta_ac_pending(struct _adapter *padapter,
65 struct pkt_attrib *pattrib)
67 struct sta_info *psta;
68 struct tx_servq *ptxservq;
69 int priority = pattrib->priority;
75 ptxservq = &(psta->sta_xmitpriv.bk_q);
79 ptxservq = &(psta->sta_xmitpriv.vi_q);
83 ptxservq = &(psta->sta_xmitpriv.vo_q);
88 ptxservq = &(psta->sta_xmitpriv.be_q);
91 return ptxservq->qcnt;
94 static u32 get_ff_hwaddr(struct xmit_frame *pxmitframe)
97 struct pkt_attrib *pattrib = &pxmitframe->attrib;
98 struct _adapter *padapter = pxmitframe->padapter;
99 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
101 if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
102 addr = RTL8712_DMA_H2CCMD;
103 else if (pxmitframe->frame_tag == MGNT_FRAMETAG)
104 addr = RTL8712_DMA_MGTQ;
105 else if (pdvobj->nr_endpoint == 6) {
106 switch (pattrib->priority) {
109 addr = RTL8712_DMA_BEQ;
113 addr = RTL8712_DMA_BKQ;
117 addr = RTL8712_DMA_VIQ;
121 addr = RTL8712_DMA_VOQ;
127 addr = RTL8712_DMA_H2CCMD;
130 addr = RTL8712_DMA_BEQ;
133 } else if (pdvobj->nr_endpoint == 4) {
134 switch (pattrib->qsel) {
139 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
145 addr = RTL8712_DMA_VOQ;/*RTL8712_EP_HI;*/
151 addr = RTL8712_DMA_H2CCMD;
154 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
161 static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv,
162 struct hw_xmit *phwxmit,
163 struct tx_servq *ptxservq,
164 struct __queue *pframe_queue)
166 struct list_head *xmitframe_plist, *xmitframe_phead;
167 struct xmit_frame *pxmitframe = NULL;
169 xmitframe_phead = &pframe_queue->queue;
170 xmitframe_plist = xmitframe_phead->next;
171 if ((end_of_queue_search(xmitframe_phead, xmitframe_plist)) == false) {
172 pxmitframe = LIST_CONTAINOR(xmitframe_plist,
173 struct xmit_frame, list);
174 list_del_init(&pxmitframe->list);
181 static struct xmit_frame *dequeue_xframe_ex(struct xmit_priv *pxmitpriv,
182 struct hw_xmit *phwxmit_i, sint entry)
185 struct list_head *sta_plist, *sta_phead;
186 struct hw_xmit *phwxmit;
187 struct tx_servq *ptxservq = NULL;
188 struct __queue *pframe_queue = NULL;
189 struct xmit_frame *pxmitframe = NULL;
191 int j, tmp, acirp_cnt[4];
193 /*entry indx: 0->vo, 1->vi, 2->be, 3->bk.*/
194 inx[0] = 0; acirp_cnt[0] = pxmitpriv->voq_cnt;
195 inx[1] = 1; acirp_cnt[1] = pxmitpriv->viq_cnt;
196 inx[2] = 2; acirp_cnt[2] = pxmitpriv->beq_cnt;
197 inx[3] = 3; acirp_cnt[3] = pxmitpriv->bkq_cnt;
198 for (i = 0; i < 4; i++) {
199 for (j = i + 1; j < 4; j++) {
200 if (acirp_cnt[j] < acirp_cnt[i]) {
202 acirp_cnt[i] = acirp_cnt[j];
210 spin_lock_irqsave(&pxmitpriv->lock, irqL0);
211 for (i = 0; i < entry; i++) {
212 phwxmit = phwxmit_i + inx[i];
213 sta_phead = &phwxmit->sta_queue->queue;
214 sta_plist = sta_phead->next;
215 while ((end_of_queue_search(sta_phead, sta_plist)) == false) {
216 ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq,
218 pframe_queue = &ptxservq->sta_pending;
219 pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit,
220 ptxservq, pframe_queue);
223 goto exit_dequeue_xframe_ex;
225 sta_plist = sta_plist->next;
226 /*Remove sta node when there are no pending packets.*/
227 if (list_empty(&pframe_queue->queue)) {
228 /* must be done after sta_plist->next
231 list_del_init(&ptxservq->tx_pending);
235 exit_dequeue_xframe_ex:
236 spin_unlock_irqrestore(&pxmitpriv->lock, irqL0);
240 void r8712_do_queue_select(struct _adapter *padapter,
241 struct pkt_attrib *pattrib)
243 unsigned int qsel = 0;
244 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
246 if (pdvobj->nr_endpoint == 6)
247 qsel = (unsigned int) pattrib->priority;
248 else if (pdvobj->nr_endpoint == 4) {
249 qsel = (unsigned int) pattrib->priority;
250 if (qsel == 0 || qsel == 3)
252 else if (qsel == 1 || qsel == 2)
254 else if (qsel == 4 || qsel == 5)
256 else if (qsel == 6 || qsel == 7)
261 pattrib->qsel = qsel;
264 #ifdef CONFIG_R8712_TX_AGGR
265 u8 r8712_construct_txaggr_cmd_desc(struct xmit_buf *pxmitbuf)
267 struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
269 /* Fill up TxCmd Descriptor according as USB FW Tx Aaggregation info.*/
271 ptx_desc->txdw0 = cpu_to_le32(CMD_HDR_SZ&0xffff);
273 cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);
274 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
277 ptx_desc->txdw1 |= cpu_to_le32((0x13<<QSEL_SHT)&0x00001f00);
282 u8 r8712_construct_txaggr_cmd_hdr(struct xmit_buf *pxmitbuf)
284 struct xmit_frame *pxmitframe = (struct xmit_frame *)
286 struct _adapter *padapter = pxmitframe->padapter;
287 struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
288 struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
289 (pxmitbuf->pbuf + TXDESC_SIZE);
291 /* Fill up Cmd Header for USB FW Tx Aggregation.*/
293 pcmd_hdr->cmd_dw0 = cpu_to_le32((GEN_CMD_CODE(_AMSDU_TO_AMPDU) << 16) |
294 (pcmdpriv->cmd_seq << 24));
300 u8 r8712_append_mpdu_unit(struct xmit_buf *pxmitbuf,
301 struct xmit_frame *pxmitframe)
303 struct _adapter *padapter = pxmitframe->padapter;
304 struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
305 int last_txcmdsz = 0;
308 /* 802.3->802.11 convertor */
309 r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
310 /* free skb struct */
311 r8712_xmit_complete(padapter, pxmitframe);
312 if (pxmitframe->attrib.ether_type != 0x0806) {
313 if ((pxmitframe->attrib.ether_type != 0x888e) &&
314 (pxmitframe->attrib.dhcp_pkt != 1)) {
315 r8712_issue_addbareq_cmd(padapter,
316 pxmitframe->attrib.priority);
319 pxmitframe->last[0] = 1;
320 update_txdesc(pxmitframe, (uint *)(pxmitframe->buf_addr),
321 pxmitframe->attrib.last_txcmdsz);
323 last_txcmdsz = pxmitframe->attrib.last_txcmdsz;
324 padding_sz = (8 - (last_txcmdsz % 8));
325 if ((last_txcmdsz % 8) != 0) {
327 for (i = 0; i < padding_sz; i++)
328 *(pxmitframe->buf_addr+TXDESC_SIZE+last_txcmdsz+i) = 0;
330 /* Add the new mpdu's length */
331 ptx_desc->txdw0 = cpu_to_le32((ptx_desc->txdw0&0xffff0000) |
332 ((ptx_desc->txdw0&0x0000ffff)+
333 ((TXDESC_SIZE+last_txcmdsz+padding_sz)&0x0000ffff)));
339 u8 r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf,
340 struct xmit_frame *pxmitframe)
342 /* linux complete context doesnt need to protect */
343 pxmitframe->pxmitbuf = pxmitbuf;
344 pxmitbuf->priv_data = pxmitframe;
345 pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
346 /* buffer addr assoc */
347 pxmitframe->buf_addr = pxmitbuf->pbuf+TXDESC_SIZE+CMD_HDR_SZ;
348 /*RTL8712_DMA_H2CCMD */
349 r8712_construct_txaggr_cmd_desc(pxmitbuf);
350 r8712_construct_txaggr_cmd_hdr(pxmitbuf);
351 if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS)
352 pxmitbuf->aggr_nr = 1;
357 u16 r8712_xmitframe_aggr_next(struct xmit_buf *pxmitbuf,
358 struct xmit_frame *pxmitframe)
360 pxmitframe->pxmitbuf = pxmitbuf;
361 pxmitbuf->priv_data = pxmitframe;
362 pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
363 /* buffer addr assoc */
364 pxmitframe->buf_addr = pxmitbuf->pbuf + TXDESC_SIZE +
365 (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
366 if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS) {
367 r8712_free_xmitframe_ex(&pxmitframe->padapter->xmitpriv,
373 (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
376 u8 r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf,
377 struct xmit_frame *pxmitframe)
379 struct _adapter *padapter = pxmitframe->padapter;
380 struct dvobj_priv *pdvobj = (struct dvobj_priv *) &padapter->dvobjpriv;
381 struct tx_desc *ptxdesc = (struct tx_desc *)pxmitbuf->pbuf;
382 struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
383 (pxmitbuf->pbuf + TXDESC_SIZE);
384 u16 total_length = (u16) (ptxdesc->txdw0 & 0xffff);
386 /* use 1st xmitframe as media */
387 xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
388 pcmd_hdr->cmd_dw0 = cpu_to_le32(((total_length-CMD_HDR_SZ)&0x0000ffff)|
389 (pcmd_hdr->cmd_dw0&0xffff0000));
391 /* urb length in cmd_dw1 */
392 pcmd_hdr->cmd_dw1 = cpu_to_le32((pxmitbuf->aggr_nr & 0xff)|
393 ((total_length+TXDESC_SIZE) << 16));
394 pxmitframe->last[0] = 1;
395 pxmitframe->bpending[0] = false;
396 pxmitframe->mem_addr = pxmitbuf->pbuf;
398 if ((pdvobj->ishighspeed && ((total_length+TXDESC_SIZE)%0x200) == 0) ||
399 ((!pdvobj->ishighspeed &&
400 ((total_length+TXDESC_SIZE)%0x40) == 0))) {
401 ptxdesc->txdw0 |= cpu_to_le32
402 (((TXDESC_SIZE+OFFSET_SZ+8)<<OFFSET_SHT)&0x00ff0000);
403 /*32 bytes for TX Desc + 8 bytes pending*/
405 ptxdesc->txdw0 |= cpu_to_le32
406 (((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);
407 /*default = 32 bytes for TX Desc*/
409 r8712_write_port(pxmitframe->padapter, RTL8712_DMA_H2CCMD,
410 total_length+TXDESC_SIZE, (u8 *)pxmitframe);
417 static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz)
420 struct _adapter *padapter = pxmitframe->padapter;
421 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
422 struct qos_priv *pqospriv = &pmlmepriv->qospriv;
423 struct security_priv *psecuritypriv = &padapter->securitypriv;
424 struct pkt_attrib *pattrib = &pxmitframe->attrib;
425 struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
426 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
427 #ifdef CONFIG_R8712_TX_AGGR
428 struct cmd_priv *pcmdpriv = (struct cmd_priv *)&padapter->cmdpriv;
430 u8 blnSetTxDescOffset;
431 sint bmcst = IS_MCAST(pattrib->ra);
432 struct ht_priv *phtpriv = &pmlmepriv->htpriv;
433 struct tx_desc txdesc_mp;
435 memcpy(&txdesc_mp, ptxdesc, sizeof(struct tx_desc));
436 memset(ptxdesc, 0, sizeof(struct tx_desc));
438 ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
439 if (pdvobj->ishighspeed) {
440 if (((sz + TXDESC_SIZE) % 512) == 0)
441 blnSetTxDescOffset = 1;
443 blnSetTxDescOffset = 0;
445 if (((sz + TXDESC_SIZE) % 64) == 0)
446 blnSetTxDescOffset = 1;
448 blnSetTxDescOffset = 0;
450 if (blnSetTxDescOffset) {
451 /* 32 bytes for TX Desc + 8 bytes pending */
452 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ + 8) <<
453 OFFSET_SHT) & 0x00ff0000);
455 /* default = 32 bytes for TX Desc */
456 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ) <<
457 OFFSET_SHT) & 0x00ff0000);
459 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
460 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
462 ptxdesc->txdw1 |= cpu_to_le32((pattrib->mac_id)&0x1f);
464 #ifdef CONFIG_R8712_TX_AGGR
465 /* dirty workaround, need to check if it is aggr cmd. */
466 if ((u8 *)pmem != (u8 *)pxmitframe->pxmitbuf->pbuf) {
467 ptxdesc->txdw0 |= cpu_to_le32
468 ((0x3 << TYPE_SHT)&TYPE_MSK);
469 qsel = (uint)(pattrib->qsel & 0x0000001f);
472 ptxdesc->txdw1 |= cpu_to_le32
473 ((qsel << QSEL_SHT) & 0x00001f00);
474 ptxdesc->txdw2 = cpu_to_le32
475 ((qsel << RTS_RC_SHT)&0x001f0000);
476 ptxdesc->txdw6 |= cpu_to_le32
477 ((0x5 << RSVD6_SHT)&RSVD6_MSK);
479 ptxdesc->txdw0 |= cpu_to_le32
480 ((0x3 << TYPE_SHT)&TYPE_MSK);
481 ptxdesc->txdw1 |= cpu_to_le32
482 ((0x13 << QSEL_SHT) & 0x00001f00);
483 qsel = (uint)(pattrib->qsel & 0x0000001f);
486 ptxdesc->txdw2 = cpu_to_le32
487 ((qsel << RTS_RC_SHT)&0x0001f000);
488 ptxdesc->txdw7 |= cpu_to_le32
489 (pcmdpriv->cmd_seq << 24);
492 pattrib->qsel = 0x13;
494 qsel = (uint)(pattrib->qsel & 0x0000001f);
495 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
497 if (!pqospriv->qos_option)
498 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/*Non-QoS*/
499 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
500 switch (pattrib->encrypt) { /*SEC_TYPE*/
503 ptxdesc->txdw1 |= cpu_to_le32((0x01 << 22) &
505 /*KEY_ID when WEP is used;*/
506 ptxdesc->txdw1 |= cpu_to_le32((psecuritypriv->
507 PrivacyKeyIndex << 17) &
512 ptxdesc->txdw1 |= cpu_to_le32((0x02 << 22) &
516 ptxdesc->txdw1 |= cpu_to_le32((0x03 << 22) &
526 ptxdesc->txdw2 |= cpu_to_le32(BMC);
529 /* f/w will increase the seqnum by itself, driver pass the
530 * correct priority to fw
531 * fw will check the correct priority for increasing the
532 * seqnum per tid. about usb using 4-endpoint, qsel points out
533 * the correct mapping between AC&Endpoint,
534 * the purpose is that correct mapping lets the MAC release
535 * the AC Queue list correctly. */
536 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
538 if ((pattrib->ether_type != 0x888e) &&
539 (pattrib->ether_type != 0x0806) &&
540 (pattrib->dhcp_pkt != 1)) {
541 /*Not EAP & ARP type data packet*/
542 if (phtpriv->ht_option == 1) { /*B/G/N Mode*/
543 if (phtpriv->ampdu_enable != true)
544 ptxdesc->txdw2 |= cpu_to_le32(BK);
547 /* EAP data packet and ARP packet.
548 * Use the 1M data rate to send the EAP/ARP packet.
549 * This will maybe make the handshake smooth.
551 /*driver uses data rate*/
552 ptxdesc->txdw4 = cpu_to_le32(0x80000000);
553 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/*1M*/
555 if (pattrib->pctrl == 1) { /* mp tx packets */
556 struct tx_desc *ptxdesc_mp;
557 ptxdesc_mp = &txdesc_mp;
559 ptxdesc->txdw2 = cpu_to_le32(ptxdesc_mp->txdw2);
561 ptxdesc->txdw2 |= cpu_to_le32(BMC);
562 ptxdesc->txdw2 |= cpu_to_le32(BK);
564 ptxdesc->txdw4 = cpu_to_le32(ptxdesc_mp->txdw4);
566 ptxdesc->txdw5 = cpu_to_le32(ptxdesc_mp->txdw5);
567 pattrib->pctrl = 0;/* reset to zero; */
569 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
571 ptxdesc->txdw1 |= (0x05) & 0x1f;/*CAM_ID(MAC_ID), default=5;*/
572 qsel = (uint)(pattrib->qsel & 0x0000001f);
573 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
574 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/* Non-QoS */
577 ptxdesc->txdw2 |= cpu_to_le32(BMC);
579 /* f/w will increase the seqnum by itself, driver pass the
580 * correct priority to fw
581 * fw will check the correct priority for increasing the seqnum
582 * per tid. about usb using 4-endpoint, qsel points out the
583 * correct mapping between AC&Endpoint,
584 * the purpose is that correct mapping let the MAC releases
585 * the AC Queue list correctly. */
586 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
589 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
591 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/* gtest 1M */
592 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) {
595 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
598 qsel = (uint)(pattrib->priority&0x0000001f);
599 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
602 ptxdesc->txdw3 = cpu_to_le32((pattrib->seqnum << SEQ_SHT) &
605 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
607 ptxdesc->txdw5 = cpu_to_le32(0x001f9600);/*gtest*/
611 int r8712_xmitframe_complete(struct _adapter *padapter,
612 struct xmit_priv *pxmitpriv,
613 struct xmit_buf *pxmitbuf)
615 struct hw_xmit *phwxmits;
617 struct xmit_frame *pxmitframe = NULL;
618 #ifdef CONFIG_R8712_TX_AGGR
619 struct xmit_frame *p2ndxmitframe = NULL;
621 int res = _SUCCESS, xcnt = 0;
624 phwxmits = pxmitpriv->hwxmits;
625 hwentry = pxmitpriv->hwxmit_entry;
626 if (pxmitbuf == NULL) {
627 pxmitbuf = r8712_alloc_xmitbuf(pxmitpriv);
630 #ifdef CONFIG_R8712_TX_AGGR
631 pxmitbuf->aggr_nr = 0;
634 /* 1st frame dequeued */
635 pxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, hwentry);
636 /* need to remember the 1st frame */
637 if (pxmitframe != NULL) {
639 #ifdef CONFIG_R8712_TX_AGGR
640 /* 1. dequeue 2nd frame
641 * 2. aggr if 2nd xframe is dequeued, else dump directly
643 if (AGGR_NR_HIGH_BOUND > 1)
644 p2ndxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits,
646 if (pxmitframe->frame_tag != DATA_FRAMETAG) {
647 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
650 if (p2ndxmitframe != NULL)
651 if (p2ndxmitframe->frame_tag != DATA_FRAMETAG) {
652 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
655 r8712_xmitframe_aggr_1st(pxmitbuf, pxmitframe);
656 if (p2ndxmitframe != NULL) {
658 total_length = r8712_xmitframe_aggr_next(
659 pxmitbuf, p2ndxmitframe);
661 p2ndxmitframe = dequeue_xframe_ex(
662 pxmitpriv, phwxmits, hwentry);
663 if (p2ndxmitframe != NULL)
665 r8712_xmitframe_aggr_next(
670 } while (total_length <= 0x1800 &&
671 pxmitbuf->aggr_nr <= AGGR_NR_HIGH_BOUND);
673 if (pxmitbuf->aggr_nr > 0)
674 r8712_dump_aggr_xframe(pxmitbuf, pxmitframe);
678 xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
679 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
680 if (pxmitframe->attrib.priority <= 15)
681 res = r8712_xmitframe_coalesce(padapter,
682 pxmitframe->pkt, pxmitframe);
683 /* always return ndis_packet after
684 * r8712_xmitframe_coalesce */
685 r8712_xmit_complete(padapter, pxmitframe);
688 dump_xframe(padapter, pxmitframe);
690 r8712_free_xmitframe_ex(pxmitpriv, pxmitframe);
694 } else { /* pxmitframe == NULL && p2ndxmitframe == NULL */
695 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
701 static void dump_xframe(struct _adapter *padapter,
702 struct xmit_frame *pxmitframe)
707 struct pkt_attrib *pattrib = &pxmitframe->attrib;
708 struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
709 struct security_priv *psecuritypriv = &padapter->securitypriv;
711 if (pxmitframe->attrib.ether_type != 0x0806) {
712 if (pxmitframe->attrib.ether_type != 0x888e)
713 r8712_issue_addbareq_cmd(padapter, pattrib->priority);
715 mem_addr = pxmitframe->buf_addr;
716 for (t = 0; t < pattrib->nr_frags; t++) {
717 if (t != (pattrib->nr_frags - 1)) {
718 sz = pxmitpriv->frag_len;
719 sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 :
721 pxmitframe->last[t] = 0;
723 sz = pattrib->last_txcmdsz;
724 pxmitframe->last[t] = 1;
726 update_txdesc(pxmitframe, (uint *)mem_addr, sz);
727 w_sz = sz + TXDESC_SIZE;
728 pxmitframe->mem_addr = mem_addr;
729 pxmitframe->bpending[t] = false;
730 ff_hwaddr = get_ff_hwaddr(pxmitframe);
731 #ifdef CONFIG_R8712_TX_AGGR
732 r8712_write_port(padapter, RTL8712_DMA_H2CCMD, w_sz,
733 (unsigned char *)pxmitframe);
735 r8712_write_port(padapter, ff_hwaddr, w_sz,
736 (unsigned char *)pxmitframe);
739 mem_addr = (u8 *)RND4(((addr_t)(mem_addr)));
743 int r8712_xmit_direct(struct _adapter *padapter, struct xmit_frame *pxmitframe)
747 res = r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
748 pxmitframe->pkt = NULL;
750 dump_xframe(padapter, pxmitframe);
754 int r8712_xmit_enqueue(struct _adapter *padapter, struct xmit_frame *pxmitframe)
756 if (r8712_xmit_classifier(padapter, pxmitframe) == _FAIL) {
757 pxmitframe->pkt = NULL;