drivers/staging/rts5208/rtsx_card.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26 #include <linux/workqueue.h>
  27 #include <linux/kernel.h>
  28
  29 #include "rtsx.h"
  30 #include "rtsx_transport.h"
  31 #include "rtsx_scsi.h"
  32 #include "rtsx_card.h"
  33
  34 #include "rtsx_sys.h"
  35 #include "general.h"
  36
  37 #include "sd.h"
  38 #include "xd.h"
  39 #include "ms.h"
  40
  41 void do_remaining_work(struct rtsx_chip *chip)
  42 {
  43         struct sd_info *sd_card = &(chip->sd_card);
  44 #ifdef XD_DELAY_WRITE
  45         struct xd_info *xd_card = &(chip->xd_card);
  46 #endif
  47         struct ms_info *ms_card = &(chip->ms_card);
  48
  49         if (chip->card_ready & SD_CARD) {
  50                 if (sd_card->seq_mode) {
  51                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  52                         sd_card->cleanup_counter++;
  53                 } else {
  54                         sd_card->cleanup_counter = 0;
  55                 }
  56         }
  57
  58 #ifdef XD_DELAY_WRITE
  59         if (chip->card_ready & XD_CARD) {
  60                 if (xd_card->delay_write.delay_write_flag) {
  61                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  62                         xd_card->cleanup_counter++;
  63                 } else {
  64                         xd_card->cleanup_counter = 0;
  65                 }
  66         }
  67 #endif
  68
  69         if (chip->card_ready & MS_CARD) {
  70                 if (CHK_MSPRO(ms_card)) {
  71                         if (ms_card->seq_mode) {
  72                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  73                                 ms_card->cleanup_counter++;
  74                         } else {
  75                                 ms_card->cleanup_counter = 0;
  76                         }
  77                 } else {
  78 #ifdef MS_DELAY_WRITE
  79                         if (ms_card->delay_write.delay_write_flag) {
  80                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  81                                 ms_card->cleanup_counter++;
  82                         } else {
  83                                 ms_card->cleanup_counter = 0;
  84                         }
  85 #endif
  86                 }
  87         }
  88
  89         if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
  90                 sd_cleanup_work(chip);
  91
  92         if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
  93                 xd_cleanup_work(chip);
  94
  95         if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
  96                 ms_cleanup_work(chip);
  97 }
  98
  99 void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
 100 {
 101         u8 reg1 = 0, reg2 = 0;
 102
 103         rtsx_read_register(chip, 0xFF34, &reg1);
 104         rtsx_read_register(chip, 0xFF38, &reg2);
 105         RTSX_DEBUGP("reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", reg1, reg2);
 106         if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
 107                 chip->sd_int = 1;
 108                 rtsx_write_register(chip, SDIO_CTRL, 0xFF,
 109                                 SDIO_BUS_CTRL | SDIO_CD_CTRL);
 110                 rtsx_write_register(chip, PWR_GATE_CTRL,
 111                                 LDO3318_PWR_MASK, LDO_ON);
 112         }
 113 }
 114
 115 #ifdef SUPPORT_SDIO_ASPM
 116 void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
 117 {
 118         u8 buf[12], reg;
 119         int i;
 120
 121         for (i = 0; i < 12; i++)
 122                 rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
 123         rtsx_read_register(chip, 0xFF25, &reg);
 124         if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
 125                 chip->sdio_counter = 0;
 126                 chip->sdio_idle = 0;
 127         } else {
 128                 if (!chip->sdio_idle) {
 129                         chip->sdio_counter++;
 130                         if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
 131                                 chip->sdio_counter = 0;
 132                                 chip->sdio_idle = 1;
 133                         }
 134                 }
 135         }
 136         memcpy(chip->sdio_raw_data, buf, 12);
 137
 138         if (chip->sdio_idle) {
 139                 if (!chip->sdio_aspm) {
 140                         RTSX_DEBUGP("SDIO enter ASPM!\n");
 141                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
 142                                         0x30 | (chip->aspm_level[1] << 2));
 143                         chip->sdio_aspm = 1;
 144                 }
 145         } else {
 146                 if (chip->sdio_aspm) {
 147                         RTSX_DEBUGP("SDIO exit ASPM!\n");
 148                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
 149                         chip->sdio_aspm = 0;
 150                 }
 151         }
 152 }
 153 #endif
 154
 155 void do_reset_sd_card(struct rtsx_chip *chip)
 156 {
 157         int retval;
 158
 159         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 160                      chip->sd_reset_counter, chip->card2lun[SD_CARD]);
 161
 162         if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 163                 clear_bit(SD_NR, &(chip->need_reset));
 164                 chip->sd_reset_counter = 0;
 165                 chip->sd_show_cnt = 0;
 166                 return;
 167         }
 168
 169         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 170
 171         rtsx_set_stat(chip, RTSX_STAT_RUN);
 172         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 173
 174         retval = reset_sd_card(chip);
 175         if (chip->need_release & SD_CARD)
 176                 return;
 177         if (retval == STATUS_SUCCESS) {
 178                 clear_bit(SD_NR, &(chip->need_reset));
 179                 chip->sd_reset_counter = 0;
 180                 chip->sd_show_cnt = 0;
 181                 chip->card_ready |= SD_CARD;
 182                 chip->card_fail &= ~SD_CARD;
 183                 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
 184         } else {
 185                 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
 186                         clear_bit(SD_NR, &(chip->need_reset));
 187                         chip->sd_reset_counter = 0;
 188                         chip->sd_show_cnt = 0;
 189                 } else {
 190                         chip->sd_reset_counter++;
 191                 }
 192                 chip->card_ready &= ~SD_CARD;
 193                 chip->card_fail |= SD_CARD;
 194                 chip->capacity[chip->card2lun[SD_CARD]] = 0;
 195                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 196
 197                 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
 198                 if (!chip->ft2_fast_mode)
 199                         card_power_off(chip, SD_CARD);
 200                 if (chip->sd_io) {
 201                         chip->sd_int = 0;
 202                         try_to_switch_sdio_ctrl(chip);
 203                 } else {
 204                         disable_card_clock(chip, SD_CARD);
 205                 }
 206         }
 207 }
 208
 209 void do_reset_xd_card(struct rtsx_chip *chip)
 210 {
 211         int retval;
 212
 213         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 214                      chip->xd_reset_counter, chip->card2lun[XD_CARD]);
 215
 216         if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 217                 clear_bit(XD_NR, &(chip->need_reset));
 218                 chip->xd_reset_counter = 0;
 219                 chip->xd_show_cnt = 0;
 220                 return;
 221         }
 222
 223         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 224
 225         rtsx_set_stat(chip, RTSX_STAT_RUN);
 226         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 227
 228         retval = reset_xd_card(chip);
 229         if (chip->need_release & XD_CARD)
 230                 return;
 231         if (retval == STATUS_SUCCESS) {
 232                 clear_bit(XD_NR, &(chip->need_reset));
 233                 chip->xd_reset_counter = 0;
 234                 chip->card_ready |= XD_CARD;
 235                 chip->card_fail &= ~XD_CARD;
 236                 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
 237         } else {
 238                 if (chip->xd_reset_counter >= MAX_RESET_CNT) {
 239                         clear_bit(XD_NR, &(chip->need_reset));
 240                         chip->xd_reset_counter = 0;
 241                         chip->xd_show_cnt = 0;
 242                 } else {
 243                         chip->xd_reset_counter++;
 244                 }
 245                 chip->card_ready &= ~XD_CARD;
 246                 chip->card_fail |= XD_CARD;
 247                 chip->capacity[chip->card2lun[XD_CARD]] = 0;
 248                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 249
 250                 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
 251                 if (!chip->ft2_fast_mode)
 252                         card_power_off(chip, XD_CARD);
 253                 disable_card_clock(chip, XD_CARD);
 254         }
 255 }
 256
 257 void do_reset_ms_card(struct rtsx_chip *chip)
 258 {
 259         int retval;
 260
 261         RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
 262                      chip->ms_reset_counter, chip->card2lun[MS_CARD]);
 263
 264         if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
 265                 clear_bit(MS_NR, &(chip->need_reset));
 266                 chip->ms_reset_counter = 0;
 267                 chip->ms_show_cnt = 0;
 268                 return;
 269         }
 270
 271         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 272
 273         rtsx_set_stat(chip, RTSX_STAT_RUN);
 274         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 275
 276         retval = reset_ms_card(chip);
 277         if (chip->need_release & MS_CARD)
 278                 return;
 279         if (retval == STATUS_SUCCESS) {
 280                 clear_bit(MS_NR, &(chip->need_reset));
 281                 chip->ms_reset_counter = 0;
 282                 chip->card_ready |= MS_CARD;
 283                 chip->card_fail &= ~MS_CARD;
 284                 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
 285         } else {
 286                 if (chip->ms_reset_counter >= MAX_RESET_CNT) {
 287                         clear_bit(MS_NR, &(chip->need_reset));
 288                         chip->ms_reset_counter = 0;
 289                         chip->ms_show_cnt = 0;
 290                 } else {
 291                         chip->ms_reset_counter++;
 292                 }
 293                 chip->card_ready &= ~MS_CARD;
 294                 chip->card_fail |= MS_CARD;
 295                 chip->capacity[chip->card2lun[MS_CARD]] = 0;
 296                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 297
 298                 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
 299                 if (!chip->ft2_fast_mode)
 300                         card_power_off(chip, MS_CARD);
 301                 disable_card_clock(chip, MS_CARD);
 302         }
 303 }
 304
 305 static void release_sdio(struct rtsx_chip *chip)
 306 {
 307         if (chip->sd_io) {
 308                 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
 309                                 SD_STOP | SD_CLR_ERR);
 310
 311                 if (chip->chip_insert_with_sdio) {
 312                         chip->chip_insert_with_sdio = 0;
 313
 314                         if (CHECK_PID(chip, 0x5288))
 315                                 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
 316                         else
 317                                 rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
 318                 }
 319
 320                 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
 321                 chip->sd_io = 0;
 322         }
 323 }
 324
 325 void rtsx_power_off_card(struct rtsx_chip *chip)
 326 {
 327         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 328                 sd_cleanup_work(chip);
 329                 sd_power_off_card3v3(chip);
 330         }
 331
 332         if (chip->card_ready & XD_CARD) {
 333                 xd_cleanup_work(chip);
 334                 xd_power_off_card3v3(chip);
 335         }
 336
 337         if (chip->card_ready & MS_CARD) {
 338                 ms_cleanup_work(chip);
 339                 ms_power_off_card3v3(chip);
 340         }
 341 }
 342
 343 void rtsx_release_cards(struct rtsx_chip *chip)
 344 {
 345         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 346
 347         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 348                 if (chip->int_reg & SD_EXIST)
 349                         sd_cleanup_work(chip);
 350                 release_sd_card(chip);
 351         }
 352
 353         if (chip->card_ready & XD_CARD) {
 354                 if (chip->int_reg & XD_EXIST)
 355                         xd_cleanup_work(chip);
 356                 release_xd_card(chip);
 357         }
 358
 359         if (chip->card_ready & MS_CARD) {
 360                 if (chip->int_reg & MS_EXIST)
 361                         ms_cleanup_work(chip);
 362                 release_ms_card(chip);
 363         }
 364 }
 365
 366 void rtsx_reset_cards(struct rtsx_chip *chip)
 367 {
 368         if (!chip->need_reset)
 369                 return;
 370
 371         rtsx_set_stat(chip, RTSX_STAT_RUN);
 372
 373         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 374
 375         rtsx_disable_aspm(chip);
 376
 377         if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
 378                 clear_bit(SD_NR, &(chip->need_reset));
 379
 380         if (chip->need_reset & XD_CARD) {
 381                 chip->card_exist |= XD_CARD;
 382
 383                 if (chip->xd_show_cnt >= MAX_SHOW_CNT)
 384                         do_reset_xd_card(chip);
 385                 else
 386                         chip->xd_show_cnt++;
 387         }
 388         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 389                 if (chip->card_exist & XD_CARD) {
 390                         clear_bit(SD_NR, &(chip->need_reset));
 391                         clear_bit(MS_NR, &(chip->need_reset));
 392                 }
 393         }
 394         if (chip->need_reset & SD_CARD) {
 395                 chip->card_exist |= SD_CARD;
 396
 397                 if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
 398                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 399                         do_reset_sd_card(chip);
 400                 } else {
 401                         chip->sd_show_cnt++;
 402                 }
 403         }
 404         if (chip->need_reset & MS_CARD) {
 405                 chip->card_exist |= MS_CARD;
 406
 407                 if (chip->ms_show_cnt >= MAX_SHOW_CNT)
 408                         do_reset_ms_card(chip);
 409                 else
 410                         chip->ms_show_cnt++;
 411         }
 412 }
 413
 414 void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
 415 {
 416         rtsx_set_stat(chip, RTSX_STAT_RUN);
 417
 418         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 419
 420         if (reset_chip)
 421                 rtsx_reset_chip(chip);
 422
 423         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 424
 425         if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
 426                 release_sdio(chip);
 427                 release_sd_card(chip);
 428
 429                 wait_timeout(100);
 430
 431                 chip->card_exist |= SD_CARD;
 432                 do_reset_sd_card(chip);
 433         }
 434
 435         if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
 436                 release_xd_card(chip);
 437
 438                 wait_timeout(100);
 439
 440                 chip->card_exist |= XD_CARD;
 441                 do_reset_xd_card(chip);
 442         }
 443
 444         if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
 445                 release_ms_card(chip);
 446
 447                 wait_timeout(100);
 448
 449                 chip->card_exist |= MS_CARD;
 450                 do_reset_ms_card(chip);
 451         }
 452
 453         chip->need_reinit = 0;
 454 }
 455
 456 #ifdef DISABLE_CARD_INT
 457 void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset,
 458                 unsigned long *need_release)
 459 {
 460         u8 release_map = 0, reset_map = 0;
 461
 462         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 463
 464         if (chip->card_exist) {
 465                 if (chip->card_exist & XD_CARD) {
 466                         if (!(chip->int_reg & XD_EXIST))
 467                                 release_map |= XD_CARD;
 468                 } else if (chip->card_exist & SD_CARD) {
 469                         if (!(chip->int_reg & SD_EXIST))
 470                                 release_map |= SD_CARD;
 471                 } else if (chip->card_exist & MS_CARD) {
 472                         if (!(chip->int_reg & MS_EXIST))
 473                                 release_map |= MS_CARD;
 474                 }
 475         } else {
 476                 if (chip->int_reg & XD_EXIST)
 477                         reset_map |= XD_CARD;
 478                 else if (chip->int_reg & SD_EXIST)
 479                         reset_map |= SD_CARD;
 480                 else if (chip->int_reg & MS_EXIST)
 481                         reset_map |= MS_CARD;
 482         }
 483
 484         if (reset_map) {
 485                 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
 486                 int i;
 487
 488                 for (i = 0; i < (DEBOUNCE_CNT); i++) {
 489                         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 490
 491                         if (chip->int_reg & XD_EXIST)
 492                                 xd_cnt++;
 493                         else
 494                                 xd_cnt = 0;
 495
 496                         if (chip->int_reg & SD_EXIST)
 497                                 sd_cnt++;
 498                         else
 499                                 sd_cnt = 0;
 500
 501                         if (chip->int_reg & MS_EXIST)
 502                                 ms_cnt++;
 503                         else
 504                                 ms_cnt = 0;
 505
 506                         wait_timeout(30);
 507                 }
 508
 509                 reset_map = 0;
 510                 if (!(chip->card_exist & XD_CARD) &&
 511                                 (xd_cnt > (DEBOUNCE_CNT-1)))
 512                         reset_map |= XD_CARD;
 513                 if (!(chip->card_exist & SD_CARD) &&
 514                                 (sd_cnt > (DEBOUNCE_CNT-1)))
 515                         reset_map |= SD_CARD;
 516                 if (!(chip->card_exist & MS_CARD) &&
 517                                 (ms_cnt > (DEBOUNCE_CNT-1)))
 518                         reset_map |= MS_CARD;
 519         }
 520
 521         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
 522                 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
 523
 524         if (need_reset)
 525                 *need_reset = reset_map;
 526         if (need_release)
 527                 *need_release = release_map;
 528 }
 529 #endif
 530
 531 void rtsx_init_cards(struct rtsx_chip *chip)
 532 {
 533         if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
 534                 RTSX_DEBUGP("Reset chip in polling thread!\n");
 535                 rtsx_reset_chip(chip);
 536                 RTSX_CLR_DELINK(chip);
 537         }
 538
 539 #ifdef DISABLE_CARD_INT
 540         card_cd_debounce(chip, &(chip->need_reset), &(chip->need_release));
 541 #endif
 542
 543         if (chip->need_release) {
 544                 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 545                         if (chip->int_reg & XD_EXIST) {
 546                                 clear_bit(SD_NR, &(chip->need_release));
 547                                 clear_bit(MS_NR, &(chip->need_release));
 548                         }
 549                 }
 550
 551                 if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
 552                         clear_bit(SD_NR, &(chip->need_release));
 553                 if (!(chip->card_exist & XD_CARD))
 554                         clear_bit(XD_NR, &(chip->need_release));
 555                 if (!(chip->card_exist & MS_CARD))
 556                         clear_bit(MS_NR, &(chip->need_release));
 557
 558                 RTSX_DEBUGP("chip->need_release = 0x%x\n",
 559                                 (unsigned int)(chip->need_release));
 560
 561 #ifdef SUPPORT_OCP
 562                 if (chip->need_release) {
 563                         if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
 564                                 rtsx_write_register(chip, OCPCLR,
 565                                                 CARD_OC_INT_CLR | CARD_OC_CLR,
 566                                                 CARD_OC_INT_CLR | CARD_OC_CLR);
 567                         chip->ocp_stat = 0;
 568                 }
 569 #endif
 570                 if (chip->need_release) {
 571                         rtsx_set_stat(chip, RTSX_STAT_RUN);
 572                         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 573                 }
 574
 575                 if (chip->need_release & SD_CARD) {
 576                         clear_bit(SD_NR, &(chip->need_release));
 577                         chip->card_exist &= ~SD_CARD;
 578                         chip->card_ejected &= ~SD_CARD;
 579                         chip->card_fail &= ~SD_CARD;
 580                         CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
 581                         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 582                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 583
 584                         release_sdio(chip);
 585                         release_sd_card(chip);
 586                 }
 587
 588                 if (chip->need_release & XD_CARD) {
 589                         clear_bit(XD_NR, &(chip->need_release));
 590                         chip->card_exist &= ~XD_CARD;
 591                         chip->card_ejected &= ~XD_CARD;
 592                         chip->card_fail &= ~XD_CARD;
 593                         CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
 594                         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 595
 596                         release_xd_card(chip);
 597
 598                         if (CHECK_PID(chip, 0x5288) &&
 599                                         CHECK_BARO_PKG(chip, QFN))
 600                                 rtsx_write_register(chip, HOST_SLEEP_STATE,
 601                                                 0xC0, 0xC0);
 602                 }
 603
 604                 if (chip->need_release & MS_CARD) {
 605                         clear_bit(MS_NR, &(chip->need_release));
 606                         chip->card_exist &= ~MS_CARD;
 607                         chip->card_ejected &= ~MS_CARD;
 608                         chip->card_fail &= ~MS_CARD;
 609                         CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
 610                         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 611
 612                         release_ms_card(chip);
 613                 }
 614
 615                 RTSX_DEBUGP("chip->card_exist = 0x%x\n", chip->card_exist);
 616
 617                 if (!chip->card_exist)
 618                         turn_off_led(chip, LED_GPIO);
 619         }
 620
 621         if (chip->need_reset) {
 622                 RTSX_DEBUGP("chip->need_reset = 0x%x\n",
 623                                 (unsigned int)(chip->need_reset));
 624
 625                 rtsx_reset_cards(chip);
 626         }
 627
 628         if (chip->need_reinit) {
 629                 RTSX_DEBUGP("chip->need_reinit = 0x%x\n",
 630                                 (unsigned int)(chip->need_reinit));
 631
 632                 rtsx_reinit_cards(chip, 0);
 633         }
 634 }
 635
 636 static inline u8 double_depth(u8 depth)
 637 {
 638         return (depth > 1) ? (depth - 1) : depth;
 639 }
 640
 641 int switch_ssc_clock(struct rtsx_chip *chip, int clk)
 642 {
 643         int retval;
 644         u8 N = (u8)(clk - 2), min_N, max_N;
 645         u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
 646         int sd_vpclk_phase_reset = 0;
 647
 648         if (chip->cur_clk == clk)
 649                 return STATUS_SUCCESS;
 650
 651         min_N = 60;
 652         max_N = 120;
 653         max_div = CLK_DIV_4;
 654
 655         RTSX_DEBUGP("Switch SSC clock to %dMHz (cur_clk = %d)\n",
 656                         clk, chip->cur_clk);
 657
 658         if ((clk <= 2) || (N > max_N))
 659                 TRACE_RET(chip, STATUS_FAIL);
 660
 661         mcu_cnt = (u8)(125/clk + 3);
 662         if (mcu_cnt > 7)
 663                 mcu_cnt = 7;
 664
 665         div = CLK_DIV_1;
 666         while ((N < min_N) && (div < max_div)) {
 667                 N = (N + 2) * 2 - 2;
 668                 div++;
 669         }
 670         RTSX_DEBUGP("N = %d, div = %d\n", N, div);
 671
 672         if (chip->ssc_en) {
 673                 ssc_depth = 0x01;
 674                 N -= 2;
 675         } else {
 676                 ssc_depth = 0;
 677         }
 678
 679         ssc_depth_mask = 0x03;
 680
 681         RTSX_DEBUGP("ssc_depth = %d\n", ssc_depth);
 682
 683         rtsx_init_cmd(chip);
 684         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
 685         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 686         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
 687         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
 688         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N);
 689         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
 690         if (sd_vpclk_phase_reset) {
 691                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 692                         PHASE_NOT_RESET, 0);
 693                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 694                         PHASE_NOT_RESET, PHASE_NOT_RESET);
 695         }
 696
 697         retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
 698         if (retval < 0)
 699                 TRACE_RET(chip, STATUS_ERROR);
 700
 701         udelay(10);
 702         RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
 703
 704         chip->cur_clk = clk;
 705
 706         return STATUS_SUCCESS;
 707 }
 708
 709 int switch_normal_clock(struct rtsx_chip *chip, int clk)
 710 {
 711         u8 sel, div, mcu_cnt;
 712         int sd_vpclk_phase_reset = 0;
 713
 714         if (chip->cur_clk == clk)
 715                 return STATUS_SUCCESS;
 716
 717         switch (clk) {
 718         case CLK_20:
 719                 RTSX_DEBUGP("Switch clock to 20MHz\n");
 720                 sel = SSC_80;
 721                 div = CLK_DIV_4;
 722                 mcu_cnt = 7;
 723                 break;
 724
 725         case CLK_30:
 726                 RTSX_DEBUGP("Switch clock to 30MHz\n");
 727                 sel = SSC_120;
 728                 div = CLK_DIV_4;
 729                 mcu_cnt = 7;
 730                 break;
 731
 732         case CLK_40:
 733                 RTSX_DEBUGP("Switch clock to 40MHz\n");
 734                 sel = SSC_80;
 735                 div = CLK_DIV_2;
 736                 mcu_cnt = 7;
 737                 break;
 738
 739         case CLK_50:
 740                 RTSX_DEBUGP("Switch clock to 50MHz\n");
 741                 sel = SSC_100;
 742                 div = CLK_DIV_2;
 743                 mcu_cnt = 6;
 744                 break;
 745
 746         case CLK_60:
 747                 RTSX_DEBUGP("Switch clock to 60MHz\n");
 748                 sel = SSC_120;
 749                 div = CLK_DIV_2;
 750                 mcu_cnt = 6;
 751                 break;
 752
 753         case CLK_80:
 754                 RTSX_DEBUGP("Switch clock to 80MHz\n");
 755                 sel = SSC_80;
 756                 div = CLK_DIV_1;
 757                 mcu_cnt = 5;
 758                 break;
 759
 760         case CLK_100:
 761                 RTSX_DEBUGP("Switch clock to 100MHz\n");
 762                 sel = SSC_100;
 763                 div = CLK_DIV_1;
 764                 mcu_cnt = 5;
 765                 break;
 766
 767         case CLK_120:
 768                 RTSX_DEBUGP("Switch clock to 120MHz\n");
 769                 sel = SSC_120;
 770                 div = CLK_DIV_1;
 771                 mcu_cnt = 5;
 772                 break;
 773
 774         case CLK_150:
 775                 RTSX_DEBUGP("Switch clock to 150MHz\n");
 776                 sel = SSC_150;
 777                 div = CLK_DIV_1;
 778                 mcu_cnt = 4;
 779                 break;
 780
 781         case CLK_200:
 782                 RTSX_DEBUGP("Switch clock to 200MHz\n");
 783                 sel = SSC_200;
 784                 div = CLK_DIV_1;
 785                 mcu_cnt = 4;
 786                 break;
 787
 788         default:
 789                 RTSX_DEBUGP("Try to switch to an illegal clock (%d)\n", clk);
 790                 TRACE_RET(chip, STATUS_FAIL);
 791         }
 792
 793         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
 794         if (sd_vpclk_phase_reset) {
 795                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
 796                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0);
 797         }
 798         RTSX_WRITE_REG(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 799         RTSX_WRITE_REG(chip, CLK_SEL, 0xFF, sel);
 800
 801         if (sd_vpclk_phase_reset) {
 802                 udelay(200);
 803                 RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET,
 804                                 PHASE_NOT_RESET);
 805                 RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET,
 806                                 PHASE_NOT_RESET);
 807                 udelay(200);
 808         }
 809         RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, 0);
 810
 811         chip->cur_clk = clk;
 812
 813         return STATUS_SUCCESS;
 814 }
 815
 816 void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip,
 817                 u32 byte_cnt, u8 pack_size)
 818 {
 819         if (pack_size > DMA_1024)
 820                 pack_size = DMA_512;
 821
 822         rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
 823
 824         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
 825         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
 826         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
 827         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
 828
 829         if (dir == DMA_FROM_DEVICE) {
 830                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 831                         0x03 | DMA_PACK_SIZE_MASK,
 832                              DMA_DIR_FROM_CARD | DMA_EN | pack_size);
 833         } else {
 834                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 835                         0x03 | DMA_PACK_SIZE_MASK,
 836                              DMA_DIR_TO_CARD | DMA_EN | pack_size);
 837         }
 838
 839         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
 840 }
 841
 842 int enable_card_clock(struct rtsx_chip *chip, u8 card)
 843 {
 844         u8 clk_en = 0;
 845
 846         if (card & XD_CARD)
 847                 clk_en |= XD_CLK_EN;
 848         if (card & SD_CARD)
 849                 clk_en |= SD_CLK_EN;
 850         if (card & MS_CARD)
 851                 clk_en |= MS_CLK_EN;
 852
 853         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
 854
 855         return STATUS_SUCCESS;
 856 }
 857
 858 int disable_card_clock(struct rtsx_chip *chip, u8 card)
 859 {
 860         u8 clk_en = 0;
 861
 862         if (card & XD_CARD)
 863                 clk_en |= XD_CLK_EN;
 864         if (card & SD_CARD)
 865                 clk_en |= SD_CLK_EN;
 866         if (card & MS_CARD)
 867                 clk_en |= MS_CLK_EN;
 868
 869         RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, 0);
 870
 871         return STATUS_SUCCESS;
 872 }
 873
 874 int card_power_on(struct rtsx_chip *chip, u8 card)
 875 {
 876         int retval;
 877         u8 mask, val1, val2;
 878
 879         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 880                 mask = MS_POWER_MASK;
 881                 val1 = MS_PARTIAL_POWER_ON;
 882                 val2 = MS_POWER_ON;
 883         } else {
 884                 mask = SD_POWER_MASK;
 885                 val1 = SD_PARTIAL_POWER_ON;
 886                 val2 = SD_POWER_ON;
 887         }
 888
 889         rtsx_init_cmd(chip);
 890         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
 891
 892         retval = rtsx_send_cmd(chip, 0, 100);
 893         if (retval != STATUS_SUCCESS)
 894                 TRACE_RET(chip, STATUS_FAIL);
 895
 896         udelay(chip->pmos_pwr_on_interval);
 897
 898         rtsx_init_cmd(chip);
 899         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
 900
 901         retval = rtsx_send_cmd(chip, 0, 100);
 902         if (retval != STATUS_SUCCESS)
 903                 TRACE_RET(chip, STATUS_FAIL);
 904
 905         return STATUS_SUCCESS;
 906 }
 907
 908 int card_power_off(struct rtsx_chip *chip, u8 card)
 909 {
 910         u8 mask, val;
 911
 912         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 913                 mask = MS_POWER_MASK;
 914                 val = MS_POWER_OFF;
 915         } else {
 916                 mask = SD_POWER_MASK;
 917                 val = SD_POWER_OFF;
 918         }
 919
 920         RTSX_WRITE_REG(chip, CARD_PWR_CTL, mask, val);
 921
 922         return STATUS_SUCCESS;
 923 }
 924
 925 int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
 926         u32 sec_addr, u16 sec_cnt)
 927 {
 928         int retval;
 929         unsigned int lun = SCSI_LUN(srb);
 930         int i;
 931
 932         if (chip->rw_card[lun] == NULL)
 933                 TRACE_RET(chip, STATUS_FAIL);
 934
 935         for (i = 0; i < 3; i++) {
 936                 chip->rw_need_retry = 0;
 937
 938                 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
 939                 if (retval != STATUS_SUCCESS) {
 940                         if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
 941                                 rtsx_release_chip(chip);
 942                                 TRACE_RET(chip, STATUS_FAIL);
 943                         }
 944                         if (detect_card_cd(chip, chip->cur_card) !=
 945                                                         STATUS_SUCCESS)
 946                                 TRACE_RET(chip, STATUS_FAIL);
 947
 948                         if (!chip->rw_need_retry) {
 949                                 RTSX_DEBUGP("RW fail, but no need to retry\n");
 950                                 break;
 951                         }
 952                 } else {
 953                         chip->rw_need_retry = 0;
 954                         break;
 955                 }
 956
 957                 RTSX_DEBUGP("Retry RW, (i = %d)\n", i);
 958         }
 959
 960         return retval;
 961 }
 962
 963 int card_share_mode(struct rtsx_chip *chip, int card)
 964 {
 965         u8 mask, value;
 966
 967         if (CHECK_PID(chip, 0x5208)) {
 968                 mask = CARD_SHARE_MASK;
 969                 if (card == SD_CARD)
 970                         value = CARD_SHARE_48_SD;
 971                 else if (card == MS_CARD)
 972                         value = CARD_SHARE_48_MS;
 973                 else if (card == XD_CARD)
 974                         value = CARD_SHARE_48_XD;
 975                 else
 976                         TRACE_RET(chip, STATUS_FAIL);
 977
 978         } else if (CHECK_PID(chip, 0x5288)) {
 979                 mask = 0x03;
 980                 if (card == SD_CARD)
 981                         value = CARD_SHARE_BAROSSA_SD;
 982                 else if (card == MS_CARD)
 983                         value = CARD_SHARE_BAROSSA_MS;
 984                 else if (card == XD_CARD)
 985                         value = CARD_SHARE_BAROSSA_XD;
 986                 else
 987                         TRACE_RET(chip, STATUS_FAIL);
 988
 989         } else {
 990                 TRACE_RET(chip, STATUS_FAIL);
 991         }
 992
 993         RTSX_WRITE_REG(chip, CARD_SHARE_MODE, mask, value);
 994
 995         return STATUS_SUCCESS;
 996 }
 997
 998
 999 int select_card(struct rtsx_chip *chip, int card)
1000 {
1001         int retval;
1002
1003         if (chip->cur_card != card) {
1004                 u8 mod;
1005
1006                 if (card == SD_CARD)
1007                         mod = SD_MOD_SEL;
1008                 else if (card == MS_CARD)
1009                         mod = MS_MOD_SEL;
1010                 else if (card == XD_CARD)
1011                         mod = XD_MOD_SEL;
1012                 else if (card == SPI_CARD)
1013                         mod = SPI_MOD_SEL;
1014                 else
1015                         TRACE_RET(chip, STATUS_FAIL);
1016
1017                 RTSX_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
1018                 chip->cur_card = card;
1019
1020                 retval =  card_share_mode(chip, card);
1021                 if (retval != STATUS_SUCCESS)
1022                         TRACE_RET(chip, STATUS_FAIL);
1023         }
1024
1025         return STATUS_SUCCESS;
1026 }
1027
1028 void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
1029 {
1030         u8 temp_reg;
1031
1032         rtsx_read_register(chip, CARD_GPIO, &temp_reg);
1033         temp_reg ^= (0x01 << gpio);
1034         rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
1035 }
1036
1037 void turn_on_led(struct rtsx_chip *chip, u8 gpio)
1038 {
1039         if (CHECK_PID(chip, 0x5288))
1040                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1041                                 (u8)(1 << gpio));
1042         else
1043                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1044 }
1045
1046 void turn_off_led(struct rtsx_chip *chip, u8 gpio)
1047 {
1048         if (CHECK_PID(chip, 0x5288))
1049                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1050         else
1051                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1052                                 (u8)(1 << gpio));
1053 }
1054
1055 int detect_card_cd(struct rtsx_chip *chip, int card)
1056 {
1057         u32 card_cd, status;
1058
1059         if (card == SD_CARD) {
1060                 card_cd = SD_EXIST;
1061         } else if (card == MS_CARD) {
1062                 card_cd = MS_EXIST;
1063         } else if (card == XD_CARD) {
1064                 card_cd = XD_EXIST;
1065         } else {
1066                 RTSX_DEBUGP("Wrong card type: 0x%x\n", card);
1067                 TRACE_RET(chip, STATUS_FAIL);
1068         }
1069
1070         status = rtsx_readl(chip, RTSX_BIPR);
1071         if (!(status & card_cd))
1072                 TRACE_RET(chip, STATUS_FAIL);
1073
1074         return STATUS_SUCCESS;
1075 }
1076
1077 int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
1078 {
1079         if (chip->card_exist & chip->lun2card[lun])
1080                 return 1;
1081
1082         return 0;
1083 }
1084
1085 int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
1086 {
1087         if (chip->card_ready & chip->lun2card[lun])
1088                 return 1;
1089
1090         return 0;
1091 }
1092
1093 int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
1094 {
1095         if (chip->card_wp & chip->lun2card[lun])
1096                 return 1;
1097
1098         return 0;
1099 }
1100
1101 int check_card_fail(struct rtsx_chip *chip, unsigned int lun)
1102 {
1103         if (chip->card_fail & chip->lun2card[lun])
1104                 return 1;
1105
1106         return 0;
1107 }
1108
1109 int check_card_ejected(struct rtsx_chip *chip, unsigned int lun)
1110 {
1111         if (chip->card_ejected & chip->lun2card[lun])
1112                 return 1;
1113
1114         return 0;
1115 }
1116
1117 u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
1118 {
1119         if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
1120                 return (u8)XD_CARD;
1121         else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
1122                 return (u8)SD_CARD;
1123         else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
1124                 return (u8)MS_CARD;
1125
1126         return 0;
1127 }
1128
1129 void eject_card(struct rtsx_chip *chip, unsigned int lun)
1130 {
1131         do_remaining_work(chip);
1132
1133         if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
1134                 release_sd_card(chip);
1135                 chip->card_ejected |= SD_CARD;
1136                 chip->card_ready &= ~SD_CARD;
1137                 chip->capacity[lun] = 0;
1138         } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
1139                 release_xd_card(chip);
1140                 chip->card_ejected |= XD_CARD;
1141                 chip->card_ready &= ~XD_CARD;
1142                 chip->capacity[lun] = 0;
1143         } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
1144                 release_ms_card(chip);
1145                 chip->card_ejected |= MS_CARD;
1146                 chip->card_ready &= ~MS_CARD;
1147                 chip->capacity[lun] = 0;
1148         }
1149 }