2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_reg.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial.h>
37 #include <linux/serial_8250.h>
38 #include <linux/nmi.h>
39 #include <linux/mutex.h>
40 #include <linux/slab.h>
42 #include <linux/sunserialcore.h>
52 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
53 * is unsafe when used on edge-triggered interrupts.
55 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
57 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
59 static struct uart_driver serial8250_reg;
61 static int serial_index(struct uart_port *port)
63 return (serial8250_reg.minor - 64) + port->line;
66 static unsigned int skip_txen_test; /* force skip of txen test at init time */
72 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
74 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
78 #define DEBUG_INTR(fmt...) printk(fmt)
80 #define DEBUG_INTR(fmt...) do { } while (0)
83 #define PASS_LIMIT 512
85 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
92 #define CONFIG_SERIAL_MANY_PORTS 1
96 * HUB6 is always on. This will be removed once the header
97 * files have been cleaned.
101 #include <asm/serial.h>
103 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * standard enumeration mechanism. Platforms that can find all
105 * serial ports via mechanisms like ACPI or PCI need not supply it.
107 #ifndef SERIAL_PORT_DFNS
108 #define SERIAL_PORT_DFNS
111 static const struct old_serial_port old_serial_port[] = {
112 SERIAL_PORT_DFNS /* defined in asm/serial.h */
115 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 #ifdef CONFIG_SERIAL_8250_RSA
119 #define PORT_RSA_MAX 4
120 static unsigned long probe_rsa[PORT_RSA_MAX];
121 static unsigned int probe_rsa_count;
122 #endif /* CONFIG_SERIAL_8250_RSA */
125 struct hlist_node node;
127 spinlock_t lock; /* Protects list not the hash */
128 struct list_head *head;
131 #define NR_IRQ_HASH 32 /* Can be adjusted later */
132 static struct hlist_head irq_lists[NR_IRQ_HASH];
133 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
136 * Here we define the default xmit fifo size used for each type of UART.
138 static const struct serial8250_config uart_config[] = {
163 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
164 .flags = UART_CAP_FIFO,
175 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
181 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
183 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
189 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
191 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
199 .name = "16C950/954",
202 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
203 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
204 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
210 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
212 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
218 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
219 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
225 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
226 .flags = UART_CAP_FIFO,
232 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
233 .flags = UART_CAP_FIFO | UART_NATSEMI,
239 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
240 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
246 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
247 .flags = UART_CAP_FIFO,
253 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
254 .flags = UART_CAP_FIFO | UART_CAP_AFE,
260 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
261 .flags = UART_CAP_FIFO | UART_CAP_AFE,
267 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
269 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
275 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
276 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
283 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
285 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
292 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
293 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
294 .flags = UART_CAP_FIFO,
301 /* Uart divisor latch read */
302 static int default_serial_dl_read(struct uart_8250_port *up)
304 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
307 /* Uart divisor latch write */
308 static void default_serial_dl_write(struct uart_8250_port *up, int value)
310 serial_out(up, UART_DLL, value & 0xff);
311 serial_out(up, UART_DLM, value >> 8 & 0xff);
314 #ifdef CONFIG_MIPS_ALCHEMY
316 /* Au1x00 UART hardware has a weird register layout */
317 static const u8 au_io_in_map[] = {
327 static const u8 au_io_out_map[] = {
335 static unsigned int au_serial_in(struct uart_port *p, int offset)
337 offset = au_io_in_map[offset] << p->regshift;
338 return __raw_readl(p->membase + offset);
341 static void au_serial_out(struct uart_port *p, int offset, int value)
343 offset = au_io_out_map[offset] << p->regshift;
344 __raw_writel(value, p->membase + offset);
347 /* Au1x00 haven't got a standard divisor latch */
348 static int au_serial_dl_read(struct uart_8250_port *up)
350 return __raw_readl(up->port.membase + 0x28);
353 static void au_serial_dl_write(struct uart_8250_port *up, int value)
355 __raw_writel(value, up->port.membase + 0x28);
360 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
362 offset = offset << p->regshift;
363 outb(p->hub6 - 1 + offset, p->iobase);
364 return inb(p->iobase + 1);
367 static void hub6_serial_out(struct uart_port *p, int offset, int value)
369 offset = offset << p->regshift;
370 outb(p->hub6 - 1 + offset, p->iobase);
371 outb(value, p->iobase + 1);
374 static unsigned int mem_serial_in(struct uart_port *p, int offset)
376 offset = offset << p->regshift;
377 return readb(p->membase + offset);
380 static void mem_serial_out(struct uart_port *p, int offset, int value)
382 offset = offset << p->regshift;
383 writeb(value, p->membase + offset);
386 static void mem32_serial_out(struct uart_port *p, int offset, int value)
388 offset = offset << p->regshift;
389 writel(value, p->membase + offset);
392 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
394 offset = offset << p->regshift;
395 return readl(p->membase + offset);
398 static unsigned int io_serial_in(struct uart_port *p, int offset)
400 offset = offset << p->regshift;
401 return inb(p->iobase + offset);
404 static void io_serial_out(struct uart_port *p, int offset, int value)
406 offset = offset << p->regshift;
407 outb(value, p->iobase + offset);
410 static int serial8250_default_handle_irq(struct uart_port *port);
411 static int exar_handle_irq(struct uart_port *port);
413 static void set_io_from_upio(struct uart_port *p)
415 struct uart_8250_port *up =
416 container_of(p, struct uart_8250_port, port);
418 up->dl_read = default_serial_dl_read;
419 up->dl_write = default_serial_dl_write;
423 p->serial_in = hub6_serial_in;
424 p->serial_out = hub6_serial_out;
428 p->serial_in = mem_serial_in;
429 p->serial_out = mem_serial_out;
433 p->serial_in = mem32_serial_in;
434 p->serial_out = mem32_serial_out;
437 #ifdef CONFIG_MIPS_ALCHEMY
439 p->serial_in = au_serial_in;
440 p->serial_out = au_serial_out;
441 up->dl_read = au_serial_dl_read;
442 up->dl_write = au_serial_dl_write;
447 p->serial_in = io_serial_in;
448 p->serial_out = io_serial_out;
451 /* Remember loaded iotype */
452 up->cur_iotype = p->iotype;
453 p->handle_irq = serial8250_default_handle_irq;
457 serial_port_out_sync(struct uart_port *p, int offset, int value)
463 p->serial_out(p, offset, value);
464 p->serial_in(p, UART_LCR); /* safe, no side-effects */
467 p->serial_out(p, offset, value);
474 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
476 serial_out(up, UART_SCR, offset);
477 serial_out(up, UART_ICR, value);
480 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
484 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
485 serial_out(up, UART_SCR, offset);
486 value = serial_in(up, UART_ICR);
487 serial_icr_write(up, UART_ACR, up->acr);
495 static void serial8250_clear_fifos(struct uart_8250_port *p)
497 if (p->capabilities & UART_CAP_FIFO) {
498 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
499 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
500 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
501 serial_out(p, UART_FCR, 0);
505 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
509 serial8250_clear_fifos(p);
510 fcr = uart_config[p->port.type].fcr;
511 serial_out(p, UART_FCR, fcr);
513 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
516 * IER sleep support. UARTs which have EFRs need the "extended
517 * capability" bit enabled. Note that on XR16C850s, we need to
518 * reset LCR to write to IER.
520 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
523 * Exar UARTs have a SLEEP register that enables or disables
524 * each UART to enter sleep mode separately. On the XR17V35x the
525 * register is accessible to each UART at the UART_EXAR_SLEEP
526 * offset but the UART channel may only write to the corresponding
529 if ((p->port.type == PORT_XR17V35X) ||
530 (p->port.type == PORT_XR17D15X)) {
531 serial_out(p, UART_EXAR_SLEEP, 0xff);
535 if (p->capabilities & UART_CAP_SLEEP) {
536 if (p->capabilities & UART_CAP_EFR) {
537 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
538 serial_out(p, UART_EFR, UART_EFR_ECB);
539 serial_out(p, UART_LCR, 0);
541 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
542 if (p->capabilities & UART_CAP_EFR) {
543 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
544 serial_out(p, UART_EFR, 0);
545 serial_out(p, UART_LCR, 0);
550 #ifdef CONFIG_SERIAL_8250_RSA
552 * Attempts to turn on the RSA FIFO. Returns zero on failure.
553 * We set the port uart clock rate if we succeed.
555 static int __enable_rsa(struct uart_8250_port *up)
560 mode = serial_in(up, UART_RSA_MSR);
561 result = mode & UART_RSA_MSR_FIFO;
564 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
565 mode = serial_in(up, UART_RSA_MSR);
566 result = mode & UART_RSA_MSR_FIFO;
570 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
575 static void enable_rsa(struct uart_8250_port *up)
577 if (up->port.type == PORT_RSA) {
578 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
579 spin_lock_irq(&up->port.lock);
581 spin_unlock_irq(&up->port.lock);
583 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
584 serial_out(up, UART_RSA_FRR, 0);
589 * Attempts to turn off the RSA FIFO. Returns zero on failure.
590 * It is unknown why interrupts were disabled in here. However,
591 * the caller is expected to preserve this behaviour by grabbing
592 * the spinlock before calling this function.
594 static void disable_rsa(struct uart_8250_port *up)
599 if (up->port.type == PORT_RSA &&
600 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
601 spin_lock_irq(&up->port.lock);
603 mode = serial_in(up, UART_RSA_MSR);
604 result = !(mode & UART_RSA_MSR_FIFO);
607 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
608 mode = serial_in(up, UART_RSA_MSR);
609 result = !(mode & UART_RSA_MSR_FIFO);
613 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
614 spin_unlock_irq(&up->port.lock);
617 #endif /* CONFIG_SERIAL_8250_RSA */
620 * This is a quickie test to see how big the FIFO is.
621 * It doesn't work at all the time, more's the pity.
623 static int size_fifo(struct uart_8250_port *up)
625 unsigned char old_fcr, old_mcr, old_lcr;
626 unsigned short old_dl;
629 old_lcr = serial_in(up, UART_LCR);
630 serial_out(up, UART_LCR, 0);
631 old_fcr = serial_in(up, UART_FCR);
632 old_mcr = serial_in(up, UART_MCR);
633 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
634 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
635 serial_out(up, UART_MCR, UART_MCR_LOOP);
636 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
637 old_dl = serial_dl_read(up);
638 serial_dl_write(up, 0x0001);
639 serial_out(up, UART_LCR, 0x03);
640 for (count = 0; count < 256; count++)
641 serial_out(up, UART_TX, count);
642 mdelay(20);/* FIXME - schedule_timeout */
643 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
644 (count < 256); count++)
645 serial_in(up, UART_RX);
646 serial_out(up, UART_FCR, old_fcr);
647 serial_out(up, UART_MCR, old_mcr);
648 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
649 serial_dl_write(up, old_dl);
650 serial_out(up, UART_LCR, old_lcr);
656 * Read UART ID using the divisor method - set DLL and DLM to zero
657 * and the revision will be in DLL and device type in DLM. We
658 * preserve the device state across this.
660 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
662 unsigned char old_dll, old_dlm, old_lcr;
665 old_lcr = serial_in(p, UART_LCR);
666 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
668 old_dll = serial_in(p, UART_DLL);
669 old_dlm = serial_in(p, UART_DLM);
671 serial_out(p, UART_DLL, 0);
672 serial_out(p, UART_DLM, 0);
674 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
676 serial_out(p, UART_DLL, old_dll);
677 serial_out(p, UART_DLM, old_dlm);
678 serial_out(p, UART_LCR, old_lcr);
684 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
685 * When this function is called we know it is at least a StarTech
686 * 16650 V2, but it might be one of several StarTech UARTs, or one of
687 * its clones. (We treat the broken original StarTech 16650 V1 as a
688 * 16550, and why not? Startech doesn't seem to even acknowledge its
691 * What evil have men's minds wrought...
693 static void autoconfig_has_efr(struct uart_8250_port *up)
695 unsigned int id1, id2, id3, rev;
698 * Everything with an EFR has SLEEP
700 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
703 * First we check to see if it's an Oxford Semiconductor UART.
705 * If we have to do this here because some non-National
706 * Semiconductor clone chips lock up if you try writing to the
707 * LSR register (which serial_icr_read does)
711 * Check for Oxford Semiconductor 16C950.
713 * EFR [4] must be set else this test fails.
715 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
716 * claims that it's needed for 952 dual UART's (which are not
717 * recommended for new designs).
720 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
721 serial_out(up, UART_EFR, UART_EFR_ECB);
722 serial_out(up, UART_LCR, 0x00);
723 id1 = serial_icr_read(up, UART_ID1);
724 id2 = serial_icr_read(up, UART_ID2);
725 id3 = serial_icr_read(up, UART_ID3);
726 rev = serial_icr_read(up, UART_REV);
728 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
730 if (id1 == 0x16 && id2 == 0xC9 &&
731 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
732 up->port.type = PORT_16C950;
735 * Enable work around for the Oxford Semiconductor 952 rev B
736 * chip which causes it to seriously miscalculate baud rates
739 if (id3 == 0x52 && rev == 0x01)
740 up->bugs |= UART_BUG_QUOT;
745 * We check for a XR16C850 by setting DLL and DLM to 0, and then
746 * reading back DLL and DLM. The chip type depends on the DLM
748 * 0x10 - XR16C850 and the DLL contains the chip revision.
752 id1 = autoconfig_read_divisor_id(up);
753 DEBUG_AUTOCONF("850id=%04x ", id1);
756 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
757 up->port.type = PORT_16850;
762 * It wasn't an XR16C850.
764 * We distinguish between the '654 and the '650 by counting
765 * how many bytes are in the FIFO. I'm using this for now,
766 * since that's the technique that was sent to me in the
767 * serial driver update, but I'm not convinced this works.
768 * I've had problems doing this in the past. -TYT
770 if (size_fifo(up) == 64)
771 up->port.type = PORT_16654;
773 up->port.type = PORT_16650V2;
777 * We detected a chip without a FIFO. Only two fall into
778 * this category - the original 8250 and the 16450. The
779 * 16450 has a scratch register (accessible with LCR=0)
781 static void autoconfig_8250(struct uart_8250_port *up)
783 unsigned char scratch, status1, status2;
785 up->port.type = PORT_8250;
787 scratch = serial_in(up, UART_SCR);
788 serial_out(up, UART_SCR, 0xa5);
789 status1 = serial_in(up, UART_SCR);
790 serial_out(up, UART_SCR, 0x5a);
791 status2 = serial_in(up, UART_SCR);
792 serial_out(up, UART_SCR, scratch);
794 if (status1 == 0xa5 && status2 == 0x5a)
795 up->port.type = PORT_16450;
798 static int broken_efr(struct uart_8250_port *up)
801 * Exar ST16C2550 "A2" devices incorrectly detect as
802 * having an EFR, and report an ID of 0x0201. See
803 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
805 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
811 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
813 unsigned char status;
815 status = serial_in(up, 0x04); /* EXCR2 */
816 #define PRESL(x) ((x) & 0x30)
817 if (PRESL(status) == 0x10) {
818 /* already in high speed mode */
821 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
822 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
823 serial_out(up, 0x04, status);
829 * We know that the chip has FIFOs. Does it have an EFR? The
830 * EFR is located in the same register position as the IIR and
831 * we know the top two bits of the IIR are currently set. The
832 * EFR should contain zero. Try to read the EFR.
834 static void autoconfig_16550a(struct uart_8250_port *up)
836 unsigned char status1, status2;
837 unsigned int iersave;
839 up->port.type = PORT_16550A;
840 up->capabilities |= UART_CAP_FIFO;
843 * XR17V35x UARTs have an extra divisor register, DLD
844 * that gets enabled with when DLAB is set which will
845 * cause the device to incorrectly match and assign
846 * port type to PORT_16650. The EFR for this UART is
847 * found at offset 0x09. Instead check the Deice ID (DVID)
848 * register for a 2, 4 or 8 port UART.
850 if (up->port.flags & UPF_EXAR_EFR) {
851 status1 = serial_in(up, UART_EXAR_DVID);
852 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
853 DEBUG_AUTOCONF("Exar XR17V35x ");
854 up->port.type = PORT_XR17V35X;
855 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
864 * Check for presence of the EFR when DLAB is set.
865 * Only ST16C650V1 UARTs pass this test.
867 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
868 if (serial_in(up, UART_EFR) == 0) {
869 serial_out(up, UART_EFR, 0xA8);
870 if (serial_in(up, UART_EFR) != 0) {
871 DEBUG_AUTOCONF("EFRv1 ");
872 up->port.type = PORT_16650;
873 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
875 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
877 serial_out(up, UART_EFR, 0);
882 * Maybe it requires 0xbf to be written to the LCR.
883 * (other ST16C650V2 UARTs, TI16C752A, etc)
885 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
886 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
887 DEBUG_AUTOCONF("EFRv2 ");
888 autoconfig_has_efr(up);
893 * Check for a National Semiconductor SuperIO chip.
894 * Attempt to switch to bank 2, read the value of the LOOP bit
895 * from EXCR1. Switch back to bank 0, change it in MCR. Then
896 * switch back to bank 2, read it from EXCR1 again and check
897 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
899 serial_out(up, UART_LCR, 0);
900 status1 = serial_in(up, UART_MCR);
901 serial_out(up, UART_LCR, 0xE0);
902 status2 = serial_in(up, 0x02); /* EXCR1 */
904 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
905 serial_out(up, UART_LCR, 0);
906 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
907 serial_out(up, UART_LCR, 0xE0);
908 status2 = serial_in(up, 0x02); /* EXCR1 */
909 serial_out(up, UART_LCR, 0);
910 serial_out(up, UART_MCR, status1);
912 if ((status2 ^ status1) & UART_MCR_LOOP) {
915 serial_out(up, UART_LCR, 0xE0);
917 quot = serial_dl_read(up);
920 if (ns16550a_goto_highspeed(up))
921 serial_dl_write(up, quot);
923 serial_out(up, UART_LCR, 0);
925 up->port.uartclk = 921600*16;
926 up->port.type = PORT_NS16550A;
927 up->capabilities |= UART_NATSEMI;
933 * No EFR. Try to detect a TI16750, which only sets bit 5 of
934 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
935 * Try setting it with and without DLAB set. Cheap clones
936 * set bit 5 without DLAB set.
938 serial_out(up, UART_LCR, 0);
939 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
940 status1 = serial_in(up, UART_IIR) >> 5;
941 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
942 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
943 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
944 status2 = serial_in(up, UART_IIR) >> 5;
945 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
946 serial_out(up, UART_LCR, 0);
948 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
950 if (status1 == 6 && status2 == 7) {
951 up->port.type = PORT_16750;
952 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
957 * Try writing and reading the UART_IER_UUE bit (b6).
958 * If it works, this is probably one of the Xscale platform's
960 * We're going to explicitly set the UUE bit to 0 before
961 * trying to write and read a 1 just to make sure it's not
962 * already a 1 and maybe locked there before we even start start.
964 iersave = serial_in(up, UART_IER);
965 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
966 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
968 * OK it's in a known zero state, try writing and reading
969 * without disturbing the current state of the other bits.
971 serial_out(up, UART_IER, iersave | UART_IER_UUE);
972 if (serial_in(up, UART_IER) & UART_IER_UUE) {
975 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
977 DEBUG_AUTOCONF("Xscale ");
978 up->port.type = PORT_XSCALE;
979 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
984 * If we got here we couldn't force the IER_UUE bit to 0.
985 * Log it and continue.
987 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
989 serial_out(up, UART_IER, iersave);
992 * Exar uarts have EFR in a weird location
994 if (up->port.flags & UPF_EXAR_EFR) {
995 DEBUG_AUTOCONF("Exar XR17D15x ");
996 up->port.type = PORT_XR17D15X;
997 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1004 * We distinguish between 16550A and U6 16550A by counting
1005 * how many bytes are in the FIFO.
1007 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1008 up->port.type = PORT_U6_16550A;
1009 up->capabilities |= UART_CAP_AFE;
1014 * This routine is called by rs_init() to initialize a specific serial
1015 * port. It determines what type of UART chip this serial port is
1016 * using: 8250, 16450, 16550, 16550A. The important question is
1017 * whether or not this UART is a 16550A or not, since this will
1018 * determine whether or not we can use its FIFO features or not.
1020 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1022 unsigned char status1, scratch, scratch2, scratch3;
1023 unsigned char save_lcr, save_mcr;
1024 struct uart_port *port = &up->port;
1025 unsigned long flags;
1026 unsigned int old_capabilities;
1028 if (!port->iobase && !port->mapbase && !port->membase)
1031 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1032 serial_index(port), port->iobase, port->membase);
1035 * We really do need global IRQs disabled here - we're going to
1036 * be frobbing the chips IRQ enable register to see if it exists.
1038 spin_lock_irqsave(&port->lock, flags);
1040 up->capabilities = 0;
1043 if (!(port->flags & UPF_BUGGY_UART)) {
1045 * Do a simple existence test first; if we fail this,
1046 * there's no point trying anything else.
1048 * 0x80 is used as a nonsense port to prevent against
1049 * false positives due to ISA bus float. The
1050 * assumption is that 0x80 is a non-existent port;
1051 * which should be safe since include/asm/io.h also
1052 * makes this assumption.
1054 * Note: this is safe as long as MCR bit 4 is clear
1055 * and the device is in "PC" mode.
1057 scratch = serial_in(up, UART_IER);
1058 serial_out(up, UART_IER, 0);
1063 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1064 * 16C754B) allow only to modify them if an EFR bit is set.
1066 scratch2 = serial_in(up, UART_IER) & 0x0f;
1067 serial_out(up, UART_IER, 0x0F);
1071 scratch3 = serial_in(up, UART_IER) & 0x0f;
1072 serial_out(up, UART_IER, scratch);
1073 if (scratch2 != 0 || scratch3 != 0x0F) {
1075 * We failed; there's nothing here
1077 spin_unlock_irqrestore(&port->lock, flags);
1078 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1079 scratch2, scratch3);
1084 save_mcr = serial_in(up, UART_MCR);
1085 save_lcr = serial_in(up, UART_LCR);
1088 * Check to see if a UART is really there. Certain broken
1089 * internal modems based on the Rockwell chipset fail this
1090 * test, because they apparently don't implement the loopback
1091 * test mode. So this test is skipped on the COM 1 through
1092 * COM 4 ports. This *should* be safe, since no board
1093 * manufacturer would be stupid enough to design a board
1094 * that conflicts with COM 1-4 --- we hope!
1096 if (!(port->flags & UPF_SKIP_TEST)) {
1097 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1098 status1 = serial_in(up, UART_MSR) & 0xF0;
1099 serial_out(up, UART_MCR, save_mcr);
1100 if (status1 != 0x90) {
1101 spin_unlock_irqrestore(&port->lock, flags);
1102 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1109 * We're pretty sure there's a port here. Lets find out what
1110 * type of port it is. The IIR top two bits allows us to find
1111 * out if it's 8250 or 16450, 16550, 16550A or later. This
1112 * determines what we test for next.
1114 * We also initialise the EFR (if any) to zero for later. The
1115 * EFR occupies the same register location as the FCR and IIR.
1117 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1118 serial_out(up, UART_EFR, 0);
1119 serial_out(up, UART_LCR, 0);
1121 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1122 scratch = serial_in(up, UART_IIR) >> 6;
1126 autoconfig_8250(up);
1129 port->type = PORT_UNKNOWN;
1132 port->type = PORT_16550;
1135 autoconfig_16550a(up);
1139 #ifdef CONFIG_SERIAL_8250_RSA
1141 * Only probe for RSA ports if we got the region.
1143 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1146 for (i = 0 ; i < probe_rsa_count; ++i) {
1147 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1148 port->type = PORT_RSA;
1155 serial_out(up, UART_LCR, save_lcr);
1157 port->fifosize = uart_config[up->port.type].fifo_size;
1158 old_capabilities = up->capabilities;
1159 up->capabilities = uart_config[port->type].flags;
1160 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1162 if (port->type == PORT_UNKNOWN)
1168 #ifdef CONFIG_SERIAL_8250_RSA
1169 if (port->type == PORT_RSA)
1170 serial_out(up, UART_RSA_FRR, 0);
1172 serial_out(up, UART_MCR, save_mcr);
1173 serial8250_clear_fifos(up);
1174 serial_in(up, UART_RX);
1175 if (up->capabilities & UART_CAP_UUE)
1176 serial_out(up, UART_IER, UART_IER_UUE);
1178 serial_out(up, UART_IER, 0);
1181 spin_unlock_irqrestore(&port->lock, flags);
1182 if (up->capabilities != old_capabilities) {
1184 "ttyS%d: detected caps %08x should be %08x\n",
1185 serial_index(port), old_capabilities,
1189 DEBUG_AUTOCONF("iir=%d ", scratch);
1190 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1193 static void autoconfig_irq(struct uart_8250_port *up)
1195 struct uart_port *port = &up->port;
1196 unsigned char save_mcr, save_ier;
1197 unsigned char save_ICP = 0;
1198 unsigned int ICP = 0;
1202 if (port->flags & UPF_FOURPORT) {
1203 ICP = (port->iobase & 0xfe0) | 0x1f;
1204 save_ICP = inb_p(ICP);
1209 /* forget possible initially masked and pending IRQ */
1210 probe_irq_off(probe_irq_on());
1211 save_mcr = serial_in(up, UART_MCR);
1212 save_ier = serial_in(up, UART_IER);
1213 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1215 irqs = probe_irq_on();
1216 serial_out(up, UART_MCR, 0);
1218 if (port->flags & UPF_FOURPORT) {
1219 serial_out(up, UART_MCR,
1220 UART_MCR_DTR | UART_MCR_RTS);
1222 serial_out(up, UART_MCR,
1223 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1225 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1226 serial_in(up, UART_LSR);
1227 serial_in(up, UART_RX);
1228 serial_in(up, UART_IIR);
1229 serial_in(up, UART_MSR);
1230 serial_out(up, UART_TX, 0xFF);
1232 irq = probe_irq_off(irqs);
1234 serial_out(up, UART_MCR, save_mcr);
1235 serial_out(up, UART_IER, save_ier);
1237 if (port->flags & UPF_FOURPORT)
1238 outb_p(save_ICP, ICP);
1240 port->irq = (irq > 0) ? irq : 0;
1243 static inline void __stop_tx(struct uart_8250_port *p)
1245 if (p->ier & UART_IER_THRI) {
1246 p->ier &= ~UART_IER_THRI;
1247 serial_out(p, UART_IER, p->ier);
1251 static void serial8250_stop_tx(struct uart_port *port)
1253 struct uart_8250_port *up =
1254 container_of(port, struct uart_8250_port, port);
1259 * We really want to stop the transmitter from sending.
1261 if (port->type == PORT_16C950) {
1262 up->acr |= UART_ACR_TXDIS;
1263 serial_icr_write(up, UART_ACR, up->acr);
1267 static void serial8250_start_tx(struct uart_port *port)
1269 struct uart_8250_port *up =
1270 container_of(port, struct uart_8250_port, port);
1272 if (!(up->ier & UART_IER_THRI)) {
1273 up->ier |= UART_IER_THRI;
1274 serial_port_out(port, UART_IER, up->ier);
1276 if (up->bugs & UART_BUG_TXEN) {
1278 lsr = serial_in(up, UART_LSR);
1279 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1280 if (lsr & UART_LSR_TEMT)
1281 serial8250_tx_chars(up);
1286 * Re-enable the transmitter if we disabled it.
1288 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1289 up->acr &= ~UART_ACR_TXDIS;
1290 serial_icr_write(up, UART_ACR, up->acr);
1294 static void serial8250_stop_rx(struct uart_port *port)
1296 struct uart_8250_port *up =
1297 container_of(port, struct uart_8250_port, port);
1299 up->ier &= ~UART_IER_RLSI;
1300 up->port.read_status_mask &= ~UART_LSR_DR;
1301 serial_port_out(port, UART_IER, up->ier);
1304 static void serial8250_enable_ms(struct uart_port *port)
1306 struct uart_8250_port *up =
1307 container_of(port, struct uart_8250_port, port);
1309 /* no MSR capabilities */
1310 if (up->bugs & UART_BUG_NOMSR)
1313 up->ier |= UART_IER_MSI;
1314 serial_port_out(port, UART_IER, up->ier);
1318 * serial8250_rx_chars: processes according to the passed in LSR
1319 * value, and returns the remaining LSR bits not handled
1320 * by this Rx routine.
1323 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1325 struct uart_port *port = &up->port;
1327 int max_count = 256;
1331 if (likely(lsr & UART_LSR_DR))
1332 ch = serial_in(up, UART_RX);
1335 * Intel 82571 has a Serial Over Lan device that will
1336 * set UART_LSR_BI without setting UART_LSR_DR when
1337 * it receives a break. To avoid reading from the
1338 * receive buffer without UART_LSR_DR bit set, we
1339 * just force the read character to be 0
1346 lsr |= up->lsr_saved_flags;
1347 up->lsr_saved_flags = 0;
1349 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1350 if (lsr & UART_LSR_BI) {
1351 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1354 * We do the SysRQ and SAK checking
1355 * here because otherwise the break
1356 * may get masked by ignore_status_mask
1357 * or read_status_mask.
1359 if (uart_handle_break(port))
1361 } else if (lsr & UART_LSR_PE)
1362 port->icount.parity++;
1363 else if (lsr & UART_LSR_FE)
1364 port->icount.frame++;
1365 if (lsr & UART_LSR_OE)
1366 port->icount.overrun++;
1369 * Mask off conditions which should be ignored.
1371 lsr &= port->read_status_mask;
1373 if (lsr & UART_LSR_BI) {
1374 DEBUG_INTR("handling break....");
1376 } else if (lsr & UART_LSR_PE)
1378 else if (lsr & UART_LSR_FE)
1381 if (uart_handle_sysrq_char(port, ch))
1384 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1387 lsr = serial_in(up, UART_LSR);
1388 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1389 spin_unlock(&port->lock);
1390 tty_flip_buffer_push(&port->state->port);
1391 spin_lock(&port->lock);
1394 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1396 void serial8250_tx_chars(struct uart_8250_port *up)
1398 struct uart_port *port = &up->port;
1399 struct circ_buf *xmit = &port->state->xmit;
1403 serial_out(up, UART_TX, port->x_char);
1408 if (uart_tx_stopped(port)) {
1409 serial8250_stop_tx(port);
1412 if (uart_circ_empty(xmit)) {
1417 count = up->tx_loadsz;
1419 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1420 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1422 if (uart_circ_empty(xmit))
1424 } while (--count > 0);
1426 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1427 uart_write_wakeup(port);
1429 DEBUG_INTR("THRE...");
1431 if (uart_circ_empty(xmit))
1434 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1436 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1438 struct uart_port *port = &up->port;
1439 unsigned int status = serial_in(up, UART_MSR);
1441 status |= up->msr_saved_flags;
1442 up->msr_saved_flags = 0;
1443 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1444 port->state != NULL) {
1445 if (status & UART_MSR_TERI)
1447 if (status & UART_MSR_DDSR)
1449 if (status & UART_MSR_DDCD)
1450 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1451 if (status & UART_MSR_DCTS)
1452 uart_handle_cts_change(port, status & UART_MSR_CTS);
1454 wake_up_interruptible(&port->state->port.delta_msr_wait);
1459 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1462 * This handles the interrupt from one port.
1464 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1466 unsigned char status;
1467 unsigned long flags;
1468 struct uart_8250_port *up =
1469 container_of(port, struct uart_8250_port, port);
1471 if (iir & UART_IIR_NO_INT)
1474 spin_lock_irqsave(&port->lock, flags);
1476 status = serial_port_in(port, UART_LSR);
1478 DEBUG_INTR("status = %x...", status);
1480 if (status & (UART_LSR_DR | UART_LSR_BI))
1481 status = serial8250_rx_chars(up, status);
1482 serial8250_modem_status(up);
1483 if (status & UART_LSR_THRE)
1484 serial8250_tx_chars(up);
1486 spin_unlock_irqrestore(&port->lock, flags);
1489 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1491 static int serial8250_default_handle_irq(struct uart_port *port)
1493 unsigned int iir = serial_port_in(port, UART_IIR);
1495 return serial8250_handle_irq(port, iir);
1499 * These Exar UARTs have an extra interrupt indicator that could
1500 * fire for a few unimplemented interrupts. One of which is a
1501 * wakeup event when coming out of sleep. Put this here just
1502 * to be on the safe side that these interrupts don't go unhandled.
1504 static int exar_handle_irq(struct uart_port *port)
1506 unsigned char int0, int1, int2, int3;
1507 unsigned int iir = serial_port_in(port, UART_IIR);
1510 ret = serial8250_handle_irq(port, iir);
1512 if ((port->type == PORT_XR17V35X) ||
1513 (port->type == PORT_XR17D15X)) {
1514 int0 = serial_port_in(port, 0x80);
1515 int1 = serial_port_in(port, 0x81);
1516 int2 = serial_port_in(port, 0x82);
1517 int3 = serial_port_in(port, 0x83);
1524 * This is the serial driver's interrupt routine.
1526 * Arjan thinks the old way was overly complex, so it got simplified.
1527 * Alan disagrees, saying that need the complexity to handle the weird
1528 * nature of ISA shared interrupts. (This is a special exception.)
1530 * In order to handle ISA shared interrupts properly, we need to check
1531 * that all ports have been serviced, and therefore the ISA interrupt
1532 * line has been de-asserted.
1534 * This means we need to loop through all ports. checking that they
1535 * don't have an interrupt pending.
1537 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1539 struct irq_info *i = dev_id;
1540 struct list_head *l, *end = NULL;
1541 int pass_counter = 0, handled = 0;
1543 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1545 spin_lock(&i->lock);
1549 struct uart_8250_port *up;
1550 struct uart_port *port;
1552 up = list_entry(l, struct uart_8250_port, list);
1555 if (port->handle_irq(port)) {
1558 } else if (end == NULL)
1563 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1564 /* If we hit this, we're dead. */
1565 printk_ratelimited(KERN_ERR
1566 "serial8250: too much work for irq%d\n", irq);
1571 spin_unlock(&i->lock);
1573 DEBUG_INTR("end.\n");
1575 return IRQ_RETVAL(handled);
1579 * To support ISA shared interrupts, we need to have one interrupt
1580 * handler that ensures that the IRQ line has been deasserted
1581 * before returning. Failing to do this will result in the IRQ
1582 * line being stuck active, and, since ISA irqs are edge triggered,
1583 * no more IRQs will be seen.
1585 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1587 spin_lock_irq(&i->lock);
1589 if (!list_empty(i->head)) {
1590 if (i->head == &up->list)
1591 i->head = i->head->next;
1592 list_del(&up->list);
1594 BUG_ON(i->head != &up->list);
1597 spin_unlock_irq(&i->lock);
1598 /* List empty so throw away the hash node */
1599 if (i->head == NULL) {
1600 hlist_del(&i->node);
1605 static int serial_link_irq_chain(struct uart_8250_port *up)
1607 struct hlist_head *h;
1608 struct hlist_node *n;
1610 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1612 mutex_lock(&hash_mutex);
1614 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1616 hlist_for_each(n, h) {
1617 i = hlist_entry(n, struct irq_info, node);
1618 if (i->irq == up->port.irq)
1623 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1625 mutex_unlock(&hash_mutex);
1628 spin_lock_init(&i->lock);
1629 i->irq = up->port.irq;
1630 hlist_add_head(&i->node, h);
1632 mutex_unlock(&hash_mutex);
1634 spin_lock_irq(&i->lock);
1637 list_add(&up->list, i->head);
1638 spin_unlock_irq(&i->lock);
1642 INIT_LIST_HEAD(&up->list);
1643 i->head = &up->list;
1644 spin_unlock_irq(&i->lock);
1645 irq_flags |= up->port.irqflags;
1646 ret = request_irq(up->port.irq, serial8250_interrupt,
1647 irq_flags, "serial", i);
1649 serial_do_unlink(i, up);
1655 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1658 struct hlist_node *n;
1659 struct hlist_head *h;
1661 mutex_lock(&hash_mutex);
1663 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1665 hlist_for_each(n, h) {
1666 i = hlist_entry(n, struct irq_info, node);
1667 if (i->irq == up->port.irq)
1672 BUG_ON(i->head == NULL);
1674 if (list_empty(i->head))
1675 free_irq(up->port.irq, i);
1677 serial_do_unlink(i, up);
1678 mutex_unlock(&hash_mutex);
1682 * This function is used to handle ports that do not have an
1683 * interrupt. This doesn't work very well for 16450's, but gives
1684 * barely passable results for a 16550A. (Although at the expense
1685 * of much CPU overhead).
1687 static void serial8250_timeout(unsigned long data)
1689 struct uart_8250_port *up = (struct uart_8250_port *)data;
1691 up->port.handle_irq(&up->port);
1692 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1695 static void serial8250_backup_timeout(unsigned long data)
1697 struct uart_8250_port *up = (struct uart_8250_port *)data;
1698 unsigned int iir, ier = 0, lsr;
1699 unsigned long flags;
1701 spin_lock_irqsave(&up->port.lock, flags);
1704 * Must disable interrupts or else we risk racing with the interrupt
1708 ier = serial_in(up, UART_IER);
1709 serial_out(up, UART_IER, 0);
1712 iir = serial_in(up, UART_IIR);
1715 * This should be a safe test for anyone who doesn't trust the
1716 * IIR bits on their UART, but it's specifically designed for
1717 * the "Diva" UART used on the management processor on many HP
1718 * ia64 and parisc boxes.
1720 lsr = serial_in(up, UART_LSR);
1721 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1722 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1723 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1724 (lsr & UART_LSR_THRE)) {
1725 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1726 iir |= UART_IIR_THRI;
1729 if (!(iir & UART_IIR_NO_INT))
1730 serial8250_tx_chars(up);
1733 serial_out(up, UART_IER, ier);
1735 spin_unlock_irqrestore(&up->port.lock, flags);
1737 /* Standard timer interval plus 0.2s to keep the port running */
1738 mod_timer(&up->timer,
1739 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1742 static unsigned int serial8250_tx_empty(struct uart_port *port)
1744 struct uart_8250_port *up =
1745 container_of(port, struct uart_8250_port, port);
1746 unsigned long flags;
1749 spin_lock_irqsave(&port->lock, flags);
1750 lsr = serial_port_in(port, UART_LSR);
1751 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1752 spin_unlock_irqrestore(&port->lock, flags);
1754 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1757 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1759 struct uart_8250_port *up =
1760 container_of(port, struct uart_8250_port, port);
1761 unsigned int status;
1764 status = serial8250_modem_status(up);
1767 if (status & UART_MSR_DCD)
1769 if (status & UART_MSR_RI)
1771 if (status & UART_MSR_DSR)
1773 if (status & UART_MSR_CTS)
1778 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1780 struct uart_8250_port *up =
1781 container_of(port, struct uart_8250_port, port);
1782 unsigned char mcr = 0;
1784 if (mctrl & TIOCM_RTS)
1785 mcr |= UART_MCR_RTS;
1786 if (mctrl & TIOCM_DTR)
1787 mcr |= UART_MCR_DTR;
1788 if (mctrl & TIOCM_OUT1)
1789 mcr |= UART_MCR_OUT1;
1790 if (mctrl & TIOCM_OUT2)
1791 mcr |= UART_MCR_OUT2;
1792 if (mctrl & TIOCM_LOOP)
1793 mcr |= UART_MCR_LOOP;
1795 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1797 serial_port_out(port, UART_MCR, mcr);
1800 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1802 struct uart_8250_port *up =
1803 container_of(port, struct uart_8250_port, port);
1804 unsigned long flags;
1806 spin_lock_irqsave(&port->lock, flags);
1807 if (break_state == -1)
1808 up->lcr |= UART_LCR_SBC;
1810 up->lcr &= ~UART_LCR_SBC;
1811 serial_port_out(port, UART_LCR, up->lcr);
1812 spin_unlock_irqrestore(&port->lock, flags);
1816 * Wait for transmitter & holding register to empty
1818 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1820 unsigned int status, tmout = 10000;
1822 /* Wait up to 10ms for the character(s) to be sent. */
1824 status = serial_in(up, UART_LSR);
1826 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1828 if ((status & bits) == bits)
1835 /* Wait up to 1s for flow control if necessary */
1836 if (up->port.flags & UPF_CONS_FLOW) {
1838 for (tmout = 1000000; tmout; tmout--) {
1839 unsigned int msr = serial_in(up, UART_MSR);
1840 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1841 if (msr & UART_MSR_CTS)
1844 touch_nmi_watchdog();
1849 #ifdef CONFIG_CONSOLE_POLL
1851 * Console polling routines for writing and reading from the uart while
1852 * in an interrupt or debug context.
1855 static int serial8250_get_poll_char(struct uart_port *port)
1857 unsigned char lsr = serial_port_in(port, UART_LSR);
1859 if (!(lsr & UART_LSR_DR))
1860 return NO_POLL_CHAR;
1862 return serial_port_in(port, UART_RX);
1866 static void serial8250_put_poll_char(struct uart_port *port,
1870 struct uart_8250_port *up =
1871 container_of(port, struct uart_8250_port, port);
1874 * First save the IER then disable the interrupts
1876 ier = serial_port_in(port, UART_IER);
1877 if (up->capabilities & UART_CAP_UUE)
1878 serial_port_out(port, UART_IER, UART_IER_UUE);
1880 serial_port_out(port, UART_IER, 0);
1882 wait_for_xmitr(up, BOTH_EMPTY);
1884 * Send the character out.
1885 * If a LF, also do CR...
1887 serial_port_out(port, UART_TX, c);
1889 wait_for_xmitr(up, BOTH_EMPTY);
1890 serial_port_out(port, UART_TX, 13);
1894 * Finally, wait for transmitter to become empty
1895 * and restore the IER
1897 wait_for_xmitr(up, BOTH_EMPTY);
1898 serial_port_out(port, UART_IER, ier);
1901 #endif /* CONFIG_CONSOLE_POLL */
1903 static int serial8250_startup(struct uart_port *port)
1905 struct uart_8250_port *up =
1906 container_of(port, struct uart_8250_port, port);
1907 unsigned long flags;
1908 unsigned char lsr, iir;
1911 if (port->type == PORT_8250_CIR)
1914 port->fifosize = uart_config[up->port.type].fifo_size;
1915 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1916 up->capabilities = uart_config[up->port.type].flags;
1919 if (port->iotype != up->cur_iotype)
1920 set_io_from_upio(port);
1922 if (port->type == PORT_16C950) {
1923 /* Wake up and initialize UART */
1925 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1926 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1927 serial_port_out(port, UART_IER, 0);
1928 serial_port_out(port, UART_LCR, 0);
1929 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1930 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1931 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1932 serial_port_out(port, UART_LCR, 0);
1935 #ifdef CONFIG_SERIAL_8250_RSA
1937 * If this is an RSA port, see if we can kick it up to the
1938 * higher speed clock.
1944 * Clear the FIFO buffers and disable them.
1945 * (they will be reenabled in set_termios())
1947 serial8250_clear_fifos(up);
1950 * Clear the interrupt registers.
1952 serial_port_in(port, UART_LSR);
1953 serial_port_in(port, UART_RX);
1954 serial_port_in(port, UART_IIR);
1955 serial_port_in(port, UART_MSR);
1958 * At this point, there's no way the LSR could still be 0xff;
1959 * if it is, then bail out, because there's likely no UART
1962 if (!(port->flags & UPF_BUGGY_UART) &&
1963 (serial_port_in(port, UART_LSR) == 0xff)) {
1964 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
1965 serial_index(port));
1970 * For a XR16C850, we need to set the trigger levels
1972 if (port->type == PORT_16850) {
1975 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1977 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1978 serial_port_out(port, UART_FCTR,
1979 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1980 serial_port_out(port, UART_TRG, UART_TRG_96);
1981 serial_port_out(port, UART_FCTR,
1982 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1983 serial_port_out(port, UART_TRG, UART_TRG_96);
1985 serial_port_out(port, UART_LCR, 0);
1991 * Test for UARTs that do not reassert THRE when the
1992 * transmitter is idle and the interrupt has already
1993 * been cleared. Real 16550s should always reassert
1994 * this interrupt whenever the transmitter is idle and
1995 * the interrupt is enabled. Delays are necessary to
1996 * allow register changes to become visible.
1998 spin_lock_irqsave(&port->lock, flags);
1999 if (up->port.irqflags & IRQF_SHARED)
2000 disable_irq_nosync(port->irq);
2002 wait_for_xmitr(up, UART_LSR_THRE);
2003 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2004 udelay(1); /* allow THRE to set */
2005 iir1 = serial_port_in(port, UART_IIR);
2006 serial_port_out(port, UART_IER, 0);
2007 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2008 udelay(1); /* allow a working UART time to re-assert THRE */
2009 iir = serial_port_in(port, UART_IIR);
2010 serial_port_out(port, UART_IER, 0);
2012 if (port->irqflags & IRQF_SHARED)
2013 enable_irq(port->irq);
2014 spin_unlock_irqrestore(&port->lock, flags);
2017 * If the interrupt is not reasserted, or we otherwise
2018 * don't trust the iir, setup a timer to kick the UART
2019 * on a regular basis.
2021 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2022 up->port.flags & UPF_BUG_THRE) {
2023 up->bugs |= UART_BUG_THRE;
2024 pr_debug("ttyS%d - using backup timer\n",
2025 serial_index(port));
2030 * The above check will only give an accurate result the first time
2031 * the port is opened so this value needs to be preserved.
2033 if (up->bugs & UART_BUG_THRE) {
2034 up->timer.function = serial8250_backup_timeout;
2035 up->timer.data = (unsigned long)up;
2036 mod_timer(&up->timer, jiffies +
2037 uart_poll_timeout(port) + HZ / 5);
2041 * If the "interrupt" for this port doesn't correspond with any
2042 * hardware interrupt, we use a timer-based system. The original
2043 * driver used to do this with IRQ0.
2046 up->timer.data = (unsigned long)up;
2047 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2049 retval = serial_link_irq_chain(up);
2055 * Now, initialize the UART
2057 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2059 spin_lock_irqsave(&port->lock, flags);
2060 if (up->port.flags & UPF_FOURPORT) {
2062 up->port.mctrl |= TIOCM_OUT1;
2065 * Most PC uarts need OUT2 raised to enable interrupts.
2068 up->port.mctrl |= TIOCM_OUT2;
2070 serial8250_set_mctrl(port, port->mctrl);
2072 /* Serial over Lan (SoL) hack:
2073 Intel 8257x Gigabit ethernet chips have a
2074 16550 emulation, to be used for Serial Over Lan.
2075 Those chips take a longer time than a normal
2076 serial device to signalize that a transmission
2077 data was queued. Due to that, the above test generally
2078 fails. One solution would be to delay the reading of
2079 iir. However, this is not reliable, since the timeout
2080 is variable. So, let's just don't test if we receive
2081 TX irq. This way, we'll never enable UART_BUG_TXEN.
2083 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2084 goto dont_test_tx_en;
2087 * Do a quick test to see if we receive an
2088 * interrupt when we enable the TX irq.
2090 serial_port_out(port, UART_IER, UART_IER_THRI);
2091 lsr = serial_port_in(port, UART_LSR);
2092 iir = serial_port_in(port, UART_IIR);
2093 serial_port_out(port, UART_IER, 0);
2095 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2096 if (!(up->bugs & UART_BUG_TXEN)) {
2097 up->bugs |= UART_BUG_TXEN;
2098 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2099 serial_index(port));
2102 up->bugs &= ~UART_BUG_TXEN;
2106 spin_unlock_irqrestore(&port->lock, flags);
2109 * Clear the interrupt registers again for luck, and clear the
2110 * saved flags to avoid getting false values from polling
2111 * routines or the previous session.
2113 serial_port_in(port, UART_LSR);
2114 serial_port_in(port, UART_RX);
2115 serial_port_in(port, UART_IIR);
2116 serial_port_in(port, UART_MSR);
2117 up->lsr_saved_flags = 0;
2118 up->msr_saved_flags = 0;
2121 * Finally, enable interrupts. Note: Modem status interrupts
2122 * are set via set_termios(), which will be occurring imminently
2123 * anyway, so we don't enable them here.
2125 up->ier = UART_IER_RLSI | UART_IER_RDI;
2126 serial_port_out(port, UART_IER, up->ier);
2128 if (port->flags & UPF_FOURPORT) {
2131 * Enable interrupts on the AST Fourport board
2133 icp = (port->iobase & 0xfe0) | 0x01f;
2141 static void serial8250_shutdown(struct uart_port *port)
2143 struct uart_8250_port *up =
2144 container_of(port, struct uart_8250_port, port);
2145 unsigned long flags;
2148 * Disable interrupts from this port
2151 serial_port_out(port, UART_IER, 0);
2153 spin_lock_irqsave(&port->lock, flags);
2154 if (port->flags & UPF_FOURPORT) {
2155 /* reset interrupts on the AST Fourport board */
2156 inb((port->iobase & 0xfe0) | 0x1f);
2157 port->mctrl |= TIOCM_OUT1;
2159 port->mctrl &= ~TIOCM_OUT2;
2161 serial8250_set_mctrl(port, port->mctrl);
2162 spin_unlock_irqrestore(&port->lock, flags);
2165 * Disable break condition and FIFOs
2167 serial_port_out(port, UART_LCR,
2168 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2169 serial8250_clear_fifos(up);
2171 #ifdef CONFIG_SERIAL_8250_RSA
2173 * Reset the RSA board back to 115kbps compat mode.
2179 * Read data port to reset things, and then unlink from
2182 serial_port_in(port, UART_RX);
2184 del_timer_sync(&up->timer);
2185 up->timer.function = serial8250_timeout;
2187 serial_unlink_irq_chain(up);
2190 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2195 * Handle magic divisors for baud rates above baud_base on
2196 * SMSC SuperIO chips.
2198 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2199 baud == (port->uartclk/4))
2201 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2202 baud == (port->uartclk/8))
2205 quot = uart_get_divisor(port, baud);
2211 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2212 struct ktermios *old)
2214 struct uart_8250_port *up =
2215 container_of(port, struct uart_8250_port, port);
2216 unsigned char cval, fcr = 0;
2217 unsigned long flags;
2218 unsigned int baud, quot;
2221 switch (termios->c_cflag & CSIZE) {
2223 cval = UART_LCR_WLEN5;
2226 cval = UART_LCR_WLEN6;
2229 cval = UART_LCR_WLEN7;
2233 cval = UART_LCR_WLEN8;
2237 if (termios->c_cflag & CSTOPB)
2238 cval |= UART_LCR_STOP;
2239 if (termios->c_cflag & PARENB) {
2240 cval |= UART_LCR_PARITY;
2241 if (up->bugs & UART_BUG_PARITY)
2244 if (!(termios->c_cflag & PARODD))
2245 cval |= UART_LCR_EPAR;
2247 if (termios->c_cflag & CMSPAR)
2248 cval |= UART_LCR_SPAR;
2252 * Ask the core to calculate the divisor for us.
2254 baud = uart_get_baud_rate(port, termios, old,
2255 port->uartclk / 16 / 0xffff,
2256 port->uartclk / 16);
2257 quot = serial8250_get_divisor(port, baud);
2260 * Oxford Semi 952 rev B workaround
2262 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2265 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2266 fcr = uart_config[port->type].fcr;
2267 if (baud < 2400 || fifo_bug) {
2268 fcr &= ~UART_FCR_TRIGGER_MASK;
2269 fcr |= UART_FCR_TRIGGER_1;
2274 * MCR-based auto flow control. When AFE is enabled, RTS will be
2275 * deasserted when the receive FIFO contains more characters than
2276 * the trigger, or the MCR RTS bit is cleared. In the case where
2277 * the remote UART is not using CTS auto flow control, we must
2278 * have sufficient FIFO entries for the latency of the remote
2279 * UART to respond. IOW, at least 32 bytes of FIFO.
2281 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2282 up->mcr &= ~UART_MCR_AFE;
2283 if (termios->c_cflag & CRTSCTS)
2284 up->mcr |= UART_MCR_AFE;
2288 * Ok, we're now changing the port state. Do it with
2289 * interrupts disabled.
2291 spin_lock_irqsave(&port->lock, flags);
2294 * Update the per-port timeout.
2296 uart_update_timeout(port, termios->c_cflag, baud);
2298 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2299 if (termios->c_iflag & INPCK)
2300 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2301 if (termios->c_iflag & (BRKINT | PARMRK))
2302 port->read_status_mask |= UART_LSR_BI;
2305 * Characteres to ignore
2307 port->ignore_status_mask = 0;
2308 if (termios->c_iflag & IGNPAR)
2309 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2310 if (termios->c_iflag & IGNBRK) {
2311 port->ignore_status_mask |= UART_LSR_BI;
2313 * If we're ignoring parity and break indicators,
2314 * ignore overruns too (for real raw support).
2316 if (termios->c_iflag & IGNPAR)
2317 port->ignore_status_mask |= UART_LSR_OE;
2321 * ignore all characters if CREAD is not set
2323 if ((termios->c_cflag & CREAD) == 0)
2324 port->ignore_status_mask |= UART_LSR_DR;
2327 * CTS flow control flag and modem status interrupts
2329 up->ier &= ~UART_IER_MSI;
2330 if (!(up->bugs & UART_BUG_NOMSR) &&
2331 UART_ENABLE_MS(&up->port, termios->c_cflag))
2332 up->ier |= UART_IER_MSI;
2333 if (up->capabilities & UART_CAP_UUE)
2334 up->ier |= UART_IER_UUE;
2335 if (up->capabilities & UART_CAP_RTOIE)
2336 up->ier |= UART_IER_RTOIE;
2338 serial_port_out(port, UART_IER, up->ier);
2340 if (up->capabilities & UART_CAP_EFR) {
2341 unsigned char efr = 0;
2343 * TI16C752/Startech hardware flow control. FIXME:
2344 * - TI16C752 requires control thresholds to be set.
2345 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2347 if (termios->c_cflag & CRTSCTS)
2348 efr |= UART_EFR_CTS;
2350 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2351 if (port->flags & UPF_EXAR_EFR)
2352 serial_port_out(port, UART_XR_EFR, efr);
2354 serial_port_out(port, UART_EFR, efr);
2357 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2358 if (is_omap1510_8250(up)) {
2359 if (baud == 115200) {
2361 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2363 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2367 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2368 * otherwise just set DLAB
2370 if (up->capabilities & UART_NATSEMI)
2371 serial_port_out(port, UART_LCR, 0xe0);
2373 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2375 serial_dl_write(up, quot);
2378 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2379 * is written without DLAB set, this mode will be disabled.
2381 if (port->type == PORT_16750)
2382 serial_port_out(port, UART_FCR, fcr);
2384 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2385 up->lcr = cval; /* Save LCR */
2386 if (port->type != PORT_16750) {
2387 /* emulated UARTs (Lucent Venus 167x) need two steps */
2388 if (fcr & UART_FCR_ENABLE_FIFO)
2389 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2390 serial_port_out(port, UART_FCR, fcr); /* set fcr */
2392 serial8250_set_mctrl(port, port->mctrl);
2393 spin_unlock_irqrestore(&port->lock, flags);
2394 /* Don't rewrite B0 */
2395 if (tty_termios_baud_rate(termios))
2396 tty_termios_encode_baud_rate(termios, baud, baud);
2398 EXPORT_SYMBOL(serial8250_do_set_termios);
2401 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2402 struct ktermios *old)
2404 if (port->set_termios)
2405 port->set_termios(port, termios, old);
2407 serial8250_do_set_termios(port, termios, old);
2411 serial8250_set_ldisc(struct uart_port *port, int new)
2414 port->flags |= UPF_HARDPPS_CD;
2415 serial8250_enable_ms(port);
2417 port->flags &= ~UPF_HARDPPS_CD;
2421 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2422 unsigned int oldstate)
2424 struct uart_8250_port *p =
2425 container_of(port, struct uart_8250_port, port);
2427 serial8250_set_sleep(p, state != 0);
2429 EXPORT_SYMBOL(serial8250_do_pm);
2432 serial8250_pm(struct uart_port *port, unsigned int state,
2433 unsigned int oldstate)
2436 port->pm(port, state, oldstate);
2438 serial8250_do_pm(port, state, oldstate);
2441 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2443 if (pt->port.iotype == UPIO_AU)
2445 if (is_omap1_8250(pt))
2446 return 0x16 << pt->port.regshift;
2448 return 8 << pt->port.regshift;
2452 * Resource handling.
2454 static int serial8250_request_std_resource(struct uart_8250_port *up)
2456 unsigned int size = serial8250_port_size(up);
2457 struct uart_port *port = &up->port;
2460 switch (port->iotype) {
2468 if (!request_mem_region(port->mapbase, size, "serial")) {
2473 if (port->flags & UPF_IOREMAP) {
2474 port->membase = ioremap_nocache(port->mapbase, size);
2475 if (!port->membase) {
2476 release_mem_region(port->mapbase, size);
2484 if (!request_region(port->iobase, size, "serial"))
2491 static void serial8250_release_std_resource(struct uart_8250_port *up)
2493 unsigned int size = serial8250_port_size(up);
2494 struct uart_port *port = &up->port;
2496 switch (port->iotype) {
2504 if (port->flags & UPF_IOREMAP) {
2505 iounmap(port->membase);
2506 port->membase = NULL;
2509 release_mem_region(port->mapbase, size);
2514 release_region(port->iobase, size);
2519 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2521 unsigned long start = UART_RSA_BASE << up->port.regshift;
2522 unsigned int size = 8 << up->port.regshift;
2523 struct uart_port *port = &up->port;
2526 switch (port->iotype) {
2529 start += port->iobase;
2530 if (request_region(start, size, "serial-rsa"))
2540 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2542 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2543 unsigned int size = 8 << up->port.regshift;
2544 struct uart_port *port = &up->port;
2546 switch (port->iotype) {
2549 release_region(port->iobase + offset, size);
2554 static void serial8250_release_port(struct uart_port *port)
2556 struct uart_8250_port *up =
2557 container_of(port, struct uart_8250_port, port);
2559 serial8250_release_std_resource(up);
2560 if (port->type == PORT_RSA)
2561 serial8250_release_rsa_resource(up);
2564 static int serial8250_request_port(struct uart_port *port)
2566 struct uart_8250_port *up =
2567 container_of(port, struct uart_8250_port, port);
2570 if (port->type == PORT_8250_CIR)
2573 ret = serial8250_request_std_resource(up);
2574 if (ret == 0 && port->type == PORT_RSA) {
2575 ret = serial8250_request_rsa_resource(up);
2577 serial8250_release_std_resource(up);
2583 static void serial8250_config_port(struct uart_port *port, int flags)
2585 struct uart_8250_port *up =
2586 container_of(port, struct uart_8250_port, port);
2587 int probeflags = PROBE_ANY;
2590 if (port->type == PORT_8250_CIR)
2594 * Find the region that we can probe for. This in turn
2595 * tells us whether we can probe for the type of port.
2597 ret = serial8250_request_std_resource(up);
2601 ret = serial8250_request_rsa_resource(up);
2603 probeflags &= ~PROBE_RSA;
2605 if (port->iotype != up->cur_iotype)
2606 set_io_from_upio(port);
2608 if (flags & UART_CONFIG_TYPE)
2609 autoconfig(up, probeflags);
2611 /* if access method is AU, it is a 16550 with a quirk */
2612 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2613 up->bugs |= UART_BUG_NOMSR;
2615 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2618 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2619 serial8250_release_rsa_resource(up);
2620 if (port->type == PORT_UNKNOWN)
2621 serial8250_release_std_resource(up);
2623 /* Fixme: probably not the best place for this */
2624 if ((port->type == PORT_XR17V35X) ||
2625 (port->type == PORT_XR17D15X))
2626 port->handle_irq = exar_handle_irq;
2630 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2632 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2633 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2634 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2635 ser->type == PORT_STARTECH)
2641 serial8250_type(struct uart_port *port)
2643 int type = port->type;
2645 if (type >= ARRAY_SIZE(uart_config))
2647 return uart_config[type].name;
2650 static struct uart_ops serial8250_pops = {
2651 .tx_empty = serial8250_tx_empty,
2652 .set_mctrl = serial8250_set_mctrl,
2653 .get_mctrl = serial8250_get_mctrl,
2654 .stop_tx = serial8250_stop_tx,
2655 .start_tx = serial8250_start_tx,
2656 .stop_rx = serial8250_stop_rx,
2657 .enable_ms = serial8250_enable_ms,
2658 .break_ctl = serial8250_break_ctl,
2659 .startup = serial8250_startup,
2660 .shutdown = serial8250_shutdown,
2661 .set_termios = serial8250_set_termios,
2662 .set_ldisc = serial8250_set_ldisc,
2663 .pm = serial8250_pm,
2664 .type = serial8250_type,
2665 .release_port = serial8250_release_port,
2666 .request_port = serial8250_request_port,
2667 .config_port = serial8250_config_port,
2668 .verify_port = serial8250_verify_port,
2669 #ifdef CONFIG_CONSOLE_POLL
2670 .poll_get_char = serial8250_get_poll_char,
2671 .poll_put_char = serial8250_put_poll_char,
2675 static struct uart_8250_port serial8250_ports[UART_NR];
2677 static void (*serial8250_isa_config)(int port, struct uart_port *up,
2678 unsigned short *capabilities);
2680 void serial8250_set_isa_configurator(
2681 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
2683 serial8250_isa_config = v;
2685 EXPORT_SYMBOL(serial8250_set_isa_configurator);
2687 static void __init serial8250_isa_init_ports(void)
2689 struct uart_8250_port *up;
2690 static int first = 1;
2697 if (nr_uarts > UART_NR)
2700 for (i = 0; i < nr_uarts; i++) {
2701 struct uart_8250_port *up = &serial8250_ports[i];
2702 struct uart_port *port = &up->port;
2705 spin_lock_init(&port->lock);
2707 init_timer(&up->timer);
2708 up->timer.function = serial8250_timeout;
2709 up->cur_iotype = 0xFF;
2712 * ALPHA_KLUDGE_MCR needs to be killed.
2714 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2715 up->mcr_force = ALPHA_KLUDGE_MCR;
2717 port->ops = &serial8250_pops;
2721 irqflag = IRQF_SHARED;
2723 for (i = 0, up = serial8250_ports;
2724 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2726 struct uart_port *port = &up->port;
2728 port->iobase = old_serial_port[i].port;
2729 port->irq = irq_canonicalize(old_serial_port[i].irq);
2730 port->irqflags = old_serial_port[i].irqflags;
2731 port->uartclk = old_serial_port[i].baud_base * 16;
2732 port->flags = old_serial_port[i].flags;
2733 port->hub6 = old_serial_port[i].hub6;
2734 port->membase = old_serial_port[i].iomem_base;
2735 port->iotype = old_serial_port[i].io_type;
2736 port->regshift = old_serial_port[i].iomem_reg_shift;
2737 set_io_from_upio(port);
2738 port->irqflags |= irqflag;
2739 if (serial8250_isa_config != NULL)
2740 serial8250_isa_config(i, &up->port, &up->capabilities);
2746 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
2748 up->port.type = type;
2749 up->port.fifosize = uart_config[type].fifo_size;
2750 up->capabilities = uart_config[type].flags;
2751 up->tx_loadsz = uart_config[type].tx_loadsz;
2755 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2759 for (i = 0; i < nr_uarts; i++) {
2760 struct uart_8250_port *up = &serial8250_ports[i];
2767 if (up->port.flags & UPF_FIXED_TYPE)
2768 serial8250_init_fixed_type_port(up, up->port.type);
2770 uart_add_one_port(drv, &up->port);
2774 #ifdef CONFIG_SERIAL_8250_CONSOLE
2776 static void serial8250_console_putchar(struct uart_port *port, int ch)
2778 struct uart_8250_port *up =
2779 container_of(port, struct uart_8250_port, port);
2781 wait_for_xmitr(up, UART_LSR_THRE);
2782 serial_port_out(port, UART_TX, ch);
2786 * Print a string to the serial port trying not to disturb
2787 * any possible real use of the port...
2789 * The console_lock must be held when we get here.
2792 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2794 struct uart_8250_port *up = &serial8250_ports[co->index];
2795 struct uart_port *port = &up->port;
2796 unsigned long flags;
2800 touch_nmi_watchdog();
2802 local_irq_save(flags);
2804 /* serial8250_handle_irq() already took the lock */
2806 } else if (oops_in_progress) {
2807 locked = spin_trylock(&port->lock);
2809 spin_lock(&port->lock);
2812 * First save the IER then disable the interrupts
2814 ier = serial_port_in(port, UART_IER);
2816 if (up->capabilities & UART_CAP_UUE)
2817 serial_port_out(port, UART_IER, UART_IER_UUE);
2819 serial_port_out(port, UART_IER, 0);
2821 uart_console_write(port, s, count, serial8250_console_putchar);
2824 * Finally, wait for transmitter to become empty
2825 * and restore the IER
2827 wait_for_xmitr(up, BOTH_EMPTY);
2828 serial_port_out(port, UART_IER, ier);
2831 * The receive handling will happen properly because the
2832 * receive ready bit will still be set; it is not cleared
2833 * on read. However, modem control will not, we must
2834 * call it if we have saved something in the saved flags
2835 * while processing with interrupts off.
2837 if (up->msr_saved_flags)
2838 serial8250_modem_status(up);
2841 spin_unlock(&port->lock);
2842 local_irq_restore(flags);
2845 static int __init serial8250_console_setup(struct console *co, char *options)
2847 struct uart_port *port;
2854 * Check whether an invalid uart number has been specified, and
2855 * if so, search for the first available port that does have
2858 if (co->index >= nr_uarts)
2860 port = &serial8250_ports[co->index].port;
2861 if (!port->iobase && !port->membase)
2865 uart_parse_options(options, &baud, &parity, &bits, &flow);
2867 return uart_set_options(port, co, baud, parity, bits, flow);
2870 static int serial8250_console_early_setup(void)
2872 return serial8250_find_port_for_earlycon();
2875 static struct console serial8250_console = {
2877 .write = serial8250_console_write,
2878 .device = uart_console_device,
2879 .setup = serial8250_console_setup,
2880 .early_setup = serial8250_console_early_setup,
2881 .flags = CON_PRINTBUFFER | CON_ANYTIME,
2883 .data = &serial8250_reg,
2886 static int __init serial8250_console_init(void)
2888 serial8250_isa_init_ports();
2889 register_console(&serial8250_console);
2892 console_initcall(serial8250_console_init);
2894 int serial8250_find_port(struct uart_port *p)
2897 struct uart_port *port;
2899 for (line = 0; line < nr_uarts; line++) {
2900 port = &serial8250_ports[line].port;
2901 if (uart_match_port(p, port))
2907 #define SERIAL8250_CONSOLE &serial8250_console
2909 #define SERIAL8250_CONSOLE NULL
2912 static struct uart_driver serial8250_reg = {
2913 .owner = THIS_MODULE,
2914 .driver_name = "serial",
2918 .cons = SERIAL8250_CONSOLE,
2922 * early_serial_setup - early registration for 8250 ports
2924 * Setup an 8250 port structure prior to console initialisation. Use
2925 * after console initialisation will cause undefined behaviour.
2927 int __init early_serial_setup(struct uart_port *port)
2929 struct uart_port *p;
2931 if (port->line >= ARRAY_SIZE(serial8250_ports))
2934 serial8250_isa_init_ports();
2935 p = &serial8250_ports[port->line].port;
2936 p->iobase = port->iobase;
2937 p->membase = port->membase;
2939 p->irqflags = port->irqflags;
2940 p->uartclk = port->uartclk;
2941 p->fifosize = port->fifosize;
2942 p->regshift = port->regshift;
2943 p->iotype = port->iotype;
2944 p->flags = port->flags;
2945 p->mapbase = port->mapbase;
2946 p->private_data = port->private_data;
2947 p->type = port->type;
2948 p->line = port->line;
2950 set_io_from_upio(p);
2951 if (port->serial_in)
2952 p->serial_in = port->serial_in;
2953 if (port->serial_out)
2954 p->serial_out = port->serial_out;
2955 if (port->handle_irq)
2956 p->handle_irq = port->handle_irq;
2958 p->handle_irq = serial8250_default_handle_irq;
2964 * serial8250_suspend_port - suspend one serial port
2965 * @line: serial line number
2967 * Suspend one serial port.
2969 void serial8250_suspend_port(int line)
2971 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2975 * serial8250_resume_port - resume one serial port
2976 * @line: serial line number
2978 * Resume one serial port.
2980 void serial8250_resume_port(int line)
2982 struct uart_8250_port *up = &serial8250_ports[line];
2983 struct uart_port *port = &up->port;
2985 if (up->capabilities & UART_NATSEMI) {
2986 /* Ensure it's still in high speed mode */
2987 serial_port_out(port, UART_LCR, 0xE0);
2989 ns16550a_goto_highspeed(up);
2991 serial_port_out(port, UART_LCR, 0);
2992 port->uartclk = 921600*16;
2994 uart_resume_port(&serial8250_reg, port);
2998 * Register a set of serial devices attached to a platform device. The
2999 * list is terminated with a zero flags entry, which means we expect
3000 * all entries to have at least UPF_BOOT_AUTOCONF set.
3002 static int serial8250_probe(struct platform_device *dev)
3004 struct plat_serial8250_port *p = dev->dev.platform_data;
3005 struct uart_8250_port uart;
3006 int ret, i, irqflag = 0;
3008 memset(&uart, 0, sizeof(uart));
3011 irqflag = IRQF_SHARED;
3013 for (i = 0; p && p->flags != 0; p++, i++) {
3014 uart.port.iobase = p->iobase;
3015 uart.port.membase = p->membase;
3016 uart.port.irq = p->irq;
3017 uart.port.irqflags = p->irqflags;
3018 uart.port.uartclk = p->uartclk;
3019 uart.port.regshift = p->regshift;
3020 uart.port.iotype = p->iotype;
3021 uart.port.flags = p->flags;
3022 uart.port.mapbase = p->mapbase;
3023 uart.port.hub6 = p->hub6;
3024 uart.port.private_data = p->private_data;
3025 uart.port.type = p->type;
3026 uart.port.serial_in = p->serial_in;
3027 uart.port.serial_out = p->serial_out;
3028 uart.port.handle_irq = p->handle_irq;
3029 uart.port.handle_break = p->handle_break;
3030 uart.port.set_termios = p->set_termios;
3031 uart.port.pm = p->pm;
3032 uart.port.dev = &dev->dev;
3033 uart.port.irqflags |= irqflag;
3034 ret = serial8250_register_8250_port(&uart);
3036 dev_err(&dev->dev, "unable to register port at index %d "
3037 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3038 p->iobase, (unsigned long long)p->mapbase,
3046 * Remove serial ports registered against a platform device.
3048 static int serial8250_remove(struct platform_device *dev)
3052 for (i = 0; i < nr_uarts; i++) {
3053 struct uart_8250_port *up = &serial8250_ports[i];
3055 if (up->port.dev == &dev->dev)
3056 serial8250_unregister_port(i);
3061 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3065 for (i = 0; i < UART_NR; i++) {
3066 struct uart_8250_port *up = &serial8250_ports[i];
3068 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3069 uart_suspend_port(&serial8250_reg, &up->port);
3075 static int serial8250_resume(struct platform_device *dev)
3079 for (i = 0; i < UART_NR; i++) {
3080 struct uart_8250_port *up = &serial8250_ports[i];
3082 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3083 serial8250_resume_port(i);
3089 static struct platform_driver serial8250_isa_driver = {
3090 .probe = serial8250_probe,
3091 .remove = serial8250_remove,
3092 .suspend = serial8250_suspend,
3093 .resume = serial8250_resume,
3095 .name = "serial8250",
3096 .owner = THIS_MODULE,
3101 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3102 * in the table in include/asm/serial.h
3104 static struct platform_device *serial8250_isa_devs;
3107 * serial8250_register_8250_port and serial8250_unregister_port allows for
3108 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3109 * modems and PCI multiport cards.
3111 static DEFINE_MUTEX(serial_mutex);
3113 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3118 * First, find a port entry which matches.
3120 for (i = 0; i < nr_uarts; i++)
3121 if (uart_match_port(&serial8250_ports[i].port, port))
3122 return &serial8250_ports[i];
3125 * We didn't find a matching entry, so look for the first
3126 * free entry. We look for one which hasn't been previously
3127 * used (indicated by zero iobase).
3129 for (i = 0; i < nr_uarts; i++)
3130 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3131 serial8250_ports[i].port.iobase == 0)
3132 return &serial8250_ports[i];
3135 * That also failed. Last resort is to find any entry which
3136 * doesn't have a real port associated with it.
3138 for (i = 0; i < nr_uarts; i++)
3139 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3140 return &serial8250_ports[i];
3146 * serial8250_register_8250_port - register a serial port
3147 * @up: serial port template
3149 * Configure the serial port specified by the request. If the
3150 * port exists and is in use, it is hung up and unregistered
3153 * The port is then probed and if necessary the IRQ is autodetected
3154 * If this fails an error is returned.
3156 * On success the port is ready to use and the line number is returned.
3158 int serial8250_register_8250_port(struct uart_8250_port *up)
3160 struct uart_8250_port *uart;
3163 if (up->port.uartclk == 0)
3166 mutex_lock(&serial_mutex);
3168 uart = serial8250_find_match_or_unused(&up->port);
3169 if (uart && uart->port.type != PORT_8250_CIR) {
3171 uart_remove_one_port(&serial8250_reg, &uart->port);
3173 uart->port.iobase = up->port.iobase;
3174 uart->port.membase = up->port.membase;
3175 uart->port.irq = up->port.irq;
3176 uart->port.irqflags = up->port.irqflags;
3177 uart->port.uartclk = up->port.uartclk;
3178 uart->port.fifosize = up->port.fifosize;
3179 uart->port.regshift = up->port.regshift;
3180 uart->port.iotype = up->port.iotype;
3181 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3182 uart->bugs = up->bugs;
3183 uart->port.mapbase = up->port.mapbase;
3184 uart->port.private_data = up->port.private_data;
3186 uart->port.dev = up->port.dev;
3188 if (up->port.flags & UPF_FIXED_TYPE)
3189 serial8250_init_fixed_type_port(uart, up->port.type);
3191 set_io_from_upio(&uart->port);
3192 /* Possibly override default I/O functions. */
3193 if (up->port.serial_in)
3194 uart->port.serial_in = up->port.serial_in;
3195 if (up->port.serial_out)
3196 uart->port.serial_out = up->port.serial_out;
3197 if (up->port.handle_irq)
3198 uart->port.handle_irq = up->port.handle_irq;
3199 /* Possibly override set_termios call */
3200 if (up->port.set_termios)
3201 uart->port.set_termios = up->port.set_termios;
3203 uart->port.pm = up->port.pm;
3204 if (up->port.handle_break)
3205 uart->port.handle_break = up->port.handle_break;
3207 uart->dl_read = up->dl_read;
3209 uart->dl_write = up->dl_write;
3211 if (serial8250_isa_config != NULL)
3212 serial8250_isa_config(0, &uart->port,
3213 &uart->capabilities);
3215 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3217 ret = uart->port.line;
3219 mutex_unlock(&serial_mutex);
3223 EXPORT_SYMBOL(serial8250_register_8250_port);
3226 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3227 * @line: serial line number
3229 * Remove one serial port. This may not be called from interrupt
3230 * context. We hand the port back to the our control.
3232 void serial8250_unregister_port(int line)
3234 struct uart_8250_port *uart = &serial8250_ports[line];
3236 mutex_lock(&serial_mutex);
3237 uart_remove_one_port(&serial8250_reg, &uart->port);
3238 if (serial8250_isa_devs) {
3239 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3240 uart->port.type = PORT_UNKNOWN;
3241 uart->port.dev = &serial8250_isa_devs->dev;
3242 uart->capabilities = uart_config[uart->port.type].flags;
3243 uart_add_one_port(&serial8250_reg, &uart->port);
3245 uart->port.dev = NULL;
3247 mutex_unlock(&serial_mutex);
3249 EXPORT_SYMBOL(serial8250_unregister_port);
3251 static int __init serial8250_init(void)
3255 serial8250_isa_init_ports();
3257 printk(KERN_INFO "Serial: 8250/16550 driver, "
3258 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3259 share_irqs ? "en" : "dis");
3262 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3264 serial8250_reg.nr = UART_NR;
3265 ret = uart_register_driver(&serial8250_reg);
3270 ret = serial8250_pnp_init();
3272 goto unreg_uart_drv;
3274 serial8250_isa_devs = platform_device_alloc("serial8250",
3275 PLAT8250_DEV_LEGACY);
3276 if (!serial8250_isa_devs) {
3281 ret = platform_device_add(serial8250_isa_devs);
3285 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3287 ret = platform_driver_register(&serial8250_isa_driver);
3291 platform_device_del(serial8250_isa_devs);
3293 platform_device_put(serial8250_isa_devs);
3295 serial8250_pnp_exit();
3298 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3300 uart_unregister_driver(&serial8250_reg);
3306 static void __exit serial8250_exit(void)
3308 struct platform_device *isa_dev = serial8250_isa_devs;
3311 * This tells serial8250_unregister_port() not to re-register
3312 * the ports (thereby making serial8250_isa_driver permanently
3315 serial8250_isa_devs = NULL;
3317 platform_driver_unregister(&serial8250_isa_driver);
3318 platform_device_unregister(isa_dev);
3320 serial8250_pnp_exit();
3323 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3325 uart_unregister_driver(&serial8250_reg);
3329 module_init(serial8250_init);
3330 module_exit(serial8250_exit);
3332 EXPORT_SYMBOL(serial8250_suspend_port);
3333 EXPORT_SYMBOL(serial8250_resume_port);
3335 MODULE_LICENSE("GPL");
3336 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3338 module_param(share_irqs, uint, 0644);
3339 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3342 module_param(nr_uarts, uint, 0644);
3343 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3345 module_param(skip_txen_test, uint, 0644);
3346 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3348 #ifdef CONFIG_SERIAL_8250_RSA
3349 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3350 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3352 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);