clocksource: make CLOCKSOURCE_OF_DECLARE type safe
[cascardo/linux.git] / drivers / tty / serial / of_serial.c
1 /*
2  *  Serial Port driver for Open Firmware platform devices
3  *
4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  */
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/serial_core.h>
17 #include <linux/serial_8250.h>
18 #include <linux/serial_reg.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/nwpserial.h>
23 #include <linux/clk.h>
24
25 struct of_serial_info {
26         struct clk *clk;
27         int type;
28         int line;
29 };
30
31 #ifdef CONFIG_ARCH_TEGRA
32 void tegra_serial_handle_break(struct uart_port *p)
33 {
34         unsigned int status, tmout = 10000;
35
36         do {
37                 status = p->serial_in(p, UART_LSR);
38                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
39                         status = p->serial_in(p, UART_RX);
40                 else
41                         break;
42                 if (--tmout == 0)
43                         break;
44                 udelay(1);
45         } while (1);
46 }
47 #else
48 static inline void tegra_serial_handle_break(struct uart_port *port)
49 {
50 }
51 #endif
52
53 /*
54  * Fill a struct uart_port for a given device node
55  */
56 static int of_platform_serial_setup(struct platform_device *ofdev,
57                         int type, struct uart_port *port,
58                         struct of_serial_info *info)
59 {
60         struct resource resource;
61         struct device_node *np = ofdev->dev.of_node;
62         u32 clk, spd, prop;
63         int ret;
64
65         memset(port, 0, sizeof *port);
66         if (of_property_read_u32(np, "clock-frequency", &clk)) {
67
68                 /* Get clk rate through clk driver if present */
69                 info->clk = clk_get(&ofdev->dev, NULL);
70                 if (IS_ERR(info->clk)) {
71                         dev_warn(&ofdev->dev,
72                                 "clk or clock-frequency not defined\n");
73                         return PTR_ERR(info->clk);
74                 }
75
76                 clk_prepare_enable(info->clk);
77                 clk = clk_get_rate(info->clk);
78         }
79         /* If current-speed was set, then try not to change it. */
80         if (of_property_read_u32(np, "current-speed", &spd) == 0)
81                 port->custom_divisor = clk / (16 * spd);
82
83         ret = of_address_to_resource(np, 0, &resource);
84         if (ret) {
85                 dev_warn(&ofdev->dev, "invalid address\n");
86                 goto out;
87         }
88
89         spin_lock_init(&port->lock);
90         port->mapbase = resource.start;
91
92         /* Check for shifted address mapping */
93         if (of_property_read_u32(np, "reg-offset", &prop) == 0)
94                 port->mapbase += prop;
95
96         /* Check for registers offset within the devices address range */
97         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
98                 port->regshift = prop;
99
100         port->irq = irq_of_parse_and_map(np, 0);
101         port->iotype = UPIO_MEM;
102         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
103                 switch (prop) {
104                 case 1:
105                         port->iotype = UPIO_MEM;
106                         break;
107                 case 4:
108                         port->iotype = UPIO_MEM32;
109                         break;
110                 default:
111                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
112                                  prop);
113                         ret = -EINVAL;
114                         goto out;
115                 }
116         }
117
118         port->type = type;
119         port->uartclk = clk;
120         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
121                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
122
123         if (of_find_property(np, "no-loopback-test", NULL))
124                 port->flags |= UPF_SKIP_TEST;
125
126         port->dev = &ofdev->dev;
127
128         if (type == PORT_TEGRA)
129                 port->handle_break = tegra_serial_handle_break;
130
131         return 0;
132 out:
133         if (info->clk)
134                 clk_disable_unprepare(info->clk);
135         return ret;
136 }
137
138 /*
139  * Try to register a serial port
140  */
141 static struct of_device_id of_platform_serial_table[];
142 static int of_platform_serial_probe(struct platform_device *ofdev)
143 {
144         const struct of_device_id *match;
145         struct of_serial_info *info;
146         struct uart_port port;
147         int port_type;
148         int ret;
149
150         match = of_match_device(of_platform_serial_table, &ofdev->dev);
151         if (!match)
152                 return -EINVAL;
153
154         if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
155                 return -EBUSY;
156
157         info = kmalloc(sizeof(*info), GFP_KERNEL);
158         if (info == NULL)
159                 return -ENOMEM;
160
161         port_type = (unsigned long)match->data;
162         ret = of_platform_serial_setup(ofdev, port_type, &port, info);
163         if (ret)
164                 goto out;
165
166         switch (port_type) {
167 #ifdef CONFIG_SERIAL_8250
168         case PORT_8250 ... PORT_MAX_8250:
169         {
170                 /* For now the of bindings don't support the extra
171                    8250 specific bits */
172                 struct uart_8250_port port8250;
173                 memset(&port8250, 0, sizeof(port8250));
174                 port8250.port = port;
175                 ret = serial8250_register_8250_port(&port8250);
176                 break;
177         }
178 #endif
179 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
180         case PORT_NWPSERIAL:
181                 ret = nwpserial_register_port(&port);
182                 break;
183 #endif
184         default:
185                 /* need to add code for these */
186         case PORT_UNKNOWN:
187                 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
188                 ret = -ENODEV;
189                 break;
190         }
191         if (ret < 0)
192                 goto out;
193
194         info->type = port_type;
195         info->line = ret;
196         dev_set_drvdata(&ofdev->dev, info);
197         return 0;
198 out:
199         kfree(info);
200         irq_dispose_mapping(port.irq);
201         return ret;
202 }
203
204 /*
205  * Release a line
206  */
207 static int of_platform_serial_remove(struct platform_device *ofdev)
208 {
209         struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
210         switch (info->type) {
211 #ifdef CONFIG_SERIAL_8250
212         case PORT_8250 ... PORT_MAX_8250:
213                 serial8250_unregister_port(info->line);
214                 break;
215 #endif
216 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
217         case PORT_NWPSERIAL:
218                 nwpserial_unregister_port(info->line);
219                 break;
220 #endif
221         default:
222                 /* need to add code for these */
223                 break;
224         }
225
226         if (info->clk)
227                 clk_disable_unprepare(info->clk);
228         kfree(info);
229         return 0;
230 }
231
232 /*
233  * A few common types, add more as needed.
234  */
235 static struct of_device_id of_platform_serial_table[] = {
236         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
237         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
238         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
239         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
240         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
241         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
242         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
243         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
244 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
245         { .compatible = "ibm,qpace-nwp-serial",
246                 .data = (void *)PORT_NWPSERIAL, },
247 #endif
248         { .type = "serial",         .data = (void *)PORT_UNKNOWN, },
249         { /* end of list */ },
250 };
251
252 static struct platform_driver of_platform_serial_driver = {
253         .driver = {
254                 .name = "of_serial",
255                 .owner = THIS_MODULE,
256                 .of_match_table = of_platform_serial_table,
257         },
258         .probe = of_platform_serial_probe,
259         .remove = of_platform_serial_remove,
260 };
261
262 module_platform_driver(of_platform_serial_driver);
263
264 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
265 MODULE_LICENSE("GPL");
266 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");