drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* fill a qtd, returning how much of the buffer we were able to queue up */
  44
  45 static int
  46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  47                   size_t len, int token, int maxpacket)
  48 {
  49         int     i, count;
  50         u64     addr = buf;
  51
  52         /* one buffer entry per 4K ... first might be short or unaligned */
  53         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  54         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  55         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  56         if (likely (len < count))               /* ... iff needed */
  57                 count = len;
  58         else {
  59                 buf +=  0x1000;
  60                 buf &= ~0x0fff;
  61
  62                 /* per-qtd limit: from 16K to 20K (best alignment) */
  63                 for (i = 1; count < len && i < 5; i++) {
  64                         addr = buf;
  65                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  66                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  67                                         (u32)(addr >> 32));
  68                         buf += 0x1000;
  69                         if ((count + 0x1000) < len)
  70                                 count += 0x1000;
  71                         else
  72                                 count = len;
  73                 }
  74
  75                 /* short packets may only terminate transfers */
  76                 if (count != len)
  77                         count -= (count % maxpacket);
  78         }
  79         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  80         qtd->length = count;
  81
  82         return count;
  83 }
  84
  85 /*-------------------------------------------------------------------------*/
  86
  87 static inline void
  88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  89 {
  90         struct ehci_qh_hw *hw = qh->hw;
  91
  92         /* writes to an active overlay are unsafe */
  93         BUG_ON(qh->qh_state != QH_STATE_IDLE);
  94
  95         hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  96         hw->hw_alt_next = EHCI_LIST_END(ehci);
  97
  98         /* Except for control endpoints, we make hardware maintain data
  99          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
 100          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
 101          * ever clear it.
 102          */
 103         if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
 104                 unsigned        is_out, epnum;
 105
 106                 is_out = qh->is_out;
 107                 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
 108                 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
 109                         hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 110                         usb_settoggle (qh->dev, epnum, is_out, 1);
 111                 }
 112         }
 113
 114         hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 115 }
 116
 117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 118  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 119  * recovery (including urb dequeue) would need software changes to a QH...
 120  */
 121 static void
 122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 123 {
 124         struct ehci_qtd *qtd;
 125
 126         if (list_empty (&qh->qtd_list))
 127                 qtd = qh->dummy;
 128         else {
 129                 qtd = list_entry (qh->qtd_list.next,
 130                                 struct ehci_qtd, qtd_list);
 131                 /*
 132                  * first qtd may already be partially processed.
 133                  * If we come here during unlink, the QH overlay region
 134                  * might have reference to the just unlinked qtd. The
 135                  * qtd is updated in qh_completions(). Update the QH
 136                  * overlay here.
 137                  */
 138                 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) {
 139                         qh->hw->hw_qtd_next = qtd->hw_next;
 140                         qtd = NULL;
 141                 }
 142         }
 143
 144         if (qtd)
 145                 qh_update (ehci, qh, qtd);
 146 }
 147
 148 /*-------------------------------------------------------------------------*/
 149
 150 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
 151
 152 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
 153                 struct usb_host_endpoint *ep)
 154 {
 155         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 156         struct ehci_qh          *qh = ep->hcpriv;
 157         unsigned long           flags;
 158
 159         spin_lock_irqsave(&ehci->lock, flags);
 160         qh->clearing_tt = 0;
 161         if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
 162                         && ehci->rh_state == EHCI_RH_RUNNING)
 163                 qh_link_async(ehci, qh);
 164         spin_unlock_irqrestore(&ehci->lock, flags);
 165 }
 166
 167 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
 168                 struct urb *urb, u32 token)
 169 {
 170
 171         /* If an async split transaction gets an error or is unlinked,
 172          * the TT buffer may be left in an indeterminate state.  We
 173          * have to clear the TT buffer.
 174          *
 175          * Note: this routine is never called for Isochronous transfers.
 176          */
 177         if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
 178 #ifdef DEBUG
 179                 struct usb_device *tt = urb->dev->tt->hub;
 180                 dev_dbg(&tt->dev,
 181                         "clear tt buffer port %d, a%d ep%d t%08x\n",
 182                         urb->dev->ttport, urb->dev->devnum,
 183                         usb_pipeendpoint(urb->pipe), token);
 184 #endif /* DEBUG */
 185                 if (!ehci_is_TDI(ehci)
 186                                 || urb->dev->tt->hub !=
 187                                    ehci_to_hcd(ehci)->self.root_hub) {
 188                         if (usb_hub_clear_tt_buffer(urb) == 0)
 189                                 qh->clearing_tt = 1;
 190                 } else {
 191
 192                         /* REVISIT ARC-derived cores don't clear the root
 193                          * hub TT buffer in this way...
 194                          */
 195                 }
 196         }
 197 }
 198
 199 static int qtd_copy_status (
 200         struct ehci_hcd *ehci,
 201         struct urb *urb,
 202         size_t length,
 203         u32 token
 204 )
 205 {
 206         int     status = -EINPROGRESS;
 207
 208         /* count IN/OUT bytes, not SETUP (even short packets) */
 209         if (likely (QTD_PID (token) != 2))
 210                 urb->actual_length += length - QTD_LENGTH (token);
 211
 212         /* don't modify error codes */
 213         if (unlikely(urb->unlinked))
 214                 return status;
 215
 216         /* force cleanup after short read; not always an error */
 217         if (unlikely (IS_SHORT_READ (token)))
 218                 status = -EREMOTEIO;
 219
 220         /* serious "can't proceed" faults reported by the hardware */
 221         if (token & QTD_STS_HALT) {
 222                 if (token & QTD_STS_BABBLE) {
 223                         /* FIXME "must" disable babbling device's port too */
 224                         status = -EOVERFLOW;
 225                 /* CERR nonzero + halt --> stall */
 226                 } else if (QTD_CERR(token)) {
 227                         status = -EPIPE;
 228
 229                 /* In theory, more than one of the following bits can be set
 230                  * since they are sticky and the transaction is retried.
 231                  * Which to test first is rather arbitrary.
 232                  */
 233                 } else if (token & QTD_STS_MMF) {
 234                         /* fs/ls interrupt xfer missed the complete-split */
 235                         status = -EPROTO;
 236                 } else if (token & QTD_STS_DBE) {
 237                         status = (QTD_PID (token) == 1) /* IN ? */
 238                                 ? -ENOSR  /* hc couldn't read data */
 239                                 : -ECOMM; /* hc couldn't write data */
 240                 } else if (token & QTD_STS_XACT) {
 241                         /* timeout, bad CRC, wrong PID, etc */
 242                         ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
 243                                 urb->dev->devpath,
 244                                 usb_pipeendpoint(urb->pipe),
 245                                 usb_pipein(urb->pipe) ? "in" : "out");
 246                         status = -EPROTO;
 247                 } else {        /* unknown */
 248                         status = -EPROTO;
 249                 }
 250
 251                 ehci_vdbg (ehci,
 252                         "dev%d ep%d%s qtd token %08x --> status %d\n",
 253                         usb_pipedevice (urb->pipe),
 254                         usb_pipeendpoint (urb->pipe),
 255                         usb_pipein (urb->pipe) ? "in" : "out",
 256                         token, status);
 257         }
 258
 259         return status;
 260 }
 261
 262 static void
 263 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
 264 __releases(ehci->lock)
 265 __acquires(ehci->lock)
 266 {
 267         if (likely (urb->hcpriv != NULL)) {
 268                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
 269
 270                 /* S-mask in a QH means it's an interrupt urb */
 271                 if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
 272
 273                         /* ... update hc-wide periodic stats (for usbfs) */
 274                         ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 275                 }
 276         }
 277
 278         if (unlikely(urb->unlinked)) {
 279                 COUNT(ehci->stats.unlink);
 280         } else {
 281                 /* report non-error and short read status as zero */
 282                 if (status == -EINPROGRESS || status == -EREMOTEIO)
 283                         status = 0;
 284                 COUNT(ehci->stats.complete);
 285         }
 286
 287 #ifdef EHCI_URB_TRACE
 288         ehci_dbg (ehci,
 289                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 290                 __func__, urb->dev->devpath, urb,
 291                 usb_pipeendpoint (urb->pipe),
 292                 usb_pipein (urb->pipe) ? "in" : "out",
 293                 status,
 294                 urb->actual_length, urb->transfer_buffer_length);
 295 #endif
 296
 297         /* complete() can reenter this HCD */
 298         usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 299         spin_unlock (&ehci->lock);
 300         usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
 301         spin_lock (&ehci->lock);
 302 }
 303
 304 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 305
 306 /*
 307  * Process and free completed qtds for a qh, returning URBs to drivers.
 308  * Chases up to qh->hw_current.  Returns number of completions called,
 309  * indicating how much "real" work we did.
 310  */
 311 static unsigned
 312 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 313 {
 314         struct ehci_qtd         *last, *end = qh->dummy;
 315         struct list_head        *entry, *tmp;
 316         int                     last_status;
 317         int                     stopped;
 318         unsigned                count = 0;
 319         u8                      state;
 320         struct ehci_qh_hw       *hw = qh->hw;
 321
 322         if (unlikely (list_empty (&qh->qtd_list)))
 323                 return count;
 324
 325         /* completions (or tasks on other cpus) must never clobber HALT
 326          * till we've gone through and cleaned everything up, even when
 327          * they add urbs to this qh's queue or mark them for unlinking.
 328          *
 329          * NOTE:  unlinking expects to be done in queue order.
 330          *
 331          * It's a bug for qh->qh_state to be anything other than
 332          * QH_STATE_IDLE, unless our caller is scan_async() or
 333          * scan_intr().
 334          */
 335         state = qh->qh_state;
 336         qh->qh_state = QH_STATE_COMPLETING;
 337         stopped = (state == QH_STATE_IDLE);
 338
 339  rescan:
 340         last = NULL;
 341         last_status = -EINPROGRESS;
 342         qh->needs_rescan = 0;
 343
 344         /* remove de-activated QTDs from front of queue.
 345          * after faults (including short reads), cleanup this urb
 346          * then let the queue advance.
 347          * if queue is stopped, handles unlinks.
 348          */
 349         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 350                 struct ehci_qtd *qtd;
 351                 struct urb      *urb;
 352                 u32             token = 0;
 353
 354                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 355                 urb = qtd->urb;
 356
 357                 /* clean up any state from previous QTD ...*/
 358                 if (last) {
 359                         if (likely (last->urb != urb)) {
 360                                 ehci_urb_done(ehci, last->urb, last_status);
 361                                 count++;
 362                                 last_status = -EINPROGRESS;
 363                         }
 364                         ehci_qtd_free (ehci, last);
 365                         last = NULL;
 366                 }
 367
 368                 /* ignore urbs submitted during completions we reported */
 369                 if (qtd == end)
 370                         break;
 371
 372                 /* hardware copies qtd out of qh overlay */
 373                 rmb ();
 374                 token = hc32_to_cpu(ehci, qtd->hw_token);
 375
 376                 /* always clean up qtds the hc de-activated */
 377  retry_xacterr:
 378                 if ((token & QTD_STS_ACTIVE) == 0) {
 379
 380                         /* Report Data Buffer Error: non-fatal but useful */
 381                         if (token & QTD_STS_DBE)
 382                                 ehci_dbg(ehci,
 383                                         "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 384                                         urb,
 385                                         usb_endpoint_num(&urb->ep->desc),
 386                                         usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
 387                                         urb->transfer_buffer_length,
 388                                         qtd,
 389                                         qh);
 390
 391                         /* on STALL, error, and short reads this urb must
 392                          * complete and all its qtds must be recycled.
 393                          */
 394                         if ((token & QTD_STS_HALT) != 0) {
 395
 396                                 /* retry transaction errors until we
 397                                  * reach the software xacterr limit
 398                                  */
 399                                 if ((token & QTD_STS_XACT) &&
 400                                                 QTD_CERR(token) == 0 &&
 401                                                 ++qh->xacterrs < QH_XACTERR_MAX &&
 402                                                 !urb->unlinked) {
 403                                         ehci_dbg(ehci,
 404         "detected XactErr len %zu/%zu retry %d\n",
 405         qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
 406
 407                                         /* reset the token in the qtd and the
 408                                          * qh overlay (which still contains
 409                                          * the qtd) so that we pick up from
 410                                          * where we left off
 411                                          */
 412                                         token &= ~QTD_STS_HALT;
 413                                         token |= QTD_STS_ACTIVE |
 414                                                         (EHCI_TUNE_CERR << 10);
 415                                         qtd->hw_token = cpu_to_hc32(ehci,
 416                                                         token);
 417                                         wmb();
 418                                         hw->hw_token = cpu_to_hc32(ehci,
 419                                                         token);
 420                                         goto retry_xacterr;
 421                                 }
 422                                 stopped = 1;
 423
 424                         /* magic dummy for some short reads; qh won't advance.
 425                          * that silicon quirk can kick in with this dummy too.
 426                          *
 427                          * other short reads won't stop the queue, including
 428                          * control transfers (status stage handles that) or
 429                          * most other single-qtd reads ... the queue stops if
 430                          * URB_SHORT_NOT_OK was set so the driver submitting
 431                          * the urbs could clean it up.
 432                          */
 433                         } else if (IS_SHORT_READ (token)
 434                                         && !(qtd->hw_alt_next
 435                                                 & EHCI_LIST_END(ehci))) {
 436                                 stopped = 1;
 437                         }
 438
 439                 /* stop scanning when we reach qtds the hc is using */
 440                 } else if (likely (!stopped
 441                                 && ehci->rh_state >= EHCI_RH_RUNNING)) {
 442                         break;
 443
 444                 /* scan the whole queue for unlinks whenever it stops */
 445                 } else {
 446                         stopped = 1;
 447
 448                         /* cancel everything if we halt, suspend, etc */
 449                         if (ehci->rh_state < EHCI_RH_RUNNING)
 450                                 last_status = -ESHUTDOWN;
 451
 452                         /* this qtd is active; skip it unless a previous qtd
 453                          * for its urb faulted, or its urb was canceled.
 454                          */
 455                         else if (last_status == -EINPROGRESS && !urb->unlinked)
 456                                 continue;
 457
 458                         /* qh unlinked; token in overlay may be most current */
 459                         if (state == QH_STATE_IDLE
 460                                         && cpu_to_hc32(ehci, qtd->qtd_dma)
 461                                                 == hw->hw_current) {
 462                                 token = hc32_to_cpu(ehci, hw->hw_token);
 463
 464                                 /* An unlink may leave an incomplete
 465                                  * async transaction in the TT buffer.
 466                                  * We have to clear it.
 467                                  */
 468                                 ehci_clear_tt_buffer(ehci, qh, urb, token);
 469                         }
 470                 }
 471
 472                 /* unless we already know the urb's status, collect qtd status
 473                  * and update count of bytes transferred.  in common short read
 474                  * cases with only one data qtd (including control transfers),
 475                  * queue processing won't halt.  but with two or more qtds (for
 476                  * example, with a 32 KB transfer), when the first qtd gets a
 477                  * short read the second must be removed by hand.
 478                  */
 479                 if (last_status == -EINPROGRESS) {
 480                         last_status = qtd_copy_status(ehci, urb,
 481                                         qtd->length, token);
 482                         if (last_status == -EREMOTEIO
 483                                         && (qtd->hw_alt_next
 484                                                 & EHCI_LIST_END(ehci)))
 485                                 last_status = -EINPROGRESS;
 486
 487                         /* As part of low/full-speed endpoint-halt processing
 488                          * we must clear the TT buffer (11.17.5).
 489                          */
 490                         if (unlikely(last_status != -EINPROGRESS &&
 491                                         last_status != -EREMOTEIO)) {
 492                                 /* The TT's in some hubs malfunction when they
 493                                  * receive this request following a STALL (they
 494                                  * stop sending isochronous packets).  Since a
 495                                  * STALL can't leave the TT buffer in a busy
 496                                  * state (if you believe Figures 11-48 - 11-51
 497                                  * in the USB 2.0 spec), we won't clear the TT
 498                                  * buffer in this case.  Strictly speaking this
 499                                  * is a violation of the spec.
 500                                  */
 501                                 if (last_status != -EPIPE)
 502                                         ehci_clear_tt_buffer(ehci, qh, urb,
 503                                                         token);
 504                         }
 505                 }
 506
 507                 /* if we're removing something not at the queue head,
 508                  * patch the hardware queue pointer.
 509                  */
 510                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 511                         last = list_entry (qtd->qtd_list.prev,
 512                                         struct ehci_qtd, qtd_list);
 513                         last->hw_next = qtd->hw_next;
 514                 }
 515
 516                 /* remove qtd; it's recycled after possible urb completion */
 517                 list_del (&qtd->qtd_list);
 518                 last = qtd;
 519
 520                 /* reinit the xacterr counter for the next qtd */
 521                 qh->xacterrs = 0;
 522         }
 523
 524         /* last urb's completion might still need calling */
 525         if (likely (last != NULL)) {
 526                 ehci_urb_done(ehci, last->urb, last_status);
 527                 count++;
 528                 ehci_qtd_free (ehci, last);
 529         }
 530
 531         /* Do we need to rescan for URBs dequeued during a giveback? */
 532         if (unlikely(qh->needs_rescan)) {
 533                 /* If the QH is already unlinked, do the rescan now. */
 534                 if (state == QH_STATE_IDLE)
 535                         goto rescan;
 536
 537                 /* Otherwise we have to wait until the QH is fully unlinked.
 538                  * Our caller will start an unlink if qh->needs_rescan is
 539                  * set.  But if an unlink has already started, nothing needs
 540                  * to be done.
 541                  */
 542                 if (state != QH_STATE_LINKED)
 543                         qh->needs_rescan = 0;
 544         }
 545
 546         /* restore original state; caller must unlink or relink */
 547         qh->qh_state = state;
 548
 549         /* be sure the hardware's done with the qh before refreshing
 550          * it after fault cleanup, or recovering from silicon wrongly
 551          * overlaying the dummy qtd (which reduces DMA chatter).
 552          */
 553         if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
 554                 switch (state) {
 555                 case QH_STATE_IDLE:
 556                         qh_refresh(ehci, qh);
 557                         break;
 558                 case QH_STATE_LINKED:
 559                         /* We won't refresh a QH that's linked (after the HC
 560                          * stopped the queue).  That avoids a race:
 561                          *  - HC reads first part of QH;
 562                          *  - CPU updates that first part and the token;
 563                          *  - HC reads rest of that QH, including token
 564                          * Result:  HC gets an inconsistent image, and then
 565                          * DMAs to/from the wrong memory (corrupting it).
 566                          *
 567                          * That should be rare for interrupt transfers,
 568                          * except maybe high bandwidth ...
 569                          */
 570
 571                         /* Tell the caller to start an unlink */
 572                         qh->needs_rescan = 1;
 573                         break;
 574                 /* otherwise, unlink already started */
 575                 }
 576         }
 577
 578         return count;
 579 }
 580
 581 /*-------------------------------------------------------------------------*/
 582
 583 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 584 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 585 // ... and packet size, for any kind of endpoint descriptor
 586 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 587
 588 /*
 589  * reverse of qh_urb_transaction:  free a list of TDs.
 590  * used for cleanup after errors, before HC sees an URB's TDs.
 591  */
 592 static void qtd_list_free (
 593         struct ehci_hcd         *ehci,
 594         struct urb              *urb,
 595         struct list_head        *qtd_list
 596 ) {
 597         struct list_head        *entry, *temp;
 598
 599         list_for_each_safe (entry, temp, qtd_list) {
 600                 struct ehci_qtd *qtd;
 601
 602                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 603                 list_del (&qtd->qtd_list);
 604                 ehci_qtd_free (ehci, qtd);
 605         }
 606 }
 607
 608 /*
 609  * create a list of filled qtds for this URB; won't link into qh.
 610  */
 611 static struct list_head *
 612 qh_urb_transaction (
 613         struct ehci_hcd         *ehci,
 614         struct urb              *urb,
 615         struct list_head        *head,
 616         gfp_t                   flags
 617 ) {
 618         struct ehci_qtd         *qtd, *qtd_prev;
 619         dma_addr_t              buf;
 620         int                     len, this_sg_len, maxpacket;
 621         int                     is_input;
 622         u32                     token;
 623         int                     i;
 624         struct scatterlist      *sg;
 625
 626         /*
 627          * URBs map to sequences of QTDs:  one logical transaction
 628          */
 629         qtd = ehci_qtd_alloc (ehci, flags);
 630         if (unlikely (!qtd))
 631                 return NULL;
 632         list_add_tail (&qtd->qtd_list, head);
 633         qtd->urb = urb;
 634
 635         token = QTD_STS_ACTIVE;
 636         token |= (EHCI_TUNE_CERR << 10);
 637         /* for split transactions, SplitXState initialized to zero */
 638
 639         len = urb->transfer_buffer_length;
 640         is_input = usb_pipein (urb->pipe);
 641         if (usb_pipecontrol (urb->pipe)) {
 642                 /* SETUP pid */
 643                 qtd_fill(ehci, qtd, urb->setup_dma,
 644                                 sizeof (struct usb_ctrlrequest),
 645                                 token | (2 /* "setup" */ << 8), 8);
 646
 647                 /* ... and always at least one more pid */
 648                 token ^= QTD_TOGGLE;
 649                 qtd_prev = qtd;
 650                 qtd = ehci_qtd_alloc (ehci, flags);
 651                 if (unlikely (!qtd))
 652                         goto cleanup;
 653                 qtd->urb = urb;
 654                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 655                 list_add_tail (&qtd->qtd_list, head);
 656
 657                 /* for zero length DATA stages, STATUS is always IN */
 658                 if (len == 0)
 659                         token |= (1 /* "in" */ << 8);
 660         }
 661
 662         /*
 663          * data transfer stage:  buffer setup
 664          */
 665         i = urb->num_mapped_sgs;
 666         if (len > 0 && i > 0) {
 667                 sg = urb->sg;
 668                 buf = sg_dma_address(sg);
 669
 670                 /* urb->transfer_buffer_length may be smaller than the
 671                  * size of the scatterlist (or vice versa)
 672                  */
 673                 this_sg_len = min_t(int, sg_dma_len(sg), len);
 674         } else {
 675                 sg = NULL;
 676                 buf = urb->transfer_dma;
 677                 this_sg_len = len;
 678         }
 679
 680         if (is_input)
 681                 token |= (1 /* "in" */ << 8);
 682         /* else it's already initted to "out" pid (0 << 8) */
 683
 684         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 685
 686         /*
 687          * buffer gets wrapped in one or more qtds;
 688          * last one may be "short" (including zero len)
 689          * and may serve as a control status ack
 690          */
 691         for (;;) {
 692                 int this_qtd_len;
 693
 694                 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
 695                                 maxpacket);
 696                 this_sg_len -= this_qtd_len;
 697                 len -= this_qtd_len;
 698                 buf += this_qtd_len;
 699
 700                 /*
 701                  * short reads advance to a "magic" dummy instead of the next
 702                  * qtd ... that forces the queue to stop, for manual cleanup.
 703                  * (this will usually be overridden later.)
 704                  */
 705                 if (is_input)
 706                         qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
 707
 708                 /* qh makes control packets use qtd toggle; maybe switch it */
 709                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 710                         token ^= QTD_TOGGLE;
 711
 712                 if (likely(this_sg_len <= 0)) {
 713                         if (--i <= 0 || len <= 0)
 714                                 break;
 715                         sg = sg_next(sg);
 716                         buf = sg_dma_address(sg);
 717                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 718                 }
 719
 720                 qtd_prev = qtd;
 721                 qtd = ehci_qtd_alloc (ehci, flags);
 722                 if (unlikely (!qtd))
 723                         goto cleanup;
 724                 qtd->urb = urb;
 725                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 726                 list_add_tail (&qtd->qtd_list, head);
 727         }
 728
 729         /*
 730          * unless the caller requires manual cleanup after short reads,
 731          * have the alt_next mechanism keep the queue running after the
 732          * last data qtd (the only one, for control and most other cases).
 733          */
 734         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 735                                 || usb_pipecontrol (urb->pipe)))
 736                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 737
 738         /*
 739          * control requests may need a terminating data "status" ack;
 740          * other OUT ones may need a terminating short packet
 741          * (zero length).
 742          */
 743         if (likely (urb->transfer_buffer_length != 0)) {
 744                 int     one_more = 0;
 745
 746                 if (usb_pipecontrol (urb->pipe)) {
 747                         one_more = 1;
 748                         token ^= 0x0100;        /* "in" <--> "out"  */
 749                         token |= QTD_TOGGLE;    /* force DATA1 */
 750                 } else if (usb_pipeout(urb->pipe)
 751                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 752                                 && !(urb->transfer_buffer_length % maxpacket)) {
 753                         one_more = 1;
 754                 }
 755                 if (one_more) {
 756                         qtd_prev = qtd;
 757                         qtd = ehci_qtd_alloc (ehci, flags);
 758                         if (unlikely (!qtd))
 759                                 goto cleanup;
 760                         qtd->urb = urb;
 761                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 762                         list_add_tail (&qtd->qtd_list, head);
 763
 764                         /* never any data in such packets */
 765                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 766                 }
 767         }
 768
 769         /* by default, enable interrupt on urb completion */
 770         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 771                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 772         return head;
 773
 774 cleanup:
 775         qtd_list_free (ehci, urb, head);
 776         return NULL;
 777 }
 778
 779 /*-------------------------------------------------------------------------*/
 780
 781 // Would be best to create all qh's from config descriptors,
 782 // when each interface/altsetting is established.  Unlink
 783 // any previous qh and cancel its urbs first; endpoints are
 784 // implicitly reset then (data toggle too).
 785 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 786
 787
 788 /*
 789  * Each QH holds a qtd list; a QH is used for everything except iso.
 790  *
 791  * For interrupt urbs, the scheduler must set the microframe scheduling
 792  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 793  * just one microframe in the s-mask.  For split interrupt transactions
 794  * there are additional complications: c-mask, maybe FSTNs.
 795  */
 796 static struct ehci_qh *
 797 qh_make (
 798         struct ehci_hcd         *ehci,
 799         struct urb              *urb,
 800         gfp_t                   flags
 801 ) {
 802         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 803         u32                     info1 = 0, info2 = 0;
 804         int                     is_input, type;
 805         int                     maxp = 0;
 806         struct usb_tt           *tt = urb->dev->tt;
 807         struct ehci_qh_hw       *hw;
 808
 809         if (!qh)
 810                 return qh;
 811
 812         /*
 813          * init endpoint/device data for this QH
 814          */
 815         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 816         info1 |= usb_pipedevice (urb->pipe) << 0;
 817
 818         is_input = usb_pipein (urb->pipe);
 819         type = usb_pipetype (urb->pipe);
 820         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 821
 822         /* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
 823          * acts like up to 3KB, but is built from smaller packets.
 824          */
 825         if (max_packet(maxp) > 1024) {
 826                 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
 827                 goto done;
 828         }
 829
 830         /* Compute interrupt scheduling parameters just once, and save.
 831          * - allowing for high bandwidth, how many nsec/uframe are used?
 832          * - split transactions need a second CSPLIT uframe; same question
 833          * - splits also need a schedule gap (for full/low speed I/O)
 834          * - qh has a polling interval
 835          *
 836          * For control/bulk requests, the HC or TT handles these.
 837          */
 838         if (type == PIPE_INTERRUPT) {
 839                 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
 840                                 is_input, 0,
 841                                 hb_mult(maxp) * max_packet(maxp)));
 842                 qh->start = NO_FRAME;
 843
 844                 if (urb->dev->speed == USB_SPEED_HIGH) {
 845                         qh->c_usecs = 0;
 846                         qh->gap_uf = 0;
 847
 848                         qh->period = urb->interval >> 3;
 849                         if (qh->period == 0 && urb->interval != 1) {
 850                                 /* NOTE interval 2 or 4 uframes could work.
 851                                  * But interval 1 scheduling is simpler, and
 852                                  * includes high bandwidth.
 853                                  */
 854                                 urb->interval = 1;
 855                         } else if (qh->period > ehci->periodic_size) {
 856                                 qh->period = ehci->periodic_size;
 857                                 urb->interval = qh->period << 3;
 858                         }
 859                 } else {
 860                         int             think_time;
 861
 862                         /* gap is f(FS/LS transfer times) */
 863                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 864                                         is_input, 0, maxp) / (125 * 1000);
 865
 866                         /* FIXME this just approximates SPLIT/CSPLIT times */
 867                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 868                                 qh->c_usecs = qh->usecs + HS_USECS (0);
 869                                 qh->usecs = HS_USECS (1);
 870                         } else {                // SPLIT+DATA, gap, CSPLIT
 871                                 qh->usecs += HS_USECS (1);
 872                                 qh->c_usecs = HS_USECS (0);
 873                         }
 874
 875                         think_time = tt ? tt->think_time : 0;
 876                         qh->tt_usecs = NS_TO_US (think_time +
 877                                         usb_calc_bus_time (urb->dev->speed,
 878                                         is_input, 0, max_packet (maxp)));
 879                         qh->period = urb->interval;
 880                         if (qh->period > ehci->periodic_size) {
 881                                 qh->period = ehci->periodic_size;
 882                                 urb->interval = qh->period;
 883                         }
 884                 }
 885         }
 886
 887         /* support for tt scheduling, and access to toggles */
 888         qh->dev = urb->dev;
 889
 890         /* using TT? */
 891         switch (urb->dev->speed) {
 892         case USB_SPEED_LOW:
 893                 info1 |= QH_LOW_SPEED;
 894                 /* FALL THROUGH */
 895
 896         case USB_SPEED_FULL:
 897                 /* EPS 0 means "full" */
 898                 if (type != PIPE_INTERRUPT)
 899                         info1 |= (EHCI_TUNE_RL_TT << 28);
 900                 if (type == PIPE_CONTROL) {
 901                         info1 |= QH_CONTROL_EP;         /* for TT */
 902                         info1 |= QH_TOGGLE_CTL;         /* toggle from qtd */
 903                 }
 904                 info1 |= maxp << 16;
 905
 906                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 907
 908                 /* Some Freescale processors have an erratum in which the
 909                  * port number in the queue head was 0..N-1 instead of 1..N.
 910                  */
 911                 if (ehci_has_fsl_portno_bug(ehci))
 912                         info2 |= (urb->dev->ttport-1) << 23;
 913                 else
 914                         info2 |= urb->dev->ttport << 23;
 915
 916                 /* set the address of the TT; for TDI's integrated
 917                  * root hub tt, leave it zeroed.
 918                  */
 919                 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
 920                         info2 |= tt->hub->devnum << 16;
 921
 922                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 923
 924                 break;
 925
 926         case USB_SPEED_HIGH:            /* no TT involved */
 927                 info1 |= QH_HIGH_SPEED;
 928                 if (type == PIPE_CONTROL) {
 929                         info1 |= (EHCI_TUNE_RL_HS << 28);
 930                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 931                         info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
 932                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 933                 } else if (type == PIPE_BULK) {
 934                         info1 |= (EHCI_TUNE_RL_HS << 28);
 935                         /* The USB spec says that high speed bulk endpoints
 936                          * always use 512 byte maxpacket.  But some device
 937                          * vendors decided to ignore that, and MSFT is happy
 938                          * to help them do so.  So now people expect to use
 939                          * such nonconformant devices with Linux too; sigh.
 940                          */
 941                         info1 |= max_packet(maxp) << 16;
 942                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 943                 } else {                /* PIPE_INTERRUPT */
 944                         info1 |= max_packet (maxp) << 16;
 945                         info2 |= hb_mult (maxp) << 30;
 946                 }
 947                 break;
 948         default:
 949                 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
 950                         urb->dev->speed);
 951 done:
 952                 qh_destroy(ehci, qh);
 953                 return NULL;
 954         }
 955
 956         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 957
 958         /* init as live, toggle clear, advance to dummy */
 959         qh->qh_state = QH_STATE_IDLE;
 960         hw = qh->hw;
 961         hw->hw_info1 = cpu_to_hc32(ehci, info1);
 962         hw->hw_info2 = cpu_to_hc32(ehci, info2);
 963         qh->is_out = !is_input;
 964         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 965         qh_refresh (ehci, qh);
 966         return qh;
 967 }
 968
 969 /*-------------------------------------------------------------------------*/
 970
 971 static void enable_async(struct ehci_hcd *ehci)
 972 {
 973         if (ehci->async_count++)
 974                 return;
 975
 976         /* Stop waiting to turn off the async schedule */
 977         ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
 978
 979         /* Don't start the schedule until ASS is 0 */
 980         ehci_poll_ASS(ehci);
 981         turn_on_io_watchdog(ehci);
 982 }
 983
 984 static void disable_async(struct ehci_hcd *ehci)
 985 {
 986         if (--ehci->async_count)
 987                 return;
 988
 989         /* The async schedule and async_unlink list are supposed to be empty */
 990         WARN_ON(ehci->async->qh_next.qh || ehci->async_unlink);
 991
 992         /* Don't turn off the schedule until ASS is 1 */
 993         ehci_poll_ASS(ehci);
 994 }
 995
 996 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 997
 998 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 999 {
1000         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
1001         struct ehci_qh  *head;
1002
1003         /* Don't link a QH if there's a Clear-TT-Buffer pending */
1004         if (unlikely(qh->clearing_tt))
1005                 return;
1006
1007         WARN_ON(qh->qh_state != QH_STATE_IDLE);
1008
1009         /* clear halt and/or toggle; and maybe recover from silicon quirk */
1010         qh_refresh(ehci, qh);
1011
1012         /* splice right after start */
1013         head = ehci->async;
1014         qh->qh_next = head->qh_next;
1015         qh->hw->hw_next = head->hw->hw_next;
1016         wmb ();
1017
1018         head->qh_next.qh = qh;
1019         head->hw->hw_next = dma;
1020
1021         qh->xacterrs = 0;
1022         qh->qh_state = QH_STATE_LINKED;
1023         /* qtd completions reported later by interrupt */
1024
1025         enable_async(ehci);
1026 }
1027
1028 /*-------------------------------------------------------------------------*/
1029
1030 /*
1031  * For control/bulk/interrupt, return QH with these TDs appended.
1032  * Allocates and initializes the QH if necessary.
1033  * Returns null if it can't allocate a QH it needs to.
1034  * If the QH has TDs (urbs) already, that's great.
1035  */
1036 static struct ehci_qh *qh_append_tds (
1037         struct ehci_hcd         *ehci,
1038         struct urb              *urb,
1039         struct list_head        *qtd_list,
1040         int                     epnum,
1041         void                    **ptr
1042 )
1043 {
1044         struct ehci_qh          *qh = NULL;
1045         __hc32                  qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1046
1047         qh = (struct ehci_qh *) *ptr;
1048         if (unlikely (qh == NULL)) {
1049                 /* can't sleep here, we have ehci->lock... */
1050                 qh = qh_make (ehci, urb, GFP_ATOMIC);
1051                 *ptr = qh;
1052         }
1053         if (likely (qh != NULL)) {
1054                 struct ehci_qtd *qtd;
1055
1056                 if (unlikely (list_empty (qtd_list)))
1057                         qtd = NULL;
1058                 else
1059                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
1060                                         qtd_list);
1061
1062                 /* control qh may need patching ... */
1063                 if (unlikely (epnum == 0)) {
1064
1065                         /* usb_reset_device() briefly reverts to address 0 */
1066                         if (usb_pipedevice (urb->pipe) == 0)
1067                                 qh->hw->hw_info1 &= ~qh_addr_mask;
1068                 }
1069
1070                 /* just one way to queue requests: swap with the dummy qtd.
1071                  * only hc or qh_refresh() ever modify the overlay.
1072                  */
1073                 if (likely (qtd != NULL)) {
1074                         struct ehci_qtd         *dummy;
1075                         dma_addr_t              dma;
1076                         __hc32                  token;
1077
1078                         /* to avoid racing the HC, use the dummy td instead of
1079                          * the first td of our list (becomes new dummy).  both
1080                          * tds stay deactivated until we're done, when the
1081                          * HC is allowed to fetch the old dummy (4.10.2).
1082                          */
1083                         token = qtd->hw_token;
1084                         qtd->hw_token = HALT_BIT(ehci);
1085
1086                         dummy = qh->dummy;
1087
1088                         dma = dummy->qtd_dma;
1089                         *dummy = *qtd;
1090                         dummy->qtd_dma = dma;
1091
1092                         list_del (&qtd->qtd_list);
1093                         list_add (&dummy->qtd_list, qtd_list);
1094                         list_splice_tail(qtd_list, &qh->qtd_list);
1095
1096                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1097                         qh->dummy = qtd;
1098
1099                         /* hc must see the new dummy at list end */
1100                         dma = qtd->qtd_dma;
1101                         qtd = list_entry (qh->qtd_list.prev,
1102                                         struct ehci_qtd, qtd_list);
1103                         qtd->hw_next = QTD_NEXT(ehci, dma);
1104
1105                         /* let the hc process these next qtds */
1106                         wmb ();
1107                         dummy->hw_token = token;
1108
1109                         urb->hcpriv = qh;
1110                 }
1111         }
1112         return qh;
1113 }
1114
1115 /*-------------------------------------------------------------------------*/
1116
1117 static int
1118 submit_async (
1119         struct ehci_hcd         *ehci,
1120         struct urb              *urb,
1121         struct list_head        *qtd_list,
1122         gfp_t                   mem_flags
1123 ) {
1124         int                     epnum;
1125         unsigned long           flags;
1126         struct ehci_qh          *qh = NULL;
1127         int                     rc;
1128
1129         epnum = urb->ep->desc.bEndpointAddress;
1130
1131 #ifdef EHCI_URB_TRACE
1132         {
1133                 struct ehci_qtd *qtd;
1134                 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1135                 ehci_dbg(ehci,
1136                          "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1137                          __func__, urb->dev->devpath, urb,
1138                          epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1139                          urb->transfer_buffer_length,
1140                          qtd, urb->ep->hcpriv);
1141         }
1142 #endif
1143
1144         spin_lock_irqsave (&ehci->lock, flags);
1145         if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1146                 rc = -ESHUTDOWN;
1147                 goto done;
1148         }
1149         rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1150         if (unlikely(rc))
1151                 goto done;
1152
1153         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1154         if (unlikely(qh == NULL)) {
1155                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1156                 rc = -ENOMEM;
1157                 goto done;
1158         }
1159
1160         /* Control/bulk operations through TTs don't need scheduling,
1161          * the HC and TT handle it when the TT has a buffer ready.
1162          */
1163         if (likely (qh->qh_state == QH_STATE_IDLE))
1164                 qh_link_async(ehci, qh);
1165  done:
1166         spin_unlock_irqrestore (&ehci->lock, flags);
1167         if (unlikely (qh == NULL))
1168                 qtd_list_free (ehci, urb, qtd_list);
1169         return rc;
1170 }
1171
1172 /*-------------------------------------------------------------------------*/
1173
1174 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1175 {
1176         struct ehci_qh          *prev;
1177
1178         /* Add to the end of the list of QHs waiting for the next IAAD */
1179         qh->qh_state = QH_STATE_UNLINK;
1180         if (ehci->async_unlink)
1181                 ehci->async_unlink_last->unlink_next = qh;
1182         else
1183                 ehci->async_unlink = qh;
1184         ehci->async_unlink_last = qh;
1185
1186         /* Unlink it from the schedule */
1187         prev = ehci->async;
1188         while (prev->qh_next.qh != qh)
1189                 prev = prev->qh_next.qh;
1190
1191         prev->hw->hw_next = qh->hw->hw_next;
1192         prev->qh_next = qh->qh_next;
1193         if (ehci->qh_scan_next == qh)
1194                 ehci->qh_scan_next = qh->qh_next.qh;
1195 }
1196
1197 static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested)
1198 {
1199         /*
1200          * Do nothing if an IAA cycle is already running or
1201          * if one will be started shortly.
1202          */
1203         if (ehci->async_iaa || ehci->async_unlinking)
1204                 return;
1205
1206         /* Do all the waiting QHs at once */
1207         ehci->async_iaa = ehci->async_unlink;
1208         ehci->async_unlink = NULL;
1209
1210         /* If the controller isn't running, we don't have to wait for it */
1211         if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1212                 if (!nested)            /* Avoid recursion */
1213                         end_unlink_async(ehci);
1214
1215         /* Otherwise start a new IAA cycle */
1216         } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
1217                 /* Make sure the unlinks are all visible to the hardware */
1218                 wmb();
1219
1220                 ehci_writel(ehci, ehci->command | CMD_IAAD,
1221                                 &ehci->regs->command);
1222                 ehci_readl(ehci, &ehci->regs->command);
1223                 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1224         }
1225 }
1226
1227 /* the async qh for the qtds being unlinked are now gone from the HC */
1228
1229 static void end_unlink_async(struct ehci_hcd *ehci)
1230 {
1231         struct ehci_qh          *qh;
1232
1233         if (ehci->has_synopsys_hc_bug)
1234                 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1235                             &ehci->regs->async_next);
1236
1237         /* Process the idle QHs */
1238  restart:
1239         ehci->async_unlinking = true;
1240         while (ehci->async_iaa) {
1241                 qh = ehci->async_iaa;
1242                 ehci->async_iaa = qh->unlink_next;
1243                 qh->unlink_next = NULL;
1244
1245                 qh->qh_state = QH_STATE_IDLE;
1246                 qh->qh_next.qh = NULL;
1247
1248                 qh_completions(ehci, qh);
1249                 if (!list_empty(&qh->qtd_list) &&
1250                                 ehci->rh_state == EHCI_RH_RUNNING)
1251                         qh_link_async(ehci, qh);
1252                 disable_async(ehci);
1253         }
1254         ehci->async_unlinking = false;
1255
1256         /* Start a new IAA cycle if any QHs are waiting for it */
1257         if (ehci->async_unlink) {
1258                 start_iaa_cycle(ehci, true);
1259                 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING))
1260                         goto restart;
1261         }
1262 }
1263
1264 static void unlink_empty_async(struct ehci_hcd *ehci)
1265 {
1266         struct ehci_qh          *qh, *next;
1267         bool                    stopped = (ehci->rh_state < EHCI_RH_RUNNING);
1268         bool                    check_unlinks_later = false;
1269
1270         /* Unlink all the async QHs that have been empty for a timer cycle */
1271         next = ehci->async->qh_next.qh;
1272         while (next) {
1273                 qh = next;
1274                 next = qh->qh_next.qh;
1275
1276                 if (list_empty(&qh->qtd_list) &&
1277                                 qh->qh_state == QH_STATE_LINKED) {
1278                         if (!stopped && qh->unlink_cycle ==
1279                                         ehci->async_unlink_cycle)
1280                                 check_unlinks_later = true;
1281                         else
1282                                 single_unlink_async(ehci, qh);
1283                 }
1284         }
1285
1286         /* Start a new IAA cycle if any QHs are waiting for it */
1287         if (ehci->async_unlink)
1288                 start_iaa_cycle(ehci, false);
1289
1290         /* QHs that haven't been empty for long enough will be handled later */
1291         if (check_unlinks_later) {
1292                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1293                 ++ehci->async_unlink_cycle;
1294         }
1295 }
1296
1297 /* makes sure the async qh will become idle */
1298 /* caller must own ehci->lock */
1299
1300 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1301 {
1302         /*
1303          * If the QH isn't linked then there's nothing we can do
1304          * unless we were called during a giveback, in which case
1305          * qh_completions() has to deal with it.
1306          */
1307         if (qh->qh_state != QH_STATE_LINKED) {
1308                 if (qh->qh_state == QH_STATE_COMPLETING)
1309                         qh->needs_rescan = 1;
1310                 return;
1311         }
1312
1313         single_unlink_async(ehci, qh);
1314         start_iaa_cycle(ehci, false);
1315 }
1316
1317 /*-------------------------------------------------------------------------*/
1318
1319 static void scan_async (struct ehci_hcd *ehci)
1320 {
1321         struct ehci_qh          *qh;
1322         bool                    check_unlinks_later = false;
1323
1324         ehci->qh_scan_next = ehci->async->qh_next.qh;
1325         while (ehci->qh_scan_next) {
1326                 qh = ehci->qh_scan_next;
1327                 ehci->qh_scan_next = qh->qh_next.qh;
1328  rescan:
1329                 /* clean any finished work for this qh */
1330                 if (!list_empty(&qh->qtd_list)) {
1331                         int temp;
1332
1333                         /*
1334                          * Unlinks could happen here; completion reporting
1335                          * drops the lock.  That's why ehci->qh_scan_next
1336                          * always holds the next qh to scan; if the next qh
1337                          * gets unlinked then ehci->qh_scan_next is adjusted
1338                          * in single_unlink_async().
1339                          */
1340                         temp = qh_completions(ehci, qh);
1341                         if (qh->needs_rescan) {
1342                                 start_unlink_async(ehci, qh);
1343                         } else if (list_empty(&qh->qtd_list)
1344                                         && qh->qh_state == QH_STATE_LINKED) {
1345                                 qh->unlink_cycle = ehci->async_unlink_cycle;
1346                                 check_unlinks_later = true;
1347                         } else if (temp != 0)
1348                                 goto rescan;
1349                 }
1350         }
1351
1352         /*
1353          * Unlink empty entries, reducing DMA usage as well
1354          * as HCD schedule-scanning costs.  Delay for any qh
1355          * we just scanned, there's a not-unusual case that it
1356          * doesn't stay idle for long.
1357          */
1358         if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1359                         !(ehci->enabled_hrtimer_events &
1360                                 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1361                 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1362                 ++ehci->async_unlink_cycle;
1363         }
1364 }