drivers/usb/host/isp1760-hcd.c

   1 /*
   2  * Driver for the NXP ISP1760 chip
   3  *
   4  * However, the code might contain some bugs. What doesn't work for sure is:
   5  * - ISO
   6  * - OTG
   7  e The interrupt line is configured as active low, level.
   8  *
   9  * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
  10  *
  11  * (c) 2011 Arvid Brodin <arvid.brodin@enea.com>
  12  *
  13  */
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/slab.h>
  18 #include <linux/list.h>
  19 #include <linux/usb.h>
  20 #include <linux/usb/hcd.h>
  21 #include <linux/debugfs.h>
  22 #include <linux/uaccess.h>
  23 #include <linux/io.h>
  24 #include <linux/mm.h>
  25 #include <linux/timer.h>
  26 #include <asm/unaligned.h>
  27 #include <asm/cacheflush.h>
  28
  29 #include "isp1760-hcd.h"
  30
  31 static struct kmem_cache *qtd_cachep;
  32 static struct kmem_cache *qh_cachep;
  33 static struct kmem_cache *urb_listitem_cachep;
  34
  35 enum queue_head_types {
  36         QH_CONTROL,
  37         QH_BULK,
  38         QH_INTERRUPT,
  39         QH_END
  40 };
  41
  42 struct isp1760_hcd {
  43         u32 hcs_params;
  44         spinlock_t              lock;
  45         struct slotinfo         atl_slots[32];
  46         int                     atl_done_map;
  47         struct slotinfo         int_slots[32];
  48         int                     int_done_map;
  49         struct memory_chunk memory_pool[BLOCKS];
  50         struct list_head        qh_list[QH_END];
  51
  52         /* periodic schedule support */
  53 #define DEFAULT_I_TDPS          1024
  54         unsigned                periodic_size;
  55         unsigned                i_thresh;
  56         unsigned long           reset_done;
  57         unsigned long           next_statechange;
  58         unsigned int            devflags;
  59
  60         struct gpio_desc        *rst_gpio;
  61 };
  62
  63 typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh,
  64                 struct isp1760_qtd *qtd);
  65
  66 static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
  67 {
  68         return (struct isp1760_hcd *) (hcd->hcd_priv);
  69 }
  70
  71 /* Section 2.2 Host Controller Capability Registers */
  72 #define HC_LENGTH(p)            (((p)>>00)&0x00ff)      /* bits 7:0 */
  73 #define HC_VERSION(p)           (((p)>>16)&0xffff)      /* bits 31:16 */
  74 #define HCS_INDICATOR(p)        ((p)&(1 << 16)) /* true: has port indicators */
  75 #define HCS_PPC(p)              ((p)&(1 << 4))  /* true: port power control */
  76 #define HCS_N_PORTS(p)          (((p)>>0)&0xf)  /* bits 3:0, ports on HC */
  77 #define HCC_ISOC_CACHE(p)       ((p)&(1 << 7))  /* true: can cache isoc frame */
  78 #define HCC_ISOC_THRES(p)       (((p)>>4)&0x7)  /* bits 6:4, uframes cached */
  79
  80 /* Section 2.3 Host Controller Operational Registers */
  81 #define CMD_LRESET      (1<<7)          /* partial reset (no ports, etc) */
  82 #define CMD_RESET       (1<<1)          /* reset HC not bus */
  83 #define CMD_RUN         (1<<0)          /* start/stop HC */
  84 #define STS_PCD         (1<<2)          /* port change detect */
  85 #define FLAG_CF         (1<<0)          /* true: we'll support "high speed" */
  86
  87 #define PORT_OWNER      (1<<13)         /* true: companion hc owns this port */
  88 #define PORT_POWER      (1<<12)         /* true: has power (see PPC) */
  89 #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10))  /* USB 1.1 device */
  90 #define PORT_RESET      (1<<8)          /* reset port */
  91 #define PORT_SUSPEND    (1<<7)          /* suspend port */
  92 #define PORT_RESUME     (1<<6)          /* resume it */
  93 #define PORT_PE         (1<<2)          /* port enable */
  94 #define PORT_CSC        (1<<1)          /* connect status change */
  95 #define PORT_CONNECT    (1<<0)          /* device connected */
  96 #define PORT_RWC_BITS   (PORT_CSC)
  97
  98 struct isp1760_qtd {
  99         u8 packet_type;
 100         void *data_buffer;
 101         u32 payload_addr;
 102
 103         /* the rest is HCD-private */
 104         struct list_head qtd_list;
 105         struct urb *urb;
 106         size_t length;
 107         size_t actual_length;
 108
 109         /* QTD_ENQUEUED:        waiting for transfer (inactive) */
 110         /* QTD_PAYLOAD_ALLOC:   chip mem has been allocated for payload */
 111         /* QTD_XFER_STARTED:    valid ptd has been written to isp176x - only
 112                                 interrupt handler may touch this qtd! */
 113         /* QTD_XFER_COMPLETE:   payload has been transferred successfully */
 114         /* QTD_RETIRE:          transfer error/abort qtd */
 115 #define QTD_ENQUEUED            0
 116 #define QTD_PAYLOAD_ALLOC       1
 117 #define QTD_XFER_STARTED        2
 118 #define QTD_XFER_COMPLETE       3
 119 #define QTD_RETIRE              4
 120         u32 status;
 121 };
 122
 123 /* Queue head, one for each active endpoint */
 124 struct isp1760_qh {
 125         struct list_head qh_list;
 126         struct list_head qtd_list;
 127         u32 toggle;
 128         u32 ping;
 129         int slot;
 130         int tt_buffer_dirty;    /* See USB2.0 spec section 11.17.5 */
 131 };
 132
 133 struct urb_listitem {
 134         struct list_head urb_list;
 135         struct urb *urb;
 136 };
 137
 138 /*
 139  * Access functions for isp176x registers (addresses 0..0x03FF).
 140  */
 141 static u32 reg_read32(void __iomem *base, u32 reg)
 142 {
 143         return readl(base + reg);
 144 }
 145
 146 static void reg_write32(void __iomem *base, u32 reg, u32 val)
 147 {
 148         writel(val, base + reg);
 149 }
 150
 151 /*
 152  * Access functions for isp176x memory (offset >= 0x0400).
 153  *
 154  * bank_reads8() reads memory locations prefetched by an earlier write to
 155  * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
 156  * bank optimizations, you should use the more generic mem_reads8() below.
 157  *
 158  * For access to ptd memory, use the specialized ptd_read() and ptd_write()
 159  * below.
 160  *
 161  * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
 162  * doesn't quite work because some people have to enforce 32-bit access
 163  */
 164 static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr,
 165                                                         __u32 *dst, u32 bytes)
 166 {
 167         __u32 __iomem *src;
 168         u32 val;
 169         __u8 *src_byteptr;
 170         __u8 *dst_byteptr;
 171
 172         src = src_base + (bank_addr | src_offset);
 173
 174         if (src_offset < PAYLOAD_OFFSET) {
 175                 while (bytes >= 4) {
 176                         *dst = le32_to_cpu(__raw_readl(src));
 177                         bytes -= 4;
 178                         src++;
 179                         dst++;
 180                 }
 181         } else {
 182                 while (bytes >= 4) {
 183                         *dst = __raw_readl(src);
 184                         bytes -= 4;
 185                         src++;
 186                         dst++;
 187                 }
 188         }
 189
 190         if (!bytes)
 191                 return;
 192
 193         /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
 194          * allocated.
 195          */
 196         if (src_offset < PAYLOAD_OFFSET)
 197                 val = le32_to_cpu(__raw_readl(src));
 198         else
 199                 val = __raw_readl(src);
 200
 201         dst_byteptr = (void *) dst;
 202         src_byteptr = (void *) &val;
 203         while (bytes > 0) {
 204                 *dst_byteptr = *src_byteptr;
 205                 dst_byteptr++;
 206                 src_byteptr++;
 207                 bytes--;
 208         }
 209 }
 210
 211 static void mem_reads8(void __iomem *src_base, u32 src_offset, void *dst,
 212                                                                 u32 bytes)
 213 {
 214         reg_write32(src_base, HC_MEMORY_REG, src_offset + ISP_BANK(0));
 215         ndelay(90);
 216         bank_reads8(src_base, src_offset, ISP_BANK(0), dst, bytes);
 217 }
 218
 219 static void mem_writes8(void __iomem *dst_base, u32 dst_offset,
 220                                                 __u32 const *src, u32 bytes)
 221 {
 222         __u32 __iomem *dst;
 223
 224         dst = dst_base + dst_offset;
 225
 226         if (dst_offset < PAYLOAD_OFFSET) {
 227                 while (bytes >= 4) {
 228                         __raw_writel(cpu_to_le32(*src), dst);
 229                         bytes -= 4;
 230                         src++;
 231                         dst++;
 232                 }
 233         } else {
 234                 while (bytes >= 4) {
 235                         __raw_writel(*src, dst);
 236                         bytes -= 4;
 237                         src++;
 238                         dst++;
 239                 }
 240         }
 241
 242         if (!bytes)
 243                 return;
 244         /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
 245          * extra bytes should not be read by the HW.
 246          */
 247
 248         if (dst_offset < PAYLOAD_OFFSET)
 249                 __raw_writel(cpu_to_le32(*src), dst);
 250         else
 251                 __raw_writel(*src, dst);
 252 }
 253
 254 /*
 255  * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
 256  * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
 257  */
 258 static void ptd_read(void __iomem *base, u32 ptd_offset, u32 slot,
 259                                                                 struct ptd *ptd)
 260 {
 261         reg_write32(base, HC_MEMORY_REG,
 262                                 ISP_BANK(0) + ptd_offset + slot*sizeof(*ptd));
 263         ndelay(90);
 264         bank_reads8(base, ptd_offset + slot*sizeof(*ptd), ISP_BANK(0),
 265                                                 (void *) ptd, sizeof(*ptd));
 266 }
 267
 268 static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
 269                                                                 struct ptd *ptd)
 270 {
 271         mem_writes8(base, ptd_offset + slot*sizeof(*ptd) + sizeof(ptd->dw0),
 272                                                 &ptd->dw1, 7*sizeof(ptd->dw1));
 273         /* Make sure dw0 gets written last (after other dw's and after payload)
 274            since it contains the enable bit */
 275         wmb();
 276         mem_writes8(base, ptd_offset + slot*sizeof(*ptd), &ptd->dw0,
 277                                                         sizeof(ptd->dw0));
 278 }
 279
 280
 281 /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
 282 static void init_memory(struct isp1760_hcd *priv)
 283 {
 284         int i, curr;
 285         u32 payload_addr;
 286
 287         payload_addr = PAYLOAD_OFFSET;
 288         for (i = 0; i < BLOCK_1_NUM; i++) {
 289                 priv->memory_pool[i].start = payload_addr;
 290                 priv->memory_pool[i].size = BLOCK_1_SIZE;
 291                 priv->memory_pool[i].free = 1;
 292                 payload_addr += priv->memory_pool[i].size;
 293         }
 294
 295         curr = i;
 296         for (i = 0; i < BLOCK_2_NUM; i++) {
 297                 priv->memory_pool[curr + i].start = payload_addr;
 298                 priv->memory_pool[curr + i].size = BLOCK_2_SIZE;
 299                 priv->memory_pool[curr + i].free = 1;
 300                 payload_addr += priv->memory_pool[curr + i].size;
 301         }
 302
 303         curr = i;
 304         for (i = 0; i < BLOCK_3_NUM; i++) {
 305                 priv->memory_pool[curr + i].start = payload_addr;
 306                 priv->memory_pool[curr + i].size = BLOCK_3_SIZE;
 307                 priv->memory_pool[curr + i].free = 1;
 308                 payload_addr += priv->memory_pool[curr + i].size;
 309         }
 310
 311         WARN_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE);
 312 }
 313
 314 static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
 315 {
 316         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 317         int i;
 318
 319         WARN_ON(qtd->payload_addr);
 320
 321         if (!qtd->length)
 322                 return;
 323
 324         for (i = 0; i < BLOCKS; i++) {
 325                 if (priv->memory_pool[i].size >= qtd->length &&
 326                                 priv->memory_pool[i].free) {
 327                         priv->memory_pool[i].free = 0;
 328                         qtd->payload_addr = priv->memory_pool[i].start;
 329                         return;
 330                 }
 331         }
 332 }
 333
 334 static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
 335 {
 336         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 337         int i;
 338
 339         if (!qtd->payload_addr)
 340                 return;
 341
 342         for (i = 0; i < BLOCKS; i++) {
 343                 if (priv->memory_pool[i].start == qtd->payload_addr) {
 344                         WARN_ON(priv->memory_pool[i].free);
 345                         priv->memory_pool[i].free = 1;
 346                         qtd->payload_addr = 0;
 347                         return;
 348                 }
 349         }
 350
 351         dev_err(hcd->self.controller, "%s: Invalid pointer: %08x\n",
 352                                                 __func__, qtd->payload_addr);
 353         WARN_ON(1);
 354         qtd->payload_addr = 0;
 355 }
 356
 357 static int handshake(struct usb_hcd *hcd, u32 reg,
 358                       u32 mask, u32 done, int usec)
 359 {
 360         u32 result;
 361
 362         do {
 363                 result = reg_read32(hcd->regs, reg);
 364                 if (result == ~0)
 365                         return -ENODEV;
 366                 result &= mask;
 367                 if (result == done)
 368                         return 0;
 369                 udelay(1);
 370                 usec--;
 371         } while (usec > 0);
 372         return -ETIMEDOUT;
 373 }
 374
 375 /* reset a non-running (STS_HALT == 1) controller */
 376 static int ehci_reset(struct usb_hcd *hcd)
 377 {
 378         int retval;
 379         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 380
 381         u32 command = reg_read32(hcd->regs, HC_USBCMD);
 382
 383         command |= CMD_RESET;
 384         reg_write32(hcd->regs, HC_USBCMD, command);
 385         hcd->state = HC_STATE_HALT;
 386         priv->next_statechange = jiffies;
 387         retval = handshake(hcd, HC_USBCMD,
 388                             CMD_RESET, 0, 250 * 1000);
 389         return retval;
 390 }
 391
 392 static struct isp1760_qh *qh_alloc(gfp_t flags)
 393 {
 394         struct isp1760_qh *qh;
 395
 396         qh = kmem_cache_zalloc(qh_cachep, flags);
 397         if (!qh)
 398                 return NULL;
 399
 400         INIT_LIST_HEAD(&qh->qh_list);
 401         INIT_LIST_HEAD(&qh->qtd_list);
 402         qh->slot = -1;
 403
 404         return qh;
 405 }
 406
 407 static void qh_free(struct isp1760_qh *qh)
 408 {
 409         WARN_ON(!list_empty(&qh->qtd_list));
 410         WARN_ON(qh->slot > -1);
 411         kmem_cache_free(qh_cachep, qh);
 412 }
 413
 414 /* one-time init, only for memory state */
 415 static int priv_init(struct usb_hcd *hcd)
 416 {
 417         struct isp1760_hcd              *priv = hcd_to_priv(hcd);
 418         u32                     hcc_params;
 419         int i;
 420
 421         spin_lock_init(&priv->lock);
 422
 423         for (i = 0; i < QH_END; i++)
 424                 INIT_LIST_HEAD(&priv->qh_list[i]);
 425
 426         /*
 427          * hw default: 1K periodic list heads, one per frame.
 428          * periodic_size can shrink by USBCMD update if hcc_params allows.
 429          */
 430         priv->periodic_size = DEFAULT_I_TDPS;
 431
 432         /* controllers may cache some of the periodic schedule ... */
 433         hcc_params = reg_read32(hcd->regs, HC_HCCPARAMS);
 434         /* full frame cache */
 435         if (HCC_ISOC_CACHE(hcc_params))
 436                 priv->i_thresh = 8;
 437         else /* N microframes cached */
 438                 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 439
 440         return 0;
 441 }
 442
 443 static int isp1760_hc_setup(struct usb_hcd *hcd)
 444 {
 445         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 446         int result;
 447         u32 scratch, hwmode;
 448
 449         /* low-level chip reset */
 450         if (priv->rst_gpio) {
 451                 gpiod_set_value_cansleep(priv->rst_gpio, 1);
 452                 mdelay(50);
 453                 gpiod_set_value_cansleep(priv->rst_gpio, 0);
 454         }
 455
 456         /* Setup HW Mode Control: This assumes a level active-low interrupt */
 457         hwmode = HW_DATA_BUS_32BIT;
 458
 459         if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
 460                 hwmode &= ~HW_DATA_BUS_32BIT;
 461         if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
 462                 hwmode |= HW_ANA_DIGI_OC;
 463         if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
 464                 hwmode |= HW_DACK_POL_HIGH;
 465         if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
 466                 hwmode |= HW_DREQ_POL_HIGH;
 467         if (priv->devflags & ISP1760_FLAG_INTR_POL_HIGH)
 468                 hwmode |= HW_INTR_HIGH_ACT;
 469         if (priv->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
 470                 hwmode |= HW_INTR_EDGE_TRIG;
 471
 472         /*
 473          * We have to set this first in case we're in 16-bit mode.
 474          * Write it twice to ensure correct upper bits if switching
 475          * to 16-bit mode.
 476          */
 477         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 478         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 479
 480         reg_write32(hcd->regs, HC_SCRATCH_REG, 0xdeadbabe);
 481         /* Change bus pattern */
 482         scratch = reg_read32(hcd->regs, HC_CHIP_ID_REG);
 483         scratch = reg_read32(hcd->regs, HC_SCRATCH_REG);
 484         if (scratch != 0xdeadbabe) {
 485                 dev_err(hcd->self.controller, "Scratch test failed.\n");
 486                 return -ENODEV;
 487         }
 488
 489         /* pre reset */
 490         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
 491         reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 492         reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 493         reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 494
 495         /* reset */
 496         reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
 497         mdelay(100);
 498
 499         reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_HC);
 500         mdelay(100);
 501
 502         result = ehci_reset(hcd);
 503         if (result)
 504                 return result;
 505
 506         /* Step 11 passed */
 507
 508         dev_info(hcd->self.controller, "bus width: %d, oc: %s\n",
 509                            (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
 510                            16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
 511                            "analog" : "digital");
 512
 513         /* ATL reset */
 514         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
 515         mdelay(10);
 516         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 517
 518         reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
 519
 520         /*
 521          * PORT 1 Control register of the ISP1760 is the OTG control
 522          * register on ISP1761. Since there is no OTG or device controller
 523          * support in this driver, we use port 1 as a "normal" USB host port on
 524          * both chips.
 525          */
 526         reg_write32(hcd->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2);
 527         mdelay(10);
 528
 529         priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
 530
 531         return priv_init(hcd);
 532 }
 533
 534 static u32 base_to_chip(u32 base)
 535 {
 536         return ((base - 0x400) >> 3);
 537 }
 538
 539 static int last_qtd_of_urb(struct isp1760_qtd *qtd, struct isp1760_qh *qh)
 540 {
 541         struct urb *urb;
 542
 543         if (list_is_last(&qtd->qtd_list, &qh->qtd_list))
 544                 return 1;
 545
 546         urb = qtd->urb;
 547         qtd = list_entry(qtd->qtd_list.next, typeof(*qtd), qtd_list);
 548         return (qtd->urb != urb);
 549 }
 550
 551 /* magic numbers that can affect system performance */
 552 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
 553 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
 554 #define EHCI_TUNE_RL_TT         0
 555 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
 556 #define EHCI_TUNE_MULT_TT       1
 557 #define EHCI_TUNE_FLS           2       /* (small) 256 frame schedule */
 558
 559 static void create_ptd_atl(struct isp1760_qh *qh,
 560                         struct isp1760_qtd *qtd, struct ptd *ptd)
 561 {
 562         u32 maxpacket;
 563         u32 multi;
 564         u32 rl = RL_COUNTER;
 565         u32 nak = NAK_COUNTER;
 566
 567         memset(ptd, 0, sizeof(*ptd));
 568
 569         /* according to 3.6.2, max packet len can not be > 0x400 */
 570         maxpacket = usb_maxpacket(qtd->urb->dev, qtd->urb->pipe,
 571                                                 usb_pipeout(qtd->urb->pipe));
 572         multi =  1 + ((maxpacket >> 11) & 0x3);
 573         maxpacket &= 0x7ff;
 574
 575         /* DW0 */
 576         ptd->dw0 = DW0_VALID_BIT;
 577         ptd->dw0 |= TO_DW0_LENGTH(qtd->length);
 578         ptd->dw0 |= TO_DW0_MAXPACKET(maxpacket);
 579         ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));
 580
 581         /* DW1 */
 582         ptd->dw1 = usb_pipeendpoint(qtd->urb->pipe) >> 1;
 583         ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));
 584         ptd->dw1 |= TO_DW1_PID_TOKEN(qtd->packet_type);
 585
 586         if (usb_pipebulk(qtd->urb->pipe))
 587                 ptd->dw1 |= DW1_TRANS_BULK;
 588         else if  (usb_pipeint(qtd->urb->pipe))
 589                 ptd->dw1 |= DW1_TRANS_INT;
 590
 591         if (qtd->urb->dev->speed != USB_SPEED_HIGH) {
 592                 /* split transaction */
 593
 594                 ptd->dw1 |= DW1_TRANS_SPLIT;
 595                 if (qtd->urb->dev->speed == USB_SPEED_LOW)
 596                         ptd->dw1 |= DW1_SE_USB_LOSPEED;
 597
 598                 ptd->dw1 |= TO_DW1_PORT_NUM(qtd->urb->dev->ttport);
 599                 ptd->dw1 |= TO_DW1_HUB_NUM(qtd->urb->dev->tt->hub->devnum);
 600
 601                 /* SE bit for Split INT transfers */
 602                 if (usb_pipeint(qtd->urb->pipe) &&
 603                                 (qtd->urb->dev->speed == USB_SPEED_LOW))
 604                         ptd->dw1 |= 2 << 16;
 605
 606                 rl = 0;
 607                 nak = 0;
 608         } else {
 609                 ptd->dw0 |= TO_DW0_MULTI(multi);
 610                 if (usb_pipecontrol(qtd->urb->pipe) ||
 611                                                 usb_pipebulk(qtd->urb->pipe))
 612                         ptd->dw3 |= TO_DW3_PING(qh->ping);
 613         }
 614         /* DW2 */
 615         ptd->dw2 = 0;
 616         ptd->dw2 |= TO_DW2_DATA_START_ADDR(base_to_chip(qtd->payload_addr));
 617         ptd->dw2 |= TO_DW2_RL(rl);
 618
 619         /* DW3 */
 620         ptd->dw3 |= TO_DW3_NAKCOUNT(nak);
 621         ptd->dw3 |= TO_DW3_DATA_TOGGLE(qh->toggle);
 622         if (usb_pipecontrol(qtd->urb->pipe)) {
 623                 if (qtd->data_buffer == qtd->urb->setup_packet)
 624                         ptd->dw3 &= ~TO_DW3_DATA_TOGGLE(1);
 625                 else if (last_qtd_of_urb(qtd, qh))
 626                         ptd->dw3 |= TO_DW3_DATA_TOGGLE(1);
 627         }
 628
 629         ptd->dw3 |= DW3_ACTIVE_BIT;
 630         /* Cerr */
 631         ptd->dw3 |= TO_DW3_CERR(ERR_COUNTER);
 632 }
 633
 634 static void transform_add_int(struct isp1760_qh *qh,
 635                         struct isp1760_qtd *qtd, struct ptd *ptd)
 636 {
 637         u32 usof;
 638         u32 period;
 639
 640         /*
 641          * Most of this is guessing. ISP1761 datasheet is quite unclear, and
 642          * the algorithm from the original Philips driver code, which was
 643          * pretty much used in this driver before as well, is quite horrendous
 644          * and, i believe, incorrect. The code below follows the datasheet and
 645          * USB2.0 spec as far as I can tell, and plug/unplug seems to be much
 646          * more reliable this way (fingers crossed...).
 647          */
 648
 649         if (qtd->urb->dev->speed == USB_SPEED_HIGH) {
 650                 /* urb->interval is in units of microframes (1/8 ms) */
 651                 period = qtd->urb->interval >> 3;
 652
 653                 if (qtd->urb->interval > 4)
 654                         usof = 0x01; /* One bit set =>
 655                                                 interval 1 ms * uFrame-match */
 656                 else if (qtd->urb->interval > 2)
 657                         usof = 0x22; /* Two bits set => interval 1/2 ms */
 658                 else if (qtd->urb->interval > 1)
 659                         usof = 0x55; /* Four bits set => interval 1/4 ms */
 660                 else
 661                         usof = 0xff; /* All bits set => interval 1/8 ms */
 662         } else {
 663                 /* urb->interval is in units of frames (1 ms) */
 664                 period = qtd->urb->interval;
 665                 usof = 0x0f;            /* Execute Start Split on any of the
 666                                            four first uFrames */
 667
 668                 /*
 669                  * First 8 bits in dw5 is uSCS and "specifies which uSOF the
 670                  * complete split needs to be sent. Valid only for IN." Also,
 671                  * "All bits can be set to one for every transfer." (p 82,
 672                  * ISP1761 data sheet.) 0x1c is from Philips driver. Where did
 673                  * that number come from? 0xff seems to work fine...
 674                  */
 675                 /* ptd->dw5 = 0x1c; */
 676                 ptd->dw5 = 0xff; /* Execute Complete Split on any uFrame */
 677         }
 678
 679         period = period >> 1;/* Ensure equal or shorter period than requested */
 680         period &= 0xf8; /* Mask off too large values and lowest unused 3 bits */
 681
 682         ptd->dw2 |= period;
 683         ptd->dw4 = usof;
 684 }
 685
 686 static void create_ptd_int(struct isp1760_qh *qh,
 687                         struct isp1760_qtd *qtd, struct ptd *ptd)
 688 {
 689         create_ptd_atl(qh, qtd, ptd);
 690         transform_add_int(qh, qtd, ptd);
 691 }
 692
 693 static void isp1760_urb_done(struct usb_hcd *hcd, struct urb *urb)
 694 __releases(priv->lock)
 695 __acquires(priv->lock)
 696 {
 697         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 698
 699         if (!urb->unlinked) {
 700                 if (urb->status == -EINPROGRESS)
 701                         urb->status = 0;
 702         }
 703
 704         if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
 705                 void *ptr;
 706                 for (ptr = urb->transfer_buffer;
 707                      ptr < urb->transfer_buffer + urb->transfer_buffer_length;
 708                      ptr += PAGE_SIZE)
 709                         flush_dcache_page(virt_to_page(ptr));
 710         }
 711
 712         /* complete() can reenter this HCD */
 713         usb_hcd_unlink_urb_from_ep(hcd, urb);
 714         spin_unlock(&priv->lock);
 715         usb_hcd_giveback_urb(hcd, urb, urb->status);
 716         spin_lock(&priv->lock);
 717 }
 718
 719 static struct isp1760_qtd *qtd_alloc(gfp_t flags, struct urb *urb,
 720                                                                 u8 packet_type)
 721 {
 722         struct isp1760_qtd *qtd;
 723
 724         qtd = kmem_cache_zalloc(qtd_cachep, flags);
 725         if (!qtd)
 726                 return NULL;
 727
 728         INIT_LIST_HEAD(&qtd->qtd_list);
 729         qtd->urb = urb;
 730         qtd->packet_type = packet_type;
 731         qtd->status = QTD_ENQUEUED;
 732         qtd->actual_length = 0;
 733
 734         return qtd;
 735 }
 736
 737 static void qtd_free(struct isp1760_qtd *qtd)
 738 {
 739         WARN_ON(qtd->payload_addr);
 740         kmem_cache_free(qtd_cachep, qtd);
 741 }
 742
 743 static void start_bus_transfer(struct usb_hcd *hcd, u32 ptd_offset, int slot,
 744                                 struct slotinfo *slots, struct isp1760_qtd *qtd,
 745                                 struct isp1760_qh *qh, struct ptd *ptd)
 746 {
 747         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 748         int skip_map;
 749
 750         WARN_ON((slot < 0) || (slot > 31));
 751         WARN_ON(qtd->length && !qtd->payload_addr);
 752         WARN_ON(slots[slot].qtd);
 753         WARN_ON(slots[slot].qh);
 754         WARN_ON(qtd->status != QTD_PAYLOAD_ALLOC);
 755
 756         /* Make sure done map has not triggered from some unlinked transfer */
 757         if (ptd_offset == ATL_PTD_OFFSET) {
 758                 priv->atl_done_map |= reg_read32(hcd->regs,
 759                                                 HC_ATL_PTD_DONEMAP_REG);
 760                 priv->atl_done_map &= ~(1 << slot);
 761         } else {
 762                 priv->int_done_map |= reg_read32(hcd->regs,
 763                                                 HC_INT_PTD_DONEMAP_REG);
 764                 priv->int_done_map &= ~(1 << slot);
 765         }
 766
 767         qh->slot = slot;
 768         qtd->status = QTD_XFER_STARTED;
 769         slots[slot].timestamp = jiffies;
 770         slots[slot].qtd = qtd;
 771         slots[slot].qh = qh;
 772         ptd_write(hcd->regs, ptd_offset, slot, ptd);
 773
 774         if (ptd_offset == ATL_PTD_OFFSET) {
 775                 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
 776                 skip_map &= ~(1 << qh->slot);
 777                 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
 778         } else {
 779                 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
 780                 skip_map &= ~(1 << qh->slot);
 781                 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
 782         }
 783 }
 784
 785 static int is_short_bulk(struct isp1760_qtd *qtd)
 786 {
 787         return (usb_pipebulk(qtd->urb->pipe) &&
 788                                         (qtd->actual_length < qtd->length));
 789 }
 790
 791 static void collect_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh,
 792                                                 struct list_head *urb_list)
 793 {
 794         int last_qtd;
 795         struct isp1760_qtd *qtd, *qtd_next;
 796         struct urb_listitem *urb_listitem;
 797
 798         list_for_each_entry_safe(qtd, qtd_next, &qh->qtd_list, qtd_list) {
 799                 if (qtd->status < QTD_XFER_COMPLETE)
 800                         break;
 801
 802                 last_qtd = last_qtd_of_urb(qtd, qh);
 803
 804                 if ((!last_qtd) && (qtd->status == QTD_RETIRE))
 805                         qtd_next->status = QTD_RETIRE;
 806
 807                 if (qtd->status == QTD_XFER_COMPLETE) {
 808                         if (qtd->actual_length) {
 809                                 switch (qtd->packet_type) {
 810                                 case IN_PID:
 811                                         mem_reads8(hcd->regs, qtd->payload_addr,
 812                                                         qtd->data_buffer,
 813                                                         qtd->actual_length);
 814                                         /* Fall through (?) */
 815                                 case OUT_PID:
 816                                         qtd->urb->actual_length +=
 817                                                         qtd->actual_length;
 818                                         /* Fall through ... */
 819                                 case SETUP_PID:
 820                                         break;
 821                                 }
 822                         }
 823
 824                         if (is_short_bulk(qtd)) {
 825                                 if (qtd->urb->transfer_flags & URB_SHORT_NOT_OK)
 826                                         qtd->urb->status = -EREMOTEIO;
 827                                 if (!last_qtd)
 828                                         qtd_next->status = QTD_RETIRE;
 829                         }
 830                 }
 831
 832                 if (qtd->payload_addr)
 833                         free_mem(hcd, qtd);
 834
 835                 if (last_qtd) {
 836                         if ((qtd->status == QTD_RETIRE) &&
 837                                         (qtd->urb->status == -EINPROGRESS))
 838                                 qtd->urb->status = -EPIPE;
 839                         /* Defer calling of urb_done() since it releases lock */
 840                         urb_listitem = kmem_cache_zalloc(urb_listitem_cachep,
 841                                                                 GFP_ATOMIC);
 842                         if (unlikely(!urb_listitem))
 843                                 break; /* Try again on next call */
 844                         urb_listitem->urb = qtd->urb;
 845                         list_add_tail(&urb_listitem->urb_list, urb_list);
 846                 }
 847
 848                 list_del(&qtd->qtd_list);
 849                 qtd_free(qtd);
 850         }
 851 }
 852
 853 #define ENQUEUE_DEPTH   2
 854 static void enqueue_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh)
 855 {
 856         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 857         int ptd_offset;
 858         struct slotinfo *slots;
 859         int curr_slot, free_slot;
 860         int n;
 861         struct ptd ptd;
 862         struct isp1760_qtd *qtd;
 863
 864         if (unlikely(list_empty(&qh->qtd_list))) {
 865                 WARN_ON(1);
 866                 return;
 867         }
 868
 869         /* Make sure this endpoint's TT buffer is clean before queueing ptds */
 870         if (qh->tt_buffer_dirty)
 871                 return;
 872
 873         if (usb_pipeint(list_entry(qh->qtd_list.next, struct isp1760_qtd,
 874                                                         qtd_list)->urb->pipe)) {
 875                 ptd_offset = INT_PTD_OFFSET;
 876                 slots = priv->int_slots;
 877         } else {
 878                 ptd_offset = ATL_PTD_OFFSET;
 879                 slots = priv->atl_slots;
 880         }
 881
 882         free_slot = -1;
 883         for (curr_slot = 0; curr_slot < 32; curr_slot++) {
 884                 if ((free_slot == -1) && (slots[curr_slot].qtd == NULL))
 885                         free_slot = curr_slot;
 886                 if (slots[curr_slot].qh == qh)
 887                         break;
 888         }
 889
 890         n = 0;
 891         list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
 892                 if (qtd->status == QTD_ENQUEUED) {
 893                         WARN_ON(qtd->payload_addr);
 894                         alloc_mem(hcd, qtd);
 895                         if ((qtd->length) && (!qtd->payload_addr))
 896                                 break;
 897
 898                         if ((qtd->length) &&
 899                             ((qtd->packet_type == SETUP_PID) ||
 900                              (qtd->packet_type == OUT_PID))) {
 901                                 mem_writes8(hcd->regs, qtd->payload_addr,
 902                                                 qtd->data_buffer, qtd->length);
 903                         }
 904
 905                         qtd->status = QTD_PAYLOAD_ALLOC;
 906                 }
 907
 908                 if (qtd->status == QTD_PAYLOAD_ALLOC) {
 909 /*
 910                         if ((curr_slot > 31) && (free_slot == -1))
 911                                 dev_dbg(hcd->self.controller, "%s: No slot "
 912                                         "available for transfer\n", __func__);
 913 */
 914                         /* Start xfer for this endpoint if not already done */
 915                         if ((curr_slot > 31) && (free_slot > -1)) {
 916                                 if (usb_pipeint(qtd->urb->pipe))
 917                                         create_ptd_int(qh, qtd, &ptd);
 918                                 else
 919                                         create_ptd_atl(qh, qtd, &ptd);
 920
 921                                 start_bus_transfer(hcd, ptd_offset, free_slot,
 922                                                         slots, qtd, qh, &ptd);
 923                                 curr_slot = free_slot;
 924                         }
 925
 926                         n++;
 927                         if (n >= ENQUEUE_DEPTH)
 928                                 break;
 929                 }
 930         }
 931 }
 932
 933 static void schedule_ptds(struct usb_hcd *hcd)
 934 {
 935         struct isp1760_hcd *priv;
 936         struct isp1760_qh *qh, *qh_next;
 937         struct list_head *ep_queue;
 938         LIST_HEAD(urb_list);
 939         struct urb_listitem *urb_listitem, *urb_listitem_next;
 940         int i;
 941
 942         if (!hcd) {
 943                 WARN_ON(1);
 944                 return;
 945         }
 946
 947         priv = hcd_to_priv(hcd);
 948
 949         /*
 950          * check finished/retired xfers, transfer payloads, call urb_done()
 951          */
 952         for (i = 0; i < QH_END; i++) {
 953                 ep_queue = &priv->qh_list[i];
 954                 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) {
 955                         collect_qtds(hcd, qh, &urb_list);
 956                         if (list_empty(&qh->qtd_list))
 957                                 list_del(&qh->qh_list);
 958                 }
 959         }
 960
 961         list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list,
 962                                                                 urb_list) {
 963                 isp1760_urb_done(hcd, urb_listitem->urb);
 964                 kmem_cache_free(urb_listitem_cachep, urb_listitem);
 965         }
 966
 967         /*
 968          * Schedule packets for transfer.
 969          *
 970          * According to USB2.0 specification:
 971          *
 972          * 1st prio: interrupt xfers, up to 80 % of bandwidth
 973          * 2nd prio: control xfers
 974          * 3rd prio: bulk xfers
 975          *
 976          * ... but let's use a simpler scheme here (mostly because ISP1761 doc
 977          * is very unclear on how to prioritize traffic):
 978          *
 979          * 1) Enqueue any queued control transfers, as long as payload chip mem
 980          *    and PTD ATL slots are available.
 981          * 2) Enqueue any queued INT transfers, as long as payload chip mem
 982          *    and PTD INT slots are available.
 983          * 3) Enqueue any queued bulk transfers, as long as payload chip mem
 984          *    and PTD ATL slots are available.
 985          *
 986          * Use double buffering (ENQUEUE_DEPTH==2) as a compromise between
 987          * conservation of chip mem and performance.
 988          *
 989          * I'm sure this scheme could be improved upon!
 990          */
 991         for (i = 0; i < QH_END; i++) {
 992                 ep_queue = &priv->qh_list[i];
 993                 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list)
 994                         enqueue_qtds(hcd, qh);
 995         }
 996 }
 997
 998 #define PTD_STATE_QTD_DONE      1
 999 #define PTD_STATE_QTD_RELOAD    2
1000 #define PTD_STATE_URB_RETIRE    3
1001
1002 static int check_int_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1003                                                                 struct urb *urb)
1004 {
1005         __dw dw4;
1006         int i;
1007
1008         dw4 = ptd->dw4;
1009         dw4 >>= 8;
1010
1011         /* FIXME: ISP1761 datasheet does not say what to do with these. Do we
1012            need to handle these errors? Is it done in hardware? */
1013
1014         if (ptd->dw3 & DW3_HALT_BIT) {
1015
1016                 urb->status = -EPROTO; /* Default unknown error */
1017
1018                 for (i = 0; i < 8; i++) {
1019                         switch (dw4 & 0x7) {
1020                         case INT_UNDERRUN:
1021                                 dev_dbg(hcd->self.controller, "%s: underrun "
1022                                                 "during uFrame %d\n",
1023                                                 __func__, i);
1024                                 urb->status = -ECOMM; /* Could not write data */
1025                                 break;
1026                         case INT_EXACT:
1027                                 dev_dbg(hcd->self.controller, "%s: transaction "
1028                                                 "error during uFrame %d\n",
1029                                                 __func__, i);
1030                                 urb->status = -EPROTO; /* timeout, bad CRC, PID
1031                                                           error etc. */
1032                                 break;
1033                         case INT_BABBLE:
1034                                 dev_dbg(hcd->self.controller, "%s: babble "
1035                                                 "error during uFrame %d\n",
1036                                                 __func__, i);
1037                                 urb->status = -EOVERFLOW;
1038                                 break;
1039                         }
1040                         dw4 >>= 3;
1041                 }
1042
1043                 return PTD_STATE_URB_RETIRE;
1044         }
1045
1046         return PTD_STATE_QTD_DONE;
1047 }
1048
1049 static int check_atl_transfer(struct usb_hcd *hcd, struct ptd *ptd,
1050                                                                 struct urb *urb)
1051 {
1052         WARN_ON(!ptd);
1053         if (ptd->dw3 & DW3_HALT_BIT) {
1054                 if (ptd->dw3 & DW3_BABBLE_BIT)
1055                         urb->status = -EOVERFLOW;
1056                 else if (FROM_DW3_CERR(ptd->dw3))
1057                         urb->status = -EPIPE;  /* Stall */
1058                 else if (ptd->dw3 & DW3_ERROR_BIT)
1059                         urb->status = -EPROTO; /* XactErr */
1060                 else
1061                         urb->status = -EPROTO; /* Unknown */
1062 /*
1063                 dev_dbg(hcd->self.controller, "%s: ptd error:\n"
1064                         "        dw0: %08x dw1: %08x dw2: %08x dw3: %08x\n"
1065                         "        dw4: %08x dw5: %08x dw6: %08x dw7: %08x\n",
1066                         __func__,
1067                         ptd->dw0, ptd->dw1, ptd->dw2, ptd->dw3,
1068                         ptd->dw4, ptd->dw5, ptd->dw6, ptd->dw7);
1069 */
1070                 return PTD_STATE_URB_RETIRE;
1071         }
1072
1073         if ((ptd->dw3 & DW3_ERROR_BIT) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1074                 /* Transfer Error, *but* active and no HALT -> reload */
1075                 dev_dbg(hcd->self.controller, "PID error; reloading ptd\n");
1076                 return PTD_STATE_QTD_RELOAD;
1077         }
1078
1079         if (!FROM_DW3_NAKCOUNT(ptd->dw3) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
1080                 /*
1081                  * NAKs are handled in HW by the chip. Usually if the
1082                  * device is not able to send data fast enough.
1083                  * This happens mostly on slower hardware.
1084                  */
1085                 return PTD_STATE_QTD_RELOAD;
1086         }
1087
1088         return PTD_STATE_QTD_DONE;
1089 }
1090
1091 static void handle_done_ptds(struct usb_hcd *hcd)
1092 {
1093         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1094         struct ptd ptd;
1095         struct isp1760_qh *qh;
1096         int slot;
1097         int state;
1098         struct slotinfo *slots;
1099         u32 ptd_offset;
1100         struct isp1760_qtd *qtd;
1101         int modified;
1102         int skip_map;
1103
1104         skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1105         priv->int_done_map &= ~skip_map;
1106         skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1107         priv->atl_done_map &= ~skip_map;
1108
1109         modified = priv->int_done_map || priv->atl_done_map;
1110
1111         while (priv->int_done_map || priv->atl_done_map) {
1112                 if (priv->int_done_map) {
1113                         /* INT ptd */
1114                         slot = __ffs(priv->int_done_map);
1115                         priv->int_done_map &= ~(1 << slot);
1116                         slots = priv->int_slots;
1117                         /* This should not trigger, and could be removed if
1118                            noone have any problems with it triggering: */
1119                         if (!slots[slot].qh) {
1120                                 WARN_ON(1);
1121                                 continue;
1122                         }
1123                         ptd_offset = INT_PTD_OFFSET;
1124                         ptd_read(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
1125                         state = check_int_transfer(hcd, &ptd,
1126                                                         slots[slot].qtd->urb);
1127                 } else {
1128                         /* ATL ptd */
1129                         slot = __ffs(priv->atl_done_map);
1130                         priv->atl_done_map &= ~(1 << slot);
1131                         slots = priv->atl_slots;
1132                         /* This should not trigger, and could be removed if
1133                            noone have any problems with it triggering: */
1134                         if (!slots[slot].qh) {
1135                                 WARN_ON(1);
1136                                 continue;
1137                         }
1138                         ptd_offset = ATL_PTD_OFFSET;
1139                         ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
1140                         state = check_atl_transfer(hcd, &ptd,
1141                                                         slots[slot].qtd->urb);
1142                 }
1143
1144                 qtd = slots[slot].qtd;
1145                 slots[slot].qtd = NULL;
1146                 qh = slots[slot].qh;
1147                 slots[slot].qh = NULL;
1148                 qh->slot = -1;
1149
1150                 WARN_ON(qtd->status != QTD_XFER_STARTED);
1151
1152                 switch (state) {
1153                 case PTD_STATE_QTD_DONE:
1154                         if ((usb_pipeint(qtd->urb->pipe)) &&
1155                                        (qtd->urb->dev->speed != USB_SPEED_HIGH))
1156                                 qtd->actual_length =
1157                                        FROM_DW3_SCS_NRBYTESTRANSFERRED(ptd.dw3);
1158                         else
1159                                 qtd->actual_length =
1160                                         FROM_DW3_NRBYTESTRANSFERRED(ptd.dw3);
1161
1162                         qtd->status = QTD_XFER_COMPLETE;
1163                         if (list_is_last(&qtd->qtd_list, &qh->qtd_list) ||
1164                                                         is_short_bulk(qtd))
1165                                 qtd = NULL;
1166                         else
1167                                 qtd = list_entry(qtd->qtd_list.next,
1168                                                         typeof(*qtd), qtd_list);
1169
1170                         qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1171                         qh->ping = FROM_DW3_PING(ptd.dw3);
1172                         break;
1173
1174                 case PTD_STATE_QTD_RELOAD: /* QTD_RETRY, for atls only */
1175                         qtd->status = QTD_PAYLOAD_ALLOC;
1176                         ptd.dw0 |= DW0_VALID_BIT;
1177                         /* RL counter = ERR counter */
1178                         ptd.dw3 &= ~TO_DW3_NAKCOUNT(0xf);
1179                         ptd.dw3 |= TO_DW3_NAKCOUNT(FROM_DW2_RL(ptd.dw2));
1180                         ptd.dw3 &= ~TO_DW3_CERR(3);
1181                         ptd.dw3 |= TO_DW3_CERR(ERR_COUNTER);
1182                         qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
1183                         qh->ping = FROM_DW3_PING(ptd.dw3);
1184                         break;
1185
1186                 case PTD_STATE_URB_RETIRE:
1187                         qtd->status = QTD_RETIRE;
1188                         if ((qtd->urb->dev->speed != USB_SPEED_HIGH) &&
1189                                         (qtd->urb->status != -EPIPE) &&
1190                                         (qtd->urb->status != -EREMOTEIO)) {
1191                                 qh->tt_buffer_dirty = 1;
1192                                 if (usb_hub_clear_tt_buffer(qtd->urb))
1193                                         /* Clear failed; let's hope things work
1194                                            anyway */
1195                                         qh->tt_buffer_dirty = 0;
1196                         }
1197                         qtd = NULL;
1198                         qh->toggle = 0;
1199                         qh->ping = 0;
1200                         break;
1201
1202                 default:
1203                         WARN_ON(1);
1204                         continue;
1205                 }
1206
1207                 if (qtd && (qtd->status == QTD_PAYLOAD_ALLOC)) {
1208                         if (slots == priv->int_slots) {
1209                                 if (state == PTD_STATE_QTD_RELOAD)
1210                                         dev_err(hcd->self.controller,
1211                                                 "%s: PTD_STATE_QTD_RELOAD on "
1212                                                 "interrupt packet\n", __func__);
1213                                 if (state != PTD_STATE_QTD_RELOAD)
1214                                         create_ptd_int(qh, qtd, &ptd);
1215                         } else {
1216                                 if (state != PTD_STATE_QTD_RELOAD)
1217                                         create_ptd_atl(qh, qtd, &ptd);
1218                         }
1219
1220                         start_bus_transfer(hcd, ptd_offset, slot, slots, qtd,
1221                                 qh, &ptd);
1222                 }
1223         }
1224
1225         if (modified)
1226                 schedule_ptds(hcd);
1227 }
1228
1229 static irqreturn_t isp1760_irq(struct usb_hcd *hcd)
1230 {
1231         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1232         u32 imask;
1233         irqreturn_t irqret = IRQ_NONE;
1234
1235         spin_lock(&priv->lock);
1236
1237         if (!(hcd->state & HC_STATE_RUNNING))
1238                 goto leave;
1239
1240         imask = reg_read32(hcd->regs, HC_INTERRUPT_REG);
1241         if (unlikely(!imask))
1242                 goto leave;
1243         reg_write32(hcd->regs, HC_INTERRUPT_REG, imask); /* Clear */
1244
1245         priv->int_done_map |= reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
1246         priv->atl_done_map |= reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
1247
1248         handle_done_ptds(hcd);
1249
1250         irqret = IRQ_HANDLED;
1251 leave:
1252         spin_unlock(&priv->lock);
1253
1254         return irqret;
1255 }
1256
1257 /*
1258  * Workaround for problem described in chip errata 2:
1259  *
1260  * Sometimes interrupts are not generated when ATL (not INT?) completion occurs.
1261  * One solution suggested in the errata is to use SOF interrupts _instead_of_
1262  * ATL done interrupts (the "instead of" might be important since it seems
1263  * enabling ATL interrupts also causes the chip to sometimes - rarely - "forget"
1264  * to set the PTD's done bit in addition to not generating an interrupt!).
1265  *
1266  * So if we use SOF + ATL interrupts, we sometimes get stale PTDs since their
1267  * done bit is not being set. This is bad - it blocks the endpoint until reboot.
1268  *
1269  * If we use SOF interrupts only, we get latency between ptd completion and the
1270  * actual handling. This is very noticeable in testusb runs which takes several
1271  * minutes longer without ATL interrupts.
1272  *
1273  * A better solution is to run the code below every SLOT_CHECK_PERIOD ms. If it
1274  * finds active ATL slots which are older than SLOT_TIMEOUT ms, it checks the
1275  * slot's ACTIVE and VALID bits. If these are not set, the ptd is considered
1276  * completed and its done map bit is set.
1277  *
1278  * The values of SLOT_TIMEOUT and SLOT_CHECK_PERIOD have been arbitrarily chosen
1279  * not to cause too much lag when this HW bug occurs, while still hopefully
1280  * ensuring that the check does not falsely trigger.
1281  */
1282 #define SLOT_TIMEOUT 300
1283 #define SLOT_CHECK_PERIOD 200
1284 static struct timer_list errata2_timer;
1285
1286 static void errata2_function(unsigned long data)
1287 {
1288         struct usb_hcd *hcd = (struct usb_hcd *) data;
1289         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1290         int slot;
1291         struct ptd ptd;
1292         unsigned long spinflags;
1293
1294         spin_lock_irqsave(&priv->lock, spinflags);
1295
1296         for (slot = 0; slot < 32; slot++)
1297                 if (priv->atl_slots[slot].qh && time_after(jiffies,
1298                                         priv->atl_slots[slot].timestamp +
1299                                         SLOT_TIMEOUT * HZ / 1000)) {
1300                         ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
1301                         if (!FROM_DW0_VALID(ptd.dw0) &&
1302                                         !FROM_DW3_ACTIVE(ptd.dw3))
1303                                 priv->atl_done_map |= 1 << slot;
1304                 }
1305
1306         if (priv->atl_done_map)
1307                 handle_done_ptds(hcd);
1308
1309         spin_unlock_irqrestore(&priv->lock, spinflags);
1310
1311         errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
1312         add_timer(&errata2_timer);
1313 }
1314
1315 static int isp1760_run(struct usb_hcd *hcd)
1316 {
1317         int retval;
1318         u32 temp;
1319         u32 command;
1320         u32 chipid;
1321
1322         hcd->uses_new_polling = 1;
1323
1324         hcd->state = HC_STATE_RUNNING;
1325
1326         /* Set PTD interrupt AND & OR maps */
1327         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
1328         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0xffffffff);
1329         reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
1330         reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0xffffffff);
1331         reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
1332         reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
1333         /* step 23 passed */
1334
1335         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
1336         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN);
1337
1338         command = reg_read32(hcd->regs, HC_USBCMD);
1339         command &= ~(CMD_LRESET|CMD_RESET);
1340         command |= CMD_RUN;
1341         reg_write32(hcd->regs, HC_USBCMD, command);
1342
1343         retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN, 250 * 1000);
1344         if (retval)
1345                 return retval;
1346
1347         /*
1348          * XXX
1349          * Spec says to write FLAG_CF as last config action, priv code grabs
1350          * the semaphore while doing so.
1351          */
1352         down_write(&ehci_cf_port_reset_rwsem);
1353         reg_write32(hcd->regs, HC_CONFIGFLAG, FLAG_CF);
1354
1355         retval = handshake(hcd, HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 250 * 1000);
1356         up_write(&ehci_cf_port_reset_rwsem);
1357         if (retval)
1358                 return retval;
1359
1360         init_timer(&errata2_timer);
1361         errata2_timer.function = errata2_function;
1362         errata2_timer.data = (unsigned long) hcd;
1363         errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
1364         add_timer(&errata2_timer);
1365
1366         chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
1367         dev_info(hcd->self.controller, "USB ISP %04x HW rev. %d started\n",
1368                                         chipid & 0xffff, chipid >> 16);
1369
1370         /* PTD Register Init Part 2, Step 28 */
1371
1372         /* Setup registers controlling PTD checking */
1373         reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
1374         reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
1375         reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
1376         reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, 0xffffffff);
1377         reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, 0xffffffff);
1378         reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, 0xffffffff);
1379         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
1380                                                 ATL_BUF_FILL | INT_BUF_FILL);
1381
1382         /* GRR this is run-once init(), being done every time the HC starts.
1383          * So long as they're part of class devices, we can't do it init()
1384          * since the class device isn't created that early.
1385          */
1386         return 0;
1387 }
1388
1389 static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len)
1390 {
1391         qtd->data_buffer = databuffer;
1392
1393         if (len > MAX_PAYLOAD_SIZE)
1394                 len = MAX_PAYLOAD_SIZE;
1395         qtd->length = len;
1396
1397         return qtd->length;
1398 }
1399
1400 static void qtd_list_free(struct list_head *qtd_list)
1401 {
1402         struct isp1760_qtd *qtd, *qtd_next;
1403
1404         list_for_each_entry_safe(qtd, qtd_next, qtd_list, qtd_list) {
1405                 list_del(&qtd->qtd_list);
1406                 qtd_free(qtd);
1407         }
1408 }
1409
1410 /*
1411  * Packetize urb->transfer_buffer into list of packets of size wMaxPacketSize.
1412  * Also calculate the PID type (SETUP/IN/OUT) for each packet.
1413  */
1414 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1415 static void packetize_urb(struct usb_hcd *hcd,
1416                 struct urb *urb, struct list_head *head, gfp_t flags)
1417 {
1418         struct isp1760_qtd *qtd;
1419         void *buf;
1420         int len, maxpacketsize;
1421         u8 packet_type;
1422
1423         /*
1424          * URBs map to sequences of QTDs:  one logical transaction
1425          */
1426
1427         if (!urb->transfer_buffer && urb->transfer_buffer_length) {
1428                 /* XXX This looks like usb storage / SCSI bug */
1429                 dev_err(hcd->self.controller,
1430                                 "buf is null, dma is %08lx len is %d\n",
1431                                 (long unsigned)urb->transfer_dma,
1432                                 urb->transfer_buffer_length);
1433                 WARN_ON(1);
1434         }
1435
1436         if (usb_pipein(urb->pipe))
1437                 packet_type = IN_PID;
1438         else
1439                 packet_type = OUT_PID;
1440
1441         if (usb_pipecontrol(urb->pipe)) {
1442                 qtd = qtd_alloc(flags, urb, SETUP_PID);
1443                 if (!qtd)
1444                         goto cleanup;
1445                 qtd_fill(qtd, urb->setup_packet, sizeof(struct usb_ctrlrequest));
1446                 list_add_tail(&qtd->qtd_list, head);
1447
1448                 /* for zero length DATA stages, STATUS is always IN */
1449                 if (urb->transfer_buffer_length == 0)
1450                         packet_type = IN_PID;
1451         }
1452
1453         maxpacketsize = max_packet(usb_maxpacket(urb->dev, urb->pipe,
1454                                                 usb_pipeout(urb->pipe)));
1455
1456         /*
1457          * buffer gets wrapped in one or more qtds;
1458          * last one may be "short" (including zero len)
1459          * and may serve as a control status ack
1460          */
1461         buf = urb->transfer_buffer;
1462         len = urb->transfer_buffer_length;
1463
1464         for (;;) {
1465                 int this_qtd_len;
1466
1467                 qtd = qtd_alloc(flags, urb, packet_type);
1468                 if (!qtd)
1469                         goto cleanup;
1470                 this_qtd_len = qtd_fill(qtd, buf, len);
1471                 list_add_tail(&qtd->qtd_list, head);
1472
1473                 len -= this_qtd_len;
1474                 buf += this_qtd_len;
1475
1476                 if (len <= 0)
1477                         break;
1478         }
1479
1480         /*
1481          * control requests may need a terminating data "status" ack;
1482          * bulk ones may need a terminating short packet (zero length).
1483          */
1484         if (urb->transfer_buffer_length != 0) {
1485                 int one_more = 0;
1486
1487                 if (usb_pipecontrol(urb->pipe)) {
1488                         one_more = 1;
1489                         if (packet_type == IN_PID)
1490                                 packet_type = OUT_PID;
1491                         else
1492                                 packet_type = IN_PID;
1493                 } else if (usb_pipebulk(urb->pipe)
1494                                 && (urb->transfer_flags & URB_ZERO_PACKET)
1495                                 && !(urb->transfer_buffer_length %
1496                                                         maxpacketsize)) {
1497                         one_more = 1;
1498                 }
1499                 if (one_more) {
1500                         qtd = qtd_alloc(flags, urb, packet_type);
1501                         if (!qtd)
1502                                 goto cleanup;
1503
1504                         /* never any data in such packets */
1505                         qtd_fill(qtd, NULL, 0);
1506                         list_add_tail(&qtd->qtd_list, head);
1507                 }
1508         }
1509
1510         return;
1511
1512 cleanup:
1513         qtd_list_free(head);
1514 }
1515
1516 static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1517                 gfp_t mem_flags)
1518 {
1519         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1520         struct list_head *ep_queue;
1521         struct isp1760_qh *qh, *qhit;
1522         unsigned long spinflags;
1523         LIST_HEAD(new_qtds);
1524         int retval;
1525         int qh_in_queue;
1526
1527         switch (usb_pipetype(urb->pipe)) {
1528         case PIPE_CONTROL:
1529                 ep_queue = &priv->qh_list[QH_CONTROL];
1530                 break;
1531         case PIPE_BULK:
1532                 ep_queue = &priv->qh_list[QH_BULK];
1533                 break;
1534         case PIPE_INTERRUPT:
1535                 if (urb->interval < 0)
1536                         return -EINVAL;
1537                 /* FIXME: Check bandwidth  */
1538                 ep_queue = &priv->qh_list[QH_INTERRUPT];
1539                 break;
1540         case PIPE_ISOCHRONOUS:
1541                 dev_err(hcd->self.controller, "%s: isochronous USB packets "
1542                                                         "not yet supported\n",
1543                                                         __func__);
1544                 return -EPIPE;
1545         default:
1546                 dev_err(hcd->self.controller, "%s: unknown pipe type\n",
1547                                                         __func__);
1548                 return -EPIPE;
1549         }
1550
1551         if (usb_pipein(urb->pipe))
1552                 urb->actual_length = 0;
1553
1554         packetize_urb(hcd, urb, &new_qtds, mem_flags);
1555         if (list_empty(&new_qtds))
1556                 return -ENOMEM;
1557
1558         retval = 0;
1559         spin_lock_irqsave(&priv->lock, spinflags);
1560
1561         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
1562                 retval = -ESHUTDOWN;
1563                 qtd_list_free(&new_qtds);
1564                 goto out;
1565         }
1566         retval = usb_hcd_link_urb_to_ep(hcd, urb);
1567         if (retval) {
1568                 qtd_list_free(&new_qtds);
1569                 goto out;
1570         }
1571
1572         qh = urb->ep->hcpriv;
1573         if (qh) {
1574                 qh_in_queue = 0;
1575                 list_for_each_entry(qhit, ep_queue, qh_list) {
1576                         if (qhit == qh) {
1577                                 qh_in_queue = 1;
1578                                 break;
1579                         }
1580                 }
1581                 if (!qh_in_queue)
1582                         list_add_tail(&qh->qh_list, ep_queue);
1583         } else {
1584                 qh = qh_alloc(GFP_ATOMIC);
1585                 if (!qh) {
1586                         retval = -ENOMEM;
1587                         usb_hcd_unlink_urb_from_ep(hcd, urb);
1588                         qtd_list_free(&new_qtds);
1589                         goto out;
1590                 }
1591                 list_add_tail(&qh->qh_list, ep_queue);
1592                 urb->ep->hcpriv = qh;
1593         }
1594
1595         list_splice_tail(&new_qtds, &qh->qtd_list);
1596         schedule_ptds(hcd);
1597
1598 out:
1599         spin_unlock_irqrestore(&priv->lock, spinflags);
1600         return retval;
1601 }
1602
1603 static void kill_transfer(struct usb_hcd *hcd, struct urb *urb,
1604                 struct isp1760_qh *qh)
1605 {
1606         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1607         int skip_map;
1608
1609         WARN_ON(qh->slot == -1);
1610
1611         /* We need to forcefully reclaim the slot since some transfers never
1612            return, e.g. interrupt transfers and NAKed bulk transfers. */
1613         if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) {
1614                 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1615                 skip_map |= (1 << qh->slot);
1616                 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
1617                 priv->atl_slots[qh->slot].qh = NULL;
1618                 priv->atl_slots[qh->slot].qtd = NULL;
1619         } else {
1620                 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1621                 skip_map |= (1 << qh->slot);
1622                 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
1623                 priv->int_slots[qh->slot].qh = NULL;
1624                 priv->int_slots[qh->slot].qtd = NULL;
1625         }
1626
1627         qh->slot = -1;
1628 }
1629
1630 /*
1631  * Retire the qtds beginning at 'qtd' and belonging all to the same urb, killing
1632  * any active transfer belonging to the urb in the process.
1633  */
1634 static void dequeue_urb_from_qtd(struct usb_hcd *hcd, struct isp1760_qh *qh,
1635                                                 struct isp1760_qtd *qtd)
1636 {
1637         struct urb *urb;
1638         int urb_was_running;
1639
1640         urb = qtd->urb;
1641         urb_was_running = 0;
1642         list_for_each_entry_from(qtd, &qh->qtd_list, qtd_list) {
1643                 if (qtd->urb != urb)
1644                         break;
1645
1646                 if (qtd->status >= QTD_XFER_STARTED)
1647                         urb_was_running = 1;
1648                 if (last_qtd_of_urb(qtd, qh) &&
1649                                         (qtd->status >= QTD_XFER_COMPLETE))
1650                         urb_was_running = 0;
1651
1652                 if (qtd->status == QTD_XFER_STARTED)
1653                         kill_transfer(hcd, urb, qh);
1654                 qtd->status = QTD_RETIRE;
1655         }
1656
1657         if ((urb->dev->speed != USB_SPEED_HIGH) && urb_was_running) {
1658                 qh->tt_buffer_dirty = 1;
1659                 if (usb_hub_clear_tt_buffer(urb))
1660                         /* Clear failed; let's hope things work anyway */
1661                         qh->tt_buffer_dirty = 0;
1662         }
1663 }
1664
1665 static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1666                 int status)
1667 {
1668         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1669         unsigned long spinflags;
1670         struct isp1760_qh *qh;
1671         struct isp1760_qtd *qtd;
1672         int retval = 0;
1673
1674         spin_lock_irqsave(&priv->lock, spinflags);
1675         retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1676         if (retval)
1677                 goto out;
1678
1679         qh = urb->ep->hcpriv;
1680         if (!qh) {
1681                 retval = -EINVAL;
1682                 goto out;
1683         }
1684
1685         list_for_each_entry(qtd, &qh->qtd_list, qtd_list)
1686                 if (qtd->urb == urb) {
1687                         dequeue_urb_from_qtd(hcd, qh, qtd);
1688                         list_move(&qtd->qtd_list, &qh->qtd_list);
1689                         break;
1690                 }
1691
1692         urb->status = status;
1693         schedule_ptds(hcd);
1694
1695 out:
1696         spin_unlock_irqrestore(&priv->lock, spinflags);
1697         return retval;
1698 }
1699
1700 static void isp1760_endpoint_disable(struct usb_hcd *hcd,
1701                 struct usb_host_endpoint *ep)
1702 {
1703         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1704         unsigned long spinflags;
1705         struct isp1760_qh *qh, *qh_iter;
1706         int i;
1707
1708         spin_lock_irqsave(&priv->lock, spinflags);
1709
1710         qh = ep->hcpriv;
1711         if (!qh)
1712                 goto out;
1713
1714         WARN_ON(!list_empty(&qh->qtd_list));
1715
1716         for (i = 0; i < QH_END; i++)
1717                 list_for_each_entry(qh_iter, &priv->qh_list[i], qh_list)
1718                         if (qh_iter == qh) {
1719                                 list_del(&qh_iter->qh_list);
1720                                 i = QH_END;
1721                                 break;
1722                         }
1723         qh_free(qh);
1724         ep->hcpriv = NULL;
1725
1726         schedule_ptds(hcd);
1727
1728 out:
1729         spin_unlock_irqrestore(&priv->lock, spinflags);
1730 }
1731
1732 static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1733 {
1734         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1735         u32 temp, status = 0;
1736         u32 mask;
1737         int retval = 1;
1738         unsigned long flags;
1739
1740         /* if !PM, root hub timers won't get shut down ... */
1741         if (!HC_IS_RUNNING(hcd->state))
1742                 return 0;
1743
1744         /* init status to no-changes */
1745         buf[0] = 0;
1746         mask = PORT_CSC;
1747
1748         spin_lock_irqsave(&priv->lock, flags);
1749         temp = reg_read32(hcd->regs, HC_PORTSC1);
1750
1751         if (temp & PORT_OWNER) {
1752                 if (temp & PORT_CSC) {
1753                         temp &= ~PORT_CSC;
1754                         reg_write32(hcd->regs, HC_PORTSC1, temp);
1755                         goto done;
1756                 }
1757         }
1758
1759         /*
1760          * Return status information even for ports with OWNER set.
1761          * Otherwise hub_wq wouldn't see the disconnect event when a
1762          * high-speed device is switched over to the companion
1763          * controller by the user.
1764          */
1765
1766         if ((temp & mask) != 0
1767                         || ((temp & PORT_RESUME) != 0
1768                                 && time_after_eq(jiffies,
1769                                         priv->reset_done))) {
1770                 buf [0] |= 1 << (0 + 1);
1771                 status = STS_PCD;
1772         }
1773         /* FIXME autosuspend idle root hubs */
1774 done:
1775         spin_unlock_irqrestore(&priv->lock, flags);
1776         return status ? retval : 0;
1777 }
1778
1779 static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1780                 struct usb_hub_descriptor *desc)
1781 {
1782         int ports = HCS_N_PORTS(priv->hcs_params);
1783         u16 temp;
1784
1785         desc->bDescriptorType = 0x29;
1786         /* priv 1.0, 2.3.9 says 20ms max */
1787         desc->bPwrOn2PwrGood = 10;
1788         desc->bHubContrCurrent = 0;
1789
1790         desc->bNbrPorts = ports;
1791         temp = 1 + (ports / 8);
1792         desc->bDescLength = 7 + 2 * temp;
1793
1794         /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1795         memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
1796         memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
1797
1798         /* per-port overcurrent reporting */
1799         temp = 0x0008;
1800         if (HCS_PPC(priv->hcs_params))
1801                 /* per-port power control */
1802                 temp |= 0x0001;
1803         else
1804                 /* no power switching */
1805                 temp |= 0x0002;
1806         desc->wHubCharacteristics = cpu_to_le16(temp);
1807 }
1808
1809 #define PORT_WAKE_BITS  (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1810
1811 static int check_reset_complete(struct usb_hcd *hcd, int index,
1812                 int port_status)
1813 {
1814         if (!(port_status & PORT_CONNECT))
1815                 return port_status;
1816
1817         /* if reset finished and it's still not enabled -- handoff */
1818         if (!(port_status & PORT_PE)) {
1819
1820                 dev_info(hcd->self.controller,
1821                                         "port %d full speed --> companion\n",
1822                                         index + 1);
1823
1824                 port_status |= PORT_OWNER;
1825                 port_status &= ~PORT_RWC_BITS;
1826                 reg_write32(hcd->regs, HC_PORTSC1, port_status);
1827
1828         } else
1829                 dev_info(hcd->self.controller, "port %d high speed\n",
1830                                                                 index + 1);
1831
1832         return port_status;
1833 }
1834
1835 static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1836                 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1837 {
1838         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1839         int ports = HCS_N_PORTS(priv->hcs_params);
1840         u32 temp, status;
1841         unsigned long flags;
1842         int retval = 0;
1843         unsigned selector;
1844
1845         /*
1846          * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1847          * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1848          * (track current state ourselves) ... blink for diagnostics,
1849          * power, "this is the one", etc.  EHCI spec supports this.
1850          */
1851
1852         spin_lock_irqsave(&priv->lock, flags);
1853         switch (typeReq) {
1854         case ClearHubFeature:
1855                 switch (wValue) {
1856                 case C_HUB_LOCAL_POWER:
1857                 case C_HUB_OVER_CURRENT:
1858                         /* no hub-wide feature/status flags */
1859                         break;
1860                 default:
1861                         goto error;
1862                 }
1863                 break;
1864         case ClearPortFeature:
1865                 if (!wIndex || wIndex > ports)
1866                         goto error;
1867                 wIndex--;
1868                 temp = reg_read32(hcd->regs, HC_PORTSC1);
1869
1870                 /*
1871                  * Even if OWNER is set, so the port is owned by the
1872                  * companion controller, hub_wq needs to be able to clear
1873                  * the port-change status bits (especially
1874                  * USB_PORT_STAT_C_CONNECTION).
1875                  */
1876
1877                 switch (wValue) {
1878                 case USB_PORT_FEAT_ENABLE:
1879                         reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE);
1880                         break;
1881                 case USB_PORT_FEAT_C_ENABLE:
1882                         /* XXX error? */
1883                         break;
1884                 case USB_PORT_FEAT_SUSPEND:
1885                         if (temp & PORT_RESET)
1886                                 goto error;
1887
1888                         if (temp & PORT_SUSPEND) {
1889                                 if ((temp & PORT_PE) == 0)
1890                                         goto error;
1891                                 /* resume signaling for 20 msec */
1892                                 temp &= ~(PORT_RWC_BITS);
1893                                 reg_write32(hcd->regs, HC_PORTSC1,
1894                                                         temp | PORT_RESUME);
1895                                 priv->reset_done = jiffies +
1896                                         msecs_to_jiffies(20);
1897                         }
1898                         break;
1899                 case USB_PORT_FEAT_C_SUSPEND:
1900                         /* we auto-clear this feature */
1901                         break;
1902                 case USB_PORT_FEAT_POWER:
1903                         if (HCS_PPC(priv->hcs_params))
1904                                 reg_write32(hcd->regs, HC_PORTSC1,
1905                                                         temp & ~PORT_POWER);
1906                         break;
1907                 case USB_PORT_FEAT_C_CONNECTION:
1908                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC);
1909                         break;
1910                 case USB_PORT_FEAT_C_OVER_CURRENT:
1911                         /* XXX error ?*/
1912                         break;
1913                 case USB_PORT_FEAT_C_RESET:
1914                         /* GetPortStatus clears reset */
1915                         break;
1916                 default:
1917                         goto error;
1918                 }
1919                 reg_read32(hcd->regs, HC_USBCMD);
1920                 break;
1921         case GetHubDescriptor:
1922                 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1923                         buf);
1924                 break;
1925         case GetHubStatus:
1926                 /* no hub-wide feature/status flags */
1927                 memset(buf, 0, 4);
1928                 break;
1929         case GetPortStatus:
1930                 if (!wIndex || wIndex > ports)
1931                         goto error;
1932                 wIndex--;
1933                 status = 0;
1934                 temp = reg_read32(hcd->regs, HC_PORTSC1);
1935
1936                 /* wPortChange bits */
1937                 if (temp & PORT_CSC)
1938                         status |= USB_PORT_STAT_C_CONNECTION << 16;
1939
1940
1941                 /* whoever resumes must GetPortStatus to complete it!! */
1942                 if (temp & PORT_RESUME) {
1943                         dev_err(hcd->self.controller, "Port resume should be skipped.\n");
1944
1945                         /* Remote Wakeup received? */
1946                         if (!priv->reset_done) {
1947                                 /* resume signaling for 20 msec */
1948                                 priv->reset_done = jiffies
1949                                                 + msecs_to_jiffies(20);
1950                                 /* check the port again */
1951                                 mod_timer(&hcd->rh_timer, priv->reset_done);
1952                         }
1953
1954                         /* resume completed? */
1955                         else if (time_after_eq(jiffies,
1956                                         priv->reset_done)) {
1957                                 status |= USB_PORT_STAT_C_SUSPEND << 16;
1958                                 priv->reset_done = 0;
1959
1960                                 /* stop resume signaling */
1961                                 temp = reg_read32(hcd->regs, HC_PORTSC1);
1962                                 reg_write32(hcd->regs, HC_PORTSC1,
1963                                         temp & ~(PORT_RWC_BITS | PORT_RESUME));
1964                                 retval = handshake(hcd, HC_PORTSC1,
1965                                            PORT_RESUME, 0, 2000 /* 2msec */);
1966                                 if (retval != 0) {
1967                                         dev_err(hcd->self.controller,
1968                                                 "port %d resume error %d\n",
1969                                                 wIndex + 1, retval);
1970                                         goto error;
1971                                 }
1972                                 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
1973                         }
1974                 }
1975
1976                 /* whoever resets must GetPortStatus to complete it!! */
1977                 if ((temp & PORT_RESET)
1978                                 && time_after_eq(jiffies,
1979                                         priv->reset_done)) {
1980                         status |= USB_PORT_STAT_C_RESET << 16;
1981                         priv->reset_done = 0;
1982
1983                         /* force reset to complete */
1984                         reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET);
1985                         /* REVISIT:  some hardware needs 550+ usec to clear
1986                          * this bit; seems too long to spin routinely...
1987                          */
1988                         retval = handshake(hcd, HC_PORTSC1,
1989                                         PORT_RESET, 0, 750);
1990                         if (retval != 0) {
1991                                 dev_err(hcd->self.controller, "port %d reset error %d\n",
1992                                                 wIndex + 1, retval);
1993                                 goto error;
1994                         }
1995
1996                         /* see what we found out */
1997                         temp = check_reset_complete(hcd, wIndex,
1998                                         reg_read32(hcd->regs, HC_PORTSC1));
1999                 }
2000                 /*
2001                  * Even if OWNER is set, there's no harm letting hub_wq
2002                  * see the wPortStatus values (they should all be 0 except
2003                  * for PORT_POWER anyway).
2004                  */
2005
2006                 if (temp & PORT_OWNER)
2007                         dev_err(hcd->self.controller, "PORT_OWNER is set\n");
2008
2009                 if (temp & PORT_CONNECT) {
2010                         status |= USB_PORT_STAT_CONNECTION;
2011                         /* status may be from integrated TT */
2012                         status |= USB_PORT_STAT_HIGH_SPEED;
2013                 }
2014                 if (temp & PORT_PE)
2015                         status |= USB_PORT_STAT_ENABLE;
2016                 if (temp & (PORT_SUSPEND|PORT_RESUME))
2017                         status |= USB_PORT_STAT_SUSPEND;
2018                 if (temp & PORT_RESET)
2019                         status |= USB_PORT_STAT_RESET;
2020                 if (temp & PORT_POWER)
2021                         status |= USB_PORT_STAT_POWER;
2022
2023                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2024                 break;
2025         case SetHubFeature:
2026                 switch (wValue) {
2027                 case C_HUB_LOCAL_POWER:
2028                 case C_HUB_OVER_CURRENT:
2029                         /* no hub-wide feature/status flags */
2030                         break;
2031                 default:
2032                         goto error;
2033                 }
2034                 break;
2035         case SetPortFeature:
2036                 selector = wIndex >> 8;
2037                 wIndex &= 0xff;
2038                 if (!wIndex || wIndex > ports)
2039                         goto error;
2040                 wIndex--;
2041                 temp = reg_read32(hcd->regs, HC_PORTSC1);
2042                 if (temp & PORT_OWNER)
2043                         break;
2044
2045 /*              temp &= ~PORT_RWC_BITS; */
2046                 switch (wValue) {
2047                 case USB_PORT_FEAT_ENABLE:
2048                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE);
2049                         break;
2050
2051                 case USB_PORT_FEAT_SUSPEND:
2052                         if ((temp & PORT_PE) == 0
2053                                         || (temp & PORT_RESET) != 0)
2054                                 goto error;
2055
2056                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND);
2057                         break;
2058                 case USB_PORT_FEAT_POWER:
2059                         if (HCS_PPC(priv->hcs_params))
2060                                 reg_write32(hcd->regs, HC_PORTSC1,
2061                                                         temp | PORT_POWER);
2062                         break;
2063                 case USB_PORT_FEAT_RESET:
2064                         if (temp & PORT_RESUME)
2065                                 goto error;
2066                         /* line status bits may report this as low speed,
2067                          * which can be fine if this root hub has a
2068                          * transaction translator built in.
2069                          */
2070                         if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2071                                         && PORT_USB11(temp)) {
2072                                 temp |= PORT_OWNER;
2073                         } else {
2074                                 temp |= PORT_RESET;
2075                                 temp &= ~PORT_PE;
2076
2077                                 /*
2078                                  * caller must wait, then call GetPortStatus
2079                                  * usb 2.0 spec says 50 ms resets on root
2080                                  */
2081                                 priv->reset_done = jiffies +
2082                                         msecs_to_jiffies(50);
2083                         }
2084                         reg_write32(hcd->regs, HC_PORTSC1, temp);
2085                         break;
2086                 default:
2087                         goto error;
2088                 }
2089                 reg_read32(hcd->regs, HC_USBCMD);
2090                 break;
2091
2092         default:
2093 error:
2094                 /* "stall" on error */
2095                 retval = -EPIPE;
2096         }
2097         spin_unlock_irqrestore(&priv->lock, flags);
2098         return retval;
2099 }
2100
2101 static int isp1760_get_frame(struct usb_hcd *hcd)
2102 {
2103         struct isp1760_hcd *priv = hcd_to_priv(hcd);
2104         u32 fr;
2105
2106         fr = reg_read32(hcd->regs, HC_FRINDEX);
2107         return (fr >> 3) % priv->periodic_size;
2108 }
2109
2110 static void isp1760_stop(struct usb_hcd *hcd)
2111 {
2112         struct isp1760_hcd *priv = hcd_to_priv(hcd);
2113         u32 temp;
2114
2115         del_timer(&errata2_timer);
2116
2117         isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2118                         NULL, 0);
2119         mdelay(20);
2120
2121         spin_lock_irq(&priv->lock);
2122         ehci_reset(hcd);
2123         /* Disable IRQ */
2124         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2125         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2126         spin_unlock_irq(&priv->lock);
2127
2128         reg_write32(hcd->regs, HC_CONFIGFLAG, 0);
2129 }
2130
2131 static void isp1760_shutdown(struct usb_hcd *hcd)
2132 {
2133         u32 command, temp;
2134
2135         isp1760_stop(hcd);
2136         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2137         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2138
2139         command = reg_read32(hcd->regs, HC_USBCMD);
2140         command &= ~CMD_RUN;
2141         reg_write32(hcd->regs, HC_USBCMD, command);
2142 }
2143
2144 static void isp1760_clear_tt_buffer_complete(struct usb_hcd *hcd,
2145                                                 struct usb_host_endpoint *ep)
2146 {
2147         struct isp1760_hcd *priv = hcd_to_priv(hcd);
2148         struct isp1760_qh *qh = ep->hcpriv;
2149         unsigned long spinflags;
2150
2151         if (!qh)
2152                 return;
2153
2154         spin_lock_irqsave(&priv->lock, spinflags);
2155         qh->tt_buffer_dirty = 0;
2156         schedule_ptds(hcd);
2157         spin_unlock_irqrestore(&priv->lock, spinflags);
2158 }
2159
2160
2161 static const struct hc_driver isp1760_hc_driver = {
2162         .description            = "isp1760-hcd",
2163         .product_desc           = "NXP ISP1760 USB Host Controller",
2164         .hcd_priv_size          = sizeof(struct isp1760_hcd),
2165         .irq                    = isp1760_irq,
2166         .flags                  = HCD_MEMORY | HCD_USB2,
2167         .reset                  = isp1760_hc_setup,
2168         .start                  = isp1760_run,
2169         .stop                   = isp1760_stop,
2170         .shutdown               = isp1760_shutdown,
2171         .urb_enqueue            = isp1760_urb_enqueue,
2172         .urb_dequeue            = isp1760_urb_dequeue,
2173         .endpoint_disable       = isp1760_endpoint_disable,
2174         .get_frame_number       = isp1760_get_frame,
2175         .hub_status_data        = isp1760_hub_status_data,
2176         .hub_control            = isp1760_hub_control,
2177         .clear_tt_buffer_complete       = isp1760_clear_tt_buffer_complete,
2178 };
2179
2180 int __init isp1760_init_kmem_once(void)
2181 {
2182         urb_listitem_cachep = kmem_cache_create("isp1760_urb_listitem",
2183                         sizeof(struct urb_listitem), 0, SLAB_TEMPORARY |
2184                         SLAB_MEM_SPREAD, NULL);
2185
2186         if (!urb_listitem_cachep)
2187                 return -ENOMEM;
2188
2189         qtd_cachep = kmem_cache_create("isp1760_qtd",
2190                         sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2191                         SLAB_MEM_SPREAD, NULL);
2192
2193         if (!qtd_cachep)
2194                 return -ENOMEM;
2195
2196         qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2197                         0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2198
2199         if (!qh_cachep) {
2200                 kmem_cache_destroy(qtd_cachep);
2201                 return -ENOMEM;
2202         }
2203
2204         return 0;
2205 }
2206
2207 void isp1760_deinit_kmem_cache(void)
2208 {
2209         kmem_cache_destroy(qtd_cachep);
2210         kmem_cache_destroy(qh_cachep);
2211         kmem_cache_destroy(urb_listitem_cachep);
2212 }
2213
2214 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
2215                      struct device *dev, unsigned int devflags)
2216 {
2217         struct usb_hcd *hcd;
2218         struct isp1760_hcd *priv;
2219         int ret;
2220
2221         if (usb_disabled())
2222                 return -ENODEV;
2223
2224         /* prevent usb-core allocating DMA pages */
2225         dev->dma_mask = NULL;
2226
2227         hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
2228         if (!hcd)
2229                 return -ENOMEM;
2230
2231         priv = hcd_to_priv(hcd);
2232         priv->devflags = devflags;
2233
2234         priv->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
2235         if (IS_ERR(priv->rst_gpio)) {
2236                 ret = PTR_ERR(priv->rst_gpio);
2237                 goto error;
2238         }
2239
2240         init_memory(priv);
2241         hcd->regs = devm_ioremap_resource(dev, mem);
2242         if (IS_ERR(hcd->regs)) {
2243                 ret = PTR_ERR(hcd->regs);
2244                 goto error;
2245         }
2246
2247         hcd->irq = irq;
2248         hcd->rsrc_start = mem->start;
2249         hcd->rsrc_len = resource_size(mem);
2250
2251         ret = usb_add_hcd(hcd, irq, irqflags);
2252         if (ret)
2253                 goto error;
2254         device_wakeup_enable(hcd->self.controller);
2255
2256         dev_set_drvdata(dev, hcd);
2257
2258         return 0;
2259
2260 error:
2261         usb_put_hcd(hcd);
2262         return ret;
2263 }
2264
2265 void isp1760_unregister(struct device *dev)
2266 {
2267         struct usb_hcd *hcd = dev_get_drvdata(dev);
2268
2269         usb_remove_hcd(hcd);
2270         usb_put_hcd(hcd);
2271 }
2272
2273 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2274 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2275 MODULE_LICENSE("GPL v2");