drivers/usb/host/xhci-hub.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23
  24 #include <linux/slab.h>
  25 #include <asm/unaligned.h>
  26
  27 #include "xhci.h"
  28 #include "xhci-trace.h"
  29
  30 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
  31 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
  32                          PORT_RC | PORT_PLC | PORT_PE)
  33
  34 /* USB 3.0 BOS descriptor and a capability descriptor, combined */
  35 static u8 usb_bos_descriptor [] = {
  36         USB_DT_BOS_SIZE,                /*  __u8 bLength, 5 bytes */
  37         USB_DT_BOS,                     /*  __u8 bDescriptorType */
  38         0x0F, 0x00,                     /*  __le16 wTotalLength, 15 bytes */
  39         0x1,                            /*  __u8 bNumDeviceCaps */
  40         /* First device capability */
  41         USB_DT_USB_SS_CAP_SIZE,         /*  __u8 bLength, 10 bytes */
  42         USB_DT_DEVICE_CAPABILITY,       /* Device Capability */
  43         USB_SS_CAP_TYPE,                /* bDevCapabilityType, SUPERSPEED_USB */
  44         0x00,                           /* bmAttributes, LTM off by default */
  45         USB_5GBPS_OPERATION, 0x00,      /* wSpeedsSupported, 5Gbps only */
  46         0x03,                           /* bFunctionalitySupport,
  47                                            USB 3.0 speed only */
  48         0x00,                           /* bU1DevExitLat, set later. */
  49         0x00, 0x00                      /* __le16 bU2DevExitLat, set later. */
  50 };
  51
  52
  53 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
  54                 struct usb_hub_descriptor *desc, int ports)
  55 {
  56         u16 temp;
  57
  58         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
  59         desc->bHubContrCurrent = 0;
  60
  61         desc->bNbrPorts = ports;
  62         temp = 0;
  63         /* Bits 1:0 - support per-port power switching, or power always on */
  64         if (HCC_PPC(xhci->hcc_params))
  65                 temp |= HUB_CHAR_INDV_PORT_LPSM;
  66         else
  67                 temp |= HUB_CHAR_NO_LPSM;
  68         /* Bit  2 - root hubs are not part of a compound device */
  69         /* Bits 4:3 - individual port over current protection */
  70         temp |= HUB_CHAR_INDV_PORT_OCPM;
  71         /* Bits 6:5 - no TTs in root ports */
  72         /* Bit  7 - no port indicators */
  73         desc->wHubCharacteristics = cpu_to_le16(temp);
  74 }
  75
  76 /* Fill in the USB 2.0 roothub descriptor */
  77 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
  78                 struct usb_hub_descriptor *desc)
  79 {
  80         int ports;
  81         u16 temp;
  82         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
  83         u32 portsc;
  84         unsigned int i;
  85
  86         ports = xhci->num_usb2_ports;
  87
  88         xhci_common_hub_descriptor(xhci, desc, ports);
  89         desc->bDescriptorType = USB_DT_HUB;
  90         temp = 1 + (ports / 8);
  91         desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
  92
  93         /* The Device Removable bits are reported on a byte granularity.
  94          * If the port doesn't exist within that byte, the bit is set to 0.
  95          */
  96         memset(port_removable, 0, sizeof(port_removable));
  97         for (i = 0; i < ports; i++) {
  98                 portsc = readl(xhci->usb2_ports[i]);
  99                 /* If a device is removable, PORTSC reports a 0, same as in the
 100                  * hub descriptor DeviceRemovable bits.
 101                  */
 102                 if (portsc & PORT_DEV_REMOVE)
 103                         /* This math is hairy because bit 0 of DeviceRemovable
 104                          * is reserved, and bit 1 is for port 1, etc.
 105                          */
 106                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
 107         }
 108
 109         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
 110          * ports on it.  The USB 2.0 specification says that there are two
 111          * variable length fields at the end of the hub descriptor:
 112          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
 113          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
 114          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
 115          * 0xFF, so we initialize the both arrays (DeviceRemovable and
 116          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
 117          * set of ports that actually exist.
 118          */
 119         memset(desc->u.hs.DeviceRemovable, 0xff,
 120                         sizeof(desc->u.hs.DeviceRemovable));
 121         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
 122                         sizeof(desc->u.hs.PortPwrCtrlMask));
 123
 124         for (i = 0; i < (ports + 1 + 7) / 8; i++)
 125                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
 126                                 sizeof(__u8));
 127 }
 128
 129 /* Fill in the USB 3.0 roothub descriptor */
 130 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 131                 struct usb_hub_descriptor *desc)
 132 {
 133         int ports;
 134         u16 port_removable;
 135         u32 portsc;
 136         unsigned int i;
 137
 138         ports = xhci->num_usb3_ports;
 139         xhci_common_hub_descriptor(xhci, desc, ports);
 140         desc->bDescriptorType = USB_DT_SS_HUB;
 141         desc->bDescLength = USB_DT_SS_HUB_SIZE;
 142
 143         /* header decode latency should be zero for roothubs,
 144          * see section 4.23.5.2.
 145          */
 146         desc->u.ss.bHubHdrDecLat = 0;
 147         desc->u.ss.wHubDelay = 0;
 148
 149         port_removable = 0;
 150         /* bit 0 is reserved, bit 1 is for port 1, etc. */
 151         for (i = 0; i < ports; i++) {
 152                 portsc = readl(xhci->usb3_ports[i]);
 153                 if (portsc & PORT_DEV_REMOVE)
 154                         port_removable |= 1 << (i + 1);
 155         }
 156
 157         desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable);
 158 }
 159
 160 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 161                 struct usb_hub_descriptor *desc)
 162 {
 163
 164         if (hcd->speed == HCD_USB3)
 165                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
 166         else
 167                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
 168
 169 }
 170
 171 static unsigned int xhci_port_speed(unsigned int port_status)
 172 {
 173         if (DEV_LOWSPEED(port_status))
 174                 return USB_PORT_STAT_LOW_SPEED;
 175         if (DEV_HIGHSPEED(port_status))
 176                 return USB_PORT_STAT_HIGH_SPEED;
 177         /*
 178          * FIXME: Yes, we should check for full speed, but the core uses that as
 179          * a default in portspeed() in usb/core/hub.c (which is the only place
 180          * USB_PORT_STAT_*_SPEED is used).
 181          */
 182         return 0;
 183 }
 184
 185 /*
 186  * These bits are Read Only (RO) and should be saved and written to the
 187  * registers: 0, 3, 10:13, 30
 188  * connect status, over-current status, port speed, and device removable.
 189  * connect status and port speed are also sticky - meaning they're in
 190  * the AUX well and they aren't changed by a hot, warm, or cold reset.
 191  */
 192 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
 193 /*
 194  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
 195  * bits 5:8, 9, 14:15, 25:27
 196  * link state, port power, port indicator state, "wake on" enable state
 197  */
 198 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
 199 /*
 200  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
 201  * bit 4 (port reset)
 202  */
 203 #define XHCI_PORT_RW1S  ((1<<4))
 204 /*
 205  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 206  * bits 1, 17, 18, 19, 20, 21, 22, 23
 207  * port enable/disable, and
 208  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 209  * over-current, reset, link state, and L1 change
 210  */
 211 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
 212 /*
 213  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 214  * latched in
 215  */
 216 #define XHCI_PORT_RW    ((1<<16))
 217 /*
 218  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 219  * bits 2, 24, 28:31
 220  */
 221 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
 222
 223 /*
 224  * Given a port state, this function returns a value that would result in the
 225  * port being in the same state, if the value was written to the port status
 226  * control register.
 227  * Save Read Only (RO) bits and save read/write bits where
 228  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 229  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 230  */
 231 u32 xhci_port_state_to_neutral(u32 state)
 232 {
 233         /* Save read-only status and port state */
 234         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
 235 }
 236
 237 /*
 238  * find slot id based on port number.
 239  * @port: The one-based port number from one of the two split roothubs.
 240  */
 241 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 242                 u16 port)
 243 {
 244         int slot_id;
 245         int i;
 246         enum usb_device_speed speed;
 247
 248         slot_id = 0;
 249         for (i = 0; i < MAX_HC_SLOTS; i++) {
 250                 if (!xhci->devs[i])
 251                         continue;
 252                 speed = xhci->devs[i]->udev->speed;
 253                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
 254                                 && xhci->devs[i]->fake_port == port) {
 255                         slot_id = i;
 256                         break;
 257                 }
 258         }
 259
 260         return slot_id;
 261 }
 262
 263 /*
 264  * Stop device
 265  * It issues stop endpoint command for EP 0 to 30. And wait the last command
 266  * to complete.
 267  * suspend will set to 1, if suspend bit need to set in command.
 268  */
 269 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
 270 {
 271         struct xhci_virt_device *virt_dev;
 272         struct xhci_command *cmd;
 273         unsigned long flags;
 274         int ret;
 275         int i;
 276
 277         ret = 0;
 278         virt_dev = xhci->devs[slot_id];
 279         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
 280         if (!cmd) {
 281                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
 282                 return -ENOMEM;
 283         }
 284
 285         spin_lock_irqsave(&xhci->lock, flags);
 286         for (i = LAST_EP_INDEX; i > 0; i--) {
 287                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) {
 288                         struct xhci_command *command;
 289                         command = xhci_alloc_command(xhci, false, false,
 290                                                      GFP_NOWAIT);
 291                         if (!command) {
 292                                 spin_unlock_irqrestore(&xhci->lock, flags);
 293                                 xhci_free_command(xhci, cmd);
 294                                 return -ENOMEM;
 295
 296                         }
 297                         xhci_queue_stop_endpoint(xhci, command, slot_id, i,
 298                                                  suspend);
 299                 }
 300         }
 301         xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
 302         xhci_ring_cmd_db(xhci);
 303         spin_unlock_irqrestore(&xhci->lock, flags);
 304
 305         /* Wait for last stop endpoint command to finish */
 306         wait_for_completion(cmd->completion);
 307
 308         if (cmd->status == COMP_CMD_ABORT || cmd->status == COMP_CMD_STOP) {
 309                 xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
 310                 ret = -ETIME;
 311         }
 312         xhci_free_command(xhci, cmd);
 313         return ret;
 314 }
 315
 316 /*
 317  * Ring device, it rings the all doorbells unconditionally.
 318  */
 319 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
 320 {
 321         int i, s;
 322         struct xhci_virt_ep *ep;
 323
 324         for (i = 0; i < LAST_EP_INDEX + 1; i++) {
 325                 ep = &xhci->devs[slot_id]->eps[i];
 326
 327                 if (ep->ep_state & EP_HAS_STREAMS) {
 328                         for (s = 1; s < ep->stream_info->num_streams; s++)
 329                                 xhci_ring_ep_doorbell(xhci, slot_id, i, s);
 330                 } else if (ep->ring && ep->ring->dequeue) {
 331                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
 332                 }
 333         }
 334
 335         return;
 336 }
 337
 338 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 339                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 340 {
 341         /* Don't allow the USB core to disable SuperSpeed ports. */
 342         if (hcd->speed == HCD_USB3) {
 343                 xhci_dbg(xhci, "Ignoring request to disable "
 344                                 "SuperSpeed port.\n");
 345                 return;
 346         }
 347
 348         /* Write 1 to disable the port */
 349         writel(port_status | PORT_PE, addr);
 350         port_status = readl(addr);
 351         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
 352                         wIndex, port_status);
 353 }
 354
 355 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
 356                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 357 {
 358         char *port_change_bit;
 359         u32 status;
 360
 361         switch (wValue) {
 362         case USB_PORT_FEAT_C_RESET:
 363                 status = PORT_RC;
 364                 port_change_bit = "reset";
 365                 break;
 366         case USB_PORT_FEAT_C_BH_PORT_RESET:
 367                 status = PORT_WRC;
 368                 port_change_bit = "warm(BH) reset";
 369                 break;
 370         case USB_PORT_FEAT_C_CONNECTION:
 371                 status = PORT_CSC;
 372                 port_change_bit = "connect";
 373                 break;
 374         case USB_PORT_FEAT_C_OVER_CURRENT:
 375                 status = PORT_OCC;
 376                 port_change_bit = "over-current";
 377                 break;
 378         case USB_PORT_FEAT_C_ENABLE:
 379                 status = PORT_PEC;
 380                 port_change_bit = "enable/disable";
 381                 break;
 382         case USB_PORT_FEAT_C_SUSPEND:
 383                 status = PORT_PLC;
 384                 port_change_bit = "suspend/resume";
 385                 break;
 386         case USB_PORT_FEAT_C_PORT_LINK_STATE:
 387                 status = PORT_PLC;
 388                 port_change_bit = "link state";
 389                 break;
 390         default:
 391                 /* Should never happen */
 392                 return;
 393         }
 394         /* Change bits are all write 1 to clear */
 395         writel(port_status | status, addr);
 396         port_status = readl(addr);
 397         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
 398                         port_change_bit, wIndex, port_status);
 399 }
 400
 401 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
 402 {
 403         int max_ports;
 404         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 405
 406         if (hcd->speed == HCD_USB3) {
 407                 max_ports = xhci->num_usb3_ports;
 408                 *port_array = xhci->usb3_ports;
 409         } else {
 410                 max_ports = xhci->num_usb2_ports;
 411                 *port_array = xhci->usb2_ports;
 412         }
 413
 414         return max_ports;
 415 }
 416
 417 void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 418                                 int port_id, u32 link_state)
 419 {
 420         u32 temp;
 421
 422         temp = readl(port_array[port_id]);
 423         temp = xhci_port_state_to_neutral(temp);
 424         temp &= ~PORT_PLS_MASK;
 425         temp |= PORT_LINK_STROBE | link_state;
 426         writel(temp, port_array[port_id]);
 427 }
 428
 429 static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
 430                 __le32 __iomem **port_array, int port_id, u16 wake_mask)
 431 {
 432         u32 temp;
 433
 434         temp = readl(port_array[port_id]);
 435         temp = xhci_port_state_to_neutral(temp);
 436
 437         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
 438                 temp |= PORT_WKCONN_E;
 439         else
 440                 temp &= ~PORT_WKCONN_E;
 441
 442         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT)
 443                 temp |= PORT_WKDISC_E;
 444         else
 445                 temp &= ~PORT_WKDISC_E;
 446
 447         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_OVER_CURRENT)
 448                 temp |= PORT_WKOC_E;
 449         else
 450                 temp &= ~PORT_WKOC_E;
 451
 452         writel(temp, port_array[port_id]);
 453 }
 454
 455 /* Test and clear port RWC bit */
 456 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 457                                 int port_id, u32 port_bit)
 458 {
 459         u32 temp;
 460
 461         temp = readl(port_array[port_id]);
 462         if (temp & port_bit) {
 463                 temp = xhci_port_state_to_neutral(temp);
 464                 temp |= port_bit;
 465                 writel(temp, port_array[port_id]);
 466         }
 467 }
 468
 469 /* Updates Link Status for USB 2.1 port */
 470 static void xhci_hub_report_usb2_link_state(u32 *status, u32 status_reg)
 471 {
 472         if ((status_reg & PORT_PLS_MASK) == XDEV_U2)
 473                 *status |= USB_PORT_STAT_L1;
 474 }
 475
 476 /* Updates Link Status for super Speed port */
 477 static void xhci_hub_report_usb3_link_state(struct xhci_hcd *xhci,
 478                 u32 *status, u32 status_reg)
 479 {
 480         u32 pls = status_reg & PORT_PLS_MASK;
 481
 482         /* resume state is a xHCI internal state.
 483          * Do not report it to usb core.
 484          */
 485         if (pls == XDEV_RESUME)
 486                 return;
 487
 488         /* When the CAS bit is set then warm reset
 489          * should be performed on port
 490          */
 491         if (status_reg & PORT_CAS) {
 492                 /* The CAS bit can be set while the port is
 493                  * in any link state.
 494                  * Only roothubs have CAS bit, so we
 495                  * pretend to be in compliance mode
 496                  * unless we're already in compliance
 497                  * or the inactive state.
 498                  */
 499                 if (pls != USB_SS_PORT_LS_COMP_MOD &&
 500                     pls != USB_SS_PORT_LS_SS_INACTIVE) {
 501                         pls = USB_SS_PORT_LS_COMP_MOD;
 502                 }
 503                 /* Return also connection bit -
 504                  * hub state machine resets port
 505                  * when this bit is set.
 506                  */
 507                 pls |= USB_PORT_STAT_CONNECTION;
 508         } else {
 509                 /*
 510                  * If CAS bit isn't set but the Port is already at
 511                  * Compliance Mode, fake a connection so the USB core
 512                  * notices the Compliance state and resets the port.
 513                  * This resolves an issue generated by the SN65LVPE502CP
 514                  * in which sometimes the port enters compliance mode
 515                  * caused by a delay on the host-device negotiation.
 516                  */
 517                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
 518                                 (pls == USB_SS_PORT_LS_COMP_MOD))
 519                         pls |= USB_PORT_STAT_CONNECTION;
 520         }
 521
 522         /* update status field */
 523         *status |= pls;
 524 }
 525
 526 /*
 527  * Function for Compliance Mode Quirk.
 528  *
 529  * This Function verifies if all xhc USB3 ports have entered U0, if so,
 530  * the compliance mode timer is deleted. A port won't enter
 531  * compliance mode if it has previously entered U0.
 532  */
 533 static void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status,
 534                                     u16 wIndex)
 535 {
 536         u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);
 537         bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);
 538
 539         if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))
 540                 return;
 541
 542         if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {
 543                 xhci->port_status_u0 |= 1 << wIndex;
 544                 if (xhci->port_status_u0 == all_ports_seen_u0) {
 545                         del_timer_sync(&xhci->comp_mode_recovery_timer);
 546                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 547                                 "All USB3 ports have entered U0 already!");
 548                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 549                                 "Compliance Mode Recovery Timer Deleted.");
 550                 }
 551         }
 552 }
 553
 554 /*
 555  * Converts a raw xHCI port status into the format that external USB 2.0 or USB
 556  * 3.0 hubs use.
 557  *
 558  * Possible side effects:
 559  *  - Mark a port as being done with device resume,
 560  *    and ring the endpoint doorbells.
 561  *  - Stop the Synopsys redriver Compliance Mode polling.
 562  *  - Drop and reacquire the xHCI lock, in order to wait for port resume.
 563  */
 564 static u32 xhci_get_port_status(struct usb_hcd *hcd,
 565                 struct xhci_bus_state *bus_state,
 566                 __le32 __iomem **port_array,
 567                 u16 wIndex, u32 raw_port_status,
 568                 unsigned long flags)
 569         __releases(&xhci->lock)
 570         __acquires(&xhci->lock)
 571 {
 572         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 573         u32 status = 0;
 574         int slot_id;
 575
 576         /* wPortChange bits */
 577         if (raw_port_status & PORT_CSC)
 578                 status |= USB_PORT_STAT_C_CONNECTION << 16;
 579         if (raw_port_status & PORT_PEC)
 580                 status |= USB_PORT_STAT_C_ENABLE << 16;
 581         if ((raw_port_status & PORT_OCC))
 582                 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
 583         if ((raw_port_status & PORT_RC))
 584                 status |= USB_PORT_STAT_C_RESET << 16;
 585         /* USB3.0 only */
 586         if (hcd->speed == HCD_USB3) {
 587                 if ((raw_port_status & PORT_PLC))
 588                         status |= USB_PORT_STAT_C_LINK_STATE << 16;
 589                 if ((raw_port_status & PORT_WRC))
 590                         status |= USB_PORT_STAT_C_BH_RESET << 16;
 591         }
 592
 593         if (hcd->speed != HCD_USB3) {
 594                 if ((raw_port_status & PORT_PLS_MASK) == XDEV_U3
 595                                 && (raw_port_status & PORT_POWER))
 596                         status |= USB_PORT_STAT_SUSPEND;
 597         }
 598         if ((raw_port_status & PORT_PLS_MASK) == XDEV_RESUME &&
 599                         !DEV_SUPERSPEED(raw_port_status)) {
 600                 if ((raw_port_status & PORT_RESET) ||
 601                                 !(raw_port_status & PORT_PE))
 602                         return 0xffffffff;
 603                 if (time_after_eq(jiffies,
 604                                         bus_state->resume_done[wIndex])) {
 605                         int time_left;
 606
 607                         xhci_dbg(xhci, "Resume USB2 port %d\n",
 608                                         wIndex + 1);
 609                         bus_state->resume_done[wIndex] = 0;
 610                         clear_bit(wIndex, &bus_state->resuming_ports);
 611
 612                         set_bit(wIndex, &bus_state->rexit_ports);
 613                         xhci_set_link_state(xhci, port_array, wIndex,
 614                                         XDEV_U0);
 615
 616                         spin_unlock_irqrestore(&xhci->lock, flags);
 617                         time_left = wait_for_completion_timeout(
 618                                         &bus_state->rexit_done[wIndex],
 619                                         msecs_to_jiffies(
 620                                                 XHCI_MAX_REXIT_TIMEOUT));
 621                         spin_lock_irqsave(&xhci->lock, flags);
 622
 623                         if (time_left) {
 624                                 slot_id = xhci_find_slot_id_by_port(hcd,
 625                                                 xhci, wIndex + 1);
 626                                 if (!slot_id) {
 627                                         xhci_dbg(xhci, "slot_id is zero\n");
 628                                         return 0xffffffff;
 629                                 }
 630                                 xhci_ring_device(xhci, slot_id);
 631                         } else {
 632                                 int port_status = readl(port_array[wIndex]);
 633                                 xhci_warn(xhci, "Port resume took longer than %i msec, port status = 0x%x\n",
 634                                                 XHCI_MAX_REXIT_TIMEOUT,
 635                                                 port_status);
 636                                 status |= USB_PORT_STAT_SUSPEND;
 637                                 clear_bit(wIndex, &bus_state->rexit_ports);
 638                         }
 639
 640                         bus_state->port_c_suspend |= 1 << wIndex;
 641                         bus_state->suspended_ports &= ~(1 << wIndex);
 642                 } else {
 643                         /*
 644                          * The resume has been signaling for less than
 645                          * 20ms. Report the port status as SUSPEND,
 646                          * let the usbcore check port status again
 647                          * and clear resume signaling later.
 648                          */
 649                         status |= USB_PORT_STAT_SUSPEND;
 650                 }
 651         }
 652         if ((raw_port_status & PORT_PLS_MASK) == XDEV_U0
 653                         && (raw_port_status & PORT_POWER)
 654                         && (bus_state->suspended_ports & (1 << wIndex))) {
 655                 bus_state->suspended_ports &= ~(1 << wIndex);
 656                 if (hcd->speed != HCD_USB3)
 657                         bus_state->port_c_suspend |= 1 << wIndex;
 658         }
 659         if (raw_port_status & PORT_CONNECT) {
 660                 status |= USB_PORT_STAT_CONNECTION;
 661                 status |= xhci_port_speed(raw_port_status);
 662         }
 663         if (raw_port_status & PORT_PE)
 664                 status |= USB_PORT_STAT_ENABLE;
 665         if (raw_port_status & PORT_OC)
 666                 status |= USB_PORT_STAT_OVERCURRENT;
 667         if (raw_port_status & PORT_RESET)
 668                 status |= USB_PORT_STAT_RESET;
 669         if (raw_port_status & PORT_POWER) {
 670                 if (hcd->speed == HCD_USB3)
 671                         status |= USB_SS_PORT_STAT_POWER;
 672                 else
 673                         status |= USB_PORT_STAT_POWER;
 674         }
 675         /* Update Port Link State */
 676         if (hcd->speed == HCD_USB3) {
 677                 xhci_hub_report_usb3_link_state(xhci, &status, raw_port_status);
 678                 /*
 679                  * Verify if all USB3 Ports Have entered U0 already.
 680                  * Delete Compliance Mode Timer if so.
 681                  */
 682                 xhci_del_comp_mod_timer(xhci, raw_port_status, wIndex);
 683         } else {
 684                 xhci_hub_report_usb2_link_state(&status, raw_port_status);
 685         }
 686         if (bus_state->port_c_suspend & (1 << wIndex))
 687                 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
 688
 689         return status;
 690 }
 691
 692 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 693                 u16 wIndex, char *buf, u16 wLength)
 694 {
 695         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 696         int max_ports;
 697         unsigned long flags;
 698         u32 temp, status;
 699         int retval = 0;
 700         __le32 __iomem **port_array;
 701         int slot_id;
 702         struct xhci_bus_state *bus_state;
 703         u16 link_state = 0;
 704         u16 wake_mask = 0;
 705         u16 timeout = 0;
 706
 707         max_ports = xhci_get_ports(hcd, &port_array);
 708         bus_state = &xhci->bus_state[hcd_index(hcd)];
 709
 710         spin_lock_irqsave(&xhci->lock, flags);
 711         switch (typeReq) {
 712         case GetHubStatus:
 713                 /* No power source, over-current reported per port */
 714                 memset(buf, 0, 4);
 715                 break;
 716         case GetHubDescriptor:
 717                 /* Check to make sure userspace is asking for the USB 3.0 hub
 718                  * descriptor for the USB 3.0 roothub.  If not, we stall the
 719                  * endpoint, like external hubs do.
 720                  */
 721                 if (hcd->speed == HCD_USB3 &&
 722                                 (wLength < USB_DT_SS_HUB_SIZE ||
 723                                  wValue != (USB_DT_SS_HUB << 8))) {
 724                         xhci_dbg(xhci, "Wrong hub descriptor type for "
 725                                         "USB 3.0 roothub.\n");
 726                         goto error;
 727                 }
 728                 xhci_hub_descriptor(hcd, xhci,
 729                                 (struct usb_hub_descriptor *) buf);
 730                 break;
 731         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 732                 if ((wValue & 0xff00) != (USB_DT_BOS << 8))
 733                         goto error;
 734
 735                 if (hcd->speed != HCD_USB3)
 736                         goto error;
 737
 738                 /* Set the U1 and U2 exit latencies. */
 739                 memcpy(buf, &usb_bos_descriptor,
 740                                 USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
 741                 if ((xhci->quirks & XHCI_LPM_SUPPORT)) {
 742                         temp = readl(&xhci->cap_regs->hcs_params3);
 743                         buf[12] = HCS_U1_LATENCY(temp);
 744                         put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
 745                 }
 746
 747                 /* Indicate whether the host has LTM support. */
 748                 temp = readl(&xhci->cap_regs->hcc_params);
 749                 if (HCC_LTC(temp))
 750                         buf[8] |= USB_LTM_SUPPORT;
 751
 752                 spin_unlock_irqrestore(&xhci->lock, flags);
 753                 return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
 754         case GetPortStatus:
 755                 if (!wIndex || wIndex > max_ports)
 756                         goto error;
 757                 wIndex--;
 758                 temp = readl(port_array[wIndex]);
 759                 if (temp == 0xffffffff) {
 760                         retval = -ENODEV;
 761                         break;
 762                 }
 763                 status = xhci_get_port_status(hcd, bus_state, port_array,
 764                                 wIndex, temp, flags);
 765                 if (status == 0xffffffff)
 766                         goto error;
 767
 768                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n",
 769                                 wIndex, temp);
 770                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
 771
 772                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
 773                 break;
 774         case SetPortFeature:
 775                 if (wValue == USB_PORT_FEAT_LINK_STATE)
 776                         link_state = (wIndex & 0xff00) >> 3;
 777                 if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
 778                         wake_mask = wIndex & 0xff00;
 779                 /* The MSB of wIndex is the U1/U2 timeout */
 780                 timeout = (wIndex & 0xff00) >> 8;
 781                 wIndex &= 0xff;
 782                 if (!wIndex || wIndex > max_ports)
 783                         goto error;
 784                 wIndex--;
 785                 temp = readl(port_array[wIndex]);
 786                 if (temp == 0xffffffff) {
 787                         retval = -ENODEV;
 788                         break;
 789                 }
 790                 temp = xhci_port_state_to_neutral(temp);
 791                 /* FIXME: What new port features do we need to support? */
 792                 switch (wValue) {
 793                 case USB_PORT_FEAT_SUSPEND:
 794                         temp = readl(port_array[wIndex]);
 795                         if ((temp & PORT_PLS_MASK) != XDEV_U0) {
 796                                 /* Resume the port to U0 first */
 797                                 xhci_set_link_state(xhci, port_array, wIndex,
 798                                                         XDEV_U0);
 799                                 spin_unlock_irqrestore(&xhci->lock, flags);
 800                                 msleep(10);
 801                                 spin_lock_irqsave(&xhci->lock, flags);
 802                         }
 803                         /* In spec software should not attempt to suspend
 804                          * a port unless the port reports that it is in the
 805                          * enabled (PED = ‘1’,PLS < ‘3’) state.
 806                          */
 807                         temp = readl(port_array[wIndex]);
 808                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
 809                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
 810                                 xhci_warn(xhci, "USB core suspending device "
 811                                           "not in U0/U1/U2.\n");
 812                                 goto error;
 813                         }
 814
 815                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 816                                         wIndex + 1);
 817                         if (!slot_id) {
 818                                 xhci_warn(xhci, "slot_id is zero\n");
 819                                 goto error;
 820                         }
 821                         /* unlock to execute stop endpoint commands */
 822                         spin_unlock_irqrestore(&xhci->lock, flags);
 823                         xhci_stop_device(xhci, slot_id, 1);
 824                         spin_lock_irqsave(&xhci->lock, flags);
 825
 826                         xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
 827
 828                         spin_unlock_irqrestore(&xhci->lock, flags);
 829                         msleep(10); /* wait device to enter */
 830                         spin_lock_irqsave(&xhci->lock, flags);
 831
 832                         temp = readl(port_array[wIndex]);
 833                         bus_state->suspended_ports |= 1 << wIndex;
 834                         break;
 835                 case USB_PORT_FEAT_LINK_STATE:
 836                         temp = readl(port_array[wIndex]);
 837
 838                         /* Disable port */
 839                         if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
 840                                 xhci_dbg(xhci, "Disable port %d\n", wIndex);
 841                                 temp = xhci_port_state_to_neutral(temp);
 842                                 /*
 843                                  * Clear all change bits, so that we get a new
 844                                  * connection event.
 845                                  */
 846                                 temp |= PORT_CSC | PORT_PEC | PORT_WRC |
 847                                         PORT_OCC | PORT_RC | PORT_PLC |
 848                                         PORT_CEC;
 849                                 writel(temp | PORT_PE, port_array[wIndex]);
 850                                 temp = readl(port_array[wIndex]);
 851                                 break;
 852                         }
 853
 854                         /* Put link in RxDetect (enable port) */
 855                         if (link_state == USB_SS_PORT_LS_RX_DETECT) {
 856                                 xhci_dbg(xhci, "Enable port %d\n", wIndex);
 857                                 xhci_set_link_state(xhci, port_array, wIndex,
 858                                                 link_state);
 859                                 temp = readl(port_array[wIndex]);
 860                                 break;
 861                         }
 862
 863                         /* Software should not attempt to set
 864                          * port link state above '3' (U3) and the port
 865                          * must be enabled.
 866                          */
 867                         if ((temp & PORT_PE) == 0 ||
 868                                 (link_state > USB_SS_PORT_LS_U3)) {
 869                                 xhci_warn(xhci, "Cannot set link state.\n");
 870                                 goto error;
 871                         }
 872
 873                         if (link_state == USB_SS_PORT_LS_U3) {
 874                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 875                                                 wIndex + 1);
 876                                 if (slot_id) {
 877                                         /* unlock to execute stop endpoint
 878                                          * commands */
 879                                         spin_unlock_irqrestore(&xhci->lock,
 880                                                                 flags);
 881                                         xhci_stop_device(xhci, slot_id, 1);
 882                                         spin_lock_irqsave(&xhci->lock, flags);
 883                                 }
 884                         }
 885
 886                         xhci_set_link_state(xhci, port_array, wIndex,
 887                                                 link_state);
 888
 889                         spin_unlock_irqrestore(&xhci->lock, flags);
 890                         msleep(20); /* wait device to enter */
 891                         spin_lock_irqsave(&xhci->lock, flags);
 892
 893                         temp = readl(port_array[wIndex]);
 894                         if (link_state == USB_SS_PORT_LS_U3)
 895                                 bus_state->suspended_ports |= 1 << wIndex;
 896                         break;
 897                 case USB_PORT_FEAT_POWER:
 898                         /*
 899                          * Turn on ports, even if there isn't per-port switching.
 900                          * HC will report connect events even before this is set.
 901                          * However, hub_wq will ignore the roothub events until
 902                          * the roothub is registered.
 903                          */
 904                         writel(temp | PORT_POWER, port_array[wIndex]);
 905
 906                         temp = readl(port_array[wIndex]);
 907                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
 908
 909                         spin_unlock_irqrestore(&xhci->lock, flags);
 910                         temp = usb_acpi_power_manageable(hcd->self.root_hub,
 911                                         wIndex);
 912                         if (temp)
 913                                 usb_acpi_set_power_state(hcd->self.root_hub,
 914                                                 wIndex, true);
 915                         spin_lock_irqsave(&xhci->lock, flags);
 916                         break;
 917                 case USB_PORT_FEAT_RESET:
 918                         temp = (temp | PORT_RESET);
 919                         writel(temp, port_array[wIndex]);
 920
 921                         temp = readl(port_array[wIndex]);
 922                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
 923                         break;
 924                 case USB_PORT_FEAT_REMOTE_WAKE_MASK:
 925                         xhci_set_remote_wake_mask(xhci, port_array,
 926                                         wIndex, wake_mask);
 927                         temp = readl(port_array[wIndex]);
 928                         xhci_dbg(xhci, "set port remote wake mask, "
 929                                         "actual port %d status  = 0x%x\n",
 930                                         wIndex, temp);
 931                         break;
 932                 case USB_PORT_FEAT_BH_PORT_RESET:
 933                         temp |= PORT_WR;
 934                         writel(temp, port_array[wIndex]);
 935
 936                         temp = readl(port_array[wIndex]);
 937                         break;
 938                 case USB_PORT_FEAT_U1_TIMEOUT:
 939                         if (hcd->speed != HCD_USB3)
 940                                 goto error;
 941                         temp = readl(port_array[wIndex] + PORTPMSC);
 942                         temp &= ~PORT_U1_TIMEOUT_MASK;
 943                         temp |= PORT_U1_TIMEOUT(timeout);
 944                         writel(temp, port_array[wIndex] + PORTPMSC);
 945                         break;
 946                 case USB_PORT_FEAT_U2_TIMEOUT:
 947                         if (hcd->speed != HCD_USB3)
 948                                 goto error;
 949                         temp = readl(port_array[wIndex] + PORTPMSC);
 950                         temp &= ~PORT_U2_TIMEOUT_MASK;
 951                         temp |= PORT_U2_TIMEOUT(timeout);
 952                         writel(temp, port_array[wIndex] + PORTPMSC);
 953                         break;
 954                 default:
 955                         goto error;
 956                 }
 957                 /* unblock any posted writes */
 958                 temp = readl(port_array[wIndex]);
 959                 break;
 960         case ClearPortFeature:
 961                 if (!wIndex || wIndex > max_ports)
 962                         goto error;
 963                 wIndex--;
 964                 temp = readl(port_array[wIndex]);
 965                 if (temp == 0xffffffff) {
 966                         retval = -ENODEV;
 967                         break;
 968                 }
 969                 /* FIXME: What new port features do we need to support? */
 970                 temp = xhci_port_state_to_neutral(temp);
 971                 switch (wValue) {
 972                 case USB_PORT_FEAT_SUSPEND:
 973                         temp = readl(port_array[wIndex]);
 974                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
 975                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
 976                         if (temp & PORT_RESET)
 977                                 goto error;
 978                         if ((temp & PORT_PLS_MASK) == XDEV_U3) {
 979                                 if ((temp & PORT_PE) == 0)
 980                                         goto error;
 981
 982                                 xhci_set_link_state(xhci, port_array, wIndex,
 983                                                         XDEV_RESUME);
 984                                 spin_unlock_irqrestore(&xhci->lock, flags);
 985                                 msleep(20);
 986                                 spin_lock_irqsave(&xhci->lock, flags);
 987                                 xhci_set_link_state(xhci, port_array, wIndex,
 988                                                         XDEV_U0);
 989                         }
 990                         bus_state->port_c_suspend |= 1 << wIndex;
 991
 992                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 993                                         wIndex + 1);
 994                         if (!slot_id) {
 995                                 xhci_dbg(xhci, "slot_id is zero\n");
 996                                 goto error;
 997                         }
 998                         xhci_ring_device(xhci, slot_id);
 999                         break;
1000                 case USB_PORT_FEAT_C_SUSPEND:
1001                         bus_state->port_c_suspend &= ~(1 << wIndex);
1002                 case USB_PORT_FEAT_C_RESET:
1003                 case USB_PORT_FEAT_C_BH_PORT_RESET:
1004                 case USB_PORT_FEAT_C_CONNECTION:
1005                 case USB_PORT_FEAT_C_OVER_CURRENT:
1006                 case USB_PORT_FEAT_C_ENABLE:
1007                 case USB_PORT_FEAT_C_PORT_LINK_STATE:
1008                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
1009                                         port_array[wIndex], temp);
1010                         break;
1011                 case USB_PORT_FEAT_ENABLE:
1012                         xhci_disable_port(hcd, xhci, wIndex,
1013                                         port_array[wIndex], temp);
1014                         break;
1015                 case USB_PORT_FEAT_POWER:
1016                         writel(temp & ~PORT_POWER, port_array[wIndex]);
1017
1018                         spin_unlock_irqrestore(&xhci->lock, flags);
1019                         temp = usb_acpi_power_manageable(hcd->self.root_hub,
1020                                         wIndex);
1021                         if (temp)
1022                                 usb_acpi_set_power_state(hcd->self.root_hub,
1023                                                 wIndex, false);
1024                         spin_lock_irqsave(&xhci->lock, flags);
1025                         break;
1026                 default:
1027                         goto error;
1028                 }
1029                 break;
1030         default:
1031 error:
1032                 /* "stall" on error */
1033                 retval = -EPIPE;
1034         }
1035         spin_unlock_irqrestore(&xhci->lock, flags);
1036         return retval;
1037 }
1038
1039 /*
1040  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
1041  * Ports are 0-indexed from the HCD point of view,
1042  * and 1-indexed from the USB core pointer of view.
1043  *
1044  * Note that the status change bits will be cleared as soon as a port status
1045  * change event is generated, so we use the saved status from that event.
1046  */
1047 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
1048 {
1049         unsigned long flags;
1050         u32 temp, status;
1051         u32 mask;
1052         int i, retval;
1053         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1054         int max_ports;
1055         __le32 __iomem **port_array;
1056         struct xhci_bus_state *bus_state;
1057         bool reset_change = false;
1058
1059         max_ports = xhci_get_ports(hcd, &port_array);
1060         bus_state = &xhci->bus_state[hcd_index(hcd)];
1061
1062         /* Initial status is no changes */
1063         retval = (max_ports + 8) / 8;
1064         memset(buf, 0, retval);
1065
1066         /*
1067          * Inform the usbcore about resume-in-progress by returning
1068          * a non-zero value even if there are no status changes.
1069          */
1070         status = bus_state->resuming_ports;
1071
1072         mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC;
1073
1074         spin_lock_irqsave(&xhci->lock, flags);
1075         /* For each port, did anything change?  If so, set that bit in buf. */
1076         for (i = 0; i < max_ports; i++) {
1077                 temp = readl(port_array[i]);
1078                 if (temp == 0xffffffff) {
1079                         retval = -ENODEV;
1080                         break;
1081                 }
1082                 if ((temp & mask) != 0 ||
1083                         (bus_state->port_c_suspend & 1 << i) ||
1084                         (bus_state->resume_done[i] && time_after_eq(
1085                             jiffies, bus_state->resume_done[i]))) {
1086                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
1087                         status = 1;
1088                 }
1089                 if ((temp & PORT_RC))
1090                         reset_change = true;
1091         }
1092         if (!status && !reset_change) {
1093                 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
1094                 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1095         }
1096         spin_unlock_irqrestore(&xhci->lock, flags);
1097         return status ? retval : 0;
1098 }
1099
1100 #ifdef CONFIG_PM
1101
1102 int xhci_bus_suspend(struct usb_hcd *hcd)
1103 {
1104         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1105         int max_ports, port_index;
1106         __le32 __iomem **port_array;
1107         struct xhci_bus_state *bus_state;
1108         unsigned long flags;
1109
1110         max_ports = xhci_get_ports(hcd, &port_array);
1111         bus_state = &xhci->bus_state[hcd_index(hcd)];
1112
1113         spin_lock_irqsave(&xhci->lock, flags);
1114
1115         if (hcd->self.root_hub->do_remote_wakeup) {
1116                 if (bus_state->resuming_ports) {
1117                         spin_unlock_irqrestore(&xhci->lock, flags);
1118                         xhci_dbg(xhci, "suspend failed because "
1119                                                 "a port is resuming\n");
1120                         return -EBUSY;
1121                 }
1122         }
1123
1124         port_index = max_ports;
1125         bus_state->bus_suspended = 0;
1126         while (port_index--) {
1127                 /* suspend the port if the port is not suspended */
1128                 u32 t1, t2;
1129                 int slot_id;
1130
1131                 t1 = readl(port_array[port_index]);
1132                 t2 = xhci_port_state_to_neutral(t1);
1133
1134                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
1135                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
1136                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1137                                         port_index + 1);
1138                         if (slot_id) {
1139                                 spin_unlock_irqrestore(&xhci->lock, flags);
1140                                 xhci_stop_device(xhci, slot_id, 1);
1141                                 spin_lock_irqsave(&xhci->lock, flags);
1142                         }
1143                         t2 &= ~PORT_PLS_MASK;
1144                         t2 |= PORT_LINK_STROBE | XDEV_U3;
1145                         set_bit(port_index, &bus_state->bus_suspended);
1146                 }
1147                 /* USB core sets remote wake mask for USB 3.0 hubs,
1148                  * including the USB 3.0 roothub, but only if CONFIG_PM_RUNTIME
1149                  * is enabled, so also enable remote wake here.
1150                  */
1151                 if (hcd->self.root_hub->do_remote_wakeup) {
1152                         if (t1 & PORT_CONNECT) {
1153                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
1154                                 t2 &= ~PORT_WKCONN_E;
1155                         } else {
1156                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
1157                                 t2 &= ~PORT_WKDISC_E;
1158                         }
1159                 } else
1160                         t2 &= ~PORT_WAKE_BITS;
1161
1162                 t1 = xhci_port_state_to_neutral(t1);
1163                 if (t1 != t2)
1164                         writel(t2, port_array[port_index]);
1165         }
1166         hcd->state = HC_STATE_SUSPENDED;
1167         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
1168         spin_unlock_irqrestore(&xhci->lock, flags);
1169         return 0;
1170 }
1171
1172 int xhci_bus_resume(struct usb_hcd *hcd)
1173 {
1174         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1175         int max_ports, port_index;
1176         __le32 __iomem **port_array;
1177         struct xhci_bus_state *bus_state;
1178         u32 temp;
1179         unsigned long flags;
1180
1181         max_ports = xhci_get_ports(hcd, &port_array);
1182         bus_state = &xhci->bus_state[hcd_index(hcd)];
1183
1184         if (time_before(jiffies, bus_state->next_statechange))
1185                 msleep(5);
1186
1187         spin_lock_irqsave(&xhci->lock, flags);
1188         if (!HCD_HW_ACCESSIBLE(hcd)) {
1189                 spin_unlock_irqrestore(&xhci->lock, flags);
1190                 return -ESHUTDOWN;
1191         }
1192
1193         /* delay the irqs */
1194         temp = readl(&xhci->op_regs->command);
1195         temp &= ~CMD_EIE;
1196         writel(temp, &xhci->op_regs->command);
1197
1198         port_index = max_ports;
1199         while (port_index--) {
1200                 /* Check whether need resume ports. If needed
1201                    resume port and disable remote wakeup */
1202                 u32 temp;
1203                 int slot_id;
1204
1205                 temp = readl(port_array[port_index]);
1206                 if (DEV_SUPERSPEED(temp))
1207                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1208                 else
1209                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
1210                 if (test_bit(port_index, &bus_state->bus_suspended) &&
1211                     (temp & PORT_PLS_MASK)) {
1212                         if (DEV_SUPERSPEED(temp)) {
1213                                 xhci_set_link_state(xhci, port_array,
1214                                                         port_index, XDEV_U0);
1215                         } else {
1216                                 xhci_set_link_state(xhci, port_array,
1217                                                 port_index, XDEV_RESUME);
1218
1219                                 spin_unlock_irqrestore(&xhci->lock, flags);
1220                                 msleep(20);
1221                                 spin_lock_irqsave(&xhci->lock, flags);
1222
1223                                 xhci_set_link_state(xhci, port_array,
1224                                                         port_index, XDEV_U0);
1225                         }
1226                         /* wait for the port to enter U0 and report port link
1227                          * state change.
1228                          */
1229                         spin_unlock_irqrestore(&xhci->lock, flags);
1230                         msleep(20);
1231                         spin_lock_irqsave(&xhci->lock, flags);
1232
1233                         /* Clear PLC */
1234                         xhci_test_and_clear_bit(xhci, port_array, port_index,
1235                                                 PORT_PLC);
1236
1237                         slot_id = xhci_find_slot_id_by_port(hcd,
1238                                         xhci, port_index + 1);
1239                         if (slot_id)
1240                                 xhci_ring_device(xhci, slot_id);
1241                 } else
1242                         writel(temp, port_array[port_index]);
1243         }
1244
1245         (void) readl(&xhci->op_regs->command);
1246
1247         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
1248         /* re-enable irqs */
1249         temp = readl(&xhci->op_regs->command);
1250         temp |= CMD_EIE;
1251         writel(temp, &xhci->op_regs->command);
1252         temp = readl(&xhci->op_regs->command);
1253
1254         spin_unlock_irqrestore(&xhci->lock, flags);
1255         return 0;
1256 }
1257
1258 #endif  /* CONFIG_PM */