drivers/video/sm501fb.c

   1 /* linux/drivers/video/sm501fb.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Vincent Sanders <vince@simtec.co.uk>
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Framebuffer driver for the Silicon Motion SM501
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/init.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/wait.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/clk.h>
  31
  32 #include <asm/io.h>
  33 #include <asm/uaccess.h>
  34 #include <asm/div64.h>
  35
  36 #ifdef CONFIG_PM
  37 #include <linux/pm.h>
  38 #endif
  39
  40 #include <linux/sm501.h>
  41 #include <linux/sm501-regs.h>
  42
  43 #define NR_PALETTE      256
  44
  45 enum sm501_controller {
  46         HEAD_CRT        = 0,
  47         HEAD_PANEL      = 1,
  48 };
  49
  50 /* SM501 memory adress */
  51 struct sm501_mem {
  52         unsigned long    size;
  53         unsigned long    sm_addr;
  54         void __iomem    *k_addr;
  55 };
  56
  57 /* private data that is shared between all frambuffers* */
  58 struct sm501fb_info {
  59         struct device           *dev;
  60         struct fb_info          *fb[2];         /* fb info for both heads */
  61         struct resource         *fbmem_res;     /* framebuffer resource */
  62         struct resource         *regs_res;      /* registers resource */
  63         struct sm501_platdata_fb *pdata;        /* our platform data */
  64
  65         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
  66
  67         int                      irq;
  68         int                      swap_endian;   /* set to swap rgb=>bgr */
  69         void __iomem            *regs;          /* remapped registers */
  70         void __iomem            *fbmem;         /* remapped framebuffer */
  71         size_t                   fbmem_len;     /* length of remapped region */
  72 };
  73
  74 /* per-framebuffer private data */
  75 struct sm501fb_par {
  76         u32                      pseudo_palette[16];
  77
  78         enum sm501_controller    head;
  79         struct sm501_mem         cursor;
  80         struct sm501_mem         screen;
  81         struct fb_ops            ops;
  82
  83         void                    *store_fb;
  84         void                    *store_cursor;
  85         void __iomem            *cursor_regs;
  86         struct sm501fb_info     *info;
  87 };
  88
  89 /* Helper functions */
  90
  91 static inline int h_total(struct fb_var_screeninfo *var)
  92 {
  93         return var->xres + var->left_margin +
  94                 var->right_margin + var->hsync_len;
  95 }
  96
  97 static inline int v_total(struct fb_var_screeninfo *var)
  98 {
  99         return var->yres + var->upper_margin +
 100                 var->lower_margin + var->vsync_len;
 101 }
 102
 103 /* sm501fb_sync_regs()
 104  *
 105  * This call is mainly for PCI bus systems where we need to
 106  * ensure that any writes to the bus are completed before the
 107  * next phase, or after completing a function.
 108 */
 109
 110 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 111 {
 112         readl(info->regs);
 113 }
 114
 115 /* sm501_alloc_mem
 116  *
 117  * This is an attempt to lay out memory for the two framebuffers and
 118  * everything else
 119  *
 120  * |fbmem_res->start                                           fbmem_res->end|
 121  * |                                                                         |
 122  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 123  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 124  *
 125  * The "spare" space is for the 2d engine data
 126  * the fixed is space for the cursors (2x1Kbyte)
 127  *
 128  * we need to allocate memory for the 2D acceleration engine
 129  * command list and the data for the engine to deal with.
 130  *
 131  * - all allocations must be 128bit aligned
 132  * - cursors are 64x64x2 bits (1Kbyte)
 133  *
 134  */
 135
 136 #define SM501_MEMF_CURSOR               (1)
 137 #define SM501_MEMF_PANEL                (2)
 138 #define SM501_MEMF_CRT                  (4)
 139 #define SM501_MEMF_ACCEL                (8)
 140
 141 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
 142                            unsigned int why, size_t size)
 143 {
 144         unsigned int ptr = 0;
 145
 146         switch (why) {
 147         case SM501_MEMF_CURSOR:
 148                 ptr = inf->fbmem_len - size;
 149                 inf->fbmem_len = ptr;
 150                 break;
 151
 152         case SM501_MEMF_PANEL:
 153                 ptr = inf->fbmem_len - size;
 154                 if (ptr < inf->fb[0]->fix.smem_len)
 155                         return -ENOMEM;
 156
 157                 break;
 158
 159         case SM501_MEMF_CRT:
 160                 ptr = 0;
 161                 break;
 162
 163         case SM501_MEMF_ACCEL:
 164                 ptr = inf->fb[0]->fix.smem_len;
 165
 166                 if ((ptr + size) >
 167                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
 168                         return -ENOMEM;
 169                 break;
 170
 171         default:
 172                 return -EINVAL;
 173         }
 174
 175         mem->size    = size;
 176         mem->sm_addr = ptr;
 177         mem->k_addr  = inf->fbmem + ptr;
 178
 179         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
 180                 __func__, mem->sm_addr, mem->k_addr, why, size);
 181
 182         return 0;
 183 }
 184
 185 /* sm501fb_ps_to_hz
 186  *
 187  * Converts a period in picoseconds to Hz.
 188  *
 189  * Note, we try to keep this in Hz to minimise rounding with
 190  * the limited PLL settings on the SM501.
 191 */
 192
 193 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
 194 {
 195         unsigned long long numerator=1000000000000ULL;
 196
 197         /* 10^12 / picosecond period gives frequency in Hz */
 198         do_div(numerator, psvalue);
 199         return (unsigned long)numerator;
 200 }
 201
 202 /* sm501fb_hz_to_ps is identical to the oposite transform */
 203
 204 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
 205
 206 /* sm501fb_setup_gamma
 207  *
 208  * Programs a linear 1.0 gamma ramp in case the gamma
 209  * correction is enabled without programming anything else.
 210 */
 211
 212 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
 213                                 unsigned long palette)
 214 {
 215         unsigned long value = 0;
 216         int offset;
 217
 218         /* set gamma values */
 219         for (offset = 0; offset < 256 * 4; offset += 4) {
 220                 writel(value, fbi->regs + palette + offset);
 221                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
 222         }
 223 }
 224
 225 /* sm501fb_check_var
 226  *
 227  * check common variables for both panel and crt
 228 */
 229
 230 static int sm501fb_check_var(struct fb_var_screeninfo *var,
 231                              struct fb_info *info)
 232 {
 233         struct sm501fb_par  *par = info->par;
 234         struct sm501fb_info *sm  = par->info;
 235         unsigned long tmp;
 236
 237         /* check we can fit these values into the registers */
 238
 239         if (var->hsync_len > 255 || var->vsync_len > 255)
 240                 return -EINVAL;
 241
 242         if ((var->xres + var->right_margin) >= 4096)
 243                 return -EINVAL;
 244
 245         if ((var->yres + var->lower_margin) > 2048)
 246                 return -EINVAL;
 247
 248         /* hard limits of device */
 249
 250         if (h_total(var) > 4096 || v_total(var) > 2048)
 251                 return -EINVAL;
 252
 253         /* check our line length is going to be 128 bit aligned */
 254
 255         tmp = (var->xres * var->bits_per_pixel) / 8;
 256         if ((tmp & 15) != 0)
 257                 return -EINVAL;
 258
 259         /* check the virtual size */
 260
 261         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
 262                 return -EINVAL;
 263
 264         /* can cope with 8,16 or 32bpp */
 265
 266         if (var->bits_per_pixel <= 8)
 267                 var->bits_per_pixel = 8;
 268         else if (var->bits_per_pixel <= 16)
 269                 var->bits_per_pixel = 16;
 270         else if (var->bits_per_pixel == 24)
 271                 var->bits_per_pixel = 32;
 272
 273         /* set r/g/b positions and validate bpp */
 274         switch(var->bits_per_pixel) {
 275         case 8:
 276                 var->red.length         = var->bits_per_pixel;
 277                 var->red.offset         = 0;
 278                 var->green.length       = var->bits_per_pixel;
 279                 var->green.offset       = 0;
 280                 var->blue.length        = var->bits_per_pixel;
 281                 var->blue.offset        = 0;
 282                 var->transp.length      = 0;
 283
 284                 break;
 285
 286         case 16:
 287                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 288                         var->red.offset         = 11;
 289                         var->green.offset       = 5;
 290                         var->blue.offset        = 0;
 291                 } else {
 292                         var->blue.offset        = 11;
 293                         var->green.offset       = 5;
 294                         var->red.offset         = 0;
 295                 }
 296
 297                 var->red.length         = 5;
 298                 var->green.length       = 6;
 299                 var->blue.length        = 5;
 300                 var->transp.length      = 0;
 301                 break;
 302
 303         case 32:
 304                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 305                         var->transp.offset      = 0;
 306                         var->red.offset         = 8;
 307                         var->green.offset       = 16;
 308                         var->blue.offset        = 24;
 309                 } else {
 310                         var->transp.offset      = 24;
 311                         var->red.offset         = 16;
 312                         var->green.offset       = 8;
 313                         var->blue.offset        = 0;
 314                 }
 315
 316                 var->red.length         = 8;
 317                 var->green.length       = 8;
 318                 var->blue.length        = 8;
 319                 var->transp.length      = 0;
 320                 break;
 321
 322         default:
 323                 return -EINVAL;
 324         }
 325
 326         return 0;
 327 }
 328
 329 /*
 330  * sm501fb_check_var_crt():
 331  *
 332  * check the parameters for the CRT head, and either bring them
 333  * back into range, or return -EINVAL.
 334 */
 335
 336 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
 337                                  struct fb_info *info)
 338 {
 339         return sm501fb_check_var(var, info);
 340 }
 341
 342 /* sm501fb_check_var_pnl():
 343  *
 344  * check the parameters for the CRT head, and either bring them
 345  * back into range, or return -EINVAL.
 346 */
 347
 348 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
 349                                  struct fb_info *info)
 350 {
 351         return sm501fb_check_var(var, info);
 352 }
 353
 354 /* sm501fb_set_par_common
 355  *
 356  * set common registers for framebuffers
 357 */
 358
 359 static int sm501fb_set_par_common(struct fb_info *info,
 360                                   struct fb_var_screeninfo *var)
 361 {
 362         struct sm501fb_par  *par = info->par;
 363         struct sm501fb_info *fbi = par->info;
 364         unsigned long pixclock;      /* pixelclock in Hz */
 365         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
 366         unsigned int mem_type;
 367         unsigned int clock_type;
 368         unsigned int head_addr;
 369
 370         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
 371                 __func__, var->xres, var->yres, var->bits_per_pixel,
 372                 var->xres_virtual, var->yres_virtual);
 373
 374         switch (par->head) {
 375         case HEAD_CRT:
 376                 mem_type = SM501_MEMF_CRT;
 377                 clock_type = SM501_CLOCK_V2XCLK;
 378                 head_addr = SM501_DC_CRT_FB_ADDR;
 379                 break;
 380
 381         case HEAD_PANEL:
 382                 mem_type = SM501_MEMF_PANEL;
 383                 clock_type = SM501_CLOCK_P2XCLK;
 384                 head_addr = SM501_DC_PANEL_FB_ADDR;
 385                 break;
 386
 387         default:
 388                 mem_type = 0;           /* stop compiler warnings */
 389                 head_addr = 0;
 390                 clock_type = 0;
 391         }
 392
 393         switch (var->bits_per_pixel) {
 394         case 8:
 395                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 396                 break;
 397
 398         case 16:
 399                 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
 400                 break;
 401
 402         case 32:
 403                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 404                 break;
 405         }
 406
 407         /* allocate fb memory within 501 */
 408         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
 409         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
 410
 411         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
 412                 info->fix.line_length);
 413
 414         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
 415                             info->fix.smem_len)) {
 416                 dev_err(fbi->dev, "no memory available\n");
 417                 return -ENOMEM;
 418         }
 419
 420         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
 421
 422         info->screen_base = fbi->fbmem + par->screen.sm_addr;
 423         info->screen_size = info->fix.smem_len;
 424
 425         /* set start of framebuffer to the screen */
 426
 427         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
 428
 429         /* program CRT clock  */
 430
 431         pixclock = sm501fb_ps_to_hz(var->pixclock);
 432
 433         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
 434                                         pixclock);
 435
 436         /* update fb layer with actual clock used */
 437         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
 438
 439         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
 440                "sm501pixclock = %lu,  error = %ld%%\n",
 441                __func__, var->pixclock, pixclock, sm501pixclock,
 442                ((pixclock - sm501pixclock)*100)/pixclock);
 443
 444         return 0;
 445 }
 446
 447 /* sm501fb_set_par_geometry
 448  *
 449  * set the geometry registers for specified framebuffer.
 450 */
 451
 452 static void sm501fb_set_par_geometry(struct fb_info *info,
 453                                      struct fb_var_screeninfo *var)
 454 {
 455         struct sm501fb_par  *par = info->par;
 456         struct sm501fb_info *fbi = par->info;
 457         void __iomem *base = fbi->regs;
 458         unsigned long reg;
 459
 460         if (par->head == HEAD_CRT)
 461                 base += SM501_DC_CRT_H_TOT;
 462         else
 463                 base += SM501_DC_PANEL_H_TOT;
 464
 465         /* set framebuffer width and display width */
 466
 467         reg = info->fix.line_length;
 468         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
 469
 470         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
 471                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
 472
 473         /* program horizontal total */
 474
 475         reg  = (h_total(var) - 1) << 16;
 476         reg |= (var->xres - 1);
 477
 478         writel(reg, base + SM501_OFF_DC_H_TOT);
 479
 480         /* program horizontal sync */
 481
 482         reg  = var->hsync_len << 16;
 483         reg |= var->xres + var->right_margin - 1;
 484
 485         writel(reg, base + SM501_OFF_DC_H_SYNC);
 486
 487         /* program vertical total */
 488
 489         reg  = (v_total(var) - 1) << 16;
 490         reg |= (var->yres - 1);
 491
 492         writel(reg, base + SM501_OFF_DC_V_TOT);
 493
 494         /* program vertical sync */
 495         reg  = var->vsync_len << 16;
 496         reg |= var->yres + var->lower_margin - 1;
 497
 498         writel(reg, base + SM501_OFF_DC_V_SYNC);
 499 }
 500
 501 /* sm501fb_pan_crt
 502  *
 503  * pan the CRT display output within an virtual framebuffer
 504 */
 505
 506 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
 507                            struct fb_info *info)
 508 {
 509         struct sm501fb_par  *par = info->par;
 510         struct sm501fb_info *fbi = par->info;
 511         unsigned int bytes_pixel = var->bits_per_pixel / 8;
 512         unsigned long reg;
 513         unsigned long xoffs;
 514
 515         xoffs = var->xoffset * bytes_pixel;
 516
 517         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 518
 519         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
 520         reg |= ((xoffs & 15) / bytes_pixel) << 4;
 521         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
 522
 523         reg = (par->screen.sm_addr + xoffs +
 524                var->yoffset * info->fix.line_length);
 525         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
 526
 527         sm501fb_sync_regs(fbi);
 528         return 0;
 529 }
 530
 531 /* sm501fb_pan_pnl
 532  *
 533  * pan the panel display output within an virtual framebuffer
 534 */
 535
 536 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
 537                            struct fb_info *info)
 538 {
 539         struct sm501fb_par  *par = info->par;
 540         struct sm501fb_info *fbi = par->info;
 541         unsigned long reg;
 542
 543         reg = var->xoffset | (var->xres_virtual << 16);
 544         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
 545
 546         reg = var->yoffset | (var->yres_virtual << 16);
 547         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
 548
 549         sm501fb_sync_regs(fbi);
 550         return 0;
 551 }
 552
 553 /* sm501fb_set_par_crt
 554  *
 555  * Set the CRT video mode from the fb_info structure
 556 */
 557
 558 static int sm501fb_set_par_crt(struct fb_info *info)
 559 {
 560         struct sm501fb_par  *par = info->par;
 561         struct sm501fb_info *fbi = par->info;
 562         struct fb_var_screeninfo *var = &info->var;
 563         unsigned long control;       /* control register */
 564         int ret;
 565
 566         /* activate new configuration */
 567
 568         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 569
 570         /* enable CRT DAC - note 0 is on!*/
 571         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 572
 573         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 574
 575         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
 576                     SM501_DC_CRT_CONTROL_GAMMA |
 577                     SM501_DC_CRT_CONTROL_BLANK |
 578                     SM501_DC_CRT_CONTROL_SEL |
 579                     SM501_DC_CRT_CONTROL_CP |
 580                     SM501_DC_CRT_CONTROL_TVP);
 581
 582         /* set the sync polarities before we check data source  */
 583
 584         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 585                 control |= SM501_DC_CRT_CONTROL_HSP;
 586
 587         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 588                 control |= SM501_DC_CRT_CONTROL_VSP;
 589
 590         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
 591                 /* the head is displaying panel data... */
 592
 593                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
 594                 goto out_update;
 595         }
 596
 597         ret = sm501fb_set_par_common(info, var);
 598         if (ret) {
 599                 dev_err(fbi->dev, "failed to set common parameters\n");
 600                 return ret;
 601         }
 602
 603         sm501fb_pan_crt(var, info);
 604         sm501fb_set_par_geometry(info, var);
 605
 606         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 607
 608         switch(var->bits_per_pixel) {
 609         case 8:
 610                 control |= SM501_DC_CRT_CONTROL_8BPP;
 611                 break;
 612
 613         case 16:
 614                 control |= SM501_DC_CRT_CONTROL_16BPP;
 615                 break;
 616
 617         case 32:
 618                 control |= SM501_DC_CRT_CONTROL_32BPP;
 619                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 620                 break;
 621
 622         default:
 623                 BUG();
 624         }
 625
 626         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
 627         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
 628         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
 629
 630  out_update:
 631         dev_dbg(fbi->dev, "new control is %08lx\n", control);
 632
 633         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
 634         sm501fb_sync_regs(fbi);
 635
 636         return 0;
 637 }
 638
 639 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
 640 {
 641         unsigned long control;
 642         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
 643
 644         control = readl(ctrl_reg);
 645
 646         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
 647                 /* enable panel power */
 648
 649                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
 650                 writel(control, ctrl_reg);
 651                 sm501fb_sync_regs(fbi);
 652                 mdelay(10);
 653
 654                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
 655                 writel(control, ctrl_reg);
 656                 sm501fb_sync_regs(fbi);
 657                 mdelay(10);
 658
 659                 control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
 660                 writel(control, ctrl_reg);
 661                 sm501fb_sync_regs(fbi);
 662                 mdelay(10);
 663
 664                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 665                 writel(control, ctrl_reg);
 666
 667         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
 668                 /* disable panel power */
 669
 670                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 671                 writel(control, ctrl_reg);
 672                 sm501fb_sync_regs(fbi);
 673                 mdelay(10);
 674
 675                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 676                 writel(control, ctrl_reg);
 677                 sm501fb_sync_regs(fbi);
 678                 mdelay(10);
 679
 680                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
 681                 writel(control, ctrl_reg);
 682                 sm501fb_sync_regs(fbi);
 683                 mdelay(10);
 684
 685                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
 686                 writel(control, ctrl_reg);
 687                 sm501fb_sync_regs(fbi);
 688                 mdelay(10);
 689         }
 690
 691         sm501fb_sync_regs(fbi);
 692 }
 693
 694 /* sm501fb_set_par_pnl
 695  *
 696  * Set the panel video mode from the fb_info structure
 697 */
 698
 699 static int sm501fb_set_par_pnl(struct fb_info *info)
 700 {
 701         struct sm501fb_par  *par = info->par;
 702         struct sm501fb_info *fbi = par->info;
 703         struct fb_var_screeninfo *var = &info->var;
 704         unsigned long control;
 705         unsigned long reg;
 706         int ret;
 707
 708         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 709
 710         /* activate this new configuration */
 711
 712         ret = sm501fb_set_par_common(info, var);
 713         if (ret)
 714                 return ret;
 715
 716         sm501fb_pan_pnl(var, info);
 717         sm501fb_set_par_geometry(info, var);
 718
 719         /* update control register */
 720
 721         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
 722         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
 723                     SM501_DC_PANEL_CONTROL_VDD  |
 724                     SM501_DC_PANEL_CONTROL_DATA |
 725                     SM501_DC_PANEL_CONTROL_BIAS |
 726                     SM501_DC_PANEL_CONTROL_FPEN |
 727                     SM501_DC_PANEL_CONTROL_CP |
 728                     SM501_DC_PANEL_CONTROL_CK |
 729                     SM501_DC_PANEL_CONTROL_HP |
 730                     SM501_DC_PANEL_CONTROL_VP |
 731                     SM501_DC_PANEL_CONTROL_HPD |
 732                     SM501_DC_PANEL_CONTROL_VPD);
 733
 734         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 735
 736         switch(var->bits_per_pixel) {
 737         case 8:
 738                 control |= SM501_DC_PANEL_CONTROL_8BPP;
 739                 break;
 740
 741         case 16:
 742                 control |= SM501_DC_PANEL_CONTROL_16BPP;
 743                 break;
 744
 745         case 32:
 746                 control |= SM501_DC_PANEL_CONTROL_32BPP;
 747                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 748                 break;
 749
 750         default:
 751                 BUG();
 752         }
 753
 754         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
 755
 756         /* panel plane top left and bottom right location */
 757
 758         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
 759
 760         reg  = var->xres - 1;
 761         reg |= (var->yres - 1) << 16;
 762
 763         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
 764
 765         /* program panel control register */
 766
 767         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
 768         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
 769
 770         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 771                 control |= SM501_DC_PANEL_CONTROL_HSP;
 772
 773         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 774                 control |= SM501_DC_PANEL_CONTROL_VSP;
 775
 776         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
 777         sm501fb_sync_regs(fbi);
 778
 779         /* power the panel up */
 780         sm501fb_panel_power(fbi, 1);
 781         return 0;
 782 }
 783
 784
 785 /* chan_to_field
 786  *
 787  * convert a colour value into a field position
 788  *
 789  * from pxafb.c
 790 */
 791
 792 static inline unsigned int chan_to_field(unsigned int chan,
 793                                          struct fb_bitfield *bf)
 794 {
 795         chan &= 0xffff;
 796         chan >>= 16 - bf->length;
 797         return chan << bf->offset;
 798 }
 799
 800 /* sm501fb_setcolreg
 801  *
 802  * set the colour mapping for modes that support palettised data
 803 */
 804
 805 static int sm501fb_setcolreg(unsigned regno,
 806                              unsigned red, unsigned green, unsigned blue,
 807                              unsigned transp, struct fb_info *info)
 808 {
 809         struct sm501fb_par  *par = info->par;
 810         struct sm501fb_info *fbi = par->info;
 811         void __iomem *base = fbi->regs;
 812         unsigned int val;
 813
 814         if (par->head == HEAD_CRT)
 815                 base += SM501_DC_CRT_PALETTE;
 816         else
 817                 base += SM501_DC_PANEL_PALETTE;
 818
 819         switch (info->fix.visual) {
 820         case FB_VISUAL_TRUECOLOR:
 821                 /* true-colour, use pseuo-palette */
 822
 823                 if (regno < 16) {
 824                         u32 *pal = par->pseudo_palette;
 825
 826                         val  = chan_to_field(red,   &info->var.red);
 827                         val |= chan_to_field(green, &info->var.green);
 828                         val |= chan_to_field(blue,  &info->var.blue);
 829
 830                         pal[regno] = val;
 831                 }
 832                 break;
 833
 834         case FB_VISUAL_PSEUDOCOLOR:
 835                 if (regno < 256) {
 836                         val = (red >> 8) << 16;
 837                         val |= (green >> 8) << 8;
 838                         val |= blue >> 8;
 839
 840                         writel(val, base + (regno * 4));
 841                 }
 842
 843                 break;
 844
 845         default:
 846                 return 1;   /* unknown type */
 847         }
 848
 849         return 0;
 850 }
 851
 852 /* sm501fb_blank_pnl
 853  *
 854  * Blank or un-blank the panel interface
 855 */
 856
 857 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
 858 {
 859         struct sm501fb_par  *par = info->par;
 860         struct sm501fb_info *fbi = par->info;
 861
 862         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 863
 864         switch (blank_mode) {
 865         case FB_BLANK_POWERDOWN:
 866                 sm501fb_panel_power(fbi, 0);
 867                 break;
 868
 869         case FB_BLANK_UNBLANK:
 870                 sm501fb_panel_power(fbi, 1);
 871                 break;
 872
 873         case FB_BLANK_NORMAL:
 874         case FB_BLANK_VSYNC_SUSPEND:
 875         case FB_BLANK_HSYNC_SUSPEND:
 876         default:
 877                 return 1;
 878         }
 879
 880         return 0;
 881 }
 882
 883 /* sm501fb_blank_crt
 884  *
 885  * Blank or un-blank the crt interface
 886 */
 887
 888 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
 889 {
 890         struct sm501fb_par  *par = info->par;
 891         struct sm501fb_info *fbi = par->info;
 892         unsigned long ctrl;
 893
 894         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 895
 896         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 897
 898         switch (blank_mode) {
 899         case FB_BLANK_POWERDOWN:
 900                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
 901                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
 902
 903         case FB_BLANK_NORMAL:
 904                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
 905                 break;
 906
 907         case FB_BLANK_UNBLANK:
 908                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
 909                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
 910                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 911                 break;
 912
 913         case FB_BLANK_VSYNC_SUSPEND:
 914         case FB_BLANK_HSYNC_SUSPEND:
 915         default:
 916                 return 1;
 917
 918         }
 919
 920         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
 921         sm501fb_sync_regs(fbi);
 922
 923         return 0;
 924 }
 925
 926 /* sm501fb_cursor
 927  *
 928  * set or change the hardware cursor parameters
 929 */
 930
 931 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 932 {
 933         struct sm501fb_par  *par = info->par;
 934         struct sm501fb_info *fbi = par->info;
 935         void __iomem *base = fbi->regs;
 936         unsigned long hwc_addr;
 937         unsigned long fg, bg;
 938
 939         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
 940
 941         if (par->head == HEAD_CRT)
 942                 base += SM501_DC_CRT_HWC_BASE;
 943         else
 944                 base += SM501_DC_PANEL_HWC_BASE;
 945
 946         /* check not being asked to exceed capabilities */
 947
 948         if (cursor->image.width > 64)
 949                 return -EINVAL;
 950
 951         if (cursor->image.height > 64)
 952                 return -EINVAL;
 953
 954         if (cursor->image.depth > 1)
 955                 return -EINVAL;
 956
 957         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
 958
 959         if (cursor->enable)
 960                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 961         else
 962                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 963
 964         /* set data */
 965         if (cursor->set & FB_CUR_SETPOS) {
 966                 unsigned int x = cursor->image.dx;
 967                 unsigned int y = cursor->image.dy;
 968
 969                 if (x >= 2048 || y >= 2048 )
 970                         return -EINVAL;
 971
 972                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
 973
 974                 //y += cursor->image.height;
 975
 976                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
 977         }
 978
 979         if (cursor->set & FB_CUR_SETCMAP) {
 980                 unsigned int bg_col = cursor->image.bg_color;
 981                 unsigned int fg_col = cursor->image.fg_color;
 982
 983                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
 984                         __func__, bg_col, fg_col);
 985
 986                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
 987                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
 988                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
 989
 990                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
 991                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
 992                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
 993
 994                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
 995
 996                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
 997                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
 998         }
 999
1000         if (cursor->set & FB_CUR_SETSIZE ||
1001             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1002                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1003                  * clears it to transparent then combines the cursor
1004                  * shape plane with the colour plane to set the
1005                  * cursor */
1006                 int x, y;
1007                 const unsigned char *pcol = cursor->image.data;
1008                 const unsigned char *pmsk = cursor->mask;
1009                 void __iomem   *dst = par->cursor.k_addr;
1010                 unsigned char  dcol = 0;
1011                 unsigned char  dmsk = 0;
1012                 unsigned int   op;
1013
1014                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1015                         __func__, cursor->image.width, cursor->image.height);
1016
1017                 for (op = 0; op < (64*64*2)/8; op+=4)
1018                         writel(0x0, dst + op);
1019
1020                 for (y = 0; y < cursor->image.height; y++) {
1021                         for (x = 0; x < cursor->image.width; x++) {
1022                                 if ((x % 8) == 0) {
1023                                         dcol = *pcol++;
1024                                         dmsk = *pmsk++;
1025                                 } else {
1026                                         dcol >>= 1;
1027                                         dmsk >>= 1;
1028                                 }
1029
1030                                 if (dmsk & 1) {
1031                                         op = (dcol & 1) ? 1 : 3;
1032                                         op <<= ((x % 4) * 2);
1033
1034                                         op |= readb(dst + (x / 4));
1035                                         writeb(op, dst + (x / 4));
1036                                 }
1037                         }
1038                         dst += (64*2)/8;
1039                 }
1040         }
1041
1042         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1043         return 0;
1044 }
1045
1046 /* sm501fb_crtsrc_show
1047  *
1048  * device attribute code to show where the crt output is sourced from
1049 */
1050
1051 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1052                                struct device_attribute *attr, char *buf)
1053 {
1054         struct sm501fb_info *info = dev_get_drvdata(dev);
1055         unsigned long ctrl;
1056
1057         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1058         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1059
1060         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1061 }
1062
1063 /* sm501fb_crtsrc_show
1064  *
1065  * device attribute code to set where the crt output is sourced from
1066 */
1067
1068 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1069                                 struct device_attribute *attr,
1070                                 const char *buf, size_t len)
1071 {
1072         struct sm501fb_info *info = dev_get_drvdata(dev);
1073         enum sm501_controller head;
1074         unsigned long ctrl;
1075
1076         if (len < 1)
1077                 return -EINVAL;
1078
1079         if (strnicmp(buf, "crt", 3) == 0)
1080                 head = HEAD_CRT;
1081         else if (strnicmp(buf, "panel", 5) == 0)
1082                 head = HEAD_PANEL;
1083         else
1084                 return -EINVAL;
1085
1086         dev_info(dev, "setting crt source to head %d\n", head);
1087
1088         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1089
1090         if (head == HEAD_CRT) {
1091                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1092                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1093                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1094         } else {
1095                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1096                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1097                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1098         }
1099
1100         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1101         sm501fb_sync_regs(info);
1102
1103         return len;
1104 }
1105
1106 /* Prepare the device_attr for registration with sysfs later */
1107 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1108
1109 /* sm501fb_show_regs
1110  *
1111  * show the primary sm501 registers
1112 */
1113 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1114                              unsigned int start, unsigned int len)
1115 {
1116         void __iomem *mem = info->regs;
1117         char *buf = ptr;
1118         unsigned int reg;
1119
1120         for (reg = start; reg < (len + start); reg += 4)
1121                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1122
1123         return ptr - buf;
1124 }
1125
1126 /* sm501fb_debug_show_crt
1127  *
1128  * show the crt control and cursor registers
1129 */
1130
1131 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1132                                   struct device_attribute *attr, char *buf)
1133 {
1134         struct sm501fb_info *info = dev_get_drvdata(dev);
1135         char *ptr = buf;
1136
1137         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1138         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1139
1140         return ptr - buf;
1141 }
1142
1143 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1144
1145 /* sm501fb_debug_show_pnl
1146  *
1147  * show the panel control and cursor registers
1148 */
1149
1150 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1151                                   struct device_attribute *attr, char *buf)
1152 {
1153         struct sm501fb_info *info = dev_get_drvdata(dev);
1154         char *ptr = buf;
1155
1156         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1157         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1158
1159         return ptr - buf;
1160 }
1161
1162 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1163
1164 /* framebuffer ops */
1165
1166 static struct fb_ops sm501fb_ops_crt = {
1167         .owner          = THIS_MODULE,
1168         .fb_check_var   = sm501fb_check_var_crt,
1169         .fb_set_par     = sm501fb_set_par_crt,
1170         .fb_blank       = sm501fb_blank_crt,
1171         .fb_setcolreg   = sm501fb_setcolreg,
1172         .fb_pan_display = sm501fb_pan_crt,
1173         .fb_cursor      = sm501fb_cursor,
1174         .fb_fillrect    = cfb_fillrect,
1175         .fb_copyarea    = cfb_copyarea,
1176         .fb_imageblit   = cfb_imageblit,
1177 };
1178
1179 static struct fb_ops sm501fb_ops_pnl = {
1180         .owner          = THIS_MODULE,
1181         .fb_check_var   = sm501fb_check_var_pnl,
1182         .fb_set_par     = sm501fb_set_par_pnl,
1183         .fb_pan_display = sm501fb_pan_pnl,
1184         .fb_blank       = sm501fb_blank_pnl,
1185         .fb_setcolreg   = sm501fb_setcolreg,
1186         .fb_cursor      = sm501fb_cursor,
1187         .fb_fillrect    = cfb_fillrect,
1188         .fb_copyarea    = cfb_copyarea,
1189         .fb_imageblit   = cfb_imageblit,
1190 };
1191
1192 /* sm501fb_info_alloc
1193  *
1194  * creates and initialises an sm501fb_info structure
1195 */
1196
1197 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1198                                                struct fb_info *fbinfo_pnl)
1199 {
1200         struct sm501fb_info *info;
1201         struct sm501fb_par  *par;
1202
1203         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1204         if (info) {
1205                 /* set the references back */
1206
1207                 par = fbinfo_crt->par;
1208                 par->info = info;
1209                 par->head = HEAD_CRT;
1210                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1211
1212                 par = fbinfo_pnl->par;
1213                 par->info = info;
1214                 par->head = HEAD_PANEL;
1215                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1216
1217                 /* store the two fbs into our info */
1218                 info->fb[HEAD_CRT] = fbinfo_crt;
1219                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1220         }
1221
1222         return info;
1223 }
1224
1225 /* sm501_init_cursor
1226  *
1227  * initialise hw cursor parameters
1228 */
1229
1230 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1231 {
1232         struct sm501fb_par *par = fbi->par;
1233         struct sm501fb_info *info = par->info;
1234         int ret;
1235
1236         par->cursor_regs = info->regs + reg_base;
1237
1238         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1239         if (ret < 0)
1240                 return ret;
1241
1242         /* initialise the colour registers */
1243
1244         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1245
1246         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1247         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1248         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1249         sm501fb_sync_regs(info);
1250
1251         return 0;
1252 }
1253
1254 /* sm501fb_info_start
1255  *
1256  * fills the par structure claiming resources and remapping etc.
1257 */
1258
1259 static int sm501fb_start(struct sm501fb_info *info,
1260                          struct platform_device *pdev)
1261 {
1262         struct resource *res;
1263         struct device *dev;
1264         int ret;
1265
1266         info->dev = dev = &pdev->dev;
1267         platform_set_drvdata(pdev, info);
1268
1269         info->irq = ret = platform_get_irq(pdev, 0);
1270         if (ret < 0) {
1271                 /* we currently do not use the IRQ */
1272                 dev_warn(dev, "no irq for device\n");
1273         }
1274
1275         /* allocate, reserve and remap resources for registers */
1276         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1277         if (res == NULL) {
1278                 dev_err(dev, "no resource definition for registers\n");
1279                 ret = -ENOENT;
1280                 goto err_release;
1281         }
1282
1283         info->regs_res = request_mem_region(res->start,
1284                                             res->end - res->start,
1285                                             pdev->name);
1286
1287         if (info->regs_res == NULL) {
1288                 dev_err(dev, "cannot claim registers\n");
1289                 ret = -ENXIO;
1290                 goto err_release;
1291         }
1292
1293         info->regs = ioremap(res->start, (res->end - res->start)+1);
1294         if (info->regs == NULL) {
1295                 dev_err(dev, "cannot remap registers\n");
1296                 ret = -ENXIO;
1297                 goto err_regs_res;
1298         }
1299
1300         /* allocate, reserve resources for framebuffer */
1301         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1302         if (res == NULL) {
1303                 dev_err(dev, "no memory resource defined\n");
1304                 ret = -ENXIO;
1305                 goto err_regs_map;
1306         }
1307
1308         info->fbmem_res = request_mem_region(res->start,
1309                                              (res->end - res->start)+1,
1310                                              pdev->name);
1311         if (info->fbmem_res == NULL) {
1312                 dev_err(dev, "cannot claim framebuffer\n");
1313                 ret = -ENXIO;
1314                 goto err_regs_map;
1315         }
1316
1317         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1318         if (info->fbmem == NULL) {
1319                 dev_err(dev, "cannot remap framebuffer\n");
1320                 goto err_mem_res;
1321         }
1322
1323         info->fbmem_len = (res->end - res->start)+1;
1324
1325         /* enable display controller */
1326         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1327
1328         /* setup cursors */
1329
1330         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1331         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1332
1333         return 0; /* everything is setup */
1334
1335  err_mem_res:
1336         release_resource(info->fbmem_res);
1337         kfree(info->fbmem_res);
1338
1339  err_regs_map:
1340         iounmap(info->regs);
1341
1342  err_regs_res:
1343         release_resource(info->regs_res);
1344         kfree(info->regs_res);
1345
1346  err_release:
1347         return ret;
1348 }
1349
1350 static void sm501fb_stop(struct sm501fb_info *info)
1351 {
1352         /* disable display controller */
1353         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1354
1355         iounmap(info->fbmem);
1356         release_resource(info->fbmem_res);
1357         kfree(info->fbmem_res);
1358
1359         iounmap(info->regs);
1360         release_resource(info->regs_res);
1361         kfree(info->regs_res);
1362 }
1363
1364 static void sm501fb_info_release(struct sm501fb_info *info)
1365 {
1366         kfree(info);
1367 }
1368
1369 static int sm501fb_init_fb(struct fb_info *fb,
1370                            enum sm501_controller head,
1371                            const char *fbname)
1372 {
1373         struct sm501_platdata_fbsub *pd;
1374         struct sm501fb_par *par = fb->par;
1375         struct sm501fb_info *info = par->info;
1376         unsigned long ctrl;
1377         unsigned int enable;
1378         int ret;
1379
1380         switch (head) {
1381         case HEAD_CRT:
1382                 pd = info->pdata->fb_crt;
1383                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1384                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1385
1386                 /* ensure we set the correct source register */
1387                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1388                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1389                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1390                 }
1391
1392                 break;
1393
1394         case HEAD_PANEL:
1395                 pd = info->pdata->fb_pnl;
1396                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1397                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1398                 break;
1399
1400         default:
1401                 pd = NULL;              /* stop compiler warnings */
1402                 ctrl = 0;
1403                 enable = 0;
1404                 BUG();
1405         }
1406
1407         dev_info(info->dev, "fb %s %sabled at start\n",
1408                  fbname, enable ? "en" : "dis");
1409
1410         /* check to see if our routing allows this */
1411
1412         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1413                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1414                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1415                 enable = 0;
1416         }
1417
1418         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1419
1420         memcpy(&par->ops,
1421                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1422                sizeof(struct fb_ops));
1423
1424         /* update ops dependant on what we've been passed */
1425
1426         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1427                 par->ops.fb_cursor = NULL;
1428
1429         fb->fbops = &par->ops;
1430         fb->flags = FBINFO_FLAG_DEFAULT |
1431                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1432
1433         /* fixed data */
1434
1435         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1436         fb->fix.type_aux        = 0;
1437         fb->fix.xpanstep        = 1;
1438         fb->fix.ypanstep        = 1;
1439         fb->fix.ywrapstep       = 0;
1440         fb->fix.accel           = FB_ACCEL_NONE;
1441
1442         /* screenmode */
1443
1444         fb->var.nonstd          = 0;
1445         fb->var.activate        = FB_ACTIVATE_NOW;
1446         fb->var.accel_flags     = 0;
1447         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1448         fb->var.bits_per_pixel  = 16;
1449
1450         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1451                 /* TODO read the mode from the current display */
1452
1453         } else {
1454                 if (pd->def_mode) {
1455                         dev_info(info->dev, "using supplied mode\n");
1456                         fb_videomode_to_var(&fb->var, pd->def_mode);
1457
1458                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1459                         fb->var.xres_virtual = fb->var.xres;
1460                         fb->var.yres_virtual = fb->var.yres;
1461                 } else {
1462                         ret = fb_find_mode(&fb->var, fb,
1463                                            NULL, NULL, 0, NULL, 8);
1464
1465                         if (ret == 0 || ret == 4) {
1466                                 dev_err(info->dev,
1467                                         "failed to get initial mode\n");
1468                                 return -EINVAL;
1469                         }
1470                 }
1471         }
1472
1473         /* initialise and set the palette */
1474         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1475         fb_set_cmap(&fb->cmap, fb);
1476
1477         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1478         if (ret)
1479                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1480
1481         /* ensure we've activated our new configuration */
1482         (fb->fbops->fb_set_par)(fb);
1483
1484         return 0;
1485 }
1486
1487 /* default platform data if none is supplied (ie, PCI device) */
1488
1489 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1490         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1491                            SM501FB_FLAG_USE_HWCURSOR |
1492                            SM501FB_FLAG_USE_HWACCEL |
1493                            SM501FB_FLAG_DISABLE_AT_EXIT),
1494
1495 };
1496
1497 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1498         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1499                            SM501FB_FLAG_USE_HWCURSOR |
1500                            SM501FB_FLAG_USE_HWACCEL |
1501                            SM501FB_FLAG_DISABLE_AT_EXIT),
1502 };
1503
1504 static struct sm501_platdata_fb sm501fb_def_pdata = {
1505         .fb_route               = SM501_FB_OWN,
1506         .fb_crt                 = &sm501fb_pdata_crt,
1507         .fb_pnl                 = &sm501fb_pdata_pnl,
1508 };
1509
1510 static char driver_name_crt[] = "sm501fb-crt";
1511 static char driver_name_pnl[] = "sm501fb-panel";
1512
1513 static int __init sm501fb_probe(struct platform_device *pdev)
1514 {
1515         struct sm501fb_info *info;
1516         struct device       *dev = &pdev->dev;
1517         struct fb_info      *fbinfo_crt;
1518         struct fb_info      *fbinfo_pnl;
1519         int                  ret;
1520
1521         /* allocate our framebuffers */
1522
1523         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1524         if (fbinfo_crt == NULL) {
1525                 dev_err(dev, "cannot allocate crt framebuffer\n");
1526                 return -ENOMEM;
1527         }
1528
1529         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1530         if (fbinfo_pnl == NULL) {
1531                 dev_err(dev, "cannot allocate panel framebuffer\n");
1532                 ret = -ENOMEM;
1533                 goto fbinfo_crt_alloc_fail;
1534         }
1535
1536         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1537         if (info == NULL) {
1538                 dev_err(dev, "cannot allocate par\n");
1539                 ret = -ENOMEM;
1540                 goto sm501fb_alloc_fail;
1541         }
1542
1543         if (dev->parent->platform_data) {
1544                 struct sm501_platdata *pd = dev->parent->platform_data;
1545                 info->pdata = pd->fb;
1546         }
1547
1548         if (info->pdata == NULL) {
1549                 dev_info(dev, "using default configuration data\n");
1550                 info->pdata = &sm501fb_def_pdata;
1551         }
1552
1553         /* start the framebuffers */
1554
1555         ret = sm501fb_start(info, pdev);
1556         if (ret) {
1557                 dev_err(dev, "cannot initialise SM501\n");
1558                 goto sm501fb_start_fail;
1559         }
1560
1561         /* CRT framebuffer setup */
1562
1563         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1564         if (ret) {
1565                 dev_err(dev, "cannot initialise CRT fb\n");
1566                 goto sm501fb_start_fail;
1567         }
1568
1569         /* Panel framebuffer setup */
1570
1571         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1572         if (ret) {
1573                 dev_err(dev, "cannot initialise Panel fb\n");
1574                 goto sm501fb_start_fail;
1575         }
1576
1577         /* register framebuffers */
1578
1579         ret = register_framebuffer(fbinfo_crt);
1580         if (ret < 0) {
1581                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1582                 goto register_crt_fail;
1583         }
1584
1585         ret = register_framebuffer(fbinfo_pnl);
1586         if (ret < 0) {
1587                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1588                 goto register_pnl_fail;
1589         }
1590
1591         dev_info(dev, "fb%d: %s frame buffer device\n",
1592                  fbinfo_crt->node, fbinfo_crt->fix.id);
1593
1594         dev_info(dev, "fb%d: %s frame buffer device\n",
1595                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1596
1597         /* create device files */
1598
1599         ret = device_create_file(dev, &dev_attr_crt_src);
1600         if (ret)
1601                 goto crtsrc_fail;
1602
1603         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1604         if (ret)
1605                 goto fbregs_pnl_fail;
1606
1607         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1608         if (ret)
1609                 goto fbregs_crt_fail;
1610
1611         /* we registered, return ok */
1612         return 0;
1613
1614  fbregs_crt_fail:
1615         device_remove_file(dev, &dev_attr_fbregs_pnl);
1616
1617  fbregs_pnl_fail:
1618         device_remove_file(dev, &dev_attr_crt_src);
1619
1620  crtsrc_fail:
1621         unregister_framebuffer(fbinfo_pnl);
1622
1623  register_pnl_fail:
1624         unregister_framebuffer(fbinfo_crt);
1625
1626  register_crt_fail:
1627         sm501fb_stop(info);
1628
1629  sm501fb_start_fail:
1630         sm501fb_info_release(info);
1631
1632  sm501fb_alloc_fail:
1633         framebuffer_release(fbinfo_pnl);
1634
1635  fbinfo_crt_alloc_fail:
1636         framebuffer_release(fbinfo_crt);
1637
1638         return ret;
1639 }
1640
1641
1642 /*
1643  *  Cleanup
1644  */
1645 static int sm501fb_remove(struct platform_device *pdev)
1646 {
1647         struct sm501fb_info *info = platform_get_drvdata(pdev);
1648         struct fb_info     *fbinfo_crt = info->fb[0];
1649         struct fb_info     *fbinfo_pnl = info->fb[1];
1650
1651         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1652         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1653         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1654
1655         unregister_framebuffer(fbinfo_crt);
1656         unregister_framebuffer(fbinfo_pnl);
1657
1658         sm501fb_stop(info);
1659         sm501fb_info_release(info);
1660
1661         framebuffer_release(fbinfo_pnl);
1662         framebuffer_release(fbinfo_crt);
1663
1664         return 0;
1665 }
1666
1667 #ifdef CONFIG_PM
1668
1669 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1670                               enum sm501_controller head)
1671 {
1672         struct fb_info *fbi = info->fb[head];
1673         struct sm501fb_par *par = fbi->par;
1674
1675         if (par->screen.size == 0)
1676                 return 0;
1677
1678         /* backup copies in case chip is powered down over suspend */
1679
1680         par->store_fb = vmalloc(par->screen.size);
1681         if (par->store_fb == NULL) {
1682                 dev_err(info->dev, "no memory to store screen\n");
1683                 return -ENOMEM;
1684         }
1685
1686         par->store_cursor = vmalloc(par->cursor.size);
1687         if (par->store_cursor == NULL) {
1688                 dev_err(info->dev, "no memory to store cursor\n");
1689                 goto err_nocursor;
1690         }
1691
1692         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1693         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1694
1695         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1696         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1697         /* blank the relevant interface to ensure unit power minimised */
1698         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1699
1700         return 0;
1701
1702  err_nocursor:
1703         vfree(par->store_fb);
1704         par->store_fb = NULL;
1705
1706         return -ENOMEM;
1707 }
1708
1709 static void sm501fb_resume_fb(struct sm501fb_info *info,
1710                               enum sm501_controller head)
1711 {
1712         struct fb_info *fbi = info->fb[head];
1713         struct sm501fb_par *par = fbi->par;
1714
1715         if (par->screen.size == 0)
1716                 return;
1717
1718         /* re-activate the configuration */
1719
1720         (par->ops.fb_set_par)(fbi);
1721
1722         /* restore the data */
1723
1724         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1725         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1726
1727         if (par->store_fb)
1728                 memcpy_toio(par->screen.k_addr, par->store_fb,
1729                             par->screen.size);
1730
1731         if (par->store_cursor)
1732                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1733                             par->cursor.size);
1734
1735         vfree(par->store_fb);
1736         vfree(par->store_cursor);
1737 }
1738
1739
1740 /* suspend and resume support */
1741
1742 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1743 {
1744         struct sm501fb_info *info = platform_get_drvdata(pdev);
1745
1746         /* store crt control to resume with */
1747         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1748
1749         sm501fb_suspend_fb(info, HEAD_CRT);
1750         sm501fb_suspend_fb(info, HEAD_PANEL);
1751
1752         /* turn off the clocks, in case the device is not powered down */
1753         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1754
1755         return 0;
1756 }
1757
1758 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1759                              SM501_DC_CRT_CONTROL_SEL)
1760
1761
1762 static int sm501fb_resume(struct platform_device *pdev)
1763 {
1764         struct sm501fb_info *info = platform_get_drvdata(pdev);
1765         unsigned long crt_ctrl;
1766
1767         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1768
1769         /* restore the items we want to be saved for crt control */
1770
1771         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1772         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1773         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1774         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1775
1776         sm501fb_resume_fb(info, HEAD_CRT);
1777         sm501fb_resume_fb(info, HEAD_PANEL);
1778
1779         return 0;
1780 }
1781
1782 #else
1783 #define sm501fb_suspend NULL
1784 #define sm501fb_resume  NULL
1785 #endif
1786
1787 static struct platform_driver sm501fb_driver = {
1788         .probe          = sm501fb_probe,
1789         .remove         = sm501fb_remove,
1790         .suspend        = sm501fb_suspend,
1791         .resume         = sm501fb_resume,
1792         .driver         = {
1793                 .name   = "sm501-fb",
1794                 .owner  = THIS_MODULE,
1795         },
1796 };
1797
1798 static int __devinit sm501fb_init(void)
1799 {
1800         return platform_driver_register(&sm501fb_driver);
1801 }
1802
1803 static void __exit sm501fb_cleanup(void)
1804 {
1805         platform_driver_unregister(&sm501fb_driver);
1806 }
1807
1808 module_init(sm501fb_init);
1809 module_exit(sm501fb_cleanup);
1810
1811 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1812 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1813 MODULE_LICENSE("GPL v2");