2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
4 * (c) Copyright 2004 Google Inc.
5 * (c) Copyright 2005 David Härdeman <david@2gen.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * based on i810-tco.c which is in turn based on softdog.c
14 * The timer is implemented in the following I/O controller hubs:
15 * (See the intel documentation on http://developer.intel.com.)
16 * 6300ESB chip : document number 300641-003
19 * Initial version 0.01
22 * 20050210 David Härdeman <david@2gen.com>
23 * Ported driver to kernel 2.6
27 * Includes, defines, variables, module parameters, ...
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/reboot.h>
38 #include <linux/init.h>
39 #include <linux/pci.h>
40 #include <linux/ioport.h>
41 #include <linux/uaccess.h>
44 /* Module and version information */
45 #define ESB_VERSION "0.03"
46 #define ESB_MODULE_NAME "i6300ESB timer"
47 #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
48 #define PFX ESB_MODULE_NAME ": "
50 /* PCI configuration registers */
51 #define ESB_CONFIG_REG 0x60 /* Config register */
52 #define ESB_LOCK_REG 0x68 /* WDT lock register */
54 /* Memory mapped registers */
55 #define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
56 #define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
57 #define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
58 #define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
60 /* Lock register bits */
61 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
62 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
63 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
65 /* Config register bits */
66 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
67 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
68 #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */
70 /* Reload register bits */
71 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
74 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
75 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
77 /* internal variables */
78 static void __iomem *BASEADDR;
79 static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
80 static unsigned long timer_alive;
81 static struct pci_dev *esb_pci;
82 static unsigned short triggered; /* The status of the watchdog upon boot */
83 static char esb_expect_close;
85 /* module parameters */
86 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
87 #define WATCHDOG_HEARTBEAT 30
88 static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
90 module_param(heartbeat, int, 0);
91 MODULE_PARM_DESC(heartbeat,
92 "Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
93 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
95 static int nowayout = WATCHDOG_NOWAYOUT;
96 module_param(nowayout, int, 0);
97 MODULE_PARM_DESC(nowayout,
98 "Watchdog cannot be stopped once started (default="
99 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
102 * Some i6300ESB specific functions
106 * Prepare for reloading the timer by unlocking the proper registers.
107 * This is performed by first writing 0x80 followed by 0x86 to the
108 * reload register. After this the appropriate registers can be written
109 * to once before they need to be unlocked again.
111 static inline void esb_unlock_registers(void)
113 writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
114 writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
117 static void esb_timer_start(void)
121 /* Enable or Enable + Lock? */
122 val = 0x02 | (nowayout ? 0x01 : 0x00);
123 pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
126 static int esb_timer_stop(void)
130 spin_lock(&esb_lock);
131 /* First, reset timers as suggested by the docs */
132 esb_unlock_registers();
133 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
134 /* Then disable the WDT */
135 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
136 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
137 spin_unlock(&esb_lock);
139 /* Returns 0 if the timer was disabled, non-zero otherwise */
143 static void esb_timer_keepalive(void)
145 spin_lock(&esb_lock);
146 esb_unlock_registers();
147 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
148 /* FIXME: Do we need to flush anything here? */
149 spin_unlock(&esb_lock);
152 static int esb_timer_set_heartbeat(int time)
156 if (time < 0x1 || time > (2 * 0x03ff))
159 spin_lock(&esb_lock);
161 /* We shift by 9, so if we are passed a value of 1 sec,
162 * val will be 1 << 9 = 512, then write that to two
163 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
168 esb_unlock_registers();
169 writel(val, ESB_TIMER1_REG);
172 esb_unlock_registers();
173 writel(val, ESB_TIMER2_REG);
176 esb_unlock_registers();
177 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
179 /* FIXME: Do we need to flush everything out? */
183 spin_unlock(&esb_lock);
187 static int esb_timer_read(void)
191 /* This isn't documented, and doesn't take into
192 * acount which stage is running, but it looks
193 * like a 20 bit count down, so we might as well report it.
195 pci_read_config_dword(esb_pci, 0x64, &count);
200 * /dev/watchdog handling
203 static int esb_open(struct inode *inode, struct file *file)
205 /* /dev/watchdog can only be opened once */
206 if (test_and_set_bit(0, &timer_alive))
209 /* Reload and activate timer */
210 esb_timer_keepalive();
213 return nonseekable_open(inode, file);
216 static int esb_release(struct inode *inode, struct file *file)
218 /* Shut off the timer. */
219 if (esb_expect_close == 42)
223 "Unexpected close, not stopping watchdog!\n");
224 esb_timer_keepalive();
226 clear_bit(0, &timer_alive);
227 esb_expect_close = 0;
231 static ssize_t esb_write(struct file *file, const char __user *data,
232 size_t len, loff_t *ppos)
234 /* See if we got the magic character 'V' and reload the timer */
239 /* note: just in case someone wrote the magic character
240 * five months ago... */
241 esb_expect_close = 0;
243 /* scan to see whether or not we got the
245 for (i = 0; i != len; i++) {
247 if (get_user(c, data + i))
250 esb_expect_close = 42;
254 /* someone wrote to us, we should reload the timer */
255 esb_timer_keepalive();
260 static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
262 int new_options, retval = -EINVAL;
264 void __user *argp = (void __user *)arg;
265 int __user *p = argp;
266 static struct watchdog_info ident = {
267 .options = WDIOF_SETTIMEOUT |
268 WDIOF_KEEPALIVEPING |
270 .firmware_version = 0,
271 .identity = ESB_MODULE_NAME,
275 case WDIOC_GETSUPPORT:
276 return copy_to_user(argp, &ident,
277 sizeof(ident)) ? -EFAULT : 0;
279 case WDIOC_GETSTATUS:
280 return put_user(esb_timer_read(), p);
282 case WDIOC_GETBOOTSTATUS:
283 return put_user(triggered, p);
285 case WDIOC_SETOPTIONS:
287 if (get_user(new_options, p))
290 if (new_options & WDIOS_DISABLECARD) {
295 if (new_options & WDIOS_ENABLECARD) {
296 esb_timer_keepalive();
302 case WDIOC_KEEPALIVE:
303 esb_timer_keepalive();
306 case WDIOC_SETTIMEOUT:
308 if (get_user(new_heartbeat, p))
310 if (esb_timer_set_heartbeat(new_heartbeat))
312 esb_timer_keepalive();
315 case WDIOC_GETTIMEOUT:
316 return put_user(heartbeat, p);
326 static int esb_notify_sys(struct notifier_block *this,
327 unsigned long code, void *unused)
329 if (code == SYS_DOWN || code == SYS_HALT)
330 esb_timer_stop(); /* Turn the WDT off */
339 static const struct file_operations esb_fops = {
340 .owner = THIS_MODULE,
343 .unlocked_ioctl = esb_ioctl,
345 .release = esb_release,
348 static struct miscdevice esb_miscdev = {
349 .minor = WATCHDOG_MINOR,
354 static struct notifier_block esb_notifier = {
355 .notifier_call = esb_notify_sys,
359 * Data for PCI driver interface
361 * This data only exists for exporting the supported
362 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
363 * register a pci_driver, because someone else might one day
364 * want to register another driver on the same PCI id.
366 static struct pci_device_id esb_pci_tbl[] = {
367 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
368 { 0, }, /* End of list */
370 MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
373 * Init & exit routines
376 static unsigned char __init esb_getdevice(void)
381 * Find the PCI device
384 esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
385 PCI_DEVICE_ID_INTEL_ESB_9, NULL);
388 if (pci_enable_device(esb_pci)) {
389 printk(KERN_ERR PFX "failed to enable device\n");
393 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
394 printk(KERN_ERR PFX "failed to request region\n");
398 BASEADDR = pci_ioremap_bar(esb_pci, 0);
399 if (BASEADDR == NULL) {
400 /* Something's wrong here, BASEADDR has to be set */
401 printk(KERN_ERR PFX "failed to get BASEADDR\n");
406 * The watchdog has two timers, it can be setup so that the
407 * expiry of timer1 results in an interrupt and the expiry of
408 * timer2 results in a reboot. We set it to not generate
409 * any interrupts as there is not much we can do with it
412 * We also enable reboots and set the timer frequency to
413 * the PCI clock divided by 2^15 (approx 1KHz).
415 pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
417 /* Check that the WDT isn't already locked */
418 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
419 if (val1 & ESB_WDT_LOCK)
420 printk(KERN_WARNING PFX "nowayout already set\n");
422 /* Set the timer to watchdog mode and disable it for now */
423 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
425 /* Check if the watchdog was previously triggered */
426 esb_unlock_registers();
427 val2 = readw(ESB_RELOAD_REG);
428 triggered = (val2 & (0x01 << 9) >> 9);
430 /* Reset trigger flag and timers */
431 esb_unlock_registers();
432 writew((0x11 << 8), ESB_RELOAD_REG);
438 pci_release_region(esb_pci, 0);
440 pci_disable_device(esb_pci);
442 pci_dev_put(esb_pci);
447 static int __init watchdog_init(void)
451 /* Check whether or not the hardware watchdog is there */
452 if (!esb_getdevice() || esb_pci == NULL)
455 /* Check that the heartbeat value is within it's range;
456 if not reset to the default */
457 if (esb_timer_set_heartbeat(heartbeat)) {
458 esb_timer_set_heartbeat(WATCHDOG_HEARTBEAT);
460 "heartbeat value must be 1<heartbeat<2046, using %d\n",
463 ret = register_reboot_notifier(&esb_notifier);
466 "cannot register reboot notifier (err=%d)\n", ret);
470 ret = misc_register(&esb_miscdev);
473 "cannot register miscdev on minor=%d (err=%d)\n",
474 WATCHDOG_MINOR, ret);
479 "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
480 BASEADDR, heartbeat, nowayout);
484 unregister_reboot_notifier(&esb_notifier);
488 pci_release_region(esb_pci, 0);
490 pci_disable_device(esb_pci);
492 pci_dev_put(esb_pci);
496 static void __exit watchdog_cleanup(void)
498 /* Stop the timer before we leave */
503 misc_deregister(&esb_miscdev);
504 unregister_reboot_notifier(&esb_notifier);
506 pci_release_region(esb_pci, 0);
507 pci_disable_device(esb_pci);
508 pci_dev_put(esb_pci);
511 module_init(watchdog_init);
512 module_exit(watchdog_cleanup);
514 MODULE_AUTHOR("Ross Biro and David Härdeman");
515 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
516 MODULE_LICENSE("GPL");
517 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);