2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
20 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/kernel.h>
24 #include <linux/math64.h>
25 #include <linux/miscdevice.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
29 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/types.h>
32 #include <linux/uaccess.h>
33 #include <linux/watchdog.h>
35 /* default timeout in seconds */
36 #define DEFAULT_TIMEOUT 60
38 #define MODULE_NAME "sp805-wdt"
40 /* watchdog register offsets and masks */
42 #define LOAD_MIN 0x00000001
43 #define LOAD_MAX 0xFFFFFFFF
44 #define WDTVALUE 0x004
45 #define WDTCONTROL 0x008
46 /* control register masks */
47 #define INT_ENABLE (1 << 0)
48 #define RESET_ENABLE (1 << 1)
49 #define WDTINTCLR 0x00C
52 #define INT_MASK (1 << 0)
54 #define UNLOCK 0x1ACCE551
55 #define LOCK 0x00000001
58 * struct sp805_wdt: sp805 wdt device structure
60 * lock: spin lock protecting dev structure and io access
61 * base: base address of wdt
62 * clk: clock structure of wdt
63 * dev: amba device structure of wdt
64 * status: current status of wdt
65 * load_val: load value to be set for current timeout
66 * timeout: current programmed timeout
72 struct amba_device *adev;
75 #define WDT_CAN_BE_CLOSED 1
76 unsigned int load_val;
81 static struct sp805_wdt *wdt;
82 static bool nowayout = WATCHDOG_NOWAYOUT;
84 /* This routine finds load value that will reset system in required timout */
85 static void wdt_setload(unsigned int timeout)
89 rate = clk_get_rate(wdt->clk);
92 * sp805 runs counter with given value twice, after the end of first
93 * counter it gives an interrupt and then starts counter again. If
94 * interrupt already occurred then it resets the system. This is why
95 * load is half of what should be required.
97 load = div_u64(rate, 2) * timeout - 1;
99 load = (load > LOAD_MAX) ? LOAD_MAX : load;
100 load = (load < LOAD_MIN) ? LOAD_MIN : load;
102 spin_lock(&wdt->lock);
103 wdt->load_val = load;
104 /* roundup timeout to closest positive integer value */
105 wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
106 spin_unlock(&wdt->lock);
109 /* returns number of seconds left for reset to occur */
110 static u32 wdt_timeleft(void)
114 rate = clk_get_rate(wdt->clk);
116 spin_lock(&wdt->lock);
117 load = readl(wdt->base + WDTVALUE);
119 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
120 if (!(readl(wdt->base + WDTRIS) & INT_MASK))
121 load += wdt->load_val + 1;
122 spin_unlock(&wdt->lock);
124 return div_u64(load, rate);
127 /* enables watchdog timers reset */
128 static void wdt_enable(void)
130 spin_lock(&wdt->lock);
132 writel(UNLOCK, wdt->base + WDTLOCK);
133 writel(wdt->load_val, wdt->base + WDTLOAD);
134 writel(INT_MASK, wdt->base + WDTINTCLR);
135 writel(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
136 writel(LOCK, wdt->base + WDTLOCK);
138 /* Flush posted writes. */
139 readl(wdt->base + WDTLOCK);
140 spin_unlock(&wdt->lock);
143 /* disables watchdog timers reset */
144 static void wdt_disable(void)
146 spin_lock(&wdt->lock);
148 writel(UNLOCK, wdt->base + WDTLOCK);
149 writel(0, wdt->base + WDTCONTROL);
150 writel(LOCK, wdt->base + WDTLOCK);
152 /* Flush posted writes. */
153 readl(wdt->base + WDTLOCK);
154 spin_unlock(&wdt->lock);
157 static ssize_t sp805_wdt_write(struct file *file, const char *data,
158 size_t len, loff_t *ppos)
164 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
166 for (i = 0; i != len; i++) {
169 if (get_user(c, data + i))
171 /* Check for Magic Close character */
173 set_bit(WDT_CAN_BE_CLOSED,
184 static const struct watchdog_info ident = {
185 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
186 .identity = MODULE_NAME,
189 static long sp805_wdt_ioctl(struct file *file, unsigned int cmd,
193 unsigned int timeout;
196 case WDIOC_GETSUPPORT:
197 ret = copy_to_user((struct watchdog_info *)arg, &ident,
198 sizeof(ident)) ? -EFAULT : 0;
201 case WDIOC_GETSTATUS:
202 ret = put_user(0, (int *)arg);
205 case WDIOC_KEEPALIVE:
210 case WDIOC_SETTIMEOUT:
211 ret = get_user(timeout, (unsigned int *)arg);
215 wdt_setload(timeout);
220 case WDIOC_GETTIMEOUT:
221 ret = put_user(wdt->timeout, (unsigned int *)arg);
223 case WDIOC_GETTIMELEFT:
224 ret = put_user(wdt_timeleft(), (unsigned int *)arg);
230 static int sp805_wdt_open(struct inode *inode, struct file *file)
234 if (test_and_set_bit(WDT_BUSY, &wdt->status))
237 ret = clk_enable(wdt->clk);
239 dev_err(&wdt->adev->dev, "clock enable fail");
245 /* can not be closed, once enabled */
246 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
247 return nonseekable_open(inode, file);
250 clear_bit(WDT_BUSY, &wdt->status);
254 static int sp805_wdt_release(struct inode *inode, struct file *file)
256 if (!test_bit(WDT_CAN_BE_CLOSED, &wdt->status)) {
257 clear_bit(WDT_BUSY, &wdt->status);
258 dev_warn(&wdt->adev->dev, "Device closed unexpectedly\n");
263 clk_disable(wdt->clk);
264 clear_bit(WDT_BUSY, &wdt->status);
269 static const struct file_operations sp805_wdt_fops = {
270 .owner = THIS_MODULE,
272 .write = sp805_wdt_write,
273 .unlocked_ioctl = sp805_wdt_ioctl,
274 .open = sp805_wdt_open,
275 .release = sp805_wdt_release,
278 static struct miscdevice sp805_wdt_miscdev = {
279 .minor = WATCHDOG_MINOR,
281 .fops = &sp805_wdt_fops,
285 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
289 if (!request_mem_region(adev->res.start, resource_size(&adev->res),
291 dev_warn(&adev->dev, "Failed to get memory region resource\n");
296 wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
298 dev_warn(&adev->dev, "Kzalloc failed\n");
303 wdt->clk = clk_get(&adev->dev, NULL);
304 if (IS_ERR(wdt->clk)) {
305 dev_warn(&adev->dev, "Clock not found\n");
306 ret = PTR_ERR(wdt->clk);
310 wdt->base = ioremap(adev->res.start, resource_size(&adev->res));
313 dev_warn(&adev->dev, "ioremap fail\n");
318 spin_lock_init(&wdt->lock);
319 wdt_setload(DEFAULT_TIMEOUT);
321 ret = misc_register(&sp805_wdt_miscdev);
323 dev_warn(&adev->dev, "cannot register misc device\n");
324 goto err_misc_register;
327 dev_info(&adev->dev, "registration successful\n");
338 release_mem_region(adev->res.start, resource_size(&adev->res));
340 dev_err(&adev->dev, "Probe Failed!!!\n");
344 static int __devexit sp805_wdt_remove(struct amba_device *adev)
346 misc_deregister(&sp805_wdt_miscdev);
350 release_mem_region(adev->res.start, resource_size(&adev->res));
356 static int sp805_wdt_suspend(struct device *dev)
358 if (test_bit(WDT_BUSY, &wdt->status)) {
360 clk_disable(wdt->clk);
366 static int sp805_wdt_resume(struct device *dev)
370 if (test_bit(WDT_BUSY, &wdt->status)) {
371 ret = clk_enable(wdt->clk);
373 dev_err(dev, "clock enable fail");
381 #endif /* CONFIG_PM */
383 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
386 static struct amba_id sp805_wdt_ids[] = {
394 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
396 static struct amba_driver sp805_wdt_driver = {
399 .pm = &sp805_wdt_dev_pm_ops,
401 .id_table = sp805_wdt_ids,
402 .probe = sp805_wdt_probe,
403 .remove = __devexit_p(sp805_wdt_remove),
406 module_amba_driver(sp805_wdt_driver);
408 module_param(nowayout, bool, 0);
409 MODULE_PARM_DESC(nowayout,
410 "Set to 1 to keep watchdog running after device release");
412 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
413 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
414 MODULE_LICENSE("GPL");
415 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);