include/linux/mfd/max77686-private.h

   1 /*
   2  * max77686.h - Voltage regulator driver for the Maxim 77686
   3  *
   4  *  Copyright (C) 2012 Samsung Electrnoics
   5  *  Chiwoong Byun <woong.byun@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #ifndef __LINUX_MFD_MAX77686_PRIV_H
  23 #define __LINUX_MFD_MAX77686_PRIV_H
  24
  25 #include <linux/i2c.h>
  26 #include <linux/regmap.h>
  27 #include <linux/module.h>
  28
  29 #define MAX77686_REG_INVALID            (0xff)
  30
  31 enum max77686_pmic_reg {
  32         MAX77686_REG_DEVICE_ID          = 0x00,
  33         MAX77686_REG_INTSRC             = 0x01,
  34         MAX77686_REG_INT1               = 0x02,
  35         MAX77686_REG_INT2               = 0x03,
  36
  37         MAX77686_REG_INT1MSK            = 0x04,
  38         MAX77686_REG_INT2MSK            = 0x05,
  39
  40         MAX77686_REG_STATUS1            = 0x06,
  41         MAX77686_REG_STATUS2            = 0x07,
  42
  43         MAX77686_REG_PWRON              = 0x08,
  44         MAX77686_REG_ONOFF_DELAY        = 0x09,
  45         MAX77686_REG_MRSTB              = 0x0A,
  46         /* Reserved: 0x0B-0x0F */
  47
  48         MAX77686_REG_BUCK1CTRL          = 0x10,
  49         MAX77686_REG_BUCK1OUT           = 0x11,
  50         MAX77686_REG_BUCK2CTRL1         = 0x12,
  51         MAX77686_REG_BUCK234FREQ        = 0x13,
  52         MAX77686_REG_BUCK2DVS1          = 0x14,
  53         MAX77686_REG_BUCK2DVS2          = 0x15,
  54         MAX77686_REG_BUCK2DVS3          = 0x16,
  55         MAX77686_REG_BUCK2DVS4          = 0x17,
  56         MAX77686_REG_BUCK2DVS5          = 0x18,
  57         MAX77686_REG_BUCK2DVS6          = 0x19,
  58         MAX77686_REG_BUCK2DVS7          = 0x1A,
  59         MAX77686_REG_BUCK2DVS8          = 0x1B,
  60         MAX77686_REG_BUCK3CTRL1         = 0x1C,
  61         /* Reserved: 0x1D */
  62         MAX77686_REG_BUCK3DVS1          = 0x1E,
  63         MAX77686_REG_BUCK3DVS2          = 0x1F,
  64         MAX77686_REG_BUCK3DVS3          = 0x20,
  65         MAX77686_REG_BUCK3DVS4          = 0x21,
  66         MAX77686_REG_BUCK3DVS5          = 0x22,
  67         MAX77686_REG_BUCK3DVS6          = 0x23,
  68         MAX77686_REG_BUCK3DVS7          = 0x24,
  69         MAX77686_REG_BUCK3DVS8          = 0x25,
  70         MAX77686_REG_BUCK4CTRL1         = 0x26,
  71         /* Reserved: 0x27 */
  72         MAX77686_REG_BUCK4DVS1          = 0x28,
  73         MAX77686_REG_BUCK4DVS2          = 0x29,
  74         MAX77686_REG_BUCK4DVS3          = 0x2A,
  75         MAX77686_REG_BUCK4DVS4          = 0x2B,
  76         MAX77686_REG_BUCK4DVS5          = 0x2C,
  77         MAX77686_REG_BUCK4DVS6          = 0x2D,
  78         MAX77686_REG_BUCK4DVS7          = 0x2E,
  79         MAX77686_REG_BUCK4DVS8          = 0x2F,
  80         MAX77686_REG_BUCK5CTRL          = 0x30,
  81         MAX77686_REG_BUCK5OUT           = 0x31,
  82         MAX77686_REG_BUCK6CTRL          = 0x32,
  83         MAX77686_REG_BUCK6OUT           = 0x33,
  84         MAX77686_REG_BUCK7CTRL          = 0x34,
  85         MAX77686_REG_BUCK7OUT           = 0x35,
  86         MAX77686_REG_BUCK8CTRL          = 0x36,
  87         MAX77686_REG_BUCK8OUT           = 0x37,
  88         MAX77686_REG_BUCK9CTRL          = 0x38,
  89         MAX77686_REG_BUCK9OUT           = 0x39,
  90         /* Reserved: 0x3A-0x3F */
  91
  92         MAX77686_REG_LDO1CTRL1          = 0x40,
  93         MAX77686_REG_LDO2CTRL1          = 0x41,
  94         MAX77686_REG_LDO3CTRL1          = 0x42,
  95         MAX77686_REG_LDO4CTRL1          = 0x43,
  96         MAX77686_REG_LDO5CTRL1          = 0x44,
  97         MAX77686_REG_LDO6CTRL1          = 0x45,
  98         MAX77686_REG_LDO7CTRL1          = 0x46,
  99         MAX77686_REG_LDO8CTRL1          = 0x47,
 100         MAX77686_REG_LDO9CTRL1          = 0x48,
 101         MAX77686_REG_LDO10CTRL1         = 0x49,
 102         MAX77686_REG_LDO11CTRL1         = 0x4A,
 103         MAX77686_REG_LDO12CTRL1         = 0x4B,
 104         MAX77686_REG_LDO13CTRL1         = 0x4C,
 105         MAX77686_REG_LDO14CTRL1         = 0x4D,
 106         MAX77686_REG_LDO15CTRL1         = 0x4E,
 107         MAX77686_REG_LDO16CTRL1         = 0x4F,
 108         MAX77686_REG_LDO17CTRL1         = 0x50,
 109         MAX77686_REG_LDO18CTRL1         = 0x51,
 110         MAX77686_REG_LDO19CTRL1         = 0x52,
 111         MAX77686_REG_LDO20CTRL1         = 0x53,
 112         MAX77686_REG_LDO21CTRL1         = 0x54,
 113         MAX77686_REG_LDO22CTRL1         = 0x55,
 114         MAX77686_REG_LDO23CTRL1         = 0x56,
 115         MAX77686_REG_LDO24CTRL1         = 0x57,
 116         MAX77686_REG_LDO25CTRL1         = 0x58,
 117         MAX77686_REG_LDO26CTRL1         = 0x59,
 118         /* Reserved: 0x5A-0x5F */
 119         MAX77686_REG_LDO1CTRL2          = 0x60,
 120         MAX77686_REG_LDO2CTRL2          = 0x61,
 121         MAX77686_REG_LDO3CTRL2          = 0x62,
 122         MAX77686_REG_LDO4CTRL2          = 0x63,
 123         MAX77686_REG_LDO5CTRL2          = 0x64,
 124         MAX77686_REG_LDO6CTRL2          = 0x65,
 125         MAX77686_REG_LDO7CTRL2          = 0x66,
 126         MAX77686_REG_LDO8CTRL2          = 0x67,
 127         MAX77686_REG_LDO9CTRL2          = 0x68,
 128         MAX77686_REG_LDO10CTRL2         = 0x69,
 129         MAX77686_REG_LDO11CTRL2         = 0x6A,
 130         MAX77686_REG_LDO12CTRL2         = 0x6B,
 131         MAX77686_REG_LDO13CTRL2         = 0x6C,
 132         MAX77686_REG_LDO14CTRL2         = 0x6D,
 133         MAX77686_REG_LDO15CTRL2         = 0x6E,
 134         MAX77686_REG_LDO16CTRL2         = 0x6F,
 135         MAX77686_REG_LDO17CTRL2         = 0x70,
 136         MAX77686_REG_LDO18CTRL2         = 0x71,
 137         MAX77686_REG_LDO19CTRL2         = 0x72,
 138         MAX77686_REG_LDO20CTRL2         = 0x73,
 139         MAX77686_REG_LDO21CTRL2         = 0x74,
 140         MAX77686_REG_LDO22CTRL2         = 0x75,
 141         MAX77686_REG_LDO23CTRL2         = 0x76,
 142         MAX77686_REG_LDO24CTRL2         = 0x77,
 143         MAX77686_REG_LDO25CTRL2         = 0x78,
 144         MAX77686_REG_LDO26CTRL2         = 0x79,
 145         /* Reserved: 0x7A-0x7D */
 146
 147         MAX77686_REG_BBAT_CHG           = 0x7E,
 148         MAX77686_REG_32KHZ                      = 0x7F,
 149
 150         MAX77686_REG_PMIC_END           = 0x80,
 151 };
 152
 153 enum max77686_rtc_reg {
 154         MAX77686_RTC_INT                        = 0x00,
 155         MAX77686_RTC_INTM                       = 0x01,
 156         MAX77686_RTC_CONTROLM           = 0x02,
 157         MAX77686_RTC_CONTROL            = 0x03,
 158         MAX77686_RTC_UPDATE0            = 0x04,
 159         /* Reserved: 0x5 */
 160         MAX77686_WTSR_SMPL_CNTL         = 0x06,
 161         MAX77686_RTC_SEC                        = 0x07,
 162         MAX77686_RTC_MIN                        = 0x08,
 163         MAX77686_RTC_HOUR                       = 0x09,
 164         MAX77686_RTC_WEEKDAY            = 0x0A,
 165         MAX77686_RTC_MONTH                      = 0x0B,
 166         MAX77686_RTC_YEAR                       = 0x0C,
 167         MAX77686_RTC_DATE                       = 0x0D,
 168         MAX77686_ALARM1_SEC                     = 0x0E,
 169         MAX77686_ALARM1_MIN                     = 0x0F,
 170         MAX77686_ALARM1_HOUR            = 0x10,
 171         MAX77686_ALARM1_WEEKDAY         = 0x11,
 172         MAX77686_ALARM1_MONTH           = 0x12,
 173         MAX77686_ALARM1_YEAR            = 0x13,
 174         MAX77686_ALARM1_DATE            = 0x14,
 175         MAX77686_ALARM2_SEC                     = 0x15,
 176         MAX77686_ALARM2_MIN                     = 0x16,
 177         MAX77686_ALARM2_HOUR            = 0x17,
 178         MAX77686_ALARM2_WEEKDAY         = 0x18,
 179         MAX77686_ALARM2_MONTH           = 0x19,
 180         MAX77686_ALARM2_YEAR            = 0x1A,
 181         MAX77686_ALARM2_DATE            = 0x1B,
 182 };
 183
 184 #define MAX77686_IRQSRC_PMIC    (0)
 185 #define MAX77686_IRQSRC_RTC             (1 << 0)
 186
 187 enum max77686_irq_source {
 188         PMIC_INT1 = 0,
 189         PMIC_INT2,
 190         RTC_INT,
 191
 192         MAX77686_IRQ_GROUP_NR,
 193 };
 194
 195 enum max77686_irq {
 196         MAX77686_PMICIRQ_PWRONF,
 197         MAX77686_PMICIRQ_PWRONR,
 198         MAX77686_PMICIRQ_JIGONBF,
 199         MAX77686_PMICIRQ_JIGONBR,
 200         MAX77686_PMICIRQ_ACOKBF,
 201         MAX77686_PMICIRQ_ACOKBR,
 202         MAX77686_PMICIRQ_ONKEY1S,
 203         MAX77686_PMICIRQ_MRSTB,
 204
 205         MAX77686_PMICIRQ_140C,
 206         MAX77686_PMICIRQ_120C,
 207
 208         MAX77686_RTCIRQ_RTC60S,
 209         MAX77686_RTCIRQ_RTCA1,
 210         MAX77686_RTCIRQ_RTCA2,
 211         MAX77686_RTCIRQ_SMPL,
 212         MAX77686_RTCIRQ_RTC1S,
 213         MAX77686_RTCIRQ_WTSR,
 214
 215         MAX77686_IRQ_NR,
 216 };
 217
 218 struct max77686_dev {
 219         struct device *dev;
 220         struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
 221         struct i2c_client *rtc; /* slave addr 0x0c */
 222
 223         int type;
 224
 225         struct regmap *regmap;          /* regmap for mfd */
 226         struct regmap *rtc_regmap;      /* regmap for rtc */
 227
 228         struct irq_domain *irq_domain;
 229
 230         int irq;
 231         int irq_gpio;
 232         bool wakeup;
 233         struct mutex irqlock;
 234         int irq_masks_cur[MAX77686_IRQ_GROUP_NR];
 235         int irq_masks_cache[MAX77686_IRQ_GROUP_NR];
 236 };
 237
 238 enum max77686_types {
 239         TYPE_MAX77686,
 240 };
 241
 242 extern int max77686_irq_init(struct max77686_dev *max77686);
 243 extern void max77686_irq_exit(struct max77686_dev *max77686);
 244 extern int max77686_irq_resume(struct max77686_dev *max77686);
 245
 246 #endif /*  __LINUX_MFD_MAX77686_PRIV_H */