5 #ifndef __SOUND_HDAUDIO_H
6 #define __SOUND_HDAUDIO_H
8 #include <linux/device.h>
9 #include <linux/interrupt.h>
10 #include <linux/timecounter.h>
11 #include <sound/core.h>
12 #include <sound/memalloc.h>
13 #include <sound/hda_verbs.h>
16 typedef u16 hda_nid_t;
22 struct hdac_widget_tree;
27 extern struct bus_type snd_hda_bus_type;
35 unsigned int elem_size;
36 unsigned int alloc_align;
41 * HD-audio codec base device
47 unsigned int addr; /* codec address */
48 struct list_head list; /* list point for bus codec_list */
50 hda_nid_t afg; /* AFG node id */
51 hda_nid_t mfg; /* MFG node id */
54 unsigned int vendor_id;
55 unsigned int subsystem_id;
56 unsigned int revision_id;
57 unsigned int afg_function_id;
58 unsigned int mfg_function_id;
59 unsigned int afg_unsol:1;
60 unsigned int mfg_unsol:1;
62 unsigned int power_caps; /* FG power caps */
64 const char *vendor_name; /* codec vendor name */
65 const char *chip_name; /* codec chip name */
67 /* verb exec op override */
68 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
69 unsigned int flags, unsigned int *res);
72 unsigned int num_nodes;
73 hda_nid_t start_nid, end_nid;
76 atomic_t in_pm; /* suspend/resume being performed */
79 struct hdac_widget_tree *widgets;
82 struct regmap *regmap;
83 struct snd_array vendor_verbs;
84 bool lazy_cache:1; /* don't wake up for writes */
85 bool caps_overwriting:1; /* caps overwrite being in process */
86 bool cache_coef:1; /* cache COEF read/write too */
89 /* device/driver type used for matching */
100 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
102 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
103 const char *name, unsigned int addr);
104 void snd_hdac_device_exit(struct hdac_device *dev);
105 int snd_hdac_device_register(struct hdac_device *codec);
106 void snd_hdac_device_unregister(struct hdac_device *codec);
108 int snd_hdac_refresh_widgets(struct hdac_device *codec);
110 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
111 unsigned int verb, unsigned int parm);
112 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
113 unsigned int flags, unsigned int *res);
114 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
115 unsigned int verb, unsigned int parm, unsigned int *res);
116 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
118 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
120 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
121 unsigned int parm, unsigned int val);
122 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
123 hda_nid_t *conn_list, int max_conns);
124 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
125 hda_nid_t *start_id);
128 * snd_hdac_read_parm - read a codec parameter
129 * @codec: the codec object
130 * @nid: NID to read a parameter
131 * @parm: parameter to read
133 * Returns -1 for error. If you need to distinguish the error more
134 * strictly, use _snd_hdac_read_parm() directly.
136 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
141 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
145 void snd_hdac_power_up(struct hdac_device *codec);
146 void snd_hdac_power_down(struct hdac_device *codec);
147 void snd_hdac_power_up_pm(struct hdac_device *codec);
148 void snd_hdac_power_down_pm(struct hdac_device *codec);
150 static inline void snd_hdac_power_up(struct hdac_device *codec) {}
151 static inline void snd_hdac_power_down(struct hdac_device *codec) {}
152 static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
153 static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
157 * HD-audio codec base driver
160 struct device_driver driver;
162 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
163 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
166 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
171 struct hdac_bus_ops {
172 /* send a single command */
173 int (*command)(struct hdac_bus *bus, unsigned int cmd);
174 /* get a response from the last command */
175 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
180 * Lowlevel I/O operators
183 /* mapped register accesses */
184 void (*reg_writel)(u32 value, u32 __iomem *addr);
185 u32 (*reg_readl)(u32 __iomem *addr);
186 void (*reg_writew)(u16 value, u16 __iomem *addr);
187 u16 (*reg_readw)(u16 __iomem *addr);
188 void (*reg_writeb)(u8 value, u8 __iomem *addr);
189 u8 (*reg_readb)(u8 __iomem *addr);
192 #define HDA_UNSOL_QUEUE_SIZE 64
193 #define HDA_MAX_CODECS 8 /* limit by controller side */
195 /* HD Audio class code */
196 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
201 * Each CORB entry is 4byte, RIRB is 8byte
204 __le32 *buf; /* virtual address of CORB/RIRB buffer */
205 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
206 unsigned short rp, wp; /* RIRB read/write pointers */
207 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
208 u32 res[HDA_MAX_CODECS]; /* last read value */
212 * HD-audio bus base driver
216 const struct hdac_bus_ops *ops;
217 const struct hdac_io_ops *io_ops;
221 void __iomem *remap_addr;
224 /* codec linked list */
225 struct list_head codec_list;
226 unsigned int num_codecs;
228 /* link caddr -> codec */
229 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
231 /* unsolicited event queue */
232 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
233 unsigned int unsol_rp, unsol_wp;
234 struct work_struct unsol_work;
236 /* bit flags of detected codecs */
237 unsigned long codec_mask;
239 /* bit flags of powered codecs */
240 unsigned long codec_powered;
245 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
247 /* CORB/RIRB and position buffers */
248 struct snd_dma_buffer rb;
249 struct snd_dma_buffer posbuf;
251 /* hdac_stream linked list */
252 struct list_head stream_list;
254 /* operation state */
255 bool chip_init:1; /* h/w initialized */
258 bool sync_write:1; /* sync after verb write */
259 bool use_posbuf:1; /* use position buffer */
260 bool snoop:1; /* enable snooping */
261 bool align_bdle_4k:1; /* BDLE align 4K boundary */
262 bool reverse_assign:1; /* assign devices in reverse order */
263 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
265 int bdl_pos_adj; /* BDL position adjustment */
269 struct mutex cmd_mutex;
272 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
273 const struct hdac_bus_ops *ops,
274 const struct hdac_io_ops *io_ops);
275 void snd_hdac_bus_exit(struct hdac_bus *bus);
276 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
277 unsigned int cmd, unsigned int *res);
278 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
279 unsigned int cmd, unsigned int *res);
280 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
282 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
283 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
284 struct hdac_device *codec);
286 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
288 set_bit(codec->addr, &codec->bus->codec_powered);
291 static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
293 clear_bit(codec->addr, &codec->bus->codec_powered);
296 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
297 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
300 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
301 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
302 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
303 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
304 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
305 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
307 void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
308 void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
309 void (*ack)(struct hdac_bus *,
310 struct hdac_stream *));
313 * macros for easy use
315 #define _snd_hdac_chip_write(type, chip, reg, value) \
316 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
317 #define _snd_hdac_chip_read(type, chip, reg) \
318 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
320 /* read/write a register, pass without AZX_REG_ prefix */
321 #define snd_hdac_chip_writel(chip, reg, value) \
322 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
323 #define snd_hdac_chip_writew(chip, reg, value) \
324 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
325 #define snd_hdac_chip_writeb(chip, reg, value) \
326 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
327 #define snd_hdac_chip_readl(chip, reg) \
328 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
329 #define snd_hdac_chip_readw(chip, reg) \
330 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
331 #define snd_hdac_chip_readb(chip, reg) \
332 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
334 /* update a register, pass without AZX_REG_ prefix */
335 #define snd_hdac_chip_updatel(chip, reg, mask, val) \
336 snd_hdac_chip_writel(chip, reg, \
337 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
338 #define snd_hdac_chip_updatew(chip, reg, mask, val) \
339 snd_hdac_chip_writew(chip, reg, \
340 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
341 #define snd_hdac_chip_updateb(chip, reg, mask, val) \
342 snd_hdac_chip_writeb(chip, reg, \
343 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
349 struct hdac_bus *bus;
350 struct snd_dma_buffer bdl; /* BDL buffer */
351 __le32 *posbuf; /* position buffer pointer */
352 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
354 unsigned int bufsize; /* size of the play buffer in bytes */
355 unsigned int period_bytes; /* size of the period in bytes */
356 unsigned int frags; /* number for period in the play buffer */
357 unsigned int fifo_size; /* FIFO size */
359 void __iomem *sd_addr; /* stream descriptor pointer */
361 u32 sd_int_sta_mask; /* stream int status mask */
364 struct snd_pcm_substream *substream; /* assigned substream,
367 unsigned int format_val; /* format value to be set in the
368 * controller and the codec
370 unsigned char stream_tag; /* assigned stream */
371 unsigned char index; /* stream index */
372 int assigned_key; /* last device# key assigned to */
376 bool no_period_wakeup:1;
379 unsigned long start_wallclk; /* start + minimum wallclk */
380 unsigned long period_wallclk; /* wallclk for period */
381 struct timecounter tc;
382 struct cyclecounter cc;
383 int delay_negative_threshold;
385 struct list_head list;
388 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
389 int idx, int direction, int tag);
390 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
391 struct snd_pcm_substream *substream);
392 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
394 int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
395 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
396 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
397 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
398 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
399 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
400 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
401 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
402 unsigned int streams, unsigned int reg);
403 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
404 unsigned int streams);
405 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
406 unsigned int streams);
408 * macros for easy use
410 #define _snd_hdac_stream_write(type, dev, reg, value) \
411 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
412 #define _snd_hdac_stream_read(type, dev, reg) \
413 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
415 /* read/write a register, pass without AZX_REG_ prefix */
416 #define snd_hdac_stream_writel(dev, reg, value) \
417 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
418 #define snd_hdac_stream_writew(dev, reg, value) \
419 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
420 #define snd_hdac_stream_writeb(dev, reg, value) \
421 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
422 #define snd_hdac_stream_readl(dev, reg) \
423 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
424 #define snd_hdac_stream_readw(dev, reg) \
425 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
426 #define snd_hdac_stream_readb(dev, reg) \
427 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
429 /* update a register, pass without AZX_REG_ prefix */
430 #define snd_hdac_stream_updatel(dev, reg, mask, val) \
431 snd_hdac_stream_writel(dev, reg, \
432 (snd_hdac_stream_readl(dev, reg) & \
434 #define snd_hdac_stream_updatew(dev, reg, mask, val) \
435 snd_hdac_stream_writew(dev, reg, \
436 (snd_hdac_stream_readw(dev, reg) & \
438 #define snd_hdac_stream_updateb(dev, reg, mask, val) \
439 snd_hdac_stream_writeb(dev, reg, \
440 (snd_hdac_stream_readb(dev, reg) & \
444 * generic array helpers
446 void *snd_array_new(struct snd_array *array);
447 void snd_array_free(struct snd_array *array);
448 static inline void snd_array_init(struct snd_array *array, unsigned int size,
451 array->elem_size = size;
452 array->alloc_align = align;
455 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
457 return array->list + idx * array->elem_size;
460 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
462 return (unsigned long)(ptr - array->list) / array->elem_size;
465 #endif /* __SOUND_HDAUDIO_H */