2 * dice_stream.c - a part of driver for DICE based devices
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 * Copyright (c) 2014 Takashi Sakamoto <o-takashi@sakamocchi.jp>
7 * Licensed under the terms of the GNU General Public License, version 2.
12 #define CALLBACK_TIMEOUT 200
14 const unsigned int snd_dice_rates[SND_DICE_RATES_COUNT] = {
27 int snd_dice_stream_get_rate_mode(struct snd_dice *dice, unsigned int rate,
32 for (i = 0; i < ARRAY_SIZE(snd_dice_rates); i++) {
33 if (!(dice->clock_caps & BIT(i)))
35 if (snd_dice_rates[i] != rate)
44 static void release_resources(struct snd_dice *dice,
45 struct fw_iso_resources *resources)
49 /* Reset channel number */
50 channel = cpu_to_be32((u32)-1);
51 if (resources == &dice->tx_resources)
52 snd_dice_transaction_write_tx(dice, TX_ISOCHRONOUS,
55 snd_dice_transaction_write_rx(dice, RX_ISOCHRONOUS,
58 fw_iso_resources_free(resources);
61 static int keep_resources(struct snd_dice *dice,
62 struct fw_iso_resources *resources,
63 unsigned int max_payload_bytes)
68 err = fw_iso_resources_allocate(resources, max_payload_bytes,
69 fw_parent_device(dice->unit)->max_speed);
73 /* Set channel number */
74 channel = cpu_to_be32(resources->channel);
75 if (resources == &dice->tx_resources)
76 err = snd_dice_transaction_write_tx(dice, TX_ISOCHRONOUS,
79 err = snd_dice_transaction_write_rx(dice, RX_ISOCHRONOUS,
82 release_resources(dice, resources);
87 static void stop_stream(struct snd_dice *dice, struct amdtp_stream *stream)
89 amdtp_stream_pcm_abort(stream);
90 amdtp_stream_stop(stream);
92 if (stream == &dice->tx_stream)
93 release_resources(dice, &dice->tx_resources);
95 release_resources(dice, &dice->rx_resources);
98 static int start_stream(struct snd_dice *dice, struct amdtp_stream *stream,
101 struct fw_iso_resources *resources;
102 unsigned int i, mode, pcm_chs, midi_ports;
103 bool double_pcm_frames;
106 err = snd_dice_stream_get_rate_mode(dice, rate, &mode);
109 if (stream == &dice->tx_stream) {
110 resources = &dice->tx_resources;
111 pcm_chs = dice->tx_channels[mode];
112 midi_ports = dice->tx_midi_ports[mode];
114 resources = &dice->rx_resources;
115 pcm_chs = dice->rx_channels[mode];
116 midi_ports = dice->rx_midi_ports[mode];
120 * At 176.4/192.0 kHz, Dice has a quirk to transfer two PCM frames in
121 * one data block of AMDTP packet. Thus sampling transfer frequency is
122 * a half of PCM sampling frequency, i.e. PCM frames at 192.0 kHz are
123 * transferred on AMDTP packets at 96 kHz. Two successive samples of a
124 * channel are stored consecutively in the packet. This quirk is called
126 * For this quirk, blocking mode is required and PCM buffer size should
127 * be aligned to SYT_INTERVAL.
129 double_pcm_frames = mode > 1;
130 if (double_pcm_frames) {
135 err = amdtp_am824_set_parameters(stream, rate, pcm_chs, midi_ports,
140 if (double_pcm_frames) {
143 for (i = 0; i < pcm_chs; i++) {
144 stream->pcm_positions[i] = i * 2;
145 stream->pcm_positions[i + pcm_chs] = i * 2 + 1;
149 err = keep_resources(dice, resources,
150 amdtp_stream_get_max_payload(stream));
152 dev_err(&dice->unit->device,
153 "fail to keep isochronous resources\n");
157 err = amdtp_stream_start(stream, resources->channel,
158 fw_parent_device(dice->unit)->max_speed);
160 release_resources(dice, resources);
165 static int get_sync_mode(struct snd_dice *dice, enum cip_flags *sync_mode)
170 err = snd_dice_transaction_get_clock_source(dice, &source);
175 /* So-called 'SYT Match' modes, sync_to_syt value of packets received */
176 case CLOCK_SOURCE_ARX4: /* in 4th stream */
177 case CLOCK_SOURCE_ARX3: /* in 3rd stream */
178 case CLOCK_SOURCE_ARX2: /* in 2nd stream */
181 case CLOCK_SOURCE_ARX1: /* in 1st stream, which this driver uses */
185 *sync_mode = CIP_SYNC_TO_DEVICE;
192 int snd_dice_stream_start_duplex(struct snd_dice *dice, unsigned int rate)
194 struct amdtp_stream *master, *slave;
195 unsigned int curr_rate;
196 enum cip_flags sync_mode;
199 if (dice->substreams_counter == 0)
202 err = get_sync_mode(dice, &sync_mode);
205 if (sync_mode == CIP_SYNC_TO_DEVICE) {
206 master = &dice->tx_stream;
207 slave = &dice->rx_stream;
209 master = &dice->rx_stream;
210 slave = &dice->tx_stream;
213 /* Some packet queueing errors. */
214 if (amdtp_streaming_error(master) || amdtp_streaming_error(slave))
215 stop_stream(dice, master);
217 /* Stop stream if rate is different. */
218 err = snd_dice_transaction_get_rate(dice, &curr_rate);
220 dev_err(&dice->unit->device,
221 "fail to get sampling rate\n");
226 if (rate != curr_rate)
227 stop_stream(dice, master);
229 if (!amdtp_stream_running(master)) {
230 stop_stream(dice, slave);
231 snd_dice_transaction_clear_enable(dice);
233 amdtp_stream_set_sync(sync_mode, master, slave);
235 err = snd_dice_transaction_set_rate(dice, rate);
237 dev_err(&dice->unit->device,
238 "fail to set sampling rate\n");
242 /* Start both streams. */
243 err = start_stream(dice, master, rate);
245 dev_err(&dice->unit->device,
246 "fail to start AMDTP master stream\n");
249 err = start_stream(dice, slave, rate);
251 dev_err(&dice->unit->device,
252 "fail to start AMDTP slave stream\n");
253 stop_stream(dice, master);
256 err = snd_dice_transaction_set_enable(dice);
258 dev_err(&dice->unit->device,
259 "fail to enable interface\n");
260 stop_stream(dice, master);
261 stop_stream(dice, slave);
265 /* Wait first callbacks */
266 if (!amdtp_stream_wait_callback(master, CALLBACK_TIMEOUT) ||
267 !amdtp_stream_wait_callback(slave, CALLBACK_TIMEOUT)) {
268 snd_dice_transaction_clear_enable(dice);
269 stop_stream(dice, master);
270 stop_stream(dice, slave);
278 void snd_dice_stream_stop_duplex(struct snd_dice *dice)
280 if (dice->substreams_counter > 0)
283 snd_dice_transaction_clear_enable(dice);
285 stop_stream(dice, &dice->tx_stream);
286 stop_stream(dice, &dice->rx_stream);
289 static int init_stream(struct snd_dice *dice, struct amdtp_stream *stream)
292 struct fw_iso_resources *resources;
293 enum amdtp_stream_direction dir;
295 if (stream == &dice->tx_stream) {
296 resources = &dice->tx_resources;
297 dir = AMDTP_IN_STREAM;
299 resources = &dice->rx_resources;
300 dir = AMDTP_OUT_STREAM;
303 err = fw_iso_resources_init(resources, dice->unit);
306 resources->channels_mask = 0x00000000ffffffffuLL;
308 err = amdtp_am824_init(stream, dice->unit, dir, CIP_BLOCKING);
310 amdtp_stream_destroy(stream);
311 fw_iso_resources_destroy(resources);
318 * This function should be called before starting streams or after stopping
321 static void destroy_stream(struct snd_dice *dice, struct amdtp_stream *stream)
323 struct fw_iso_resources *resources;
325 if (stream == &dice->tx_stream)
326 resources = &dice->tx_resources;
328 resources = &dice->rx_resources;
330 amdtp_stream_destroy(stream);
331 fw_iso_resources_destroy(resources);
334 int snd_dice_stream_init_duplex(struct snd_dice *dice)
338 dice->substreams_counter = 0;
340 err = init_stream(dice, &dice->tx_stream);
344 err = init_stream(dice, &dice->rx_stream);
346 destroy_stream(dice, &dice->tx_stream);
351 void snd_dice_stream_destroy_duplex(struct snd_dice *dice)
353 snd_dice_transaction_clear_enable(dice);
355 destroy_stream(dice, &dice->tx_stream);
356 destroy_stream(dice, &dice->rx_stream);
358 dice->substreams_counter = 0;
361 void snd_dice_stream_update_duplex(struct snd_dice *dice)
364 * On a bus reset, the DICE firmware disables streaming and then goes
365 * off contemplating its own navel for hundreds of milliseconds before
366 * it can react to any of our attempts to reenable streaming. This
367 * means that we lose synchronization anyway, so we force our streams
368 * to stop so that the application can restart them in an orderly
371 dice->global_enabled = false;
373 stop_stream(dice, &dice->rx_stream);
374 stop_stream(dice, &dice->tx_stream);
376 fw_iso_resources_update(&dice->rx_resources);
377 fw_iso_resources_update(&dice->tx_resources);
380 static void dice_lock_changed(struct snd_dice *dice)
382 dice->dev_lock_changed = true;
383 wake_up(&dice->hwdep_wait);
386 int snd_dice_stream_lock_try(struct snd_dice *dice)
390 spin_lock_irq(&dice->lock);
392 if (dice->dev_lock_count < 0) {
397 if (dice->dev_lock_count++ == 0)
398 dice_lock_changed(dice);
401 spin_unlock_irq(&dice->lock);
405 void snd_dice_stream_lock_release(struct snd_dice *dice)
407 spin_lock_irq(&dice->lock);
409 if (WARN_ON(dice->dev_lock_count <= 0))
412 if (--dice->dev_lock_count == 0)
413 dice_lock_changed(dice);
415 spin_unlock_irq(&dice->lock);