3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
48 #include <linux/pm_runtime.h>
49 #include <linux/clocksource.h>
50 #include <linux/time.h>
51 #include <linux/completion.h>
54 /* for snoop control */
55 #include <asm/pgtable.h>
56 #include <asm/cacheflush.h>
58 #include <sound/core.h>
59 #include <sound/initval.h>
60 #include <linux/vgaarb.h>
61 #include <linux/vga_switcheroo.h>
62 #include <linux/firmware.h>
63 #include "hda_codec.h"
64 #include "hda_controller.h"
68 /* position fix mode */
77 /* Defines for ATI HD Audio support in SB450 south bridge */
78 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
79 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
81 /* Defines for Nvidia HDA support */
82 #define NVIDIA_HDA_TRANSREG_ADDR 0x4e
83 #define NVIDIA_HDA_ENABLE_COHBITS 0x0f
84 #define NVIDIA_HDA_ISTRM_COH 0x4d
85 #define NVIDIA_HDA_OSTRM_COH 0x4c
86 #define NVIDIA_HDA_ENABLE_COHBIT 0x01
88 /* Defines for Intel SCH HDA snoop control */
89 #define INTEL_SCH_HDA_DEVC 0x78
90 #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11)
92 /* Define IN stream 0 FIFO size offset in VIA controller */
93 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
94 /* Define VIA HD Audio Device ID*/
95 #define VIA_HDAC_DEVICE_ID 0x3288
97 /* max number of SDs */
98 /* ICH, ATI and VIA have 4 playback and 4 capture */
99 #define ICH6_NUM_CAPTURE 4
100 #define ICH6_NUM_PLAYBACK 4
102 /* ULI has 6 playback and 5 capture */
103 #define ULI_NUM_CAPTURE 5
104 #define ULI_NUM_PLAYBACK 6
106 /* ATI HDMI may have up to 8 playbacks and 0 capture */
107 #define ATIHDMI_NUM_CAPTURE 0
108 #define ATIHDMI_NUM_PLAYBACK 8
110 /* TERA has 4 playback and 3 capture */
111 #define TERA_NUM_CAPTURE 3
112 #define TERA_NUM_PLAYBACK 4
115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
118 static char *model[SNDRV_CARDS];
119 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
120 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
121 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
122 static int probe_only[SNDRV_CARDS];
123 static int jackpoll_ms[SNDRV_CARDS];
124 static bool single_cmd;
125 static int enable_msi = -1;
126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
127 static char *patch[SNDRV_CARDS];
129 #ifdef CONFIG_SND_HDA_INPUT_BEEP
130 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
131 CONFIG_SND_HDA_INPUT_BEEP_MODE};
134 module_param_array(index, int, NULL, 0444);
135 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
136 module_param_array(id, charp, NULL, 0444);
137 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
138 module_param_array(enable, bool, NULL, 0444);
139 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
140 module_param_array(model, charp, NULL, 0444);
141 MODULE_PARM_DESC(model, "Use the given board model.");
142 module_param_array(position_fix, int, NULL, 0444);
143 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
144 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
145 module_param_array(bdl_pos_adj, int, NULL, 0644);
146 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
147 module_param_array(probe_mask, int, NULL, 0444);
148 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
149 module_param_array(probe_only, int, NULL, 0444);
150 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
151 module_param_array(jackpoll_ms, int, NULL, 0444);
152 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
153 module_param(single_cmd, bool, 0444);
154 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
155 "(for debugging only).");
156 module_param(enable_msi, bint, 0444);
157 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
158 #ifdef CONFIG_SND_HDA_PATCH_LOADER
159 module_param_array(patch, charp, NULL, 0444);
160 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
162 #ifdef CONFIG_SND_HDA_INPUT_BEEP
163 module_param_array(beep_mode, bool, NULL, 0444);
164 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
165 "(0=off, 1=on) (default=1).");
169 static int param_set_xint(const char *val, const struct kernel_param *kp);
170 static struct kernel_param_ops param_ops_xint = {
171 .set = param_set_xint,
172 .get = param_get_int,
174 #define param_check_xint param_check_int
176 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
177 static int *power_save_addr = &power_save;
178 module_param(power_save, xint, 0644);
179 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
180 "(in second, 0 = disable).");
182 /* reset the HD-audio controller in power save mode.
183 * this may give more power-saving, but will take longer time to
186 static bool power_save_controller = 1;
187 module_param(power_save_controller, bool, 0644);
188 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
190 static int *power_save_addr;
191 #endif /* CONFIG_PM */
193 static int align_buffer_size = -1;
194 module_param(align_buffer_size, bint, 0644);
195 MODULE_PARM_DESC(align_buffer_size,
196 "Force buffer and period sizes to be multiple of 128 bytes.");
199 static bool hda_snoop = true;
200 module_param_named(snoop, hda_snoop, bool, 0444);
201 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
203 #define hda_snoop true
207 MODULE_LICENSE("GPL");
208 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
242 MODULE_DESCRIPTION("Intel HDA driver");
244 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
245 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
246 #define SUPPORT_VGA_SWITCHEROO
262 AZX_DRIVER_ATIHDMI_NS,
272 AZX_NUM_DRIVERS, /* keep this as last entry */
275 /* quirks for Intel PCH */
276 #define AZX_DCAPS_INTEL_PCH_NOPM \
277 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
278 AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_REVERSE_ASSIGN)
280 #define AZX_DCAPS_INTEL_PCH \
281 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
283 #define AZX_DCAPS_INTEL_HASWELL \
284 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
285 AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
286 AZX_DCAPS_I915_POWERWELL)
288 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
289 #define AZX_DCAPS_INTEL_BROADWELL \
290 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
291 AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_PM_RUNTIME | \
292 AZX_DCAPS_I915_POWERWELL)
294 /* quirks for ATI SB / AMD Hudson */
295 #define AZX_DCAPS_PRESET_ATI_SB \
296 (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
297 AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
299 /* quirks for ATI/AMD HDMI */
300 #define AZX_DCAPS_PRESET_ATI_HDMI \
301 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
304 /* quirks for Nvidia */
305 #define AZX_DCAPS_PRESET_NVIDIA \
306 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
307 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
308 AZX_DCAPS_CORBRP_SELF_CLEAR)
310 #define AZX_DCAPS_PRESET_CTHDA \
311 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
314 * VGA-switcher support
316 #ifdef SUPPORT_VGA_SWITCHEROO
317 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
319 #define use_vga_switcheroo(chip) 0
322 static char *driver_short_names[] = {
323 [AZX_DRIVER_ICH] = "HDA Intel",
324 [AZX_DRIVER_PCH] = "HDA Intel PCH",
325 [AZX_DRIVER_SCH] = "HDA Intel MID",
326 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
327 [AZX_DRIVER_ATI] = "HDA ATI SB",
328 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
329 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
330 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
331 [AZX_DRIVER_SIS] = "HDA SIS966",
332 [AZX_DRIVER_ULI] = "HDA ULI M5461",
333 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
334 [AZX_DRIVER_TERA] = "HDA Teradici",
335 [AZX_DRIVER_CTX] = "HDA Creative",
336 [AZX_DRIVER_CTHDA] = "HDA Creative",
337 [AZX_DRIVER_CMEDIA] = "HDA C-Media",
338 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
344 /* for pending irqs */
345 struct work_struct irq_pending_work;
348 struct completion probe_wait;
349 struct work_struct probe_work;
351 /* card list (for power_save trigger) */
352 struct list_head list;
355 unsigned int irq_pending_warned:1;
357 /* VGA-switcheroo setup */
358 unsigned int use_vga_switcheroo:1;
359 unsigned int vga_switcheroo_registered:1;
360 unsigned int init_failed:1; /* delayed init failed */
362 /* secondary power domain for hdmi audio under vga device */
363 struct dev_pm_domain hdmi_pm_domain;
367 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
373 if (!dmab || !dmab->area || !dmab->bytes)
376 #ifdef CONFIG_SND_DMA_SGBUF
377 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
378 struct snd_sg_buf *sgbuf = dmab->private_data;
379 if (chip->driver_type == AZX_DRIVER_CMEDIA)
380 return; /* deal with only CORB/RIRB buffers */
382 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
384 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
389 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
391 set_memory_wc((unsigned long)dmab->area, pages);
393 set_memory_wb((unsigned long)dmab->area, pages);
396 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
399 __mark_pages_wc(chip, buf, on);
401 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
402 struct snd_pcm_substream *substream, bool on)
404 if (azx_dev->wc_marked != on) {
405 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
406 azx_dev->wc_marked = on;
410 /* NOP for other archs */
411 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
415 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
416 struct snd_pcm_substream *substream, bool on)
421 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
424 * initialize the PCI registers
426 /* update bits in a PCI register byte */
427 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
428 unsigned char mask, unsigned char val)
432 pci_read_config_byte(pci, reg, &data);
434 data |= (val & mask);
435 pci_write_config_byte(pci, reg, data);
438 static void azx_init_pci(struct azx *chip)
440 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
441 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
442 * Ensuring these bits are 0 clears playback static on some HD Audio
444 * The PCI register TCSEL is defined in the Intel manuals.
446 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
447 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
448 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
451 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
452 * we need to enable snoop.
454 if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
455 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
457 update_pci_byte(chip->pci,
458 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
459 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
462 /* For NVIDIA HDA, enable snoop */
463 if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
464 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
466 update_pci_byte(chip->pci,
467 NVIDIA_HDA_TRANSREG_ADDR,
468 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
469 update_pci_byte(chip->pci,
470 NVIDIA_HDA_ISTRM_COH,
471 0x01, NVIDIA_HDA_ENABLE_COHBIT);
472 update_pci_byte(chip->pci,
473 NVIDIA_HDA_OSTRM_COH,
474 0x01, NVIDIA_HDA_ENABLE_COHBIT);
477 /* Enable SCH/PCH snoop if needed */
478 if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
479 unsigned short snoop;
480 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
481 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
482 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
483 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
484 if (!azx_snoop(chip))
485 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
486 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
487 pci_read_config_word(chip->pci,
488 INTEL_SCH_HDA_DEVC, &snoop);
490 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
491 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
492 "Disabled" : "Enabled");
496 /* calculate runtime delay from LPIB */
497 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
500 struct snd_pcm_substream *substream = azx_dev->substream;
501 int stream = substream->stream;
502 unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
505 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
506 delay = pos - lpib_pos;
508 delay = lpib_pos - pos;
510 if (delay >= azx_dev->delay_negative_threshold)
513 delay += azx_dev->bufsize;
516 if (delay >= azx_dev->period_bytes) {
517 dev_info(chip->card->dev,
518 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
519 delay, azx_dev->period_bytes);
521 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
522 chip->get_delay[stream] = NULL;
525 return bytes_to_frames(substream->runtime, delay);
528 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
530 /* called from IRQ */
531 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
533 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
536 ok = azx_position_ok(chip, azx_dev);
538 azx_dev->irq_pending = 0;
540 } else if (ok == 0 && chip->bus && chip->bus->workq) {
541 /* bogus IRQ, process it later */
542 azx_dev->irq_pending = 1;
543 queue_work(chip->bus->workq, &hda->irq_pending_work);
549 * Check whether the current DMA position is acceptable for updating
550 * periods. Returns non-zero if it's OK.
552 * Many HD-audio controllers appear pretty inaccurate about
553 * the update-IRQ timing. The IRQ is issued before actually the
554 * data is processed. So, we need to process it afterwords in a
557 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
559 struct snd_pcm_substream *substream = azx_dev->substream;
560 int stream = substream->stream;
564 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
565 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
566 return -1; /* bogus (too early) interrupt */
568 if (chip->get_position[stream])
569 pos = chip->get_position[stream](chip, azx_dev);
570 else { /* use the position buffer as default */
571 pos = azx_get_pos_posbuf(chip, azx_dev);
572 if (!pos || pos == (u32)-1) {
573 dev_info(chip->card->dev,
574 "Invalid position buffer, using LPIB read method instead.\n");
575 chip->get_position[stream] = azx_get_pos_lpib;
576 pos = azx_get_pos_lpib(chip, azx_dev);
577 chip->get_delay[stream] = NULL;
579 chip->get_position[stream] = azx_get_pos_posbuf;
580 if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
581 chip->get_delay[stream] = azx_get_delay_from_lpib;
585 if (pos >= azx_dev->bufsize)
588 if (WARN_ONCE(!azx_dev->period_bytes,
589 "hda-intel: zero azx_dev->period_bytes"))
590 return -1; /* this shouldn't happen! */
591 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
592 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
593 /* NG - it's below the first next period boundary */
594 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
595 azx_dev->start_wallclk += wallclk;
596 return 1; /* OK, it's fine */
600 * The work for pending PCM period updates.
602 static void azx_irq_pending_work(struct work_struct *work)
604 struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
605 struct azx *chip = &hda->chip;
608 if (!hda->irq_pending_warned) {
609 dev_info(chip->card->dev,
610 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
612 hda->irq_pending_warned = 1;
617 spin_lock_irq(&chip->reg_lock);
618 for (i = 0; i < chip->num_streams; i++) {
619 struct azx_dev *azx_dev = &chip->azx_dev[i];
620 if (!azx_dev->irq_pending ||
621 !azx_dev->substream ||
624 ok = azx_position_ok(chip, azx_dev);
626 azx_dev->irq_pending = 0;
627 spin_unlock(&chip->reg_lock);
628 snd_pcm_period_elapsed(azx_dev->substream);
629 spin_lock(&chip->reg_lock);
631 pending = 0; /* too early */
635 spin_unlock_irq(&chip->reg_lock);
642 /* clear irq_pending flags and assure no on-going workq */
643 static void azx_clear_irq_pending(struct azx *chip)
647 spin_lock_irq(&chip->reg_lock);
648 for (i = 0; i < chip->num_streams; i++)
649 chip->azx_dev[i].irq_pending = 0;
650 spin_unlock_irq(&chip->reg_lock);
653 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
655 if (request_irq(chip->pci->irq, azx_interrupt,
656 chip->msi ? 0 : IRQF_SHARED,
657 KBUILD_MODNAME, chip)) {
658 dev_err(chip->card->dev,
659 "unable to grab IRQ %d, disabling device\n",
662 snd_card_disconnect(chip->card);
665 chip->irq = chip->pci->irq;
666 pci_intx(chip->pci, !chip->msi);
670 /* get the current DMA position with correction on VIA chips */
671 static unsigned int azx_via_get_position(struct azx *chip,
672 struct azx_dev *azx_dev)
674 unsigned int link_pos, mini_pos, bound_pos;
675 unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
676 unsigned int fifo_size;
678 link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
679 if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
680 /* Playback, no problem using link position */
686 * use mod to get the DMA position just like old chipset
688 mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
689 mod_dma_pos %= azx_dev->period_bytes;
691 /* azx_dev->fifo_size can't get FIFO size of in stream.
692 * Get from base address + offset.
694 fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
696 if (azx_dev->insufficient) {
697 /* Link position never gather than FIFO size */
698 if (link_pos <= fifo_size)
701 azx_dev->insufficient = 0;
704 if (link_pos <= fifo_size)
705 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
707 mini_pos = link_pos - fifo_size;
709 /* Find nearest previous boudary */
710 mod_mini_pos = mini_pos % azx_dev->period_bytes;
711 mod_link_pos = link_pos % azx_dev->period_bytes;
712 if (mod_link_pos >= fifo_size)
713 bound_pos = link_pos - mod_link_pos;
714 else if (mod_dma_pos >= mod_mini_pos)
715 bound_pos = mini_pos - mod_mini_pos;
717 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
718 if (bound_pos >= azx_dev->bufsize)
722 /* Calculate real DMA position we want */
723 return bound_pos + mod_dma_pos;
727 static DEFINE_MUTEX(card_list_lock);
728 static LIST_HEAD(card_list);
730 static void azx_add_card_list(struct azx *chip)
732 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
733 mutex_lock(&card_list_lock);
734 list_add(&hda->list, &card_list);
735 mutex_unlock(&card_list_lock);
738 static void azx_del_card_list(struct azx *chip)
740 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
741 mutex_lock(&card_list_lock);
742 list_del_init(&hda->list);
743 mutex_unlock(&card_list_lock);
746 /* trigger power-save check at writing parameter */
747 static int param_set_xint(const char *val, const struct kernel_param *kp)
749 struct hda_intel *hda;
752 int prev = power_save;
753 int ret = param_set_int(val, kp);
755 if (ret || prev == power_save)
758 mutex_lock(&card_list_lock);
759 list_for_each_entry(hda, &card_list, list) {
761 if (!chip->bus || chip->disabled)
763 list_for_each_entry(c, &chip->bus->codec_list, list)
764 snd_hda_power_sync(c);
766 mutex_unlock(&card_list_lock);
770 #define azx_add_card_list(chip) /* NOP */
771 #define azx_del_card_list(chip) /* NOP */
772 #endif /* CONFIG_PM */
774 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
778 static int azx_suspend(struct device *dev)
780 struct pci_dev *pci = to_pci_dev(dev);
781 struct snd_card *card = dev_get_drvdata(dev);
783 struct hda_intel *hda;
789 chip = card->private_data;
790 hda = container_of(chip, struct hda_intel, chip);
791 if (chip->disabled || hda->init_failed)
794 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
795 azx_clear_irq_pending(chip);
796 list_for_each_entry(p, &chip->pcm_list, list)
797 snd_pcm_suspend_all(p->pcm);
798 if (chip->initialized)
799 snd_hda_suspend(chip->bus);
801 azx_enter_link_reset(chip);
802 if (chip->irq >= 0) {
803 free_irq(chip->irq, chip);
808 pci_disable_msi(chip->pci);
809 pci_disable_device(pci);
811 pci_set_power_state(pci, PCI_D3hot);
812 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
813 hda_display_power(false);
817 static int azx_resume(struct device *dev)
819 struct pci_dev *pci = to_pci_dev(dev);
820 struct snd_card *card = dev_get_drvdata(dev);
822 struct hda_intel *hda;
827 chip = card->private_data;
828 hda = container_of(chip, struct hda_intel, chip);
829 if (chip->disabled || hda->init_failed)
832 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
833 hda_display_power(true);
834 haswell_set_bclk(chip);
836 pci_set_power_state(pci, PCI_D0);
837 pci_restore_state(pci);
838 if (pci_enable_device(pci) < 0) {
839 dev_err(chip->card->dev,
840 "pci_enable_device failed, disabling device\n");
841 snd_card_disconnect(card);
846 if (pci_enable_msi(pci) < 0)
848 if (azx_acquire_irq(chip, 1) < 0)
852 azx_init_chip(chip, true);
854 snd_hda_resume(chip->bus);
855 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
858 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
860 #ifdef CONFIG_PM_RUNTIME
861 static int azx_runtime_suspend(struct device *dev)
863 struct snd_card *card = dev_get_drvdata(dev);
865 struct hda_intel *hda;
870 chip = card->private_data;
871 hda = container_of(chip, struct hda_intel, chip);
872 if (chip->disabled || hda->init_failed)
875 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
878 /* enable controller wake up event */
879 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
883 azx_enter_link_reset(chip);
884 azx_clear_irq_pending(chip);
885 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
886 hda_display_power(false);
891 static int azx_runtime_resume(struct device *dev)
893 struct snd_card *card = dev_get_drvdata(dev);
895 struct hda_intel *hda;
897 struct hda_codec *codec;
903 chip = card->private_data;
904 hda = container_of(chip, struct hda_intel, chip);
905 if (chip->disabled || hda->init_failed)
908 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
911 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
912 hda_display_power(true);
913 haswell_set_bclk(chip);
916 /* Read STATESTS before controller reset */
917 status = azx_readw(chip, STATESTS);
920 azx_init_chip(chip, true);
924 list_for_each_entry(codec, &bus->codec_list, list)
925 if (status & (1 << codec->addr))
926 queue_delayed_work(codec->bus->workq,
927 &codec->jackpoll_work, codec->jackpoll_interval);
930 /* disable controller Wake Up event*/
931 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
937 static int azx_runtime_idle(struct device *dev)
939 struct snd_card *card = dev_get_drvdata(dev);
941 struct hda_intel *hda;
946 chip = card->private_data;
947 hda = container_of(chip, struct hda_intel, chip);
948 if (chip->disabled || hda->init_failed)
951 if (!power_save_controller ||
952 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
958 #endif /* CONFIG_PM_RUNTIME */
961 static const struct dev_pm_ops azx_pm = {
962 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
963 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
966 #define AZX_PM_OPS &azx_pm
968 #define AZX_PM_OPS NULL
969 #endif /* CONFIG_PM */
972 static int azx_probe_continue(struct azx *chip);
974 #ifdef SUPPORT_VGA_SWITCHEROO
975 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
977 static void azx_vs_set_state(struct pci_dev *pci,
978 enum vga_switcheroo_state state)
980 struct snd_card *card = pci_get_drvdata(pci);
981 struct azx *chip = card->private_data;
982 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
985 wait_for_completion(&hda->probe_wait);
986 if (hda->init_failed)
989 disabled = (state == VGA_SWITCHEROO_OFF);
990 if (chip->disabled == disabled)
994 chip->disabled = disabled;
996 dev_info(chip->card->dev,
997 "Start delayed initialization\n");
998 if (azx_probe_continue(chip) < 0) {
999 dev_err(chip->card->dev, "initialization error\n");
1000 hda->init_failed = true;
1004 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
1005 disabled ? "Disabling" : "Enabling");
1007 pm_runtime_put_sync_suspend(card->dev);
1008 azx_suspend(card->dev);
1009 /* when we get suspended by vga switcheroo we end up in D3cold,
1010 * however we have no ACPI handle, so pci/acpi can't put us there,
1011 * put ourselves there */
1012 pci->current_state = PCI_D3cold;
1013 chip->disabled = true;
1014 if (snd_hda_lock_devices(chip->bus))
1015 dev_warn(chip->card->dev,
1016 "Cannot lock devices!\n");
1018 snd_hda_unlock_devices(chip->bus);
1019 pm_runtime_get_noresume(card->dev);
1020 chip->disabled = false;
1021 azx_resume(card->dev);
1026 static bool azx_vs_can_switch(struct pci_dev *pci)
1028 struct snd_card *card = pci_get_drvdata(pci);
1029 struct azx *chip = card->private_data;
1030 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1032 wait_for_completion(&hda->probe_wait);
1033 if (hda->init_failed)
1035 if (chip->disabled || !chip->bus)
1037 if (snd_hda_lock_devices(chip->bus))
1039 snd_hda_unlock_devices(chip->bus);
1043 static void init_vga_switcheroo(struct azx *chip)
1045 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1046 struct pci_dev *p = get_bound_vga(chip->pci);
1048 dev_info(chip->card->dev,
1049 "Handle VGA-switcheroo audio client\n");
1050 hda->use_vga_switcheroo = 1;
1055 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1056 .set_gpu_state = azx_vs_set_state,
1057 .can_switch = azx_vs_can_switch,
1060 static int register_vga_switcheroo(struct azx *chip)
1062 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1065 if (!hda->use_vga_switcheroo)
1067 /* FIXME: currently only handling DIS controller
1068 * is there any machine with two switchable HDMI audio controllers?
1070 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1075 hda->vga_switcheroo_registered = 1;
1077 /* register as an optimus hdmi audio power domain */
1078 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1079 &hda->hdmi_pm_domain);
1083 #define init_vga_switcheroo(chip) /* NOP */
1084 #define register_vga_switcheroo(chip) 0
1085 #define check_hdmi_disabled(pci) false
1086 #endif /* SUPPORT_VGA_SWITCHER */
1091 static int azx_free(struct azx *chip)
1093 struct pci_dev *pci = chip->pci;
1094 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1097 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1099 pm_runtime_get_noresume(&pci->dev);
1101 azx_del_card_list(chip);
1103 azx_notifier_unregister(chip);
1105 hda->init_failed = 1; /* to be sure */
1106 complete_all(&hda->probe_wait);
1108 if (use_vga_switcheroo(hda)) {
1109 if (chip->disabled && chip->bus)
1110 snd_hda_unlock_devices(chip->bus);
1111 if (hda->vga_switcheroo_registered)
1112 vga_switcheroo_unregister_client(chip->pci);
1115 if (chip->initialized) {
1116 azx_clear_irq_pending(chip);
1117 for (i = 0; i < chip->num_streams; i++)
1118 azx_stream_stop(chip, &chip->azx_dev[i]);
1119 azx_stop_chip(chip);
1123 free_irq(chip->irq, (void*)chip);
1125 pci_disable_msi(chip->pci);
1126 if (chip->remap_addr)
1127 iounmap(chip->remap_addr);
1129 azx_free_stream_pages(chip);
1130 if (chip->region_requested)
1131 pci_release_regions(chip->pci);
1132 pci_disable_device(chip->pci);
1133 kfree(chip->azx_dev);
1134 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1136 release_firmware(chip->fw);
1138 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1139 hda_display_power(false);
1147 static int azx_dev_free(struct snd_device *device)
1149 return azx_free(device->device_data);
1152 #ifdef SUPPORT_VGA_SWITCHEROO
1154 * Check of disabled HDMI controller by vga-switcheroo
1156 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1160 /* check only discrete GPU */
1161 switch (pci->vendor) {
1162 case PCI_VENDOR_ID_ATI:
1163 case PCI_VENDOR_ID_AMD:
1164 case PCI_VENDOR_ID_NVIDIA:
1165 if (pci->devfn == 1) {
1166 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1167 pci->bus->number, 0);
1169 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1179 static bool check_hdmi_disabled(struct pci_dev *pci)
1181 bool vga_inactive = false;
1182 struct pci_dev *p = get_bound_vga(pci);
1185 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1186 vga_inactive = true;
1189 return vga_inactive;
1191 #endif /* SUPPORT_VGA_SWITCHEROO */
1194 * white/black-listing for position_fix
1196 static struct snd_pci_quirk position_fix_list[] = {
1197 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1198 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1199 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1200 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1201 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1202 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1203 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1204 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1205 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1206 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1207 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1208 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1209 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1210 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1214 static int check_position_fix(struct azx *chip, int fix)
1216 const struct snd_pci_quirk *q;
1221 case POS_FIX_POSBUF:
1222 case POS_FIX_VIACOMBO:
1227 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1229 dev_info(chip->card->dev,
1230 "position_fix set to %d for device %04x:%04x\n",
1231 q->value, q->subvendor, q->subdevice);
1235 /* Check VIA/ATI HD Audio Controller exist */
1236 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1237 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1238 return POS_FIX_VIACOMBO;
1240 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1241 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1242 return POS_FIX_LPIB;
1244 return POS_FIX_AUTO;
1247 static void assign_position_fix(struct azx *chip, int fix)
1249 static azx_get_pos_callback_t callbacks[] = {
1250 [POS_FIX_AUTO] = NULL,
1251 [POS_FIX_LPIB] = azx_get_pos_lpib,
1252 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1253 [POS_FIX_VIACOMBO] = azx_via_get_position,
1254 [POS_FIX_COMBO] = azx_get_pos_lpib,
1257 chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1259 /* combo mode uses LPIB only for playback */
1260 if (fix == POS_FIX_COMBO)
1261 chip->get_position[1] = NULL;
1263 if (fix == POS_FIX_POSBUF &&
1264 (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1265 chip->get_delay[0] = chip->get_delay[1] =
1266 azx_get_delay_from_lpib;
1272 * black-lists for probe_mask
1274 static struct snd_pci_quirk probe_mask_list[] = {
1275 /* Thinkpad often breaks the controller communication when accessing
1276 * to the non-working (or non-existing) modem codec slot.
1278 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1279 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1280 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1282 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1283 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1284 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1285 /* forced codec slots */
1286 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1287 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1288 /* WinFast VP200 H (Teradici) user reported broken communication */
1289 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1293 #define AZX_FORCE_CODEC_MASK 0x100
1295 static void check_probe_mask(struct azx *chip, int dev)
1297 const struct snd_pci_quirk *q;
1299 chip->codec_probe_mask = probe_mask[dev];
1300 if (chip->codec_probe_mask == -1) {
1301 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1303 dev_info(chip->card->dev,
1304 "probe_mask set to 0x%x for device %04x:%04x\n",
1305 q->value, q->subvendor, q->subdevice);
1306 chip->codec_probe_mask = q->value;
1310 /* check forced option */
1311 if (chip->codec_probe_mask != -1 &&
1312 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1313 chip->codec_mask = chip->codec_probe_mask & 0xff;
1314 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1320 * white/black-list for enable_msi
1322 static struct snd_pci_quirk msi_black_list[] = {
1323 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1324 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1325 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1326 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1327 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1328 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1329 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1330 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1331 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1332 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1336 static void check_msi(struct azx *chip)
1338 const struct snd_pci_quirk *q;
1340 if (enable_msi >= 0) {
1341 chip->msi = !!enable_msi;
1344 chip->msi = 1; /* enable MSI as default */
1345 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1347 dev_info(chip->card->dev,
1348 "msi for device %04x:%04x set to %d\n",
1349 q->subvendor, q->subdevice, q->value);
1350 chip->msi = q->value;
1354 /* NVidia chipsets seem to cause troubles with MSI */
1355 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1356 dev_info(chip->card->dev, "Disabling MSI\n");
1361 /* check the snoop mode availability */
1362 static void azx_check_snoop_available(struct azx *chip)
1364 bool snoop = chip->snoop;
1366 switch (chip->driver_type) {
1367 case AZX_DRIVER_VIA:
1368 /* force to non-snoop mode for a new VIA controller
1373 pci_read_config_byte(chip->pci, 0x42, &val);
1374 if (!(val & 0x80) && chip->pci->revision == 0x30)
1378 case AZX_DRIVER_ATIHDMI_NS:
1379 /* new ATI HDMI requires non-snoop */
1382 case AZX_DRIVER_CTHDA:
1383 case AZX_DRIVER_CMEDIA:
1388 if (snoop != chip->snoop) {
1389 dev_info(chip->card->dev, "Force to %s mode\n",
1390 snoop ? "snoop" : "non-snoop");
1391 chip->snoop = snoop;
1395 static void azx_probe_work(struct work_struct *work)
1397 struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1398 azx_probe_continue(&hda->chip);
1404 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1405 int dev, unsigned int driver_caps,
1406 const struct hda_controller_ops *hda_ops,
1409 static struct snd_device_ops ops = {
1410 .dev_free = azx_dev_free,
1412 struct hda_intel *hda;
1418 err = pci_enable_device(pci);
1422 hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1424 dev_err(card->dev, "Cannot allocate hda\n");
1425 pci_disable_device(pci);
1430 spin_lock_init(&chip->reg_lock);
1431 mutex_init(&chip->open_mutex);
1434 chip->ops = hda_ops;
1436 chip->driver_caps = driver_caps;
1437 chip->driver_type = driver_caps & 0xff;
1439 chip->dev_index = dev;
1440 chip->jackpoll_ms = jackpoll_ms;
1441 INIT_LIST_HEAD(&chip->pcm_list);
1442 INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1443 INIT_LIST_HEAD(&hda->list);
1444 init_vga_switcheroo(chip);
1445 init_completion(&hda->probe_wait);
1447 assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1449 check_probe_mask(chip, dev);
1451 chip->single_cmd = single_cmd;
1452 chip->snoop = hda_snoop;
1453 azx_check_snoop_available(chip);
1455 if (bdl_pos_adj[dev] < 0) {
1456 switch (chip->driver_type) {
1457 case AZX_DRIVER_ICH:
1458 case AZX_DRIVER_PCH:
1459 bdl_pos_adj[dev] = 1;
1462 bdl_pos_adj[dev] = 32;
1466 chip->bdl_pos_adj = bdl_pos_adj;
1468 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1470 dev_err(card->dev, "Error creating device [card]!\n");
1475 /* continue probing in work context as may trigger request module */
1476 INIT_WORK(&hda->probe_work, azx_probe_work);
1483 static int azx_first_init(struct azx *chip)
1485 int dev = chip->dev_index;
1486 struct pci_dev *pci = chip->pci;
1487 struct snd_card *card = chip->card;
1489 unsigned short gcap;
1490 unsigned int dma_bits = 64;
1492 #if BITS_PER_LONG != 64
1493 /* Fix up base address on ULI M5461 */
1494 if (chip->driver_type == AZX_DRIVER_ULI) {
1496 pci_read_config_word(pci, 0x40, &tmp3);
1497 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1498 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1502 err = pci_request_regions(pci, "ICH HD audio");
1505 chip->region_requested = 1;
1507 chip->addr = pci_resource_start(pci, 0);
1508 chip->remap_addr = pci_ioremap_bar(pci, 0);
1509 if (chip->remap_addr == NULL) {
1510 dev_err(card->dev, "ioremap error\n");
1515 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1516 dev_dbg(card->dev, "Disabling 64bit MSI\n");
1517 pci->no_64bit_msi = true;
1519 if (pci_enable_msi(pci) < 0)
1523 if (azx_acquire_irq(chip, 0) < 0)
1526 pci_set_master(pci);
1527 synchronize_irq(chip->irq);
1529 gcap = azx_readw(chip, GCAP);
1530 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1532 /* AMD devices support 40 or 48bit DMA, take the safe one */
1533 if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1536 /* disable SB600 64bit support for safety */
1537 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1538 struct pci_dev *p_smbus;
1540 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1541 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1544 if (p_smbus->revision < 0x30)
1545 gcap &= ~AZX_GCAP_64OK;
1546 pci_dev_put(p_smbus);
1550 /* disable 64bit DMA address on some devices */
1551 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1552 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1553 gcap &= ~AZX_GCAP_64OK;
1556 /* disable buffer size rounding to 128-byte multiples if supported */
1557 if (align_buffer_size >= 0)
1558 chip->align_buffer_size = !!align_buffer_size;
1560 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1561 chip->align_buffer_size = 0;
1562 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1563 chip->align_buffer_size = 1;
1565 chip->align_buffer_size = 1;
1568 /* allow 64bit DMA address if supported by H/W */
1569 if (!(gcap & AZX_GCAP_64OK))
1571 if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1572 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1574 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1575 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1578 /* read number of streams from GCAP register instead of using
1581 chip->capture_streams = (gcap >> 8) & 0x0f;
1582 chip->playback_streams = (gcap >> 12) & 0x0f;
1583 if (!chip->playback_streams && !chip->capture_streams) {
1584 /* gcap didn't give any info, switching to old method */
1586 switch (chip->driver_type) {
1587 case AZX_DRIVER_ULI:
1588 chip->playback_streams = ULI_NUM_PLAYBACK;
1589 chip->capture_streams = ULI_NUM_CAPTURE;
1591 case AZX_DRIVER_ATIHDMI:
1592 case AZX_DRIVER_ATIHDMI_NS:
1593 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1594 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1596 case AZX_DRIVER_GENERIC:
1598 chip->playback_streams = ICH6_NUM_PLAYBACK;
1599 chip->capture_streams = ICH6_NUM_CAPTURE;
1603 chip->capture_index_offset = 0;
1604 chip->playback_index_offset = chip->capture_streams;
1605 chip->num_streams = chip->playback_streams + chip->capture_streams;
1606 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1608 if (!chip->azx_dev) {
1609 dev_err(card->dev, "cannot malloc azx_dev\n");
1613 err = azx_alloc_stream_pages(chip);
1617 /* initialize streams */
1618 azx_init_stream(chip);
1620 /* initialize chip */
1623 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1624 haswell_set_bclk(chip);
1626 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1628 /* codec detection */
1629 if (!chip->codec_mask) {
1630 dev_err(card->dev, "no codecs found!\n");
1634 strcpy(card->driver, "HDA-Intel");
1635 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1636 sizeof(card->shortname));
1637 snprintf(card->longname, sizeof(card->longname),
1638 "%s at 0x%lx irq %i",
1639 card->shortname, chip->addr, chip->irq);
1644 static void power_down_all_codecs(struct azx *chip)
1647 /* The codecs were powered up in snd_hda_codec_new().
1648 * Now all initialization done, so turn them down if possible
1650 struct hda_codec *codec;
1651 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1652 snd_hda_power_down(codec);
1657 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1658 /* callback from request_firmware_nowait() */
1659 static void azx_firmware_cb(const struct firmware *fw, void *context)
1661 struct snd_card *card = context;
1662 struct azx *chip = card->private_data;
1663 struct pci_dev *pci = chip->pci;
1666 dev_err(card->dev, "Cannot load firmware, aborting\n");
1671 if (!chip->disabled) {
1672 /* continue probing */
1673 if (azx_probe_continue(chip))
1679 snd_card_free(card);
1680 pci_set_drvdata(pci, NULL);
1685 * HDA controller ops.
1688 /* PCI register access. */
1689 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1691 writel(value, addr);
1694 static u32 pci_azx_readl(u32 __iomem *addr)
1699 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1701 writew(value, addr);
1704 static u16 pci_azx_readw(u16 __iomem *addr)
1709 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1711 writeb(value, addr);
1714 static u8 pci_azx_readb(u8 __iomem *addr)
1719 static int disable_msi_reset_irq(struct azx *chip)
1723 free_irq(chip->irq, chip);
1725 pci_disable_msi(chip->pci);
1727 err = azx_acquire_irq(chip, 1);
1734 /* DMA page allocation helpers. */
1735 static int dma_alloc_pages(struct azx *chip,
1738 struct snd_dma_buffer *buf)
1742 err = snd_dma_alloc_pages(type,
1747 mark_pages_wc(chip, buf, true);
1751 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1753 mark_pages_wc(chip, buf, false);
1754 snd_dma_free_pages(buf);
1757 static int substream_alloc_pages(struct azx *chip,
1758 struct snd_pcm_substream *substream,
1761 struct azx_dev *azx_dev = get_azx_dev(substream);
1764 mark_runtime_wc(chip, azx_dev, substream, false);
1765 azx_dev->bufsize = 0;
1766 azx_dev->period_bytes = 0;
1767 azx_dev->format_val = 0;
1768 ret = snd_pcm_lib_malloc_pages(substream, size);
1771 mark_runtime_wc(chip, azx_dev, substream, true);
1775 static int substream_free_pages(struct azx *chip,
1776 struct snd_pcm_substream *substream)
1778 struct azx_dev *azx_dev = get_azx_dev(substream);
1779 mark_runtime_wc(chip, azx_dev, substream, false);
1780 return snd_pcm_lib_free_pages(substream);
1783 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1784 struct vm_area_struct *area)
1787 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1788 struct azx *chip = apcm->chip;
1789 if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1790 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1794 static const struct hda_controller_ops pci_hda_ops = {
1795 .reg_writel = pci_azx_writel,
1796 .reg_readl = pci_azx_readl,
1797 .reg_writew = pci_azx_writew,
1798 .reg_readw = pci_azx_readw,
1799 .reg_writeb = pci_azx_writeb,
1800 .reg_readb = pci_azx_readb,
1801 .disable_msi_reset_irq = disable_msi_reset_irq,
1802 .dma_alloc_pages = dma_alloc_pages,
1803 .dma_free_pages = dma_free_pages,
1804 .substream_alloc_pages = substream_alloc_pages,
1805 .substream_free_pages = substream_free_pages,
1806 .pcm_mmap_prepare = pcm_mmap_prepare,
1807 .position_check = azx_position_check,
1810 static int azx_probe(struct pci_dev *pci,
1811 const struct pci_device_id *pci_id)
1814 struct snd_card *card;
1815 struct hda_intel *hda;
1817 bool schedule_probe;
1820 if (dev >= SNDRV_CARDS)
1827 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1830 dev_err(&pci->dev, "Error creating card!\n");
1834 err = azx_create(card, pci, dev, pci_id->driver_data,
1835 &pci_hda_ops, &chip);
1838 card->private_data = chip;
1839 hda = container_of(chip, struct hda_intel, chip);
1841 pci_set_drvdata(pci, card);
1843 err = register_vga_switcheroo(chip);
1845 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1849 if (check_hdmi_disabled(pci)) {
1850 dev_info(card->dev, "VGA controller is disabled\n");
1851 dev_info(card->dev, "Delaying initialization\n");
1852 chip->disabled = true;
1855 schedule_probe = !chip->disabled;
1857 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1858 if (patch[dev] && *patch[dev]) {
1859 dev_info(card->dev, "Applying patch firmware '%s'\n",
1861 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1862 &pci->dev, GFP_KERNEL, card,
1866 schedule_probe = false; /* continued in azx_firmware_cb() */
1868 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1870 #ifndef CONFIG_SND_HDA_I915
1871 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1872 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1876 schedule_work(&hda->probe_work);
1880 complete_all(&hda->probe_wait);
1884 snd_card_free(card);
1888 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1889 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1890 [AZX_DRIVER_NVIDIA] = 8,
1891 [AZX_DRIVER_TERA] = 1,
1894 static int azx_probe_continue(struct azx *chip)
1896 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1897 struct pci_dev *pci = chip->pci;
1898 int dev = chip->dev_index;
1901 /* Request power well for Haswell HDA controller and codec */
1902 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1903 #ifdef CONFIG_SND_HDA_I915
1904 err = hda_i915_init();
1906 dev_err(chip->card->dev,
1907 "Error request power-well from i915\n");
1910 err = hda_display_power(true);
1912 dev_err(chip->card->dev,
1913 "Cannot turn on display power on i915\n");
1919 err = azx_first_init(chip);
1923 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1924 chip->beep_mode = beep_mode[dev];
1927 /* create codec instances */
1928 err = azx_codec_create(chip, model[dev],
1929 azx_max_codecs[chip->driver_type],
1934 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1936 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1941 release_firmware(chip->fw); /* no longer needed */
1946 if ((probe_only[dev] & 1) == 0) {
1947 err = azx_codec_configure(chip);
1952 /* create PCM streams */
1953 err = snd_hda_build_pcms(chip->bus);
1957 /* create mixer controls */
1958 err = azx_mixer_create(chip);
1962 err = snd_card_register(chip->card);
1967 power_down_all_codecs(chip);
1968 azx_notifier_register(chip);
1969 azx_add_card_list(chip);
1970 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
1971 pm_runtime_put_noidle(&pci->dev);
1975 hda->init_failed = 1;
1976 complete_all(&hda->probe_wait);
1980 static void azx_remove(struct pci_dev *pci)
1982 struct snd_card *card = pci_get_drvdata(pci);
1985 snd_card_free(card);
1989 static const struct pci_device_id azx_ids[] = {
1991 { PCI_DEVICE(0x8086, 0x1c20),
1992 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1994 { PCI_DEVICE(0x8086, 0x1d20),
1995 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1997 { PCI_DEVICE(0x8086, 0x1e20),
1998 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2000 { PCI_DEVICE(0x8086, 0x8c20),
2001 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2003 { PCI_DEVICE(0x8086, 0x8ca0),
2004 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2006 { PCI_DEVICE(0x8086, 0x8d20),
2007 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2008 { PCI_DEVICE(0x8086, 0x8d21),
2009 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2011 { PCI_DEVICE(0x8086, 0x9c20),
2012 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2014 { PCI_DEVICE(0x8086, 0x9c21),
2015 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2016 /* Wildcat Point-LP */
2017 { PCI_DEVICE(0x8086, 0x9ca0),
2018 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2020 { PCI_DEVICE(0x8086, 0xa170),
2021 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2022 /* Sunrise Point-LP */
2023 { PCI_DEVICE(0x8086, 0x9d70),
2024 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2026 { PCI_DEVICE(0x8086, 0x0a0c),
2027 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2028 { PCI_DEVICE(0x8086, 0x0c0c),
2029 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2030 { PCI_DEVICE(0x8086, 0x0d0c),
2031 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2033 { PCI_DEVICE(0x8086, 0x160c),
2034 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2036 { PCI_DEVICE(0x8086, 0x3b56),
2037 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2039 { PCI_DEVICE(0x8086, 0x811b),
2040 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2042 { PCI_DEVICE(0x8086, 0x080a),
2043 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2045 { PCI_DEVICE(0x8086, 0x0f04),
2046 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2048 { PCI_DEVICE(0x8086, 0x2284),
2049 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2051 { PCI_DEVICE(0x8086, 0x2668),
2052 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2053 AZX_DCAPS_BUFSIZE }, /* ICH6 */
2054 { PCI_DEVICE(0x8086, 0x27d8),
2055 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2056 AZX_DCAPS_BUFSIZE }, /* ICH7 */
2057 { PCI_DEVICE(0x8086, 0x269a),
2058 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2059 AZX_DCAPS_BUFSIZE }, /* ESB2 */
2060 { PCI_DEVICE(0x8086, 0x284b),
2061 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2062 AZX_DCAPS_BUFSIZE }, /* ICH8 */
2063 { PCI_DEVICE(0x8086, 0x293e),
2064 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2065 AZX_DCAPS_BUFSIZE }, /* ICH9 */
2066 { PCI_DEVICE(0x8086, 0x293f),
2067 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2068 AZX_DCAPS_BUFSIZE }, /* ICH9 */
2069 { PCI_DEVICE(0x8086, 0x3a3e),
2070 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2071 AZX_DCAPS_BUFSIZE }, /* ICH10 */
2072 { PCI_DEVICE(0x8086, 0x3a6e),
2073 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2074 AZX_DCAPS_BUFSIZE }, /* ICH10 */
2076 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2077 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2078 .class_mask = 0xffffff,
2079 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
2080 /* ATI SB 450/600/700/800/900 */
2081 { PCI_DEVICE(0x1002, 0x437b),
2082 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2083 { PCI_DEVICE(0x1002, 0x4383),
2084 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2086 { PCI_DEVICE(0x1022, 0x780d),
2087 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2089 { PCI_DEVICE(0x1002, 0x793b),
2090 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2091 { PCI_DEVICE(0x1002, 0x7919),
2092 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2093 { PCI_DEVICE(0x1002, 0x960f),
2094 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095 { PCI_DEVICE(0x1002, 0x970f),
2096 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097 { PCI_DEVICE(0x1002, 0xaa00),
2098 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099 { PCI_DEVICE(0x1002, 0xaa08),
2100 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101 { PCI_DEVICE(0x1002, 0xaa10),
2102 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103 { PCI_DEVICE(0x1002, 0xaa18),
2104 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2105 { PCI_DEVICE(0x1002, 0xaa20),
2106 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2107 { PCI_DEVICE(0x1002, 0xaa28),
2108 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2109 { PCI_DEVICE(0x1002, 0xaa30),
2110 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2111 { PCI_DEVICE(0x1002, 0xaa38),
2112 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2113 { PCI_DEVICE(0x1002, 0xaa40),
2114 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2115 { PCI_DEVICE(0x1002, 0xaa48),
2116 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2117 { PCI_DEVICE(0x1002, 0xaa50),
2118 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2119 { PCI_DEVICE(0x1002, 0xaa58),
2120 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2121 { PCI_DEVICE(0x1002, 0xaa60),
2122 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2123 { PCI_DEVICE(0x1002, 0xaa68),
2124 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2125 { PCI_DEVICE(0x1002, 0xaa80),
2126 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2127 { PCI_DEVICE(0x1002, 0xaa88),
2128 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2129 { PCI_DEVICE(0x1002, 0xaa90),
2130 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2131 { PCI_DEVICE(0x1002, 0xaa98),
2132 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2133 { PCI_DEVICE(0x1002, 0x9902),
2134 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2135 { PCI_DEVICE(0x1002, 0xaaa0),
2136 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2137 { PCI_DEVICE(0x1002, 0xaaa8),
2138 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2139 { PCI_DEVICE(0x1002, 0xaab0),
2140 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2141 /* VIA VT8251/VT8237A */
2142 { PCI_DEVICE(0x1106, 0x3288),
2143 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2144 /* VIA GFX VT7122/VX900 */
2145 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2146 /* VIA GFX VT6122/VX11 */
2147 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2149 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2151 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2153 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2154 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2155 .class_mask = 0xffffff,
2156 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2158 { PCI_DEVICE(0x6549, 0x1200),
2159 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2160 { PCI_DEVICE(0x6549, 0x2200),
2161 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2162 /* Creative X-Fi (CA0110-IBG) */
2164 { PCI_DEVICE(0x1102, 0x0010),
2165 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2166 { PCI_DEVICE(0x1102, 0x0012),
2167 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2168 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2169 /* the following entry conflicts with snd-ctxfi driver,
2170 * as ctxfi driver mutates from HD-audio to native mode with
2171 * a special command sequence.
2173 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2174 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2175 .class_mask = 0xffffff,
2176 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2177 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2179 /* this entry seems still valid -- i.e. without emu20kx chip */
2180 { PCI_DEVICE(0x1102, 0x0009),
2181 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2182 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2185 { PCI_DEVICE(0x13f6, 0x5011),
2186 .driver_data = AZX_DRIVER_CMEDIA |
2187 AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB },
2189 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2190 /* VMware HDAudio */
2191 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2192 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2193 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2194 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2195 .class_mask = 0xffffff,
2196 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2197 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2198 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2199 .class_mask = 0xffffff,
2200 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2203 MODULE_DEVICE_TABLE(pci, azx_ids);
2205 /* pci_driver definition */
2206 static struct pci_driver azx_driver = {
2207 .name = KBUILD_MODNAME,
2208 .id_table = azx_ids,
2210 .remove = azx_remove,
2216 module_pci_driver(azx_driver);