3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
48 #include <linux/pm_runtime.h>
49 #include <linux/clocksource.h>
50 #include <linux/time.h>
51 #include <linux/completion.h>
54 /* for snoop control */
55 #include <asm/pgtable.h>
56 #include <asm/cacheflush.h>
58 #include <sound/core.h>
59 #include <sound/initval.h>
60 #include <linux/vgaarb.h>
61 #include <linux/vga_switcheroo.h>
62 #include <linux/firmware.h>
63 #include "hda_codec.h"
64 #include "hda_controller.h"
68 /* position fix mode */
77 /* Defines for ATI HD Audio support in SB450 south bridge */
78 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
79 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
81 /* Defines for Nvidia HDA support */
82 #define NVIDIA_HDA_TRANSREG_ADDR 0x4e
83 #define NVIDIA_HDA_ENABLE_COHBITS 0x0f
84 #define NVIDIA_HDA_ISTRM_COH 0x4d
85 #define NVIDIA_HDA_OSTRM_COH 0x4c
86 #define NVIDIA_HDA_ENABLE_COHBIT 0x01
88 /* Defines for Intel SCH HDA snoop control */
89 #define INTEL_SCH_HDA_DEVC 0x78
90 #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11)
92 /* Define IN stream 0 FIFO size offset in VIA controller */
93 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
94 /* Define VIA HD Audio Device ID*/
95 #define VIA_HDAC_DEVICE_ID 0x3288
97 /* max number of SDs */
98 /* ICH, ATI and VIA have 4 playback and 4 capture */
99 #define ICH6_NUM_CAPTURE 4
100 #define ICH6_NUM_PLAYBACK 4
102 /* ULI has 6 playback and 5 capture */
103 #define ULI_NUM_CAPTURE 5
104 #define ULI_NUM_PLAYBACK 6
106 /* ATI HDMI may have up to 8 playbacks and 0 capture */
107 #define ATIHDMI_NUM_CAPTURE 0
108 #define ATIHDMI_NUM_PLAYBACK 8
110 /* TERA has 4 playback and 3 capture */
111 #define TERA_NUM_CAPTURE 3
112 #define TERA_NUM_PLAYBACK 4
115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
118 static char *model[SNDRV_CARDS];
119 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
120 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
121 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
122 static int probe_only[SNDRV_CARDS];
123 static int jackpoll_ms[SNDRV_CARDS];
124 static bool single_cmd;
125 static int enable_msi = -1;
126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
127 static char *patch[SNDRV_CARDS];
129 #ifdef CONFIG_SND_HDA_INPUT_BEEP
130 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
131 CONFIG_SND_HDA_INPUT_BEEP_MODE};
134 module_param_array(index, int, NULL, 0444);
135 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
136 module_param_array(id, charp, NULL, 0444);
137 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
138 module_param_array(enable, bool, NULL, 0444);
139 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
140 module_param_array(model, charp, NULL, 0444);
141 MODULE_PARM_DESC(model, "Use the given board model.");
142 module_param_array(position_fix, int, NULL, 0444);
143 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
144 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
145 module_param_array(bdl_pos_adj, int, NULL, 0644);
146 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
147 module_param_array(probe_mask, int, NULL, 0444);
148 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
149 module_param_array(probe_only, int, NULL, 0444);
150 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
151 module_param_array(jackpoll_ms, int, NULL, 0444);
152 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
153 module_param(single_cmd, bool, 0444);
154 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
155 "(for debugging only).");
156 module_param(enable_msi, bint, 0444);
157 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
158 #ifdef CONFIG_SND_HDA_PATCH_LOADER
159 module_param_array(patch, charp, NULL, 0444);
160 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
162 #ifdef CONFIG_SND_HDA_INPUT_BEEP
163 module_param_array(beep_mode, bool, NULL, 0444);
164 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
165 "(0=off, 1=on) (default=1).");
169 static int param_set_xint(const char *val, const struct kernel_param *kp);
170 static struct kernel_param_ops param_ops_xint = {
171 .set = param_set_xint,
172 .get = param_get_int,
174 #define param_check_xint param_check_int
176 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
177 static int *power_save_addr = &power_save;
178 module_param(power_save, xint, 0644);
179 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
180 "(in second, 0 = disable).");
182 /* reset the HD-audio controller in power save mode.
183 * this may give more power-saving, but will take longer time to
186 static bool power_save_controller = 1;
187 module_param(power_save_controller, bool, 0644);
188 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
190 static int *power_save_addr;
191 #endif /* CONFIG_PM */
193 static int align_buffer_size = -1;
194 module_param(align_buffer_size, bint, 0644);
195 MODULE_PARM_DESC(align_buffer_size,
196 "Force buffer and period sizes to be multiple of 128 bytes.");
199 static int hda_snoop = -1;
200 module_param_named(snoop, hda_snoop, bint, 0444);
201 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
203 #define hda_snoop true
207 MODULE_LICENSE("GPL");
208 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
242 MODULE_DESCRIPTION("Intel HDA driver");
244 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
245 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
246 #define SUPPORT_VGA_SWITCHEROO
262 AZX_DRIVER_ATIHDMI_NS,
272 AZX_NUM_DRIVERS, /* keep this as last entry */
275 #define azx_get_snoop_type(chip) \
276 (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
277 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
279 /* quirks for old Intel chipsets */
280 #define AZX_DCAPS_INTEL_ICH \
281 (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
283 /* quirks for Intel PCH */
284 #define AZX_DCAPS_INTEL_PCH_NOPM \
285 (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
286 AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
288 #define AZX_DCAPS_INTEL_PCH \
289 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
291 #define AZX_DCAPS_INTEL_HASWELL \
292 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
293 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
294 AZX_DCAPS_SNOOP_TYPE(SCH))
296 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
297 #define AZX_DCAPS_INTEL_BROADWELL \
298 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
299 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
300 AZX_DCAPS_SNOOP_TYPE(SCH))
302 /* quirks for ATI SB / AMD Hudson */
303 #define AZX_DCAPS_PRESET_ATI_SB \
304 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
305 AZX_DCAPS_SNOOP_TYPE(ATI))
307 /* quirks for ATI/AMD HDMI */
308 #define AZX_DCAPS_PRESET_ATI_HDMI \
309 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
312 /* quirks for ATI HDMI with snoop off */
313 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
314 (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
316 /* quirks for Nvidia */
317 #define AZX_DCAPS_PRESET_NVIDIA \
318 (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
319 AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
320 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
322 #define AZX_DCAPS_PRESET_CTHDA \
323 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
324 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
327 * VGA-switcher support
329 #ifdef SUPPORT_VGA_SWITCHEROO
330 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
332 #define use_vga_switcheroo(chip) 0
335 static char *driver_short_names[] = {
336 [AZX_DRIVER_ICH] = "HDA Intel",
337 [AZX_DRIVER_PCH] = "HDA Intel PCH",
338 [AZX_DRIVER_SCH] = "HDA Intel MID",
339 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
340 [AZX_DRIVER_ATI] = "HDA ATI SB",
341 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
342 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
343 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
344 [AZX_DRIVER_SIS] = "HDA SIS966",
345 [AZX_DRIVER_ULI] = "HDA ULI M5461",
346 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
347 [AZX_DRIVER_TERA] = "HDA Teradici",
348 [AZX_DRIVER_CTX] = "HDA Creative",
349 [AZX_DRIVER_CTHDA] = "HDA Creative",
350 [AZX_DRIVER_CMEDIA] = "HDA C-Media",
351 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
357 /* for pending irqs */
358 struct work_struct irq_pending_work;
361 struct completion probe_wait;
362 struct work_struct probe_work;
364 /* card list (for power_save trigger) */
365 struct list_head list;
368 unsigned int irq_pending_warned:1;
370 /* VGA-switcheroo setup */
371 unsigned int use_vga_switcheroo:1;
372 unsigned int vga_switcheroo_registered:1;
373 unsigned int init_failed:1; /* delayed init failed */
375 /* secondary power domain for hdmi audio under vga device */
376 struct dev_pm_domain hdmi_pm_domain;
380 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
386 if (!dmab || !dmab->area || !dmab->bytes)
389 #ifdef CONFIG_SND_DMA_SGBUF
390 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
391 struct snd_sg_buf *sgbuf = dmab->private_data;
392 if (chip->driver_type == AZX_DRIVER_CMEDIA)
393 return; /* deal with only CORB/RIRB buffers */
395 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
397 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
402 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
404 set_memory_wc((unsigned long)dmab->area, pages);
406 set_memory_wb((unsigned long)dmab->area, pages);
409 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
412 __mark_pages_wc(chip, buf, on);
414 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
415 struct snd_pcm_substream *substream, bool on)
417 if (azx_dev->wc_marked != on) {
418 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
419 azx_dev->wc_marked = on;
423 /* NOP for other archs */
424 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
428 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
429 struct snd_pcm_substream *substream, bool on)
434 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
437 * initialize the PCI registers
439 /* update bits in a PCI register byte */
440 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
441 unsigned char mask, unsigned char val)
445 pci_read_config_byte(pci, reg, &data);
447 data |= (val & mask);
448 pci_write_config_byte(pci, reg, data);
451 static void azx_init_pci(struct azx *chip)
453 int snoop_type = azx_get_snoop_type(chip);
455 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
456 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
457 * Ensuring these bits are 0 clears playback static on some HD Audio
459 * The PCI register TCSEL is defined in the Intel manuals.
461 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
462 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
463 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
466 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
467 * we need to enable snoop.
469 if (snoop_type == AZX_SNOOP_TYPE_ATI) {
470 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
472 update_pci_byte(chip->pci,
473 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
474 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
477 /* For NVIDIA HDA, enable snoop */
478 if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
479 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
481 update_pci_byte(chip->pci,
482 NVIDIA_HDA_TRANSREG_ADDR,
483 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
484 update_pci_byte(chip->pci,
485 NVIDIA_HDA_ISTRM_COH,
486 0x01, NVIDIA_HDA_ENABLE_COHBIT);
487 update_pci_byte(chip->pci,
488 NVIDIA_HDA_OSTRM_COH,
489 0x01, NVIDIA_HDA_ENABLE_COHBIT);
492 /* Enable SCH/PCH snoop if needed */
493 if (snoop_type == AZX_SNOOP_TYPE_SCH) {
494 unsigned short snoop;
495 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
496 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
497 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
498 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
499 if (!azx_snoop(chip))
500 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
501 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
502 pci_read_config_word(chip->pci,
503 INTEL_SCH_HDA_DEVC, &snoop);
505 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
506 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
507 "Disabled" : "Enabled");
511 /* calculate runtime delay from LPIB */
512 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
515 struct snd_pcm_substream *substream = azx_dev->substream;
516 int stream = substream->stream;
517 unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
520 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
521 delay = pos - lpib_pos;
523 delay = lpib_pos - pos;
525 if (delay >= azx_dev->delay_negative_threshold)
528 delay += azx_dev->bufsize;
531 if (delay >= azx_dev->period_bytes) {
532 dev_info(chip->card->dev,
533 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
534 delay, azx_dev->period_bytes);
536 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
537 chip->get_delay[stream] = NULL;
540 return bytes_to_frames(substream->runtime, delay);
543 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
545 /* called from IRQ */
546 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
548 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
551 ok = azx_position_ok(chip, azx_dev);
553 azx_dev->irq_pending = 0;
555 } else if (ok == 0 && chip->bus && chip->bus->workq) {
556 /* bogus IRQ, process it later */
557 azx_dev->irq_pending = 1;
558 queue_work(chip->bus->workq, &hda->irq_pending_work);
564 * Check whether the current DMA position is acceptable for updating
565 * periods. Returns non-zero if it's OK.
567 * Many HD-audio controllers appear pretty inaccurate about
568 * the update-IRQ timing. The IRQ is issued before actually the
569 * data is processed. So, we need to process it afterwords in a
572 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
574 struct snd_pcm_substream *substream = azx_dev->substream;
575 int stream = substream->stream;
579 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
580 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
581 return -1; /* bogus (too early) interrupt */
583 if (chip->get_position[stream])
584 pos = chip->get_position[stream](chip, azx_dev);
585 else { /* use the position buffer as default */
586 pos = azx_get_pos_posbuf(chip, azx_dev);
587 if (!pos || pos == (u32)-1) {
588 dev_info(chip->card->dev,
589 "Invalid position buffer, using LPIB read method instead.\n");
590 chip->get_position[stream] = azx_get_pos_lpib;
591 pos = azx_get_pos_lpib(chip, azx_dev);
592 chip->get_delay[stream] = NULL;
594 chip->get_position[stream] = azx_get_pos_posbuf;
595 if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
596 chip->get_delay[stream] = azx_get_delay_from_lpib;
600 if (pos >= azx_dev->bufsize)
603 if (WARN_ONCE(!azx_dev->period_bytes,
604 "hda-intel: zero azx_dev->period_bytes"))
605 return -1; /* this shouldn't happen! */
606 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
607 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
608 /* NG - it's below the first next period boundary */
609 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
610 azx_dev->start_wallclk += wallclk;
611 return 1; /* OK, it's fine */
615 * The work for pending PCM period updates.
617 static void azx_irq_pending_work(struct work_struct *work)
619 struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
620 struct azx *chip = &hda->chip;
623 if (!hda->irq_pending_warned) {
624 dev_info(chip->card->dev,
625 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
627 hda->irq_pending_warned = 1;
632 spin_lock_irq(&chip->reg_lock);
633 for (i = 0; i < chip->num_streams; i++) {
634 struct azx_dev *azx_dev = &chip->azx_dev[i];
635 if (!azx_dev->irq_pending ||
636 !azx_dev->substream ||
639 ok = azx_position_ok(chip, azx_dev);
641 azx_dev->irq_pending = 0;
642 spin_unlock(&chip->reg_lock);
643 snd_pcm_period_elapsed(azx_dev->substream);
644 spin_lock(&chip->reg_lock);
646 pending = 0; /* too early */
650 spin_unlock_irq(&chip->reg_lock);
657 /* clear irq_pending flags and assure no on-going workq */
658 static void azx_clear_irq_pending(struct azx *chip)
662 spin_lock_irq(&chip->reg_lock);
663 for (i = 0; i < chip->num_streams; i++)
664 chip->azx_dev[i].irq_pending = 0;
665 spin_unlock_irq(&chip->reg_lock);
668 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
670 if (request_irq(chip->pci->irq, azx_interrupt,
671 chip->msi ? 0 : IRQF_SHARED,
672 KBUILD_MODNAME, chip)) {
673 dev_err(chip->card->dev,
674 "unable to grab IRQ %d, disabling device\n",
677 snd_card_disconnect(chip->card);
680 chip->irq = chip->pci->irq;
681 pci_intx(chip->pci, !chip->msi);
685 /* get the current DMA position with correction on VIA chips */
686 static unsigned int azx_via_get_position(struct azx *chip,
687 struct azx_dev *azx_dev)
689 unsigned int link_pos, mini_pos, bound_pos;
690 unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
691 unsigned int fifo_size;
693 link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
694 if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
695 /* Playback, no problem using link position */
701 * use mod to get the DMA position just like old chipset
703 mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
704 mod_dma_pos %= azx_dev->period_bytes;
706 /* azx_dev->fifo_size can't get FIFO size of in stream.
707 * Get from base address + offset.
709 fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
711 if (azx_dev->insufficient) {
712 /* Link position never gather than FIFO size */
713 if (link_pos <= fifo_size)
716 azx_dev->insufficient = 0;
719 if (link_pos <= fifo_size)
720 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
722 mini_pos = link_pos - fifo_size;
724 /* Find nearest previous boudary */
725 mod_mini_pos = mini_pos % azx_dev->period_bytes;
726 mod_link_pos = link_pos % azx_dev->period_bytes;
727 if (mod_link_pos >= fifo_size)
728 bound_pos = link_pos - mod_link_pos;
729 else if (mod_dma_pos >= mod_mini_pos)
730 bound_pos = mini_pos - mod_mini_pos;
732 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
733 if (bound_pos >= azx_dev->bufsize)
737 /* Calculate real DMA position we want */
738 return bound_pos + mod_dma_pos;
742 static DEFINE_MUTEX(card_list_lock);
743 static LIST_HEAD(card_list);
745 static void azx_add_card_list(struct azx *chip)
747 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
748 mutex_lock(&card_list_lock);
749 list_add(&hda->list, &card_list);
750 mutex_unlock(&card_list_lock);
753 static void azx_del_card_list(struct azx *chip)
755 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
756 mutex_lock(&card_list_lock);
757 list_del_init(&hda->list);
758 mutex_unlock(&card_list_lock);
761 /* trigger power-save check at writing parameter */
762 static int param_set_xint(const char *val, const struct kernel_param *kp)
764 struct hda_intel *hda;
767 int prev = power_save;
768 int ret = param_set_int(val, kp);
770 if (ret || prev == power_save)
773 mutex_lock(&card_list_lock);
774 list_for_each_entry(hda, &card_list, list) {
776 if (!chip->bus || chip->disabled)
778 list_for_each_entry(c, &chip->bus->codec_list, list)
779 snd_hda_power_sync(c);
781 mutex_unlock(&card_list_lock);
785 #define azx_add_card_list(chip) /* NOP */
786 #define azx_del_card_list(chip) /* NOP */
787 #endif /* CONFIG_PM */
789 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
793 static int azx_suspend(struct device *dev)
795 struct pci_dev *pci = to_pci_dev(dev);
796 struct snd_card *card = dev_get_drvdata(dev);
798 struct hda_intel *hda;
804 chip = card->private_data;
805 hda = container_of(chip, struct hda_intel, chip);
806 if (chip->disabled || hda->init_failed)
809 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
810 azx_clear_irq_pending(chip);
811 list_for_each_entry(p, &chip->pcm_list, list)
812 snd_pcm_suspend_all(p->pcm);
813 if (chip->initialized)
814 snd_hda_suspend(chip->bus);
816 azx_enter_link_reset(chip);
817 if (chip->irq >= 0) {
818 free_irq(chip->irq, chip);
823 pci_disable_msi(chip->pci);
824 pci_disable_device(pci);
826 pci_set_power_state(pci, PCI_D3hot);
827 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
828 hda_display_power(false);
832 static int azx_resume(struct device *dev)
834 struct pci_dev *pci = to_pci_dev(dev);
835 struct snd_card *card = dev_get_drvdata(dev);
837 struct hda_intel *hda;
842 chip = card->private_data;
843 hda = container_of(chip, struct hda_intel, chip);
844 if (chip->disabled || hda->init_failed)
847 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
848 hda_display_power(true);
849 haswell_set_bclk(chip);
851 pci_set_power_state(pci, PCI_D0);
852 pci_restore_state(pci);
853 if (pci_enable_device(pci) < 0) {
854 dev_err(chip->card->dev,
855 "pci_enable_device failed, disabling device\n");
856 snd_card_disconnect(card);
861 if (pci_enable_msi(pci) < 0)
863 if (azx_acquire_irq(chip, 1) < 0)
867 azx_init_chip(chip, true);
869 snd_hda_resume(chip->bus);
870 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
873 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
876 static int azx_runtime_suspend(struct device *dev)
878 struct snd_card *card = dev_get_drvdata(dev);
880 struct hda_intel *hda;
885 chip = card->private_data;
886 hda = container_of(chip, struct hda_intel, chip);
887 if (chip->disabled || hda->init_failed)
890 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
893 /* enable controller wake up event */
894 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
898 azx_enter_link_reset(chip);
899 azx_clear_irq_pending(chip);
900 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
901 hda_display_power(false);
906 static int azx_runtime_resume(struct device *dev)
908 struct snd_card *card = dev_get_drvdata(dev);
910 struct hda_intel *hda;
912 struct hda_codec *codec;
918 chip = card->private_data;
919 hda = container_of(chip, struct hda_intel, chip);
920 if (chip->disabled || hda->init_failed)
923 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
926 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
927 hda_display_power(true);
928 haswell_set_bclk(chip);
931 /* Read STATESTS before controller reset */
932 status = azx_readw(chip, STATESTS);
935 azx_init_chip(chip, true);
939 list_for_each_entry(codec, &bus->codec_list, list)
940 if (status & (1 << codec->addr))
941 queue_delayed_work(codec->bus->workq,
942 &codec->jackpoll_work, codec->jackpoll_interval);
945 /* disable controller Wake Up event*/
946 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
952 static int azx_runtime_idle(struct device *dev)
954 struct snd_card *card = dev_get_drvdata(dev);
956 struct hda_intel *hda;
961 chip = card->private_data;
962 hda = container_of(chip, struct hda_intel, chip);
963 if (chip->disabled || hda->init_failed)
966 if (!power_save_controller ||
967 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
973 static const struct dev_pm_ops azx_pm = {
974 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
975 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
978 #define AZX_PM_OPS &azx_pm
980 #define AZX_PM_OPS NULL
981 #endif /* CONFIG_PM */
984 static int azx_probe_continue(struct azx *chip);
986 #ifdef SUPPORT_VGA_SWITCHEROO
987 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
989 static void azx_vs_set_state(struct pci_dev *pci,
990 enum vga_switcheroo_state state)
992 struct snd_card *card = pci_get_drvdata(pci);
993 struct azx *chip = card->private_data;
994 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
997 wait_for_completion(&hda->probe_wait);
998 if (hda->init_failed)
1001 disabled = (state == VGA_SWITCHEROO_OFF);
1002 if (chip->disabled == disabled)
1006 chip->disabled = disabled;
1008 dev_info(chip->card->dev,
1009 "Start delayed initialization\n");
1010 if (azx_probe_continue(chip) < 0) {
1011 dev_err(chip->card->dev, "initialization error\n");
1012 hda->init_failed = true;
1016 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
1017 disabled ? "Disabling" : "Enabling");
1019 pm_runtime_put_sync_suspend(card->dev);
1020 azx_suspend(card->dev);
1021 /* when we get suspended by vga switcheroo we end up in D3cold,
1022 * however we have no ACPI handle, so pci/acpi can't put us there,
1023 * put ourselves there */
1024 pci->current_state = PCI_D3cold;
1025 chip->disabled = true;
1026 if (snd_hda_lock_devices(chip->bus))
1027 dev_warn(chip->card->dev,
1028 "Cannot lock devices!\n");
1030 snd_hda_unlock_devices(chip->bus);
1031 pm_runtime_get_noresume(card->dev);
1032 chip->disabled = false;
1033 azx_resume(card->dev);
1038 static bool azx_vs_can_switch(struct pci_dev *pci)
1040 struct snd_card *card = pci_get_drvdata(pci);
1041 struct azx *chip = card->private_data;
1042 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1044 wait_for_completion(&hda->probe_wait);
1045 if (hda->init_failed)
1047 if (chip->disabled || !chip->bus)
1049 if (snd_hda_lock_devices(chip->bus))
1051 snd_hda_unlock_devices(chip->bus);
1055 static void init_vga_switcheroo(struct azx *chip)
1057 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1058 struct pci_dev *p = get_bound_vga(chip->pci);
1060 dev_info(chip->card->dev,
1061 "Handle VGA-switcheroo audio client\n");
1062 hda->use_vga_switcheroo = 1;
1067 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1068 .set_gpu_state = azx_vs_set_state,
1069 .can_switch = azx_vs_can_switch,
1072 static int register_vga_switcheroo(struct azx *chip)
1074 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1077 if (!hda->use_vga_switcheroo)
1079 /* FIXME: currently only handling DIS controller
1080 * is there any machine with two switchable HDMI audio controllers?
1082 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1087 hda->vga_switcheroo_registered = 1;
1089 /* register as an optimus hdmi audio power domain */
1090 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1091 &hda->hdmi_pm_domain);
1095 #define init_vga_switcheroo(chip) /* NOP */
1096 #define register_vga_switcheroo(chip) 0
1097 #define check_hdmi_disabled(pci) false
1098 #endif /* SUPPORT_VGA_SWITCHER */
1103 static int azx_free(struct azx *chip)
1105 struct pci_dev *pci = chip->pci;
1106 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1109 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1111 pm_runtime_get_noresume(&pci->dev);
1113 azx_del_card_list(chip);
1115 azx_notifier_unregister(chip);
1117 hda->init_failed = 1; /* to be sure */
1118 complete_all(&hda->probe_wait);
1120 if (use_vga_switcheroo(hda)) {
1121 if (chip->disabled && chip->bus)
1122 snd_hda_unlock_devices(chip->bus);
1123 if (hda->vga_switcheroo_registered)
1124 vga_switcheroo_unregister_client(chip->pci);
1127 if (chip->initialized) {
1128 azx_clear_irq_pending(chip);
1129 for (i = 0; i < chip->num_streams; i++)
1130 azx_stream_stop(chip, &chip->azx_dev[i]);
1131 azx_stop_chip(chip);
1135 free_irq(chip->irq, (void*)chip);
1137 pci_disable_msi(chip->pci);
1138 if (chip->remap_addr)
1139 iounmap(chip->remap_addr);
1141 azx_free_stream_pages(chip);
1142 if (chip->region_requested)
1143 pci_release_regions(chip->pci);
1144 pci_disable_device(chip->pci);
1145 kfree(chip->azx_dev);
1146 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1147 release_firmware(chip->fw);
1149 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1150 hda_display_power(false);
1158 static int azx_dev_free(struct snd_device *device)
1160 return azx_free(device->device_data);
1163 #ifdef SUPPORT_VGA_SWITCHEROO
1165 * Check of disabled HDMI controller by vga-switcheroo
1167 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1171 /* check only discrete GPU */
1172 switch (pci->vendor) {
1173 case PCI_VENDOR_ID_ATI:
1174 case PCI_VENDOR_ID_AMD:
1175 case PCI_VENDOR_ID_NVIDIA:
1176 if (pci->devfn == 1) {
1177 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1178 pci->bus->number, 0);
1180 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1190 static bool check_hdmi_disabled(struct pci_dev *pci)
1192 bool vga_inactive = false;
1193 struct pci_dev *p = get_bound_vga(pci);
1196 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1197 vga_inactive = true;
1200 return vga_inactive;
1202 #endif /* SUPPORT_VGA_SWITCHEROO */
1205 * white/black-listing for position_fix
1207 static struct snd_pci_quirk position_fix_list[] = {
1208 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1209 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1210 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1211 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1212 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1213 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1214 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1215 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1216 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1217 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1218 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1219 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1220 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1221 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1225 static int check_position_fix(struct azx *chip, int fix)
1227 const struct snd_pci_quirk *q;
1232 case POS_FIX_POSBUF:
1233 case POS_FIX_VIACOMBO:
1238 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1240 dev_info(chip->card->dev,
1241 "position_fix set to %d for device %04x:%04x\n",
1242 q->value, q->subvendor, q->subdevice);
1246 /* Check VIA/ATI HD Audio Controller exist */
1247 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1248 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1249 return POS_FIX_VIACOMBO;
1251 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1252 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1253 return POS_FIX_LPIB;
1255 return POS_FIX_AUTO;
1258 static void assign_position_fix(struct azx *chip, int fix)
1260 static azx_get_pos_callback_t callbacks[] = {
1261 [POS_FIX_AUTO] = NULL,
1262 [POS_FIX_LPIB] = azx_get_pos_lpib,
1263 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1264 [POS_FIX_VIACOMBO] = azx_via_get_position,
1265 [POS_FIX_COMBO] = azx_get_pos_lpib,
1268 chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1270 /* combo mode uses LPIB only for playback */
1271 if (fix == POS_FIX_COMBO)
1272 chip->get_position[1] = NULL;
1274 if (fix == POS_FIX_POSBUF &&
1275 (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1276 chip->get_delay[0] = chip->get_delay[1] =
1277 azx_get_delay_from_lpib;
1283 * black-lists for probe_mask
1285 static struct snd_pci_quirk probe_mask_list[] = {
1286 /* Thinkpad often breaks the controller communication when accessing
1287 * to the non-working (or non-existing) modem codec slot.
1289 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1290 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1291 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1293 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1294 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1295 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1296 /* forced codec slots */
1297 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1298 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1299 /* WinFast VP200 H (Teradici) user reported broken communication */
1300 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1304 #define AZX_FORCE_CODEC_MASK 0x100
1306 static void check_probe_mask(struct azx *chip, int dev)
1308 const struct snd_pci_quirk *q;
1310 chip->codec_probe_mask = probe_mask[dev];
1311 if (chip->codec_probe_mask == -1) {
1312 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1314 dev_info(chip->card->dev,
1315 "probe_mask set to 0x%x for device %04x:%04x\n",
1316 q->value, q->subvendor, q->subdevice);
1317 chip->codec_probe_mask = q->value;
1321 /* check forced option */
1322 if (chip->codec_probe_mask != -1 &&
1323 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1324 chip->codec_mask = chip->codec_probe_mask & 0xff;
1325 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1331 * white/black-list for enable_msi
1333 static struct snd_pci_quirk msi_black_list[] = {
1334 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1335 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1336 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1337 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1338 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1339 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1340 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1341 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1342 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1343 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1347 static void check_msi(struct azx *chip)
1349 const struct snd_pci_quirk *q;
1351 if (enable_msi >= 0) {
1352 chip->msi = !!enable_msi;
1355 chip->msi = 1; /* enable MSI as default */
1356 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1358 dev_info(chip->card->dev,
1359 "msi for device %04x:%04x set to %d\n",
1360 q->subvendor, q->subdevice, q->value);
1361 chip->msi = q->value;
1365 /* NVidia chipsets seem to cause troubles with MSI */
1366 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1367 dev_info(chip->card->dev, "Disabling MSI\n");
1372 /* check the snoop mode availability */
1373 static void azx_check_snoop_available(struct azx *chip)
1375 int snoop = hda_snoop;
1378 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1379 snoop ? "snoop" : "non-snoop");
1380 chip->snoop = snoop;
1385 if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1386 chip->driver_type == AZX_DRIVER_VIA) {
1387 /* force to non-snoop mode for a new VIA controller
1391 pci_read_config_byte(chip->pci, 0x42, &val);
1392 if (!(val & 0x80) && chip->pci->revision == 0x30)
1396 if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1399 chip->snoop = snoop;
1401 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1404 static void azx_probe_work(struct work_struct *work)
1406 struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1407 azx_probe_continue(&hda->chip);
1413 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1414 int dev, unsigned int driver_caps,
1415 const struct hda_controller_ops *hda_ops,
1418 static struct snd_device_ops ops = {
1419 .dev_free = azx_dev_free,
1421 struct hda_intel *hda;
1427 err = pci_enable_device(pci);
1431 hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1433 dev_err(card->dev, "Cannot allocate hda\n");
1434 pci_disable_device(pci);
1439 spin_lock_init(&chip->reg_lock);
1440 mutex_init(&chip->open_mutex);
1443 chip->ops = hda_ops;
1445 chip->driver_caps = driver_caps;
1446 chip->driver_type = driver_caps & 0xff;
1448 chip->dev_index = dev;
1449 chip->jackpoll_ms = jackpoll_ms;
1450 INIT_LIST_HEAD(&chip->pcm_list);
1451 INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1452 INIT_LIST_HEAD(&hda->list);
1453 init_vga_switcheroo(chip);
1454 init_completion(&hda->probe_wait);
1456 assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1458 check_probe_mask(chip, dev);
1460 chip->single_cmd = single_cmd;
1461 azx_check_snoop_available(chip);
1463 if (bdl_pos_adj[dev] < 0) {
1464 switch (chip->driver_type) {
1465 case AZX_DRIVER_ICH:
1466 case AZX_DRIVER_PCH:
1467 bdl_pos_adj[dev] = 1;
1470 bdl_pos_adj[dev] = 32;
1474 chip->bdl_pos_adj = bdl_pos_adj;
1476 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1478 dev_err(card->dev, "Error creating device [card]!\n");
1483 /* continue probing in work context as may trigger request module */
1484 INIT_WORK(&hda->probe_work, azx_probe_work);
1491 static int azx_first_init(struct azx *chip)
1493 int dev = chip->dev_index;
1494 struct pci_dev *pci = chip->pci;
1495 struct snd_card *card = chip->card;
1497 unsigned short gcap;
1498 unsigned int dma_bits = 64;
1500 #if BITS_PER_LONG != 64
1501 /* Fix up base address on ULI M5461 */
1502 if (chip->driver_type == AZX_DRIVER_ULI) {
1504 pci_read_config_word(pci, 0x40, &tmp3);
1505 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1506 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1510 err = pci_request_regions(pci, "ICH HD audio");
1513 chip->region_requested = 1;
1515 chip->addr = pci_resource_start(pci, 0);
1516 chip->remap_addr = pci_ioremap_bar(pci, 0);
1517 if (chip->remap_addr == NULL) {
1518 dev_err(card->dev, "ioremap error\n");
1523 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1524 dev_dbg(card->dev, "Disabling 64bit MSI\n");
1525 pci->no_64bit_msi = true;
1527 if (pci_enable_msi(pci) < 0)
1531 if (azx_acquire_irq(chip, 0) < 0)
1534 pci_set_master(pci);
1535 synchronize_irq(chip->irq);
1537 gcap = azx_readw(chip, GCAP);
1538 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1540 /* AMD devices support 40 or 48bit DMA, take the safe one */
1541 if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1544 /* disable SB600 64bit support for safety */
1545 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1546 struct pci_dev *p_smbus;
1548 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1549 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1552 if (p_smbus->revision < 0x30)
1553 gcap &= ~AZX_GCAP_64OK;
1554 pci_dev_put(p_smbus);
1558 /* disable 64bit DMA address on some devices */
1559 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1560 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1561 gcap &= ~AZX_GCAP_64OK;
1564 /* disable buffer size rounding to 128-byte multiples if supported */
1565 if (align_buffer_size >= 0)
1566 chip->align_buffer_size = !!align_buffer_size;
1568 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1569 chip->align_buffer_size = 0;
1571 chip->align_buffer_size = 1;
1574 /* allow 64bit DMA address if supported by H/W */
1575 if (!(gcap & AZX_GCAP_64OK))
1577 if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1578 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1580 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1581 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1584 /* read number of streams from GCAP register instead of using
1587 chip->capture_streams = (gcap >> 8) & 0x0f;
1588 chip->playback_streams = (gcap >> 12) & 0x0f;
1589 if (!chip->playback_streams && !chip->capture_streams) {
1590 /* gcap didn't give any info, switching to old method */
1592 switch (chip->driver_type) {
1593 case AZX_DRIVER_ULI:
1594 chip->playback_streams = ULI_NUM_PLAYBACK;
1595 chip->capture_streams = ULI_NUM_CAPTURE;
1597 case AZX_DRIVER_ATIHDMI:
1598 case AZX_DRIVER_ATIHDMI_NS:
1599 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1600 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1602 case AZX_DRIVER_GENERIC:
1604 chip->playback_streams = ICH6_NUM_PLAYBACK;
1605 chip->capture_streams = ICH6_NUM_CAPTURE;
1609 chip->capture_index_offset = 0;
1610 chip->playback_index_offset = chip->capture_streams;
1611 chip->num_streams = chip->playback_streams + chip->capture_streams;
1612 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1614 if (!chip->azx_dev) {
1615 dev_err(card->dev, "cannot malloc azx_dev\n");
1619 err = azx_alloc_stream_pages(chip);
1623 /* initialize streams */
1624 azx_init_stream(chip);
1626 /* initialize chip */
1629 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1630 haswell_set_bclk(chip);
1632 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1634 /* codec detection */
1635 if (!chip->codec_mask) {
1636 dev_err(card->dev, "no codecs found!\n");
1640 strcpy(card->driver, "HDA-Intel");
1641 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1642 sizeof(card->shortname));
1643 snprintf(card->longname, sizeof(card->longname),
1644 "%s at 0x%lx irq %i",
1645 card->shortname, chip->addr, chip->irq);
1650 static void power_down_all_codecs(struct azx *chip)
1653 /* The codecs were powered up in snd_hda_codec_new().
1654 * Now all initialization done, so turn them down if possible
1656 struct hda_codec *codec;
1657 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1658 snd_hda_power_down(codec);
1663 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1664 /* callback from request_firmware_nowait() */
1665 static void azx_firmware_cb(const struct firmware *fw, void *context)
1667 struct snd_card *card = context;
1668 struct azx *chip = card->private_data;
1669 struct pci_dev *pci = chip->pci;
1672 dev_err(card->dev, "Cannot load firmware, aborting\n");
1677 if (!chip->disabled) {
1678 /* continue probing */
1679 if (azx_probe_continue(chip))
1685 snd_card_free(card);
1686 pci_set_drvdata(pci, NULL);
1691 * HDA controller ops.
1694 /* PCI register access. */
1695 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1697 writel(value, addr);
1700 static u32 pci_azx_readl(u32 __iomem *addr)
1705 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1707 writew(value, addr);
1710 static u16 pci_azx_readw(u16 __iomem *addr)
1715 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1717 writeb(value, addr);
1720 static u8 pci_azx_readb(u8 __iomem *addr)
1725 static int disable_msi_reset_irq(struct azx *chip)
1729 free_irq(chip->irq, chip);
1731 pci_disable_msi(chip->pci);
1733 err = azx_acquire_irq(chip, 1);
1740 /* DMA page allocation helpers. */
1741 static int dma_alloc_pages(struct azx *chip,
1744 struct snd_dma_buffer *buf)
1748 err = snd_dma_alloc_pages(type,
1753 mark_pages_wc(chip, buf, true);
1757 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1759 mark_pages_wc(chip, buf, false);
1760 snd_dma_free_pages(buf);
1763 static int substream_alloc_pages(struct azx *chip,
1764 struct snd_pcm_substream *substream,
1767 struct azx_dev *azx_dev = get_azx_dev(substream);
1770 mark_runtime_wc(chip, azx_dev, substream, false);
1771 azx_dev->bufsize = 0;
1772 azx_dev->period_bytes = 0;
1773 azx_dev->format_val = 0;
1774 ret = snd_pcm_lib_malloc_pages(substream, size);
1777 mark_runtime_wc(chip, azx_dev, substream, true);
1781 static int substream_free_pages(struct azx *chip,
1782 struct snd_pcm_substream *substream)
1784 struct azx_dev *azx_dev = get_azx_dev(substream);
1785 mark_runtime_wc(chip, azx_dev, substream, false);
1786 return snd_pcm_lib_free_pages(substream);
1789 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1790 struct vm_area_struct *area)
1793 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1794 struct azx *chip = apcm->chip;
1795 if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1796 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1800 static const struct hda_controller_ops pci_hda_ops = {
1801 .reg_writel = pci_azx_writel,
1802 .reg_readl = pci_azx_readl,
1803 .reg_writew = pci_azx_writew,
1804 .reg_readw = pci_azx_readw,
1805 .reg_writeb = pci_azx_writeb,
1806 .reg_readb = pci_azx_readb,
1807 .disable_msi_reset_irq = disable_msi_reset_irq,
1808 .dma_alloc_pages = dma_alloc_pages,
1809 .dma_free_pages = dma_free_pages,
1810 .substream_alloc_pages = substream_alloc_pages,
1811 .substream_free_pages = substream_free_pages,
1812 .pcm_mmap_prepare = pcm_mmap_prepare,
1813 .position_check = azx_position_check,
1816 static int azx_probe(struct pci_dev *pci,
1817 const struct pci_device_id *pci_id)
1820 struct snd_card *card;
1821 struct hda_intel *hda;
1823 bool schedule_probe;
1826 if (dev >= SNDRV_CARDS)
1833 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1836 dev_err(&pci->dev, "Error creating card!\n");
1840 err = azx_create(card, pci, dev, pci_id->driver_data,
1841 &pci_hda_ops, &chip);
1844 card->private_data = chip;
1845 hda = container_of(chip, struct hda_intel, chip);
1847 pci_set_drvdata(pci, card);
1849 err = register_vga_switcheroo(chip);
1851 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1855 if (check_hdmi_disabled(pci)) {
1856 dev_info(card->dev, "VGA controller is disabled\n");
1857 dev_info(card->dev, "Delaying initialization\n");
1858 chip->disabled = true;
1861 schedule_probe = !chip->disabled;
1863 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1864 if (patch[dev] && *patch[dev]) {
1865 dev_info(card->dev, "Applying patch firmware '%s'\n",
1867 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1868 &pci->dev, GFP_KERNEL, card,
1872 schedule_probe = false; /* continued in azx_firmware_cb() */
1874 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1876 #ifndef CONFIG_SND_HDA_I915
1877 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1878 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1882 schedule_work(&hda->probe_work);
1886 complete_all(&hda->probe_wait);
1890 snd_card_free(card);
1894 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1895 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1896 [AZX_DRIVER_NVIDIA] = 8,
1897 [AZX_DRIVER_TERA] = 1,
1900 static int azx_probe_continue(struct azx *chip)
1902 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1903 struct pci_dev *pci = chip->pci;
1904 int dev = chip->dev_index;
1907 /* Request power well for Haswell HDA controller and codec */
1908 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1909 #ifdef CONFIG_SND_HDA_I915
1910 err = hda_i915_init();
1912 dev_err(chip->card->dev,
1913 "Error request power-well from i915\n");
1916 err = hda_display_power(true);
1918 dev_err(chip->card->dev,
1919 "Cannot turn on display power on i915\n");
1925 err = azx_first_init(chip);
1929 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1930 chip->beep_mode = beep_mode[dev];
1933 /* create codec instances */
1934 err = azx_codec_create(chip, model[dev],
1935 azx_max_codecs[chip->driver_type],
1940 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1942 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1947 release_firmware(chip->fw); /* no longer needed */
1952 if ((probe_only[dev] & 1) == 0) {
1953 err = azx_codec_configure(chip);
1958 /* create PCM streams */
1959 err = snd_hda_build_pcms(chip->bus);
1963 /* create mixer controls */
1964 err = azx_mixer_create(chip);
1968 err = snd_card_register(chip->card);
1973 power_down_all_codecs(chip);
1974 azx_notifier_register(chip);
1975 azx_add_card_list(chip);
1976 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
1977 pm_runtime_put_noidle(&pci->dev);
1981 hda->init_failed = 1;
1982 complete_all(&hda->probe_wait);
1986 static void azx_remove(struct pci_dev *pci)
1988 struct snd_card *card = pci_get_drvdata(pci);
1991 snd_card_free(card);
1995 static const struct pci_device_id azx_ids[] = {
1997 { PCI_DEVICE(0x8086, 0x1c20),
1998 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2000 { PCI_DEVICE(0x8086, 0x1d20),
2001 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2003 { PCI_DEVICE(0x8086, 0x1e20),
2004 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2006 { PCI_DEVICE(0x8086, 0x8c20),
2007 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2009 { PCI_DEVICE(0x8086, 0x8ca0),
2010 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2012 { PCI_DEVICE(0x8086, 0x8d20),
2013 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2014 { PCI_DEVICE(0x8086, 0x8d21),
2015 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2017 { PCI_DEVICE(0x8086, 0x9c20),
2018 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2020 { PCI_DEVICE(0x8086, 0x9c21),
2021 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2022 /* Wildcat Point-LP */
2023 { PCI_DEVICE(0x8086, 0x9ca0),
2024 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2026 { PCI_DEVICE(0x8086, 0xa170),
2027 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2028 /* Sunrise Point-LP */
2029 { PCI_DEVICE(0x8086, 0x9d70),
2030 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2032 { PCI_DEVICE(0x8086, 0x0a0c),
2033 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2034 { PCI_DEVICE(0x8086, 0x0c0c),
2035 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2036 { PCI_DEVICE(0x8086, 0x0d0c),
2037 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2039 { PCI_DEVICE(0x8086, 0x160c),
2040 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2042 { PCI_DEVICE(0x8086, 0x3b56),
2043 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2045 { PCI_DEVICE(0x8086, 0x811b),
2046 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2048 { PCI_DEVICE(0x8086, 0x080a),
2049 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2051 { PCI_DEVICE(0x8086, 0x0f04),
2052 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2054 { PCI_DEVICE(0x8086, 0x2284),
2055 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2057 { PCI_DEVICE(0x8086, 0x2668),
2058 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2060 { PCI_DEVICE(0x8086, 0x27d8),
2061 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2063 { PCI_DEVICE(0x8086, 0x269a),
2064 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2066 { PCI_DEVICE(0x8086, 0x284b),
2067 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2069 { PCI_DEVICE(0x8086, 0x293e),
2070 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2072 { PCI_DEVICE(0x8086, 0x293f),
2073 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2075 { PCI_DEVICE(0x8086, 0x3a3e),
2076 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2078 { PCI_DEVICE(0x8086, 0x3a6e),
2079 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2081 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2082 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2083 .class_mask = 0xffffff,
2084 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2085 /* ATI SB 450/600/700/800/900 */
2086 { PCI_DEVICE(0x1002, 0x437b),
2087 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2088 { PCI_DEVICE(0x1002, 0x4383),
2089 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2091 { PCI_DEVICE(0x1022, 0x780d),
2092 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2094 { PCI_DEVICE(0x1002, 0x793b),
2095 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2096 { PCI_DEVICE(0x1002, 0x7919),
2097 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2098 { PCI_DEVICE(0x1002, 0x960f),
2099 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2100 { PCI_DEVICE(0x1002, 0x970f),
2101 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2102 { PCI_DEVICE(0x1002, 0xaa00),
2103 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2104 { PCI_DEVICE(0x1002, 0xaa08),
2105 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2106 { PCI_DEVICE(0x1002, 0xaa10),
2107 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2108 { PCI_DEVICE(0x1002, 0xaa18),
2109 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2110 { PCI_DEVICE(0x1002, 0xaa20),
2111 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2112 { PCI_DEVICE(0x1002, 0xaa28),
2113 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2114 { PCI_DEVICE(0x1002, 0xaa30),
2115 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2116 { PCI_DEVICE(0x1002, 0xaa38),
2117 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2118 { PCI_DEVICE(0x1002, 0xaa40),
2119 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2120 { PCI_DEVICE(0x1002, 0xaa48),
2121 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2122 { PCI_DEVICE(0x1002, 0xaa50),
2123 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2124 { PCI_DEVICE(0x1002, 0xaa58),
2125 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2126 { PCI_DEVICE(0x1002, 0xaa60),
2127 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2128 { PCI_DEVICE(0x1002, 0xaa68),
2129 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2130 { PCI_DEVICE(0x1002, 0xaa80),
2131 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2132 { PCI_DEVICE(0x1002, 0xaa88),
2133 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2134 { PCI_DEVICE(0x1002, 0xaa90),
2135 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2136 { PCI_DEVICE(0x1002, 0xaa98),
2137 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2138 { PCI_DEVICE(0x1002, 0x9902),
2139 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2140 { PCI_DEVICE(0x1002, 0xaaa0),
2141 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2142 { PCI_DEVICE(0x1002, 0xaaa8),
2143 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2144 { PCI_DEVICE(0x1002, 0xaab0),
2145 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2146 /* VIA VT8251/VT8237A */
2147 { PCI_DEVICE(0x1106, 0x3288),
2148 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2149 /* VIA GFX VT7122/VX900 */
2150 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2151 /* VIA GFX VT6122/VX11 */
2152 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2154 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2156 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2158 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2159 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2160 .class_mask = 0xffffff,
2161 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2163 { PCI_DEVICE(0x6549, 0x1200),
2164 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2165 { PCI_DEVICE(0x6549, 0x2200),
2166 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2167 /* Creative X-Fi (CA0110-IBG) */
2169 { PCI_DEVICE(0x1102, 0x0010),
2170 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2171 { PCI_DEVICE(0x1102, 0x0012),
2172 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2173 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2174 /* the following entry conflicts with snd-ctxfi driver,
2175 * as ctxfi driver mutates from HD-audio to native mode with
2176 * a special command sequence.
2178 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2179 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2180 .class_mask = 0xffffff,
2181 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2182 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2184 /* this entry seems still valid -- i.e. without emu20kx chip */
2185 { PCI_DEVICE(0x1102, 0x0009),
2186 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2187 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2190 { PCI_DEVICE(0x13f6, 0x5011),
2191 .driver_data = AZX_DRIVER_CMEDIA |
2192 AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2194 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2195 /* VMware HDAudio */
2196 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2197 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2198 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2199 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2200 .class_mask = 0xffffff,
2201 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2202 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2203 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2204 .class_mask = 0xffffff,
2205 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2208 MODULE_DEVICE_TABLE(pci, azx_ids);
2210 /* pci_driver definition */
2211 static struct pci_driver azx_driver = {
2212 .name = KBUILD_MODNAME,
2213 .id_table = azx_ids,
2215 .remove = azx_remove,
2221 module_pci_driver(azx_driver);