sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/io.h>
  48 #include <linux/pm_runtime.h>
  49 #include <linux/clocksource.h>
  50 #include <linux/time.h>
  51 #include <linux/completion.h>
  52
  53 #ifdef CONFIG_X86
  54 /* for snoop control */
  55 #include <asm/pgtable.h>
  56 #include <asm/cacheflush.h>
  57 #endif
  58 #include <sound/core.h>
  59 #include <sound/initval.h>
  60 #include <linux/vgaarb.h>
  61 #include <linux/vga_switcheroo.h>
  62 #include <linux/firmware.h>
  63 #include "hda_codec.h"
  64 #include "hda_controller.h"
  65 #include "hda_priv.h"
  66 #include "hda_i915.h"
  67
  68 /* position fix mode */
  69 enum {
  70         POS_FIX_AUTO,
  71         POS_FIX_LPIB,
  72         POS_FIX_POSBUF,
  73         POS_FIX_VIACOMBO,
  74         POS_FIX_COMBO,
  75 };
  76
  77 /* Defines for ATI HD Audio support in SB450 south bridge */
  78 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
  79 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
  80
  81 /* Defines for Nvidia HDA support */
  82 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
  83 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
  84 #define NVIDIA_HDA_ISTRM_COH          0x4d
  85 #define NVIDIA_HDA_OSTRM_COH          0x4c
  86 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
  87
  88 /* Defines for Intel SCH HDA snoop control */
  89 #define INTEL_SCH_HDA_DEVC      0x78
  90 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
  91
  92 /* Define IN stream 0 FIFO size offset in VIA controller */
  93 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
  94 /* Define VIA HD Audio Device ID*/
  95 #define VIA_HDAC_DEVICE_ID              0x3288
  96
  97 /* max number of SDs */
  98 /* ICH, ATI and VIA have 4 playback and 4 capture */
  99 #define ICH6_NUM_CAPTURE        4
 100 #define ICH6_NUM_PLAYBACK       4
 101
 102 /* ULI has 6 playback and 5 capture */
 103 #define ULI_NUM_CAPTURE         5
 104 #define ULI_NUM_PLAYBACK        6
 105
 106 /* ATI HDMI may have up to 8 playbacks and 0 capture */
 107 #define ATIHDMI_NUM_CAPTURE     0
 108 #define ATIHDMI_NUM_PLAYBACK    8
 109
 110 /* TERA has 4 playback and 3 capture */
 111 #define TERA_NUM_CAPTURE        3
 112 #define TERA_NUM_PLAYBACK       4
 113
 114
 115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
 116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
 117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 118 static char *model[SNDRV_CARDS];
 119 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 120 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 121 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 122 static int probe_only[SNDRV_CARDS];
 123 static int jackpoll_ms[SNDRV_CARDS];
 124 static bool single_cmd;
 125 static int enable_msi = -1;
 126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 127 static char *patch[SNDRV_CARDS];
 128 #endif
 129 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 130 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
 131                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
 132 #endif
 133
 134 module_param_array(index, int, NULL, 0444);
 135 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
 136 module_param_array(id, charp, NULL, 0444);
 137 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
 138 module_param_array(enable, bool, NULL, 0444);
 139 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
 140 module_param_array(model, charp, NULL, 0444);
 141 MODULE_PARM_DESC(model, "Use the given board model.");
 142 module_param_array(position_fix, int, NULL, 0444);
 143 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
 144                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 145 module_param_array(bdl_pos_adj, int, NULL, 0644);
 146 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 147 module_param_array(probe_mask, int, NULL, 0444);
 148 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 149 module_param_array(probe_only, int, NULL, 0444);
 150 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 151 module_param_array(jackpoll_ms, int, NULL, 0444);
 152 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 153 module_param(single_cmd, bool, 0444);
 154 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 155                  "(for debugging only).");
 156 module_param(enable_msi, bint, 0444);
 157 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 158 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 159 module_param_array(patch, charp, NULL, 0444);
 160 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 161 #endif
 162 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 163 module_param_array(beep_mode, bool, NULL, 0444);
 164 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 165                             "(0=off, 1=on) (default=1).");
 166 #endif
 167
 168 #ifdef CONFIG_PM
 169 static int param_set_xint(const char *val, const struct kernel_param *kp);
 170 static struct kernel_param_ops param_ops_xint = {
 171         .set = param_set_xint,
 172         .get = param_get_int,
 173 };
 174 #define param_check_xint param_check_int
 175
 176 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 177 static int *power_save_addr = &power_save;
 178 module_param(power_save, xint, 0644);
 179 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 180                  "(in second, 0 = disable).");
 181
 182 /* reset the HD-audio controller in power save mode.
 183  * this may give more power-saving, but will take longer time to
 184  * wake up.
 185  */
 186 static bool power_save_controller = 1;
 187 module_param(power_save_controller, bool, 0644);
 188 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 189 #else
 190 static int *power_save_addr;
 191 #endif /* CONFIG_PM */
 192
 193 static int align_buffer_size = -1;
 194 module_param(align_buffer_size, bint, 0644);
 195 MODULE_PARM_DESC(align_buffer_size,
 196                 "Force buffer and period sizes to be multiple of 128 bytes.");
 197
 198 #ifdef CONFIG_X86
 199 static int hda_snoop = -1;
 200 module_param_named(snoop, hda_snoop, bint, 0444);
 201 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 202 #else
 203 #define hda_snoop               true
 204 #endif
 205
 206
 207 MODULE_LICENSE("GPL");
 208 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 209                          "{Intel, ICH6M},"
 210                          "{Intel, ICH7},"
 211                          "{Intel, ESB2},"
 212                          "{Intel, ICH8},"
 213                          "{Intel, ICH9},"
 214                          "{Intel, ICH10},"
 215                          "{Intel, PCH},"
 216                          "{Intel, CPT},"
 217                          "{Intel, PPT},"
 218                          "{Intel, LPT},"
 219                          "{Intel, LPT_LP},"
 220                          "{Intel, WPT_LP},"
 221                          "{Intel, SPT},"
 222                          "{Intel, SPT_LP},"
 223                          "{Intel, HPT},"
 224                          "{Intel, PBG},"
 225                          "{Intel, SCH},"
 226                          "{ATI, SB450},"
 227                          "{ATI, SB600},"
 228                          "{ATI, RS600},"
 229                          "{ATI, RS690},"
 230                          "{ATI, RS780},"
 231                          "{ATI, R600},"
 232                          "{ATI, RV630},"
 233                          "{ATI, RV610},"
 234                          "{ATI, RV670},"
 235                          "{ATI, RV635},"
 236                          "{ATI, RV620},"
 237                          "{ATI, RV770},"
 238                          "{VIA, VT8251},"
 239                          "{VIA, VT8237A},"
 240                          "{SiS, SIS966},"
 241                          "{ULI, M5461}}");
 242 MODULE_DESCRIPTION("Intel HDA driver");
 243
 244 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 245 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 246 #define SUPPORT_VGA_SWITCHEROO
 247 #endif
 248 #endif
 249
 250
 251 /*
 252  */
 253
 254 /* driver types */
 255 enum {
 256         AZX_DRIVER_ICH,
 257         AZX_DRIVER_PCH,
 258         AZX_DRIVER_SCH,
 259         AZX_DRIVER_HDMI,
 260         AZX_DRIVER_ATI,
 261         AZX_DRIVER_ATIHDMI,
 262         AZX_DRIVER_ATIHDMI_NS,
 263         AZX_DRIVER_VIA,
 264         AZX_DRIVER_SIS,
 265         AZX_DRIVER_ULI,
 266         AZX_DRIVER_NVIDIA,
 267         AZX_DRIVER_TERA,
 268         AZX_DRIVER_CTX,
 269         AZX_DRIVER_CTHDA,
 270         AZX_DRIVER_CMEDIA,
 271         AZX_DRIVER_GENERIC,
 272         AZX_NUM_DRIVERS, /* keep this as last entry */
 273 };
 274
 275 #define azx_get_snoop_type(chip) \
 276         (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
 277 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
 278
 279 /* quirks for old Intel chipsets */
 280 #define AZX_DCAPS_INTEL_ICH \
 281         (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
 282
 283 /* quirks for Intel PCH */
 284 #define AZX_DCAPS_INTEL_PCH_NOPM \
 285         (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
 286          AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
 287
 288 #define AZX_DCAPS_INTEL_PCH \
 289         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 290
 291 #define AZX_DCAPS_INTEL_HASWELL \
 292         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
 293          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 294          AZX_DCAPS_SNOOP_TYPE(SCH))
 295
 296 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
 297 #define AZX_DCAPS_INTEL_BROADWELL \
 298         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
 299          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 300          AZX_DCAPS_SNOOP_TYPE(SCH))
 301
 302 /* quirks for ATI SB / AMD Hudson */
 303 #define AZX_DCAPS_PRESET_ATI_SB \
 304         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
 305          AZX_DCAPS_SNOOP_TYPE(ATI))
 306
 307 /* quirks for ATI/AMD HDMI */
 308 #define AZX_DCAPS_PRESET_ATI_HDMI \
 309         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
 310          AZX_DCAPS_NO_MSI64)
 311
 312 /* quirks for ATI HDMI with snoop off */
 313 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
 314         (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
 315
 316 /* quirks for Nvidia */
 317 #define AZX_DCAPS_PRESET_NVIDIA \
 318         (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
 319          AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
 320          AZX_DCAPS_SNOOP_TYPE(NVIDIA))
 321
 322 #define AZX_DCAPS_PRESET_CTHDA \
 323         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
 324          AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
 325
 326 /*
 327  * VGA-switcher support
 328  */
 329 #ifdef SUPPORT_VGA_SWITCHEROO
 330 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 331 #else
 332 #define use_vga_switcheroo(chip)        0
 333 #endif
 334
 335 static char *driver_short_names[] = {
 336         [AZX_DRIVER_ICH] = "HDA Intel",
 337         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 338         [AZX_DRIVER_SCH] = "HDA Intel MID",
 339         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 340         [AZX_DRIVER_ATI] = "HDA ATI SB",
 341         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 342         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 343         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 344         [AZX_DRIVER_SIS] = "HDA SIS966",
 345         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 346         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 347         [AZX_DRIVER_TERA] = "HDA Teradici",
 348         [AZX_DRIVER_CTX] = "HDA Creative",
 349         [AZX_DRIVER_CTHDA] = "HDA Creative",
 350         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
 351         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 352 };
 353
 354 struct hda_intel {
 355         struct azx chip;
 356
 357         /* for pending irqs */
 358         struct work_struct irq_pending_work;
 359
 360         /* sync probing */
 361         struct completion probe_wait;
 362         struct work_struct probe_work;
 363
 364         /* card list (for power_save trigger) */
 365         struct list_head list;
 366
 367         /* extra flags */
 368         unsigned int irq_pending_warned:1;
 369
 370         /* VGA-switcheroo setup */
 371         unsigned int use_vga_switcheroo:1;
 372         unsigned int vga_switcheroo_registered:1;
 373         unsigned int init_failed:1; /* delayed init failed */
 374
 375         /* secondary power domain for hdmi audio under vga device */
 376         struct dev_pm_domain hdmi_pm_domain;
 377 };
 378
 379 #ifdef CONFIG_X86
 380 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 381 {
 382         int pages;
 383
 384         if (azx_snoop(chip))
 385                 return;
 386         if (!dmab || !dmab->area || !dmab->bytes)
 387                 return;
 388
 389 #ifdef CONFIG_SND_DMA_SGBUF
 390         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 391                 struct snd_sg_buf *sgbuf = dmab->private_data;
 392                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
 393                         return; /* deal with only CORB/RIRB buffers */
 394                 if (on)
 395                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 396                 else
 397                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 398                 return;
 399         }
 400 #endif
 401
 402         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 403         if (on)
 404                 set_memory_wc((unsigned long)dmab->area, pages);
 405         else
 406                 set_memory_wb((unsigned long)dmab->area, pages);
 407 }
 408
 409 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 410                                  bool on)
 411 {
 412         __mark_pages_wc(chip, buf, on);
 413 }
 414 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 415                                    struct snd_pcm_substream *substream, bool on)
 416 {
 417         if (azx_dev->wc_marked != on) {
 418                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 419                 azx_dev->wc_marked = on;
 420         }
 421 }
 422 #else
 423 /* NOP for other archs */
 424 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 425                                  bool on)
 426 {
 427 }
 428 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 429                                    struct snd_pcm_substream *substream, bool on)
 430 {
 431 }
 432 #endif
 433
 434 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 435
 436 /*
 437  * initialize the PCI registers
 438  */
 439 /* update bits in a PCI register byte */
 440 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 441                             unsigned char mask, unsigned char val)
 442 {
 443         unsigned char data;
 444
 445         pci_read_config_byte(pci, reg, &data);
 446         data &= ~mask;
 447         data |= (val & mask);
 448         pci_write_config_byte(pci, reg, data);
 449 }
 450
 451 static void azx_init_pci(struct azx *chip)
 452 {
 453         int snoop_type = azx_get_snoop_type(chip);
 454
 455         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 456          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 457          * Ensuring these bits are 0 clears playback static on some HD Audio
 458          * codecs.
 459          * The PCI register TCSEL is defined in the Intel manuals.
 460          */
 461         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 462                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 463                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
 464         }
 465
 466         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 467          * we need to enable snoop.
 468          */
 469         if (snoop_type == AZX_SNOOP_TYPE_ATI) {
 470                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 471                         azx_snoop(chip));
 472                 update_pci_byte(chip->pci,
 473                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 474                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 475         }
 476
 477         /* For NVIDIA HDA, enable snoop */
 478         if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
 479                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 480                         azx_snoop(chip));
 481                 update_pci_byte(chip->pci,
 482                                 NVIDIA_HDA_TRANSREG_ADDR,
 483                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 484                 update_pci_byte(chip->pci,
 485                                 NVIDIA_HDA_ISTRM_COH,
 486                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 487                 update_pci_byte(chip->pci,
 488                                 NVIDIA_HDA_OSTRM_COH,
 489                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 490         }
 491
 492         /* Enable SCH/PCH snoop if needed */
 493         if (snoop_type == AZX_SNOOP_TYPE_SCH) {
 494                 unsigned short snoop;
 495                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 496                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 497                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 498                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 499                         if (!azx_snoop(chip))
 500                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 501                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 502                         pci_read_config_word(chip->pci,
 503                                 INTEL_SCH_HDA_DEVC, &snoop);
 504                 }
 505                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 506                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 507                         "Disabled" : "Enabled");
 508         }
 509 }
 510
 511 /* calculate runtime delay from LPIB */
 512 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
 513                                    unsigned int pos)
 514 {
 515         struct snd_pcm_substream *substream = azx_dev->substream;
 516         int stream = substream->stream;
 517         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
 518         int delay;
 519
 520         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
 521                 delay = pos - lpib_pos;
 522         else
 523                 delay = lpib_pos - pos;
 524         if (delay < 0) {
 525                 if (delay >= azx_dev->delay_negative_threshold)
 526                         delay = 0;
 527                 else
 528                         delay += azx_dev->bufsize;
 529         }
 530
 531         if (delay >= azx_dev->period_bytes) {
 532                 dev_info(chip->card->dev,
 533                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
 534                          delay, azx_dev->period_bytes);
 535                 delay = 0;
 536                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
 537                 chip->get_delay[stream] = NULL;
 538         }
 539
 540         return bytes_to_frames(substream->runtime, delay);
 541 }
 542
 543 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 544
 545 /* called from IRQ */
 546 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 547 {
 548         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 549         int ok;
 550
 551         ok = azx_position_ok(chip, azx_dev);
 552         if (ok == 1) {
 553                 azx_dev->irq_pending = 0;
 554                 return ok;
 555         } else if (ok == 0 && chip->bus && chip->bus->workq) {
 556                 /* bogus IRQ, process it later */
 557                 azx_dev->irq_pending = 1;
 558                 queue_work(chip->bus->workq, &hda->irq_pending_work);
 559         }
 560         return 0;
 561 }
 562
 563 /*
 564  * Check whether the current DMA position is acceptable for updating
 565  * periods.  Returns non-zero if it's OK.
 566  *
 567  * Many HD-audio controllers appear pretty inaccurate about
 568  * the update-IRQ timing.  The IRQ is issued before actually the
 569  * data is processed.  So, we need to process it afterwords in a
 570  * workqueue.
 571  */
 572 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 573 {
 574         struct snd_pcm_substream *substream = azx_dev->substream;
 575         int stream = substream->stream;
 576         u32 wallclk;
 577         unsigned int pos;
 578
 579         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
 580         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
 581                 return -1;      /* bogus (too early) interrupt */
 582
 583         if (chip->get_position[stream])
 584                 pos = chip->get_position[stream](chip, azx_dev);
 585         else { /* use the position buffer as default */
 586                 pos = azx_get_pos_posbuf(chip, azx_dev);
 587                 if (!pos || pos == (u32)-1) {
 588                         dev_info(chip->card->dev,
 589                                  "Invalid position buffer, using LPIB read method instead.\n");
 590                         chip->get_position[stream] = azx_get_pos_lpib;
 591                         pos = azx_get_pos_lpib(chip, azx_dev);
 592                         chip->get_delay[stream] = NULL;
 593                 } else {
 594                         chip->get_position[stream] = azx_get_pos_posbuf;
 595                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
 596                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
 597                 }
 598         }
 599
 600         if (pos >= azx_dev->bufsize)
 601                 pos = 0;
 602
 603         if (WARN_ONCE(!azx_dev->period_bytes,
 604                       "hda-intel: zero azx_dev->period_bytes"))
 605                 return -1; /* this shouldn't happen! */
 606         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 607             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 608                 /* NG - it's below the first next period boundary */
 609                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 610         azx_dev->start_wallclk += wallclk;
 611         return 1; /* OK, it's fine */
 612 }
 613
 614 /*
 615  * The work for pending PCM period updates.
 616  */
 617 static void azx_irq_pending_work(struct work_struct *work)
 618 {
 619         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
 620         struct azx *chip = &hda->chip;
 621         int i, pending, ok;
 622
 623         if (!hda->irq_pending_warned) {
 624                 dev_info(chip->card->dev,
 625                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 626                          chip->card->number);
 627                 hda->irq_pending_warned = 1;
 628         }
 629
 630         for (;;) {
 631                 pending = 0;
 632                 spin_lock_irq(&chip->reg_lock);
 633                 for (i = 0; i < chip->num_streams; i++) {
 634                         struct azx_dev *azx_dev = &chip->azx_dev[i];
 635                         if (!azx_dev->irq_pending ||
 636                             !azx_dev->substream ||
 637                             !azx_dev->running)
 638                                 continue;
 639                         ok = azx_position_ok(chip, azx_dev);
 640                         if (ok > 0) {
 641                                 azx_dev->irq_pending = 0;
 642                                 spin_unlock(&chip->reg_lock);
 643                                 snd_pcm_period_elapsed(azx_dev->substream);
 644                                 spin_lock(&chip->reg_lock);
 645                         } else if (ok < 0) {
 646                                 pending = 0;    /* too early */
 647                         } else
 648                                 pending++;
 649                 }
 650                 spin_unlock_irq(&chip->reg_lock);
 651                 if (!pending)
 652                         return;
 653                 msleep(1);
 654         }
 655 }
 656
 657 /* clear irq_pending flags and assure no on-going workq */
 658 static void azx_clear_irq_pending(struct azx *chip)
 659 {
 660         int i;
 661
 662         spin_lock_irq(&chip->reg_lock);
 663         for (i = 0; i < chip->num_streams; i++)
 664                 chip->azx_dev[i].irq_pending = 0;
 665         spin_unlock_irq(&chip->reg_lock);
 666 }
 667
 668 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 669 {
 670         if (request_irq(chip->pci->irq, azx_interrupt,
 671                         chip->msi ? 0 : IRQF_SHARED,
 672                         KBUILD_MODNAME, chip)) {
 673                 dev_err(chip->card->dev,
 674                         "unable to grab IRQ %d, disabling device\n",
 675                         chip->pci->irq);
 676                 if (do_disconnect)
 677                         snd_card_disconnect(chip->card);
 678                 return -1;
 679         }
 680         chip->irq = chip->pci->irq;
 681         pci_intx(chip->pci, !chip->msi);
 682         return 0;
 683 }
 684
 685 /* get the current DMA position with correction on VIA chips */
 686 static unsigned int azx_via_get_position(struct azx *chip,
 687                                          struct azx_dev *azx_dev)
 688 {
 689         unsigned int link_pos, mini_pos, bound_pos;
 690         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
 691         unsigned int fifo_size;
 692
 693         link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
 694         if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 695                 /* Playback, no problem using link position */
 696                 return link_pos;
 697         }
 698
 699         /* Capture */
 700         /* For new chipset,
 701          * use mod to get the DMA position just like old chipset
 702          */
 703         mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
 704         mod_dma_pos %= azx_dev->period_bytes;
 705
 706         /* azx_dev->fifo_size can't get FIFO size of in stream.
 707          * Get from base address + offset.
 708          */
 709         fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
 710
 711         if (azx_dev->insufficient) {
 712                 /* Link position never gather than FIFO size */
 713                 if (link_pos <= fifo_size)
 714                         return 0;
 715
 716                 azx_dev->insufficient = 0;
 717         }
 718
 719         if (link_pos <= fifo_size)
 720                 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
 721         else
 722                 mini_pos = link_pos - fifo_size;
 723
 724         /* Find nearest previous boudary */
 725         mod_mini_pos = mini_pos % azx_dev->period_bytes;
 726         mod_link_pos = link_pos % azx_dev->period_bytes;
 727         if (mod_link_pos >= fifo_size)
 728                 bound_pos = link_pos - mod_link_pos;
 729         else if (mod_dma_pos >= mod_mini_pos)
 730                 bound_pos = mini_pos - mod_mini_pos;
 731         else {
 732                 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
 733                 if (bound_pos >= azx_dev->bufsize)
 734                         bound_pos = 0;
 735         }
 736
 737         /* Calculate real DMA position we want */
 738         return bound_pos + mod_dma_pos;
 739 }
 740
 741 #ifdef CONFIG_PM
 742 static DEFINE_MUTEX(card_list_lock);
 743 static LIST_HEAD(card_list);
 744
 745 static void azx_add_card_list(struct azx *chip)
 746 {
 747         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 748         mutex_lock(&card_list_lock);
 749         list_add(&hda->list, &card_list);
 750         mutex_unlock(&card_list_lock);
 751 }
 752
 753 static void azx_del_card_list(struct azx *chip)
 754 {
 755         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 756         mutex_lock(&card_list_lock);
 757         list_del_init(&hda->list);
 758         mutex_unlock(&card_list_lock);
 759 }
 760
 761 /* trigger power-save check at writing parameter */
 762 static int param_set_xint(const char *val, const struct kernel_param *kp)
 763 {
 764         struct hda_intel *hda;
 765         struct azx *chip;
 766         struct hda_codec *c;
 767         int prev = power_save;
 768         int ret = param_set_int(val, kp);
 769
 770         if (ret || prev == power_save)
 771                 return ret;
 772
 773         mutex_lock(&card_list_lock);
 774         list_for_each_entry(hda, &card_list, list) {
 775                 chip = &hda->chip;
 776                 if (!chip->bus || chip->disabled)
 777                         continue;
 778                 list_for_each_entry(c, &chip->bus->codec_list, list)
 779                         snd_hda_power_sync(c);
 780         }
 781         mutex_unlock(&card_list_lock);
 782         return 0;
 783 }
 784 #else
 785 #define azx_add_card_list(chip) /* NOP */
 786 #define azx_del_card_list(chip) /* NOP */
 787 #endif /* CONFIG_PM */
 788
 789 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 790 /*
 791  * power management
 792  */
 793 static int azx_suspend(struct device *dev)
 794 {
 795         struct pci_dev *pci = to_pci_dev(dev);
 796         struct snd_card *card = dev_get_drvdata(dev);
 797         struct azx *chip;
 798         struct hda_intel *hda;
 799         struct azx_pcm *p;
 800
 801         if (!card)
 802                 return 0;
 803
 804         chip = card->private_data;
 805         hda = container_of(chip, struct hda_intel, chip);
 806         if (chip->disabled || hda->init_failed)
 807                 return 0;
 808
 809         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 810         azx_clear_irq_pending(chip);
 811         list_for_each_entry(p, &chip->pcm_list, list)
 812                 snd_pcm_suspend_all(p->pcm);
 813         if (chip->initialized)
 814                 snd_hda_suspend(chip->bus);
 815         azx_stop_chip(chip);
 816         azx_enter_link_reset(chip);
 817         if (chip->irq >= 0) {
 818                 free_irq(chip->irq, chip);
 819                 chip->irq = -1;
 820         }
 821
 822         if (chip->msi)
 823                 pci_disable_msi(chip->pci);
 824         pci_disable_device(pci);
 825         pci_save_state(pci);
 826         pci_set_power_state(pci, PCI_D3hot);
 827         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 828                 hda_display_power(false);
 829         return 0;
 830 }
 831
 832 static int azx_resume(struct device *dev)
 833 {
 834         struct pci_dev *pci = to_pci_dev(dev);
 835         struct snd_card *card = dev_get_drvdata(dev);
 836         struct azx *chip;
 837         struct hda_intel *hda;
 838
 839         if (!card)
 840                 return 0;
 841
 842         chip = card->private_data;
 843         hda = container_of(chip, struct hda_intel, chip);
 844         if (chip->disabled || hda->init_failed)
 845                 return 0;
 846
 847         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 848                 hda_display_power(true);
 849                 haswell_set_bclk(chip);
 850         }
 851         pci_set_power_state(pci, PCI_D0);
 852         pci_restore_state(pci);
 853         if (pci_enable_device(pci) < 0) {
 854                 dev_err(chip->card->dev,
 855                         "pci_enable_device failed, disabling device\n");
 856                 snd_card_disconnect(card);
 857                 return -EIO;
 858         }
 859         pci_set_master(pci);
 860         if (chip->msi)
 861                 if (pci_enable_msi(pci) < 0)
 862                         chip->msi = 0;
 863         if (azx_acquire_irq(chip, 1) < 0)
 864                 return -EIO;
 865         azx_init_pci(chip);
 866
 867         azx_init_chip(chip, true);
 868
 869         snd_hda_resume(chip->bus);
 870         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 871         return 0;
 872 }
 873 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 874
 875 #ifdef CONFIG_PM_RUNTIME
 876 static int azx_runtime_suspend(struct device *dev)
 877 {
 878         struct snd_card *card = dev_get_drvdata(dev);
 879         struct azx *chip;
 880         struct hda_intel *hda;
 881
 882         if (!card)
 883                 return 0;
 884
 885         chip = card->private_data;
 886         hda = container_of(chip, struct hda_intel, chip);
 887         if (chip->disabled || hda->init_failed)
 888                 return 0;
 889
 890         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 891                 return 0;
 892
 893         /* enable controller wake up event */
 894         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 895                   STATESTS_INT_MASK);
 896
 897         azx_stop_chip(chip);
 898         azx_enter_link_reset(chip);
 899         azx_clear_irq_pending(chip);
 900         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 901                 hda_display_power(false);
 902
 903         return 0;
 904 }
 905
 906 static int azx_runtime_resume(struct device *dev)
 907 {
 908         struct snd_card *card = dev_get_drvdata(dev);
 909         struct azx *chip;
 910         struct hda_intel *hda;
 911         struct hda_bus *bus;
 912         struct hda_codec *codec;
 913         int status;
 914
 915         if (!card)
 916                 return 0;
 917
 918         chip = card->private_data;
 919         hda = container_of(chip, struct hda_intel, chip);
 920         if (chip->disabled || hda->init_failed)
 921                 return 0;
 922
 923         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 924                 return 0;
 925
 926         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 927                 hda_display_power(true);
 928                 haswell_set_bclk(chip);
 929         }
 930
 931         /* Read STATESTS before controller reset */
 932         status = azx_readw(chip, STATESTS);
 933
 934         azx_init_pci(chip);
 935         azx_init_chip(chip, true);
 936
 937         bus = chip->bus;
 938         if (status && bus) {
 939                 list_for_each_entry(codec, &bus->codec_list, list)
 940                         if (status & (1 << codec->addr))
 941                                 queue_delayed_work(codec->bus->workq,
 942                                                    &codec->jackpoll_work, codec->jackpoll_interval);
 943         }
 944
 945         /* disable controller Wake Up event*/
 946         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 947                         ~STATESTS_INT_MASK);
 948
 949         return 0;
 950 }
 951
 952 static int azx_runtime_idle(struct device *dev)
 953 {
 954         struct snd_card *card = dev_get_drvdata(dev);
 955         struct azx *chip;
 956         struct hda_intel *hda;
 957
 958         if (!card)
 959                 return 0;
 960
 961         chip = card->private_data;
 962         hda = container_of(chip, struct hda_intel, chip);
 963         if (chip->disabled || hda->init_failed)
 964                 return 0;
 965
 966         if (!power_save_controller ||
 967             !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 968                 return -EBUSY;
 969
 970         return 0;
 971 }
 972
 973 #endif /* CONFIG_PM_RUNTIME */
 974
 975 #ifdef CONFIG_PM
 976 static const struct dev_pm_ops azx_pm = {
 977         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 978         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 979 };
 980
 981 #define AZX_PM_OPS      &azx_pm
 982 #else
 983 #define AZX_PM_OPS      NULL
 984 #endif /* CONFIG_PM */
 985
 986
 987 static int azx_probe_continue(struct azx *chip);
 988
 989 #ifdef SUPPORT_VGA_SWITCHEROO
 990 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 991
 992 static void azx_vs_set_state(struct pci_dev *pci,
 993                              enum vga_switcheroo_state state)
 994 {
 995         struct snd_card *card = pci_get_drvdata(pci);
 996         struct azx *chip = card->private_data;
 997         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 998         bool disabled;
 999
1000         wait_for_completion(&hda->probe_wait);
1001         if (hda->init_failed)
1002                 return;
1003
1004         disabled = (state == VGA_SWITCHEROO_OFF);
1005         if (chip->disabled == disabled)
1006                 return;
1007
1008         if (!chip->bus) {
1009                 chip->disabled = disabled;
1010                 if (!disabled) {
1011                         dev_info(chip->card->dev,
1012                                  "Start delayed initialization\n");
1013                         if (azx_probe_continue(chip) < 0) {
1014                                 dev_err(chip->card->dev, "initialization error\n");
1015                                 hda->init_failed = true;
1016                         }
1017                 }
1018         } else {
1019                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
1020                          disabled ? "Disabling" : "Enabling");
1021                 if (disabled) {
1022                         pm_runtime_put_sync_suspend(card->dev);
1023                         azx_suspend(card->dev);
1024                         /* when we get suspended by vga switcheroo we end up in D3cold,
1025                          * however we have no ACPI handle, so pci/acpi can't put us there,
1026                          * put ourselves there */
1027                         pci->current_state = PCI_D3cold;
1028                         chip->disabled = true;
1029                         if (snd_hda_lock_devices(chip->bus))
1030                                 dev_warn(chip->card->dev,
1031                                          "Cannot lock devices!\n");
1032                 } else {
1033                         snd_hda_unlock_devices(chip->bus);
1034                         pm_runtime_get_noresume(card->dev);
1035                         chip->disabled = false;
1036                         azx_resume(card->dev);
1037                 }
1038         }
1039 }
1040
1041 static bool azx_vs_can_switch(struct pci_dev *pci)
1042 {
1043         struct snd_card *card = pci_get_drvdata(pci);
1044         struct azx *chip = card->private_data;
1045         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1046
1047         wait_for_completion(&hda->probe_wait);
1048         if (hda->init_failed)
1049                 return false;
1050         if (chip->disabled || !chip->bus)
1051                 return true;
1052         if (snd_hda_lock_devices(chip->bus))
1053                 return false;
1054         snd_hda_unlock_devices(chip->bus);
1055         return true;
1056 }
1057
1058 static void init_vga_switcheroo(struct azx *chip)
1059 {
1060         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1061         struct pci_dev *p = get_bound_vga(chip->pci);
1062         if (p) {
1063                 dev_info(chip->card->dev,
1064                          "Handle VGA-switcheroo audio client\n");
1065                 hda->use_vga_switcheroo = 1;
1066                 pci_dev_put(p);
1067         }
1068 }
1069
1070 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1071         .set_gpu_state = azx_vs_set_state,
1072         .can_switch = azx_vs_can_switch,
1073 };
1074
1075 static int register_vga_switcheroo(struct azx *chip)
1076 {
1077         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1078         int err;
1079
1080         if (!hda->use_vga_switcheroo)
1081                 return 0;
1082         /* FIXME: currently only handling DIS controller
1083          * is there any machine with two switchable HDMI audio controllers?
1084          */
1085         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1086                                                     VGA_SWITCHEROO_DIS,
1087                                                     chip->bus != NULL);
1088         if (err < 0)
1089                 return err;
1090         hda->vga_switcheroo_registered = 1;
1091
1092         /* register as an optimus hdmi audio power domain */
1093         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1094                                                          &hda->hdmi_pm_domain);
1095         return 0;
1096 }
1097 #else
1098 #define init_vga_switcheroo(chip)               /* NOP */
1099 #define register_vga_switcheroo(chip)           0
1100 #define check_hdmi_disabled(pci)        false
1101 #endif /* SUPPORT_VGA_SWITCHER */
1102
1103 /*
1104  * destructor
1105  */
1106 static int azx_free(struct azx *chip)
1107 {
1108         struct pci_dev *pci = chip->pci;
1109         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1110         int i;
1111
1112         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1113                         && chip->running)
1114                 pm_runtime_get_noresume(&pci->dev);
1115
1116         azx_del_card_list(chip);
1117
1118         azx_notifier_unregister(chip);
1119
1120         hda->init_failed = 1; /* to be sure */
1121         complete_all(&hda->probe_wait);
1122
1123         if (use_vga_switcheroo(hda)) {
1124                 if (chip->disabled && chip->bus)
1125                         snd_hda_unlock_devices(chip->bus);
1126                 if (hda->vga_switcheroo_registered)
1127                         vga_switcheroo_unregister_client(chip->pci);
1128         }
1129
1130         if (chip->initialized) {
1131                 azx_clear_irq_pending(chip);
1132                 for (i = 0; i < chip->num_streams; i++)
1133                         azx_stream_stop(chip, &chip->azx_dev[i]);
1134                 azx_stop_chip(chip);
1135         }
1136
1137         if (chip->irq >= 0)
1138                 free_irq(chip->irq, (void*)chip);
1139         if (chip->msi)
1140                 pci_disable_msi(chip->pci);
1141         if (chip->remap_addr)
1142                 iounmap(chip->remap_addr);
1143
1144         azx_free_stream_pages(chip);
1145         if (chip->region_requested)
1146                 pci_release_regions(chip->pci);
1147         pci_disable_device(chip->pci);
1148         kfree(chip->azx_dev);
1149 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1150         release_firmware(chip->fw);
1151 #endif
1152         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1153                 hda_display_power(false);
1154                 hda_i915_exit();
1155         }
1156         kfree(hda);
1157
1158         return 0;
1159 }
1160
1161 static int azx_dev_free(struct snd_device *device)
1162 {
1163         return azx_free(device->device_data);
1164 }
1165
1166 #ifdef SUPPORT_VGA_SWITCHEROO
1167 /*
1168  * Check of disabled HDMI controller by vga-switcheroo
1169  */
1170 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1171 {
1172         struct pci_dev *p;
1173
1174         /* check only discrete GPU */
1175         switch (pci->vendor) {
1176         case PCI_VENDOR_ID_ATI:
1177         case PCI_VENDOR_ID_AMD:
1178         case PCI_VENDOR_ID_NVIDIA:
1179                 if (pci->devfn == 1) {
1180                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1181                                                         pci->bus->number, 0);
1182                         if (p) {
1183                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1184                                         return p;
1185                                 pci_dev_put(p);
1186                         }
1187                 }
1188                 break;
1189         }
1190         return NULL;
1191 }
1192
1193 static bool check_hdmi_disabled(struct pci_dev *pci)
1194 {
1195         bool vga_inactive = false;
1196         struct pci_dev *p = get_bound_vga(pci);
1197
1198         if (p) {
1199                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1200                         vga_inactive = true;
1201                 pci_dev_put(p);
1202         }
1203         return vga_inactive;
1204 }
1205 #endif /* SUPPORT_VGA_SWITCHEROO */
1206
1207 /*
1208  * white/black-listing for position_fix
1209  */
1210 static struct snd_pci_quirk position_fix_list[] = {
1211         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1212         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1213         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1214         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1215         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1216         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1217         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1218         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1219         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1220         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1221         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1222         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1223         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1224         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1225         {}
1226 };
1227
1228 static int check_position_fix(struct azx *chip, int fix)
1229 {
1230         const struct snd_pci_quirk *q;
1231
1232         switch (fix) {
1233         case POS_FIX_AUTO:
1234         case POS_FIX_LPIB:
1235         case POS_FIX_POSBUF:
1236         case POS_FIX_VIACOMBO:
1237         case POS_FIX_COMBO:
1238                 return fix;
1239         }
1240
1241         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1242         if (q) {
1243                 dev_info(chip->card->dev,
1244                          "position_fix set to %d for device %04x:%04x\n",
1245                          q->value, q->subvendor, q->subdevice);
1246                 return q->value;
1247         }
1248
1249         /* Check VIA/ATI HD Audio Controller exist */
1250         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1251                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1252                 return POS_FIX_VIACOMBO;
1253         }
1254         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1255                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1256                 return POS_FIX_LPIB;
1257         }
1258         return POS_FIX_AUTO;
1259 }
1260
1261 static void assign_position_fix(struct azx *chip, int fix)
1262 {
1263         static azx_get_pos_callback_t callbacks[] = {
1264                 [POS_FIX_AUTO] = NULL,
1265                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1266                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1267                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1268                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1269         };
1270
1271         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1272
1273         /* combo mode uses LPIB only for playback */
1274         if (fix == POS_FIX_COMBO)
1275                 chip->get_position[1] = NULL;
1276
1277         if (fix == POS_FIX_POSBUF &&
1278             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1279                 chip->get_delay[0] = chip->get_delay[1] =
1280                         azx_get_delay_from_lpib;
1281         }
1282
1283 }
1284
1285 /*
1286  * black-lists for probe_mask
1287  */
1288 static struct snd_pci_quirk probe_mask_list[] = {
1289         /* Thinkpad often breaks the controller communication when accessing
1290          * to the non-working (or non-existing) modem codec slot.
1291          */
1292         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1293         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1294         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1295         /* broken BIOS */
1296         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1297         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1298         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1299         /* forced codec slots */
1300         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1301         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1302         /* WinFast VP200 H (Teradici) user reported broken communication */
1303         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1304         {}
1305 };
1306
1307 #define AZX_FORCE_CODEC_MASK    0x100
1308
1309 static void check_probe_mask(struct azx *chip, int dev)
1310 {
1311         const struct snd_pci_quirk *q;
1312
1313         chip->codec_probe_mask = probe_mask[dev];
1314         if (chip->codec_probe_mask == -1) {
1315                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1316                 if (q) {
1317                         dev_info(chip->card->dev,
1318                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1319                                  q->value, q->subvendor, q->subdevice);
1320                         chip->codec_probe_mask = q->value;
1321                 }
1322         }
1323
1324         /* check forced option */
1325         if (chip->codec_probe_mask != -1 &&
1326             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1327                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1328                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1329                          chip->codec_mask);
1330         }
1331 }
1332
1333 /*
1334  * white/black-list for enable_msi
1335  */
1336 static struct snd_pci_quirk msi_black_list[] = {
1337         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1338         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1339         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1340         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1341         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1342         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1343         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1344         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1345         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1346         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1347         {}
1348 };
1349
1350 static void check_msi(struct azx *chip)
1351 {
1352         const struct snd_pci_quirk *q;
1353
1354         if (enable_msi >= 0) {
1355                 chip->msi = !!enable_msi;
1356                 return;
1357         }
1358         chip->msi = 1;  /* enable MSI as default */
1359         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1360         if (q) {
1361                 dev_info(chip->card->dev,
1362                          "msi for device %04x:%04x set to %d\n",
1363                          q->subvendor, q->subdevice, q->value);
1364                 chip->msi = q->value;
1365                 return;
1366         }
1367
1368         /* NVidia chipsets seem to cause troubles with MSI */
1369         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1370                 dev_info(chip->card->dev, "Disabling MSI\n");
1371                 chip->msi = 0;
1372         }
1373 }
1374
1375 /* check the snoop mode availability */
1376 static void azx_check_snoop_available(struct azx *chip)
1377 {
1378         int snoop = hda_snoop;
1379
1380         if (snoop >= 0) {
1381                 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1382                          snoop ? "snoop" : "non-snoop");
1383                 chip->snoop = snoop;
1384                 return;
1385         }
1386
1387         snoop = true;
1388         if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1389             chip->driver_type == AZX_DRIVER_VIA) {
1390                 /* force to non-snoop mode for a new VIA controller
1391                  * when BIOS is set
1392                  */
1393                 u8 val;
1394                 pci_read_config_byte(chip->pci, 0x42, &val);
1395                 if (!(val & 0x80) && chip->pci->revision == 0x30)
1396                         snoop = false;
1397         }
1398
1399         if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1400                 snoop = false;
1401
1402         chip->snoop = snoop;
1403         if (!snoop)
1404                 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1405 }
1406
1407 static void azx_probe_work(struct work_struct *work)
1408 {
1409         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1410         azx_probe_continue(&hda->chip);
1411 }
1412
1413 /*
1414  * constructor
1415  */
1416 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1417                       int dev, unsigned int driver_caps,
1418                       const struct hda_controller_ops *hda_ops,
1419                       struct azx **rchip)
1420 {
1421         static struct snd_device_ops ops = {
1422                 .dev_free = azx_dev_free,
1423         };
1424         struct hda_intel *hda;
1425         struct azx *chip;
1426         int err;
1427
1428         *rchip = NULL;
1429
1430         err = pci_enable_device(pci);
1431         if (err < 0)
1432                 return err;
1433
1434         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1435         if (!hda) {
1436                 dev_err(card->dev, "Cannot allocate hda\n");
1437                 pci_disable_device(pci);
1438                 return -ENOMEM;
1439         }
1440
1441         chip = &hda->chip;
1442         spin_lock_init(&chip->reg_lock);
1443         mutex_init(&chip->open_mutex);
1444         chip->card = card;
1445         chip->pci = pci;
1446         chip->ops = hda_ops;
1447         chip->irq = -1;
1448         chip->driver_caps = driver_caps;
1449         chip->driver_type = driver_caps & 0xff;
1450         check_msi(chip);
1451         chip->dev_index = dev;
1452         chip->jackpoll_ms = jackpoll_ms;
1453         INIT_LIST_HEAD(&chip->pcm_list);
1454         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1455         INIT_LIST_HEAD(&hda->list);
1456         init_vga_switcheroo(chip);
1457         init_completion(&hda->probe_wait);
1458
1459         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1460
1461         check_probe_mask(chip, dev);
1462
1463         chip->single_cmd = single_cmd;
1464         azx_check_snoop_available(chip);
1465
1466         if (bdl_pos_adj[dev] < 0) {
1467                 switch (chip->driver_type) {
1468                 case AZX_DRIVER_ICH:
1469                 case AZX_DRIVER_PCH:
1470                         bdl_pos_adj[dev] = 1;
1471                         break;
1472                 default:
1473                         bdl_pos_adj[dev] = 32;
1474                         break;
1475                 }
1476         }
1477         chip->bdl_pos_adj = bdl_pos_adj;
1478
1479         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1480         if (err < 0) {
1481                 dev_err(card->dev, "Error creating device [card]!\n");
1482                 azx_free(chip);
1483                 return err;
1484         }
1485
1486         /* continue probing in work context as may trigger request module */
1487         INIT_WORK(&hda->probe_work, azx_probe_work);
1488
1489         *rchip = chip;
1490
1491         return 0;
1492 }
1493
1494 static int azx_first_init(struct azx *chip)
1495 {
1496         int dev = chip->dev_index;
1497         struct pci_dev *pci = chip->pci;
1498         struct snd_card *card = chip->card;
1499         int err;
1500         unsigned short gcap;
1501         unsigned int dma_bits = 64;
1502
1503 #if BITS_PER_LONG != 64
1504         /* Fix up base address on ULI M5461 */
1505         if (chip->driver_type == AZX_DRIVER_ULI) {
1506                 u16 tmp3;
1507                 pci_read_config_word(pci, 0x40, &tmp3);
1508                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1509                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1510         }
1511 #endif
1512
1513         err = pci_request_regions(pci, "ICH HD audio");
1514         if (err < 0)
1515                 return err;
1516         chip->region_requested = 1;
1517
1518         chip->addr = pci_resource_start(pci, 0);
1519         chip->remap_addr = pci_ioremap_bar(pci, 0);
1520         if (chip->remap_addr == NULL) {
1521                 dev_err(card->dev, "ioremap error\n");
1522                 return -ENXIO;
1523         }
1524
1525         if (chip->msi) {
1526                 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1527                         dev_dbg(card->dev, "Disabling 64bit MSI\n");
1528                         pci->no_64bit_msi = true;
1529                 }
1530                 if (pci_enable_msi(pci) < 0)
1531                         chip->msi = 0;
1532         }
1533
1534         if (azx_acquire_irq(chip, 0) < 0)
1535                 return -EBUSY;
1536
1537         pci_set_master(pci);
1538         synchronize_irq(chip->irq);
1539
1540         gcap = azx_readw(chip, GCAP);
1541         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1542
1543         /* AMD devices support 40 or 48bit DMA, take the safe one */
1544         if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1545                 dma_bits = 40;
1546
1547         /* disable SB600 64bit support for safety */
1548         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1549                 struct pci_dev *p_smbus;
1550                 dma_bits = 40;
1551                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1552                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1553                                          NULL);
1554                 if (p_smbus) {
1555                         if (p_smbus->revision < 0x30)
1556                                 gcap &= ~AZX_GCAP_64OK;
1557                         pci_dev_put(p_smbus);
1558                 }
1559         }
1560
1561         /* disable 64bit DMA address on some devices */
1562         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1563                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1564                 gcap &= ~AZX_GCAP_64OK;
1565         }
1566
1567         /* disable buffer size rounding to 128-byte multiples if supported */
1568         if (align_buffer_size >= 0)
1569                 chip->align_buffer_size = !!align_buffer_size;
1570         else {
1571                 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1572                         chip->align_buffer_size = 0;
1573                 else
1574                         chip->align_buffer_size = 1;
1575         }
1576
1577         /* allow 64bit DMA address if supported by H/W */
1578         if (!(gcap & AZX_GCAP_64OK))
1579                 dma_bits = 32;
1580         if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1581                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1582         } else {
1583                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1584                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1585         }
1586
1587         /* read number of streams from GCAP register instead of using
1588          * hardcoded value
1589          */
1590         chip->capture_streams = (gcap >> 8) & 0x0f;
1591         chip->playback_streams = (gcap >> 12) & 0x0f;
1592         if (!chip->playback_streams && !chip->capture_streams) {
1593                 /* gcap didn't give any info, switching to old method */
1594
1595                 switch (chip->driver_type) {
1596                 case AZX_DRIVER_ULI:
1597                         chip->playback_streams = ULI_NUM_PLAYBACK;
1598                         chip->capture_streams = ULI_NUM_CAPTURE;
1599                         break;
1600                 case AZX_DRIVER_ATIHDMI:
1601                 case AZX_DRIVER_ATIHDMI_NS:
1602                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1603                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1604                         break;
1605                 case AZX_DRIVER_GENERIC:
1606                 default:
1607                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1608                         chip->capture_streams = ICH6_NUM_CAPTURE;
1609                         break;
1610                 }
1611         }
1612         chip->capture_index_offset = 0;
1613         chip->playback_index_offset = chip->capture_streams;
1614         chip->num_streams = chip->playback_streams + chip->capture_streams;
1615         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1616                                 GFP_KERNEL);
1617         if (!chip->azx_dev) {
1618                 dev_err(card->dev, "cannot malloc azx_dev\n");
1619                 return -ENOMEM;
1620         }
1621
1622         err = azx_alloc_stream_pages(chip);
1623         if (err < 0)
1624                 return err;
1625
1626         /* initialize streams */
1627         azx_init_stream(chip);
1628
1629         /* initialize chip */
1630         azx_init_pci(chip);
1631
1632         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1633                 haswell_set_bclk(chip);
1634
1635         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1636
1637         /* codec detection */
1638         if (!chip->codec_mask) {
1639                 dev_err(card->dev, "no codecs found!\n");
1640                 return -ENODEV;
1641         }
1642
1643         strcpy(card->driver, "HDA-Intel");
1644         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1645                 sizeof(card->shortname));
1646         snprintf(card->longname, sizeof(card->longname),
1647                  "%s at 0x%lx irq %i",
1648                  card->shortname, chip->addr, chip->irq);
1649
1650         return 0;
1651 }
1652
1653 static void power_down_all_codecs(struct azx *chip)
1654 {
1655 #ifdef CONFIG_PM
1656         /* The codecs were powered up in snd_hda_codec_new().
1657          * Now all initialization done, so turn them down if possible
1658          */
1659         struct hda_codec *codec;
1660         list_for_each_entry(codec, &chip->bus->codec_list, list) {
1661                 snd_hda_power_down(codec);
1662         }
1663 #endif
1664 }
1665
1666 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1667 /* callback from request_firmware_nowait() */
1668 static void azx_firmware_cb(const struct firmware *fw, void *context)
1669 {
1670         struct snd_card *card = context;
1671         struct azx *chip = card->private_data;
1672         struct pci_dev *pci = chip->pci;
1673
1674         if (!fw) {
1675                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1676                 goto error;
1677         }
1678
1679         chip->fw = fw;
1680         if (!chip->disabled) {
1681                 /* continue probing */
1682                 if (azx_probe_continue(chip))
1683                         goto error;
1684         }
1685         return; /* OK */
1686
1687  error:
1688         snd_card_free(card);
1689         pci_set_drvdata(pci, NULL);
1690 }
1691 #endif
1692
1693 /*
1694  * HDA controller ops.
1695  */
1696
1697 /* PCI register access. */
1698 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1699 {
1700         writel(value, addr);
1701 }
1702
1703 static u32 pci_azx_readl(u32 __iomem *addr)
1704 {
1705         return readl(addr);
1706 }
1707
1708 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1709 {
1710         writew(value, addr);
1711 }
1712
1713 static u16 pci_azx_readw(u16 __iomem *addr)
1714 {
1715         return readw(addr);
1716 }
1717
1718 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1719 {
1720         writeb(value, addr);
1721 }
1722
1723 static u8 pci_azx_readb(u8 __iomem *addr)
1724 {
1725         return readb(addr);
1726 }
1727
1728 static int disable_msi_reset_irq(struct azx *chip)
1729 {
1730         int err;
1731
1732         free_irq(chip->irq, chip);
1733         chip->irq = -1;
1734         pci_disable_msi(chip->pci);
1735         chip->msi = 0;
1736         err = azx_acquire_irq(chip, 1);
1737         if (err < 0)
1738                 return err;
1739
1740         return 0;
1741 }
1742
1743 /* DMA page allocation helpers.  */
1744 static int dma_alloc_pages(struct azx *chip,
1745                            int type,
1746                            size_t size,
1747                            struct snd_dma_buffer *buf)
1748 {
1749         int err;
1750
1751         err = snd_dma_alloc_pages(type,
1752                                   chip->card->dev,
1753                                   size, buf);
1754         if (err < 0)
1755                 return err;
1756         mark_pages_wc(chip, buf, true);
1757         return 0;
1758 }
1759
1760 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1761 {
1762         mark_pages_wc(chip, buf, false);
1763         snd_dma_free_pages(buf);
1764 }
1765
1766 static int substream_alloc_pages(struct azx *chip,
1767                                  struct snd_pcm_substream *substream,
1768                                  size_t size)
1769 {
1770         struct azx_dev *azx_dev = get_azx_dev(substream);
1771         int ret;
1772
1773         mark_runtime_wc(chip, azx_dev, substream, false);
1774         azx_dev->bufsize = 0;
1775         azx_dev->period_bytes = 0;
1776         azx_dev->format_val = 0;
1777         ret = snd_pcm_lib_malloc_pages(substream, size);
1778         if (ret < 0)
1779                 return ret;
1780         mark_runtime_wc(chip, azx_dev, substream, true);
1781         return 0;
1782 }
1783
1784 static int substream_free_pages(struct azx *chip,
1785                                 struct snd_pcm_substream *substream)
1786 {
1787         struct azx_dev *azx_dev = get_azx_dev(substream);
1788         mark_runtime_wc(chip, azx_dev, substream, false);
1789         return snd_pcm_lib_free_pages(substream);
1790 }
1791
1792 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1793                              struct vm_area_struct *area)
1794 {
1795 #ifdef CONFIG_X86
1796         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1797         struct azx *chip = apcm->chip;
1798         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1799                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1800 #endif
1801 }
1802
1803 static const struct hda_controller_ops pci_hda_ops = {
1804         .reg_writel = pci_azx_writel,
1805         .reg_readl = pci_azx_readl,
1806         .reg_writew = pci_azx_writew,
1807         .reg_readw = pci_azx_readw,
1808         .reg_writeb = pci_azx_writeb,
1809         .reg_readb = pci_azx_readb,
1810         .disable_msi_reset_irq = disable_msi_reset_irq,
1811         .dma_alloc_pages = dma_alloc_pages,
1812         .dma_free_pages = dma_free_pages,
1813         .substream_alloc_pages = substream_alloc_pages,
1814         .substream_free_pages = substream_free_pages,
1815         .pcm_mmap_prepare = pcm_mmap_prepare,
1816         .position_check = azx_position_check,
1817 };
1818
1819 static int azx_probe(struct pci_dev *pci,
1820                      const struct pci_device_id *pci_id)
1821 {
1822         static int dev;
1823         struct snd_card *card;
1824         struct hda_intel *hda;
1825         struct azx *chip;
1826         bool schedule_probe;
1827         int err;
1828
1829         if (dev >= SNDRV_CARDS)
1830                 return -ENODEV;
1831         if (!enable[dev]) {
1832                 dev++;
1833                 return -ENOENT;
1834         }
1835
1836         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1837                            0, &card);
1838         if (err < 0) {
1839                 dev_err(&pci->dev, "Error creating card!\n");
1840                 return err;
1841         }
1842
1843         err = azx_create(card, pci, dev, pci_id->driver_data,
1844                          &pci_hda_ops, &chip);
1845         if (err < 0)
1846                 goto out_free;
1847         card->private_data = chip;
1848         hda = container_of(chip, struct hda_intel, chip);
1849
1850         pci_set_drvdata(pci, card);
1851
1852         err = register_vga_switcheroo(chip);
1853         if (err < 0) {
1854                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1855                 goto out_free;
1856         }
1857
1858         if (check_hdmi_disabled(pci)) {
1859                 dev_info(card->dev, "VGA controller is disabled\n");
1860                 dev_info(card->dev, "Delaying initialization\n");
1861                 chip->disabled = true;
1862         }
1863
1864         schedule_probe = !chip->disabled;
1865
1866 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1867         if (patch[dev] && *patch[dev]) {
1868                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1869                          patch[dev]);
1870                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1871                                               &pci->dev, GFP_KERNEL, card,
1872                                               azx_firmware_cb);
1873                 if (err < 0)
1874                         goto out_free;
1875                 schedule_probe = false; /* continued in azx_firmware_cb() */
1876         }
1877 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1878
1879 #ifndef CONFIG_SND_HDA_I915
1880         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1881                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1882 #endif
1883
1884         if (schedule_probe)
1885                 schedule_work(&hda->probe_work);
1886
1887         dev++;
1888         if (chip->disabled)
1889                 complete_all(&hda->probe_wait);
1890         return 0;
1891
1892 out_free:
1893         snd_card_free(card);
1894         return err;
1895 }
1896
1897 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1898 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1899         [AZX_DRIVER_NVIDIA] = 8,
1900         [AZX_DRIVER_TERA] = 1,
1901 };
1902
1903 static int azx_probe_continue(struct azx *chip)
1904 {
1905         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1906         struct pci_dev *pci = chip->pci;
1907         int dev = chip->dev_index;
1908         int err;
1909
1910         /* Request power well for Haswell HDA controller and codec */
1911         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1912 #ifdef CONFIG_SND_HDA_I915
1913                 err = hda_i915_init();
1914                 if (err < 0) {
1915                         dev_err(chip->card->dev,
1916                                 "Error request power-well from i915\n");
1917                         goto out_free;
1918                 }
1919                 err = hda_display_power(true);
1920                 if (err < 0) {
1921                         dev_err(chip->card->dev,
1922                                 "Cannot turn on display power on i915\n");
1923                         goto out_free;
1924                 }
1925 #endif
1926         }
1927
1928         err = azx_first_init(chip);
1929         if (err < 0)
1930                 goto out_free;
1931
1932 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1933         chip->beep_mode = beep_mode[dev];
1934 #endif
1935
1936         /* create codec instances */
1937         err = azx_codec_create(chip, model[dev],
1938                                azx_max_codecs[chip->driver_type],
1939                                power_save_addr);
1940
1941         if (err < 0)
1942                 goto out_free;
1943 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1944         if (chip->fw) {
1945                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1946                                          chip->fw->data);
1947                 if (err < 0)
1948                         goto out_free;
1949 #ifndef CONFIG_PM
1950                 release_firmware(chip->fw); /* no longer needed */
1951                 chip->fw = NULL;
1952 #endif
1953         }
1954 #endif
1955         if ((probe_only[dev] & 1) == 0) {
1956                 err = azx_codec_configure(chip);
1957                 if (err < 0)
1958                         goto out_free;
1959         }
1960
1961         /* create PCM streams */
1962         err = snd_hda_build_pcms(chip->bus);
1963         if (err < 0)
1964                 goto out_free;
1965
1966         /* create mixer controls */
1967         err = azx_mixer_create(chip);
1968         if (err < 0)
1969                 goto out_free;
1970
1971         err = snd_card_register(chip->card);
1972         if (err < 0)
1973                 goto out_free;
1974
1975         chip->running = 1;
1976         power_down_all_codecs(chip);
1977         azx_notifier_register(chip);
1978         azx_add_card_list(chip);
1979         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
1980                 pm_runtime_put_noidle(&pci->dev);
1981
1982 out_free:
1983         if (err < 0)
1984                 hda->init_failed = 1;
1985         complete_all(&hda->probe_wait);
1986         return err;
1987 }
1988
1989 static void azx_remove(struct pci_dev *pci)
1990 {
1991         struct snd_card *card = pci_get_drvdata(pci);
1992
1993         if (card)
1994                 snd_card_free(card);
1995 }
1996
1997 /* PCI IDs */
1998 static const struct pci_device_id azx_ids[] = {
1999         /* CPT */
2000         { PCI_DEVICE(0x8086, 0x1c20),
2001           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2002         /* PBG */
2003         { PCI_DEVICE(0x8086, 0x1d20),
2004           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2005         /* Panther Point */
2006         { PCI_DEVICE(0x8086, 0x1e20),
2007           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2008         /* Lynx Point */
2009         { PCI_DEVICE(0x8086, 0x8c20),
2010           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2011         /* 9 Series */
2012         { PCI_DEVICE(0x8086, 0x8ca0),
2013           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2014         /* Wellsburg */
2015         { PCI_DEVICE(0x8086, 0x8d20),
2016           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2017         { PCI_DEVICE(0x8086, 0x8d21),
2018           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2019         /* Lynx Point-LP */
2020         { PCI_DEVICE(0x8086, 0x9c20),
2021           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2022         /* Lynx Point-LP */
2023         { PCI_DEVICE(0x8086, 0x9c21),
2024           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2025         /* Wildcat Point-LP */
2026         { PCI_DEVICE(0x8086, 0x9ca0),
2027           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2028         /* Sunrise Point */
2029         { PCI_DEVICE(0x8086, 0xa170),
2030           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2031         /* Sunrise Point-LP */
2032         { PCI_DEVICE(0x8086, 0x9d70),
2033           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2034         /* Haswell */
2035         { PCI_DEVICE(0x8086, 0x0a0c),
2036           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2037         { PCI_DEVICE(0x8086, 0x0c0c),
2038           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2039         { PCI_DEVICE(0x8086, 0x0d0c),
2040           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2041         /* Broadwell */
2042         { PCI_DEVICE(0x8086, 0x160c),
2043           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2044         /* 5 Series/3400 */
2045         { PCI_DEVICE(0x8086, 0x3b56),
2046           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2047         /* Poulsbo */
2048         { PCI_DEVICE(0x8086, 0x811b),
2049           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2050         /* Oaktrail */
2051         { PCI_DEVICE(0x8086, 0x080a),
2052           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2053         /* BayTrail */
2054         { PCI_DEVICE(0x8086, 0x0f04),
2055           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2056         /* Braswell */
2057         { PCI_DEVICE(0x8086, 0x2284),
2058           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2059         /* ICH6 */
2060         { PCI_DEVICE(0x8086, 0x2668),
2061           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2062         /* ICH7 */
2063         { PCI_DEVICE(0x8086, 0x27d8),
2064           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2065         /* ESB2 */
2066         { PCI_DEVICE(0x8086, 0x269a),
2067           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2068         /* ICH8 */
2069         { PCI_DEVICE(0x8086, 0x284b),
2070           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2071         /* ICH9 */
2072         { PCI_DEVICE(0x8086, 0x293e),
2073           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2074         /* ICH9 */
2075         { PCI_DEVICE(0x8086, 0x293f),
2076           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2077         /* ICH10 */
2078         { PCI_DEVICE(0x8086, 0x3a3e),
2079           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2080         /* ICH10 */
2081         { PCI_DEVICE(0x8086, 0x3a6e),
2082           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2083         /* Generic Intel */
2084         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2085           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2086           .class_mask = 0xffffff,
2087           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2088         /* ATI SB 450/600/700/800/900 */
2089         { PCI_DEVICE(0x1002, 0x437b),
2090           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2091         { PCI_DEVICE(0x1002, 0x4383),
2092           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2093         /* AMD Hudson */
2094         { PCI_DEVICE(0x1022, 0x780d),
2095           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2096         /* ATI HDMI */
2097         { PCI_DEVICE(0x1002, 0x793b),
2098           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099         { PCI_DEVICE(0x1002, 0x7919),
2100           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101         { PCI_DEVICE(0x1002, 0x960f),
2102           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103         { PCI_DEVICE(0x1002, 0x970f),
2104           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2105         { PCI_DEVICE(0x1002, 0xaa00),
2106           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2107         { PCI_DEVICE(0x1002, 0xaa08),
2108           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2109         { PCI_DEVICE(0x1002, 0xaa10),
2110           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2111         { PCI_DEVICE(0x1002, 0xaa18),
2112           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2113         { PCI_DEVICE(0x1002, 0xaa20),
2114           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2115         { PCI_DEVICE(0x1002, 0xaa28),
2116           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2117         { PCI_DEVICE(0x1002, 0xaa30),
2118           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2119         { PCI_DEVICE(0x1002, 0xaa38),
2120           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2121         { PCI_DEVICE(0x1002, 0xaa40),
2122           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2123         { PCI_DEVICE(0x1002, 0xaa48),
2124           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2125         { PCI_DEVICE(0x1002, 0xaa50),
2126           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2127         { PCI_DEVICE(0x1002, 0xaa58),
2128           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2129         { PCI_DEVICE(0x1002, 0xaa60),
2130           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2131         { PCI_DEVICE(0x1002, 0xaa68),
2132           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2133         { PCI_DEVICE(0x1002, 0xaa80),
2134           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2135         { PCI_DEVICE(0x1002, 0xaa88),
2136           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2137         { PCI_DEVICE(0x1002, 0xaa90),
2138           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2139         { PCI_DEVICE(0x1002, 0xaa98),
2140           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2141         { PCI_DEVICE(0x1002, 0x9902),
2142           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2143         { PCI_DEVICE(0x1002, 0xaaa0),
2144           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2145         { PCI_DEVICE(0x1002, 0xaaa8),
2146           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2147         { PCI_DEVICE(0x1002, 0xaab0),
2148           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2149         /* VIA VT8251/VT8237A */
2150         { PCI_DEVICE(0x1106, 0x3288),
2151           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2152         /* VIA GFX VT7122/VX900 */
2153         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2154         /* VIA GFX VT6122/VX11 */
2155         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2156         /* SIS966 */
2157         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2158         /* ULI M5461 */
2159         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2160         /* NVIDIA MCP */
2161         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2162           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2163           .class_mask = 0xffffff,
2164           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2165         /* Teradici */
2166         { PCI_DEVICE(0x6549, 0x1200),
2167           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2168         { PCI_DEVICE(0x6549, 0x2200),
2169           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2170         /* Creative X-Fi (CA0110-IBG) */
2171         /* CTHDA chips */
2172         { PCI_DEVICE(0x1102, 0x0010),
2173           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2174         { PCI_DEVICE(0x1102, 0x0012),
2175           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2176 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2177         /* the following entry conflicts with snd-ctxfi driver,
2178          * as ctxfi driver mutates from HD-audio to native mode with
2179          * a special command sequence.
2180          */
2181         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2182           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2183           .class_mask = 0xffffff,
2184           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2185           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2186 #else
2187         /* this entry seems still valid -- i.e. without emu20kx chip */
2188         { PCI_DEVICE(0x1102, 0x0009),
2189           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2190           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2191 #endif
2192         /* CM8888 */
2193         { PCI_DEVICE(0x13f6, 0x5011),
2194           .driver_data = AZX_DRIVER_CMEDIA |
2195           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2196         /* Vortex86MX */
2197         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2198         /* VMware HDAudio */
2199         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2200         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2201         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2202           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2203           .class_mask = 0xffffff,
2204           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2205         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2206           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2207           .class_mask = 0xffffff,
2208           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2209         { 0, }
2210 };
2211 MODULE_DEVICE_TABLE(pci, azx_ids);
2212
2213 /* pci_driver definition */
2214 static struct pci_driver azx_driver = {
2215         .name = KBUILD_MODNAME,
2216         .id_table = azx_ids,
2217         .probe = azx_probe,
2218         .remove = azx_remove,
2219         .driver = {
2220                 .pm = AZX_PM_OPS,
2221         },
2222 };
2223
2224 module_pci_driver(azx_driver);