sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         /* pin idx, different device entries on the same pin use the same idx */
  79         int pin_nid_idx;
  80         int num_mux_nids;
  81         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  82         int mux_idx;
  83         hda_nid_t cvt_nid;
  84
  85         struct hda_codec *codec;
  86         struct hdmi_eld sink_eld;
  87         struct mutex lock;
  88         struct delayed_work work;
  89         struct snd_kcontrol *eld_ctl;
  90         struct snd_jack *acomp_jack; /* jack via audio component */
  91         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  92         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  93         int repoll_count;
  94         bool setup; /* the stream has been set up by prepare callback */
  95         int channels; /* current number of channels */
  96         bool non_pcm;
  97         bool chmap_set;         /* channel-map override by ALSA API? */
  98         unsigned char chmap[8]; /* ALSA API channel-map */
  99 #ifdef CONFIG_SND_PROC_FS
 100         struct snd_info_entry *proc_entry;
 101 #endif
 102 };
 103
 104 struct cea_channel_speaker_allocation;
 105
 106 /* operations used by generic code that can be overridden by patches */
 107 struct hdmi_ops {
 108         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                            unsigned char *buf, int *eld_size);
 110
 111         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 112         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 113                                     int asp_slot);
 114         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 115                                     int asp_slot, int channel);
 116
 117         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 118                                     int ca, int active_channels, int conn_type);
 119
 120         /* enable/disable HBR (HD passthrough) */
 121         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 122
 123         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 124                             hda_nid_t pin_nid, u32 stream_tag, int format);
 125
 126         /* Helpers for producing the channel map TLVs. These can be overridden
 127          * for devices that have non-standard mapping requirements. */
 128         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 129                                                  int channels);
 130         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 131                                        unsigned int *chmap, int channels);
 132
 133         /* check that the user-given chmap is supported */
 134         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 135 };
 136
 137 struct hdmi_pcm {
 138         struct hda_pcm *pcm;
 139         struct snd_jack *jack;
 140 };
 141
 142 struct hdmi_spec {
 143         int num_cvts;
 144         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 145         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 146
 147         int num_pins;
 148         struct snd_array pins; /* struct hdmi_spec_per_pin */
 149         struct hdmi_pcm pcm_rec[16];
 150         struct mutex pcm_lock;
 151         /* pcm_bitmap means which pcms have been assigned to pins*/
 152         unsigned long pcm_bitmap;
 153         int pcm_used;   /* counter of pcm_rec[] */
 154         /* bitmap shows whether the pcm is opened in user space
 155          * bit 0 means the first playback PCM (PCM3);
 156          * bit 1 means the second playback PCM, and so on.
 157          */
 158         unsigned long pcm_in_use;
 159         unsigned int channels_max; /* max over all cvts */
 160
 161         struct hdmi_eld temp_eld;
 162         struct hdmi_ops ops;
 163
 164         bool dyn_pin_out;
 165         bool dyn_pcm_assign;
 166         /*
 167          * Non-generic VIA/NVIDIA specific
 168          */
 169         struct hda_multi_out multiout;
 170         struct hda_pcm_stream pcm_playback;
 171
 172         /* i915/powerwell (Haswell+/Valleyview+) specific */
 173         struct i915_audio_component_audio_ops i915_audio_ops;
 174         bool i915_bound; /* was i915 bound in this driver? */
 175 };
 176
 177 #ifdef CONFIG_SND_HDA_I915
 178 #define codec_has_acomp(codec) \
 179         ((codec)->bus->core.audio_component != NULL)
 180 #else
 181 #define codec_has_acomp(codec)  false
 182 #endif
 183
 184 struct hdmi_audio_infoframe {
 185         u8 type; /* 0x84 */
 186         u8 ver;  /* 0x01 */
 187         u8 len;  /* 0x0a */
 188
 189         u8 checksum;
 190
 191         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 192         u8 SS01_SF24;
 193         u8 CXT04;
 194         u8 CA;
 195         u8 LFEPBL01_LSV36_DM_INH7;
 196 };
 197
 198 struct dp_audio_infoframe {
 199         u8 type; /* 0x84 */
 200         u8 len;  /* 0x1b */
 201         u8 ver;  /* 0x11 << 2 */
 202
 203         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 204         u8 SS01_SF24;
 205         u8 CXT04;
 206         u8 CA;
 207         u8 LFEPBL01_LSV36_DM_INH7;
 208 };
 209
 210 union audio_infoframe {
 211         struct hdmi_audio_infoframe hdmi;
 212         struct dp_audio_infoframe dp;
 213         u8 bytes[0];
 214 };
 215
 216 /*
 217  * CEA speaker placement:
 218  *
 219  *        FLH       FCH        FRH
 220  *  FLW    FL  FLC   FC   FRC   FR   FRW
 221  *
 222  *                                  LFE
 223  *                     TC
 224  *
 225  *          RL  RLC   RC   RRC   RR
 226  *
 227  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 228  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 229  */
 230 enum cea_speaker_placement {
 231         FL  = (1 <<  0),        /* Front Left           */
 232         FC  = (1 <<  1),        /* Front Center         */
 233         FR  = (1 <<  2),        /* Front Right          */
 234         FLC = (1 <<  3),        /* Front Left Center    */
 235         FRC = (1 <<  4),        /* Front Right Center   */
 236         RL  = (1 <<  5),        /* Rear Left            */
 237         RC  = (1 <<  6),        /* Rear Center          */
 238         RR  = (1 <<  7),        /* Rear Right           */
 239         RLC = (1 <<  8),        /* Rear Left Center     */
 240         RRC = (1 <<  9),        /* Rear Right Center    */
 241         LFE = (1 << 10),        /* Low Frequency Effect */
 242         FLW = (1 << 11),        /* Front Left Wide      */
 243         FRW = (1 << 12),        /* Front Right Wide     */
 244         FLH = (1 << 13),        /* Front Left High      */
 245         FCH = (1 << 14),        /* Front Center High    */
 246         FRH = (1 << 15),        /* Front Right High     */
 247         TC  = (1 << 16),        /* Top Center           */
 248 };
 249
 250 /*
 251  * ELD SA bits in the CEA Speaker Allocation data block
 252  */
 253 static int eld_speaker_allocation_bits[] = {
 254         [0] = FL | FR,
 255         [1] = LFE,
 256         [2] = FC,
 257         [3] = RL | RR,
 258         [4] = RC,
 259         [5] = FLC | FRC,
 260         [6] = RLC | RRC,
 261         /* the following are not defined in ELD yet */
 262         [7] = FLW | FRW,
 263         [8] = FLH | FRH,
 264         [9] = TC,
 265         [10] = FCH,
 266 };
 267
 268 struct cea_channel_speaker_allocation {
 269         int ca_index;
 270         int speakers[8];
 271
 272         /* derived values, just for convenience */
 273         int channels;
 274         int spk_mask;
 275 };
 276
 277 /*
 278  * ALSA sequence is:
 279  *
 280  *       surround40   surround41   surround50   surround51   surround71
 281  * ch0   front left   =            =            =            =
 282  * ch1   front right  =            =            =            =
 283  * ch2   rear left    =            =            =            =
 284  * ch3   rear right   =            =            =            =
 285  * ch4                LFE          center       center       center
 286  * ch5                                          LFE          LFE
 287  * ch6                                                       side left
 288  * ch7                                                       side right
 289  *
 290  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 291  */
 292 static int hdmi_channel_mapping[0x32][8] = {
 293         /* stereo */
 294         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 295         /* 2.1 */
 296         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 297         /* Dolby Surround */
 298         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 299         /* surround40 */
 300         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 301         /* 4ch */
 302         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 303         /* surround41 */
 304         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 305         /* surround50 */
 306         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 307         /* surround51 */
 308         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 309         /* 7.1 */
 310         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 311 };
 312
 313 /*
 314  * This is an ordered list!
 315  *
 316  * The preceding ones have better chances to be selected by
 317  * hdmi_channel_allocation().
 318  */
 319 static struct cea_channel_speaker_allocation channel_allocations[] = {
 320 /*                        channel:   7     6    5    4    3     2    1    0  */
 321 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 322                                  /* 2.1 */
 323 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 324                                  /* Dolby Surround */
 325 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 326                                  /* surround40 */
 327 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 328                                  /* surround41 */
 329 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 330                                  /* surround50 */
 331 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 332                                  /* surround51 */
 333 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 334                                  /* 6.1 */
 335 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 336                                  /* surround71 */
 337 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 338
 339 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 340 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 341 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 342 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 343 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 344 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 345 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 346 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 347 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 348 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 349 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 350 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 351 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 352 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 353 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 354 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 355 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 356 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 357 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 358 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 359 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 360 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 361 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 362 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 363 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 364 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 365 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 366 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 367 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 368 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 369 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 370 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 371 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 372 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 373 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 374 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 375 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 376 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 377 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 378 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 379 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 380 };
 381
 382
 383 /*
 384  * HDMI routines
 385  */
 386
 387 #define get_pin(spec, idx) \
 388         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 389 #define get_cvt(spec, idx) \
 390         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 391 /* obtain hdmi_pcm object assigned to idx */
 392 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 393 /* obtain hda_pcm object assigned to idx */
 394 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 395
 396 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 397 {
 398         struct hdmi_spec *spec = codec->spec;
 399         int pin_idx;
 400
 401         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 402                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 403                         return pin_idx;
 404
 405         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 406         return -EINVAL;
 407 }
 408
 409 static int hinfo_to_pcm_index(struct hda_codec *codec,
 410                         struct hda_pcm_stream *hinfo)
 411 {
 412         struct hdmi_spec *spec = codec->spec;
 413         int pcm_idx;
 414
 415         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 416                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 417                         return pcm_idx;
 418
 419         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 420         return -EINVAL;
 421 }
 422
 423 static int hinfo_to_pin_index(struct hda_codec *codec,
 424                               struct hda_pcm_stream *hinfo)
 425 {
 426         struct hdmi_spec *spec = codec->spec;
 427         struct hdmi_spec_per_pin *per_pin;
 428         int pin_idx;
 429
 430         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 431                 per_pin = get_pin(spec, pin_idx);
 432                 if (per_pin->pcm &&
 433                         per_pin->pcm->pcm->stream == hinfo)
 434                         return pin_idx;
 435         }
 436
 437         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 438         return -EINVAL;
 439 }
 440
 441 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 442 {
 443         struct hdmi_spec *spec = codec->spec;
 444         int cvt_idx;
 445
 446         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 447                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 448                         return cvt_idx;
 449
 450         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 451         return -EINVAL;
 452 }
 453
 454 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 455                         struct snd_ctl_elem_info *uinfo)
 456 {
 457         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 458         struct hdmi_spec *spec = codec->spec;
 459         struct hdmi_spec_per_pin *per_pin;
 460         struct hdmi_eld *eld;
 461         int pin_idx;
 462
 463         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 464
 465         pin_idx = kcontrol->private_value;
 466         per_pin = get_pin(spec, pin_idx);
 467         eld = &per_pin->sink_eld;
 468
 469         mutex_lock(&per_pin->lock);
 470         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 471         mutex_unlock(&per_pin->lock);
 472
 473         return 0;
 474 }
 475
 476 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 477                         struct snd_ctl_elem_value *ucontrol)
 478 {
 479         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 480         struct hdmi_spec *spec = codec->spec;
 481         struct hdmi_spec_per_pin *per_pin;
 482         struct hdmi_eld *eld;
 483         int pin_idx;
 484
 485         pin_idx = kcontrol->private_value;
 486         per_pin = get_pin(spec, pin_idx);
 487         eld = &per_pin->sink_eld;
 488
 489         mutex_lock(&per_pin->lock);
 490         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 491                 mutex_unlock(&per_pin->lock);
 492                 snd_BUG();
 493                 return -EINVAL;
 494         }
 495
 496         memset(ucontrol->value.bytes.data, 0,
 497                ARRAY_SIZE(ucontrol->value.bytes.data));
 498         if (eld->eld_valid)
 499                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 500                        eld->eld_size);
 501         mutex_unlock(&per_pin->lock);
 502
 503         return 0;
 504 }
 505
 506 static struct snd_kcontrol_new eld_bytes_ctl = {
 507         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 508         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 509         .name = "ELD",
 510         .info = hdmi_eld_ctl_info,
 511         .get = hdmi_eld_ctl_get,
 512 };
 513
 514 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 515                         int device)
 516 {
 517         struct snd_kcontrol *kctl;
 518         struct hdmi_spec *spec = codec->spec;
 519         int err;
 520
 521         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 522         if (!kctl)
 523                 return -ENOMEM;
 524         kctl->private_value = pin_idx;
 525         kctl->id.device = device;
 526
 527         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 528         if (err < 0)
 529                 return err;
 530
 531         get_pin(spec, pin_idx)->eld_ctl = kctl;
 532         return 0;
 533 }
 534
 535 #ifdef BE_PARANOID
 536 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 537                                 int *packet_index, int *byte_index)
 538 {
 539         int val;
 540
 541         val = snd_hda_codec_read(codec, pin_nid, 0,
 542                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 543
 544         *packet_index = val >> 5;
 545         *byte_index = val & 0x1f;
 546 }
 547 #endif
 548
 549 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 550                                 int packet_index, int byte_index)
 551 {
 552         int val;
 553
 554         val = (packet_index << 5) | (byte_index & 0x1f);
 555
 556         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 557 }
 558
 559 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 560                                 unsigned char val)
 561 {
 562         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 563 }
 564
 565 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 566 {
 567         struct hdmi_spec *spec = codec->spec;
 568         int pin_out;
 569
 570         /* Unmute */
 571         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 572                 snd_hda_codec_write(codec, pin_nid, 0,
 573                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 574
 575         if (spec->dyn_pin_out)
 576                 /* Disable pin out until stream is active */
 577                 pin_out = 0;
 578         else
 579                 /* Enable pin out: some machines with GM965 gets broken output
 580                  * when the pin is disabled or changed while using with HDMI
 581                  */
 582                 pin_out = PIN_OUT;
 583
 584         snd_hda_codec_write(codec, pin_nid, 0,
 585                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 586 }
 587
 588 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 589 {
 590         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 591                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 592 }
 593
 594 static void hdmi_set_channel_count(struct hda_codec *codec,
 595                                    hda_nid_t cvt_nid, int chs)
 596 {
 597         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 598                 snd_hda_codec_write(codec, cvt_nid, 0,
 599                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 600 }
 601
 602 /*
 603  * ELD proc files
 604  */
 605
 606 #ifdef CONFIG_SND_PROC_FS
 607 static void print_eld_info(struct snd_info_entry *entry,
 608                            struct snd_info_buffer *buffer)
 609 {
 610         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 611
 612         mutex_lock(&per_pin->lock);
 613         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 614         mutex_unlock(&per_pin->lock);
 615 }
 616
 617 static void write_eld_info(struct snd_info_entry *entry,
 618                            struct snd_info_buffer *buffer)
 619 {
 620         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 621
 622         mutex_lock(&per_pin->lock);
 623         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 624         mutex_unlock(&per_pin->lock);
 625 }
 626
 627 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 628 {
 629         char name[32];
 630         struct hda_codec *codec = per_pin->codec;
 631         struct snd_info_entry *entry;
 632         int err;
 633
 634         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 635         err = snd_card_proc_new(codec->card, name, &entry);
 636         if (err < 0)
 637                 return err;
 638
 639         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 640         entry->c.text.write = write_eld_info;
 641         entry->mode |= S_IWUSR;
 642         per_pin->proc_entry = entry;
 643
 644         return 0;
 645 }
 646
 647 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 648 {
 649         if (!per_pin->codec->bus->shutdown) {
 650                 snd_info_free_entry(per_pin->proc_entry);
 651                 per_pin->proc_entry = NULL;
 652         }
 653 }
 654 #else
 655 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 656                                int index)
 657 {
 658         return 0;
 659 }
 660 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 661 {
 662 }
 663 #endif
 664
 665 /*
 666  * Channel mapping routines
 667  */
 668
 669 /*
 670  * Compute derived values in channel_allocations[].
 671  */
 672 static void init_channel_allocations(void)
 673 {
 674         int i, j;
 675         struct cea_channel_speaker_allocation *p;
 676
 677         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 678                 p = channel_allocations + i;
 679                 p->channels = 0;
 680                 p->spk_mask = 0;
 681                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 682                         if (p->speakers[j]) {
 683                                 p->channels++;
 684                                 p->spk_mask |= p->speakers[j];
 685                         }
 686         }
 687 }
 688
 689 static int get_channel_allocation_order(int ca)
 690 {
 691         int i;
 692
 693         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 694                 if (channel_allocations[i].ca_index == ca)
 695                         break;
 696         }
 697         return i;
 698 }
 699
 700 /*
 701  * The transformation takes two steps:
 702  *
 703  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 704  *            spk_mask => (channel_allocations[])         => ai->CA
 705  *
 706  * TODO: it could select the wrong CA from multiple candidates.
 707 */
 708 static int hdmi_channel_allocation(struct hda_codec *codec,
 709                                    struct hdmi_eld *eld, int channels)
 710 {
 711         int i;
 712         int ca = 0;
 713         int spk_mask = 0;
 714         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 715
 716         /*
 717          * CA defaults to 0 for basic stereo audio
 718          */
 719         if (channels <= 2)
 720                 return 0;
 721
 722         /*
 723          * expand ELD's speaker allocation mask
 724          *
 725          * ELD tells the speaker mask in a compact(paired) form,
 726          * expand ELD's notions to match the ones used by Audio InfoFrame.
 727          */
 728         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 729                 if (eld->info.spk_alloc & (1 << i))
 730                         spk_mask |= eld_speaker_allocation_bits[i];
 731         }
 732
 733         /* search for the first working match in the CA table */
 734         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 735                 if (channels == channel_allocations[i].channels &&
 736                     (spk_mask & channel_allocations[i].spk_mask) ==
 737                                 channel_allocations[i].spk_mask) {
 738                         ca = channel_allocations[i].ca_index;
 739                         break;
 740                 }
 741         }
 742
 743         if (!ca) {
 744                 /* if there was no match, select the regular ALSA channel
 745                  * allocation with the matching number of channels */
 746                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 747                         if (channels == channel_allocations[i].channels) {
 748                                 ca = channel_allocations[i].ca_index;
 749                                 break;
 750                         }
 751                 }
 752         }
 753
 754         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 755         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 756                     ca, channels, buf);
 757
 758         return ca;
 759 }
 760
 761 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 762                                        hda_nid_t pin_nid)
 763 {
 764 #ifdef CONFIG_SND_DEBUG_VERBOSE
 765         struct hdmi_spec *spec = codec->spec;
 766         int i;
 767         int channel;
 768
 769         for (i = 0; i < 8; i++) {
 770                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 771                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 772                                                 channel, i);
 773         }
 774 #endif
 775 }
 776
 777 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 778                                        hda_nid_t pin_nid,
 779                                        bool non_pcm,
 780                                        int ca)
 781 {
 782         struct hdmi_spec *spec = codec->spec;
 783         struct cea_channel_speaker_allocation *ch_alloc;
 784         int i;
 785         int err;
 786         int order;
 787         int non_pcm_mapping[8];
 788
 789         order = get_channel_allocation_order(ca);
 790         ch_alloc = &channel_allocations[order];
 791
 792         if (hdmi_channel_mapping[ca][1] == 0) {
 793                 int hdmi_slot = 0;
 794                 /* fill actual channel mappings in ALSA channel (i) order */
 795                 for (i = 0; i < ch_alloc->channels; i++) {
 796                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 797                                 hdmi_slot++; /* skip zero slots */
 798
 799                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 800                 }
 801                 /* fill the rest of the slots with ALSA channel 0xf */
 802                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 803                         if (!ch_alloc->speakers[7 - hdmi_slot])
 804                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 805         }
 806
 807         if (non_pcm) {
 808                 for (i = 0; i < ch_alloc->channels; i++)
 809                         non_pcm_mapping[i] = (i << 4) | i;
 810                 for (; i < 8; i++)
 811                         non_pcm_mapping[i] = (0xf << 4) | i;
 812         }
 813
 814         for (i = 0; i < 8; i++) {
 815                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 816                 int hdmi_slot = slotsetup & 0x0f;
 817                 int channel = (slotsetup & 0xf0) >> 4;
 818                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 819                 if (err) {
 820                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 821                         break;
 822                 }
 823         }
 824 }
 825
 826 struct channel_map_table {
 827         unsigned char map;              /* ALSA API channel map position */
 828         int spk_mask;                   /* speaker position bit mask */
 829 };
 830
 831 static struct channel_map_table map_tables[] = {
 832         { SNDRV_CHMAP_FL,       FL },
 833         { SNDRV_CHMAP_FR,       FR },
 834         { SNDRV_CHMAP_RL,       RL },
 835         { SNDRV_CHMAP_RR,       RR },
 836         { SNDRV_CHMAP_LFE,      LFE },
 837         { SNDRV_CHMAP_FC,       FC },
 838         { SNDRV_CHMAP_RLC,      RLC },
 839         { SNDRV_CHMAP_RRC,      RRC },
 840         { SNDRV_CHMAP_RC,       RC },
 841         { SNDRV_CHMAP_FLC,      FLC },
 842         { SNDRV_CHMAP_FRC,      FRC },
 843         { SNDRV_CHMAP_TFL,      FLH },
 844         { SNDRV_CHMAP_TFR,      FRH },
 845         { SNDRV_CHMAP_FLW,      FLW },
 846         { SNDRV_CHMAP_FRW,      FRW },
 847         { SNDRV_CHMAP_TC,       TC },
 848         { SNDRV_CHMAP_TFC,      FCH },
 849         {} /* terminator */
 850 };
 851
 852 /* from ALSA API channel position to speaker bit mask */
 853 static int to_spk_mask(unsigned char c)
 854 {
 855         struct channel_map_table *t = map_tables;
 856         for (; t->map; t++) {
 857                 if (t->map == c)
 858                         return t->spk_mask;
 859         }
 860         return 0;
 861 }
 862
 863 /* from ALSA API channel position to CEA slot */
 864 static int to_cea_slot(int ordered_ca, unsigned char pos)
 865 {
 866         int mask = to_spk_mask(pos);
 867         int i;
 868
 869         if (mask) {
 870                 for (i = 0; i < 8; i++) {
 871                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 872                                 return i;
 873                 }
 874         }
 875
 876         return -1;
 877 }
 878
 879 /* from speaker bit mask to ALSA API channel position */
 880 static int spk_to_chmap(int spk)
 881 {
 882         struct channel_map_table *t = map_tables;
 883         for (; t->map; t++) {
 884                 if (t->spk_mask == spk)
 885                         return t->map;
 886         }
 887         return 0;
 888 }
 889
 890 /* from CEA slot to ALSA API channel position */
 891 static int from_cea_slot(int ordered_ca, unsigned char slot)
 892 {
 893         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 894
 895         return spk_to_chmap(mask);
 896 }
 897
 898 /* get the CA index corresponding to the given ALSA API channel map */
 899 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 900 {
 901         int i, spks = 0, spk_mask = 0;
 902
 903         for (i = 0; i < chs; i++) {
 904                 int mask = to_spk_mask(map[i]);
 905                 if (mask) {
 906                         spk_mask |= mask;
 907                         spks++;
 908                 }
 909         }
 910
 911         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 912                 if ((chs == channel_allocations[i].channels ||
 913                      spks == channel_allocations[i].channels) &&
 914                     (spk_mask & channel_allocations[i].spk_mask) ==
 915                                 channel_allocations[i].spk_mask)
 916                         return channel_allocations[i].ca_index;
 917         }
 918         return -1;
 919 }
 920
 921 /* set up the channel slots for the given ALSA API channel map */
 922 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 923                                              hda_nid_t pin_nid,
 924                                              int chs, unsigned char *map,
 925                                              int ca)
 926 {
 927         struct hdmi_spec *spec = codec->spec;
 928         int ordered_ca = get_channel_allocation_order(ca);
 929         int alsa_pos, hdmi_slot;
 930         int assignments[8] = {[0 ... 7] = 0xf};
 931
 932         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 933
 934                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 935
 936                 if (hdmi_slot < 0)
 937                         continue; /* unassigned channel */
 938
 939                 assignments[hdmi_slot] = alsa_pos;
 940         }
 941
 942         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 943                 int err;
 944
 945                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 946                                                      assignments[hdmi_slot]);
 947                 if (err)
 948                         return -EINVAL;
 949         }
 950         return 0;
 951 }
 952
 953 /* store ALSA API channel map from the current default map */
 954 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 955 {
 956         int i;
 957         int ordered_ca = get_channel_allocation_order(ca);
 958         for (i = 0; i < 8; i++) {
 959                 if (i < channel_allocations[ordered_ca].channels)
 960                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 961                 else
 962                         map[i] = 0;
 963         }
 964 }
 965
 966 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 967                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 968                                        int channels, unsigned char *map,
 969                                        bool chmap_set)
 970 {
 971         if (!non_pcm && chmap_set) {
 972                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 973                                                   channels, map, ca);
 974         } else {
 975                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 976                 hdmi_setup_fake_chmap(map, ca);
 977         }
 978
 979         hdmi_debug_channel_mapping(codec, pin_nid);
 980 }
 981
 982 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 983                                      int asp_slot, int channel)
 984 {
 985         return snd_hda_codec_write(codec, pin_nid, 0,
 986                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 987                                    (channel << 4) | asp_slot);
 988 }
 989
 990 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 991                                      int asp_slot)
 992 {
 993         return (snd_hda_codec_read(codec, pin_nid, 0,
 994                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 995                                    asp_slot) & 0xf0) >> 4;
 996 }
 997
 998 /*
 999  * Audio InfoFrame routines
1000  */
1001
1002 /*
1003  * Enable Audio InfoFrame Transmission
1004  */
1005 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
1006                                        hda_nid_t pin_nid)
1007 {
1008         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1009         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1010                                                 AC_DIPXMIT_BEST);
1011 }
1012
1013 /*
1014  * Disable Audio InfoFrame Transmission
1015  */
1016 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
1017                                       hda_nid_t pin_nid)
1018 {
1019         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1020         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1021                                                 AC_DIPXMIT_DISABLE);
1022 }
1023
1024 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
1025 {
1026 #ifdef CONFIG_SND_DEBUG_VERBOSE
1027         int i;
1028         int size;
1029
1030         size = snd_hdmi_get_eld_size(codec, pin_nid);
1031         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
1032
1033         for (i = 0; i < 8; i++) {
1034                 size = snd_hda_codec_read(codec, pin_nid, 0,
1035                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1036                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1037         }
1038 #endif
1039 }
1040
1041 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1042 {
1043 #ifdef BE_PARANOID
1044         int i, j;
1045         int size;
1046         int pi, bi;
1047         for (i = 0; i < 8; i++) {
1048                 size = snd_hda_codec_read(codec, pin_nid, 0,
1049                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1050                 if (size == 0)
1051                         continue;
1052
1053                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1054                 for (j = 1; j < 1000; j++) {
1055                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1056                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1057                         if (pi != i)
1058                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1059                                                 bi, pi, i);
1060                         if (bi == 0) /* byte index wrapped around */
1061                                 break;
1062                 }
1063                 codec_dbg(codec,
1064                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1065                         i, size, j);
1066         }
1067 #endif
1068 }
1069
1070 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1071 {
1072         u8 *bytes = (u8 *)hdmi_ai;
1073         u8 sum = 0;
1074         int i;
1075
1076         hdmi_ai->checksum = 0;
1077
1078         for (i = 0; i < sizeof(*hdmi_ai); i++)
1079                 sum += bytes[i];
1080
1081         hdmi_ai->checksum = -sum;
1082 }
1083
1084 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1085                                       hda_nid_t pin_nid,
1086                                       u8 *dip, int size)
1087 {
1088         int i;
1089
1090         hdmi_debug_dip_size(codec, pin_nid);
1091         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1092
1093         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1094         for (i = 0; i < size; i++)
1095                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1096 }
1097
1098 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1099                                     u8 *dip, int size)
1100 {
1101         u8 val;
1102         int i;
1103
1104         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1105                                                             != AC_DIPXMIT_BEST)
1106                 return false;
1107
1108         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1109         for (i = 0; i < size; i++) {
1110                 val = snd_hda_codec_read(codec, pin_nid, 0,
1111                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1112                 if (val != dip[i])
1113                         return false;
1114         }
1115
1116         return true;
1117 }
1118
1119 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1120                                      hda_nid_t pin_nid,
1121                                      int ca, int active_channels,
1122                                      int conn_type)
1123 {
1124         union audio_infoframe ai;
1125
1126         memset(&ai, 0, sizeof(ai));
1127         if (conn_type == 0) { /* HDMI */
1128                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1129
1130                 hdmi_ai->type           = 0x84;
1131                 hdmi_ai->ver            = 0x01;
1132                 hdmi_ai->len            = 0x0a;
1133                 hdmi_ai->CC02_CT47      = active_channels - 1;
1134                 hdmi_ai->CA             = ca;
1135                 hdmi_checksum_audio_infoframe(hdmi_ai);
1136         } else if (conn_type == 1) { /* DisplayPort */
1137                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1138
1139                 dp_ai->type             = 0x84;
1140                 dp_ai->len              = 0x1b;
1141                 dp_ai->ver              = 0x11 << 2;
1142                 dp_ai->CC02_CT47        = active_channels - 1;
1143                 dp_ai->CA               = ca;
1144         } else {
1145                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1146                             pin_nid);
1147                 return;
1148         }
1149
1150         /*
1151          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1152          * sizeof(*dp_ai) to avoid partial match/update problems when
1153          * the user switches between HDMI/DP monitors.
1154          */
1155         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1156                                         sizeof(ai))) {
1157                 codec_dbg(codec,
1158                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1159                             pin_nid,
1160                             active_channels, ca);
1161                 hdmi_stop_infoframe_trans(codec, pin_nid);
1162                 hdmi_fill_audio_infoframe(codec, pin_nid,
1163                                             ai.bytes, sizeof(ai));
1164                 hdmi_start_infoframe_trans(codec, pin_nid);
1165         }
1166 }
1167
1168 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1169                                        struct hdmi_spec_per_pin *per_pin,
1170                                        bool non_pcm)
1171 {
1172         struct hdmi_spec *spec = codec->spec;
1173         hda_nid_t pin_nid = per_pin->pin_nid;
1174         int channels = per_pin->channels;
1175         int active_channels;
1176         struct hdmi_eld *eld;
1177         int ca, ordered_ca;
1178
1179         if (!channels)
1180                 return;
1181
1182         if (is_haswell_plus(codec))
1183                 snd_hda_codec_write(codec, pin_nid, 0,
1184                                             AC_VERB_SET_AMP_GAIN_MUTE,
1185                                             AMP_OUT_UNMUTE);
1186
1187         eld = &per_pin->sink_eld;
1188
1189         if (!non_pcm && per_pin->chmap_set)
1190                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1191         else
1192                 ca = hdmi_channel_allocation(codec, eld, channels);
1193         if (ca < 0)
1194                 ca = 0;
1195
1196         ordered_ca = get_channel_allocation_order(ca);
1197         active_channels = channel_allocations[ordered_ca].channels;
1198
1199         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1200
1201         /*
1202          * always configure channel mapping, it may have been changed by the
1203          * user in the meantime
1204          */
1205         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1206                                    channels, per_pin->chmap,
1207                                    per_pin->chmap_set);
1208
1209         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1210                                       eld->info.conn_type);
1211
1212         per_pin->non_pcm = non_pcm;
1213 }
1214
1215 /*
1216  * Unsolicited events
1217  */
1218
1219 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1220
1221 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1222 {
1223         struct hdmi_spec *spec = codec->spec;
1224         int pin_idx = pin_nid_to_pin_index(codec, nid);
1225
1226         if (pin_idx < 0)
1227                 return;
1228         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1229                 snd_hda_jack_report_sync(codec);
1230 }
1231
1232 static void jack_callback(struct hda_codec *codec,
1233                           struct hda_jack_callback *jack)
1234 {
1235         check_presence_and_report(codec, jack->tbl->nid);
1236 }
1237
1238 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1239 {
1240         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1241         struct hda_jack_tbl *jack;
1242         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1243
1244         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1245         if (!jack)
1246                 return;
1247         jack->jack_dirty = 1;
1248
1249         codec_dbg(codec,
1250                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1251                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1252                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1253
1254         check_presence_and_report(codec, jack->nid);
1255 }
1256
1257 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1258 {
1259         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1260         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1261         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1262         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1263
1264         codec_info(codec,
1265                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1266                 codec->addr,
1267                 tag,
1268                 subtag,
1269                 cp_state,
1270                 cp_ready);
1271
1272         /* TODO */
1273         if (cp_state)
1274                 ;
1275         if (cp_ready)
1276                 ;
1277 }
1278
1279
1280 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1281 {
1282         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1283         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1284
1285         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1286                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1287                 return;
1288         }
1289
1290         if (subtag == 0)
1291                 hdmi_intrinsic_event(codec, res);
1292         else
1293                 hdmi_non_intrinsic_event(codec, res);
1294 }
1295
1296 static void haswell_verify_D0(struct hda_codec *codec,
1297                 hda_nid_t cvt_nid, hda_nid_t nid)
1298 {
1299         int pwr;
1300
1301         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1302          * thus pins could only choose converter 0 for use. Make sure the
1303          * converters are in correct power state */
1304         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1305                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1306
1307         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1308                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1309                                     AC_PWRST_D0);
1310                 msleep(40);
1311                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1312                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1313                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1314         }
1315 }
1316
1317 /*
1318  * Callbacks
1319  */
1320
1321 /* HBR should be Non-PCM, 8 channels */
1322 #define is_hbr_format(format) \
1323         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1324
1325 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1326                               bool hbr)
1327 {
1328         int pinctl, new_pinctl;
1329
1330         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1331                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1332                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1333
1334                 if (pinctl < 0)
1335                         return hbr ? -EINVAL : 0;
1336
1337                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1338                 if (hbr)
1339                         new_pinctl |= AC_PINCTL_EPT_HBR;
1340                 else
1341                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1342
1343                 codec_dbg(codec,
1344                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1345                             pin_nid,
1346                             pinctl == new_pinctl ? "" : "new-",
1347                             new_pinctl);
1348
1349                 if (pinctl != new_pinctl)
1350                         snd_hda_codec_write(codec, pin_nid, 0,
1351                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1352                                             new_pinctl);
1353         } else if (hbr)
1354                 return -EINVAL;
1355
1356         return 0;
1357 }
1358
1359 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1360                               hda_nid_t pin_nid, u32 stream_tag, int format)
1361 {
1362         struct hdmi_spec *spec = codec->spec;
1363         int err;
1364
1365         if (is_haswell_plus(codec))
1366                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1367
1368         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1369
1370         if (err) {
1371                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1372                 return err;
1373         }
1374
1375         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1376         return 0;
1377 }
1378
1379 /* Try to find an available converter
1380  * If pin_idx is less then zero, just try to find an available converter.
1381  * Otherwise, try to find an available converter and get the cvt mux index
1382  * of the pin.
1383  */
1384 static int hdmi_choose_cvt(struct hda_codec *codec,
1385                         int pin_idx, int *cvt_id, int *mux_id)
1386 {
1387         struct hdmi_spec *spec = codec->spec;
1388         struct hdmi_spec_per_pin *per_pin;
1389         struct hdmi_spec_per_cvt *per_cvt = NULL;
1390         int cvt_idx, mux_idx = 0;
1391
1392         /* pin_idx < 0 means no pin will be bound to the converter */
1393         if (pin_idx < 0)
1394                 per_pin = NULL;
1395         else
1396                 per_pin = get_pin(spec, pin_idx);
1397
1398         /* Dynamically assign converter to stream */
1399         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1400                 per_cvt = get_cvt(spec, cvt_idx);
1401
1402                 /* Must not already be assigned */
1403                 if (per_cvt->assigned)
1404                         continue;
1405                 if (per_pin == NULL)
1406                         break;
1407                 /* Must be in pin's mux's list of converters */
1408                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1409                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1410                                 break;
1411                 /* Not in mux list */
1412                 if (mux_idx == per_pin->num_mux_nids)
1413                         continue;
1414                 break;
1415         }
1416
1417         /* No free converters */
1418         if (cvt_idx == spec->num_cvts)
1419                 return -EBUSY;
1420
1421         if (per_pin != NULL)
1422                 per_pin->mux_idx = mux_idx;
1423
1424         if (cvt_id)
1425                 *cvt_id = cvt_idx;
1426         if (mux_id)
1427                 *mux_id = mux_idx;
1428
1429         return 0;
1430 }
1431
1432 /* Assure the pin select the right convetor */
1433 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1434                         struct hdmi_spec_per_pin *per_pin)
1435 {
1436         hda_nid_t pin_nid = per_pin->pin_nid;
1437         int mux_idx, curr;
1438
1439         mux_idx = per_pin->mux_idx;
1440         curr = snd_hda_codec_read(codec, pin_nid, 0,
1441                                           AC_VERB_GET_CONNECT_SEL, 0);
1442         if (curr != mux_idx)
1443                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1444                                             AC_VERB_SET_CONNECT_SEL,
1445                                             mux_idx);
1446 }
1447
1448 /* get the mux index for the converter of the pins
1449  * converter's mux index is the same for all pins on Intel platform
1450  */
1451 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1452                         hda_nid_t cvt_nid)
1453 {
1454         int i;
1455
1456         for (i = 0; i < spec->num_cvts; i++)
1457                 if (spec->cvt_nids[i] == cvt_nid)
1458                         return i;
1459         return -EINVAL;
1460 }
1461
1462 /* Intel HDMI workaround to fix audio routing issue:
1463  * For some Intel display codecs, pins share the same connection list.
1464  * So a conveter can be selected by multiple pins and playback on any of these
1465  * pins will generate sound on the external display, because audio flows from
1466  * the same converter to the display pipeline. Also muting one pin may make
1467  * other pins have no sound output.
1468  * So this function assures that an assigned converter for a pin is not selected
1469  * by any other pins.
1470  */
1471 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1472                         hda_nid_t pin_nid, int mux_idx)
1473 {
1474         struct hdmi_spec *spec = codec->spec;
1475         hda_nid_t nid;
1476         int cvt_idx, curr;
1477         struct hdmi_spec_per_cvt *per_cvt;
1478
1479         /* configure all pins, including "no physical connection" ones */
1480         for_each_hda_codec_node(nid, codec) {
1481                 unsigned int wid_caps = get_wcaps(codec, nid);
1482                 unsigned int wid_type = get_wcaps_type(wid_caps);
1483
1484                 if (wid_type != AC_WID_PIN)
1485                         continue;
1486
1487                 if (nid == pin_nid)
1488                         continue;
1489
1490                 curr = snd_hda_codec_read(codec, nid, 0,
1491                                           AC_VERB_GET_CONNECT_SEL, 0);
1492                 if (curr != mux_idx)
1493                         continue;
1494
1495                 /* choose an unassigned converter. The conveters in the
1496                  * connection list are in the same order as in the codec.
1497                  */
1498                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1499                         per_cvt = get_cvt(spec, cvt_idx);
1500                         if (!per_cvt->assigned) {
1501                                 codec_dbg(codec,
1502                                           "choose cvt %d for pin nid %d\n",
1503                                         cvt_idx, nid);
1504                                 snd_hda_codec_write_cache(codec, nid, 0,
1505                                             AC_VERB_SET_CONNECT_SEL,
1506                                             cvt_idx);
1507                                 break;
1508                         }
1509                 }
1510         }
1511 }
1512
1513 /* A wrapper of intel_not_share_asigned_cvt() */
1514 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1515                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1516 {
1517         int mux_idx;
1518         struct hdmi_spec *spec = codec->spec;
1519
1520         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1521                 return;
1522
1523         /* On Intel platform, the mapping of converter nid to
1524          * mux index of the pins are always the same.
1525          * The pin nid may be 0, this means all pins will not
1526          * share the converter.
1527          */
1528         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1529         if (mux_idx >= 0)
1530                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1531 }
1532
1533 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1534  * in dyn_pcm_assign mode.
1535  */
1536 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1537                          struct hda_codec *codec,
1538                          struct snd_pcm_substream *substream)
1539 {
1540         struct hdmi_spec *spec = codec->spec;
1541         struct snd_pcm_runtime *runtime = substream->runtime;
1542         int cvt_idx, pcm_idx;
1543         struct hdmi_spec_per_cvt *per_cvt = NULL;
1544         int err;
1545
1546         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1547         if (pcm_idx < 0)
1548                 return -EINVAL;
1549
1550         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1551         if (err)
1552                 return err;
1553
1554         per_cvt = get_cvt(spec, cvt_idx);
1555         per_cvt->assigned = 1;
1556         hinfo->nid = per_cvt->cvt_nid;
1557
1558         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1559
1560         set_bit(pcm_idx, &spec->pcm_in_use);
1561         /* todo: setup spdif ctls assign */
1562
1563         /* Initially set the converter's capabilities */
1564         hinfo->channels_min = per_cvt->channels_min;
1565         hinfo->channels_max = per_cvt->channels_max;
1566         hinfo->rates = per_cvt->rates;
1567         hinfo->formats = per_cvt->formats;
1568         hinfo->maxbps = per_cvt->maxbps;
1569
1570         /* Store the updated parameters */
1571         runtime->hw.channels_min = hinfo->channels_min;
1572         runtime->hw.channels_max = hinfo->channels_max;
1573         runtime->hw.formats = hinfo->formats;
1574         runtime->hw.rates = hinfo->rates;
1575
1576         snd_pcm_hw_constraint_step(substream->runtime, 0,
1577                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1578         return 0;
1579 }
1580
1581 /*
1582  * HDA PCM callbacks
1583  */
1584 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1585                          struct hda_codec *codec,
1586                          struct snd_pcm_substream *substream)
1587 {
1588         struct hdmi_spec *spec = codec->spec;
1589         struct snd_pcm_runtime *runtime = substream->runtime;
1590         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1591         struct hdmi_spec_per_pin *per_pin;
1592         struct hdmi_eld *eld;
1593         struct hdmi_spec_per_cvt *per_cvt = NULL;
1594         int err;
1595
1596         /* Validate hinfo */
1597         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1598         if (pcm_idx < 0)
1599                 return -EINVAL;
1600
1601         mutex_lock(&spec->pcm_lock);
1602         pin_idx = hinfo_to_pin_index(codec, hinfo);
1603         if (!spec->dyn_pcm_assign) {
1604                 if (snd_BUG_ON(pin_idx < 0)) {
1605                         mutex_unlock(&spec->pcm_lock);
1606                         return -EINVAL;
1607                 }
1608         } else {
1609                 /* no pin is assigned to the PCM
1610                  * PA need pcm open successfully when probe
1611                  */
1612                 if (pin_idx < 0) {
1613                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1614                         mutex_unlock(&spec->pcm_lock);
1615                         return err;
1616                 }
1617         }
1618
1619         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1620         if (err < 0) {
1621                 mutex_unlock(&spec->pcm_lock);
1622                 return err;
1623         }
1624
1625         per_cvt = get_cvt(spec, cvt_idx);
1626         /* Claim converter */
1627         per_cvt->assigned = 1;
1628
1629         set_bit(pcm_idx, &spec->pcm_in_use);
1630         per_pin = get_pin(spec, pin_idx);
1631         per_pin->cvt_nid = per_cvt->cvt_nid;
1632         hinfo->nid = per_cvt->cvt_nid;
1633
1634         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1635                             AC_VERB_SET_CONNECT_SEL,
1636                             mux_idx);
1637
1638         /* configure unused pins to choose other converters */
1639         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1640                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1641
1642         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1643
1644         /* Initially set the converter's capabilities */
1645         hinfo->channels_min = per_cvt->channels_min;
1646         hinfo->channels_max = per_cvt->channels_max;
1647         hinfo->rates = per_cvt->rates;
1648         hinfo->formats = per_cvt->formats;
1649         hinfo->maxbps = per_cvt->maxbps;
1650
1651         eld = &per_pin->sink_eld;
1652         /* Restrict capabilities by ELD if this isn't disabled */
1653         if (!static_hdmi_pcm && eld->eld_valid) {
1654                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1655                 if (hinfo->channels_min > hinfo->channels_max ||
1656                     !hinfo->rates || !hinfo->formats) {
1657                         per_cvt->assigned = 0;
1658                         hinfo->nid = 0;
1659                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1660                         mutex_unlock(&spec->pcm_lock);
1661                         return -ENODEV;
1662                 }
1663         }
1664
1665         mutex_unlock(&spec->pcm_lock);
1666         /* Store the updated parameters */
1667         runtime->hw.channels_min = hinfo->channels_min;
1668         runtime->hw.channels_max = hinfo->channels_max;
1669         runtime->hw.formats = hinfo->formats;
1670         runtime->hw.rates = hinfo->rates;
1671
1672         snd_pcm_hw_constraint_step(substream->runtime, 0,
1673                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1674         return 0;
1675 }
1676
1677 /*
1678  * HDA/HDMI auto parsing
1679  */
1680 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1681 {
1682         struct hdmi_spec *spec = codec->spec;
1683         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1684         hda_nid_t pin_nid = per_pin->pin_nid;
1685
1686         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1687                 codec_warn(codec,
1688                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1689                            pin_nid, get_wcaps(codec, pin_nid));
1690                 return -EINVAL;
1691         }
1692
1693         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1694                                                         per_pin->mux_nids,
1695                                                         HDA_MAX_CONNECTIONS);
1696
1697         return 0;
1698 }
1699
1700 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1701                                 struct hdmi_spec_per_pin *per_pin)
1702 {
1703         int i;
1704
1705         /* try the prefer PCM */
1706         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1707                 return per_pin->pin_nid_idx;
1708
1709         /* have a second try; check the "reserved area" over num_pins */
1710         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1711                 if (!test_bit(i, &spec->pcm_bitmap))
1712                         return i;
1713         }
1714
1715         /* the last try; check the empty slots in pins */
1716         for (i = 0; i < spec->num_pins; i++) {
1717                 if (!test_bit(i, &spec->pcm_bitmap))
1718                         return i;
1719         }
1720         return -EBUSY;
1721 }
1722
1723 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1724                                 struct hdmi_spec_per_pin *per_pin)
1725 {
1726         int idx;
1727
1728         /* pcm already be attached to the pin */
1729         if (per_pin->pcm)
1730                 return;
1731         idx = hdmi_find_pcm_slot(spec, per_pin);
1732         if (idx == -ENODEV)
1733                 return;
1734         per_pin->pcm_idx = idx;
1735         per_pin->pcm = get_hdmi_pcm(spec, idx);
1736         set_bit(idx, &spec->pcm_bitmap);
1737 }
1738
1739 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1740                                 struct hdmi_spec_per_pin *per_pin)
1741 {
1742         int idx;
1743
1744         /* pcm already be detached from the pin */
1745         if (!per_pin->pcm)
1746                 return;
1747         idx = per_pin->pcm_idx;
1748         per_pin->pcm_idx = -1;
1749         per_pin->pcm = NULL;
1750         if (idx >= 0 && idx < spec->pcm_used)
1751                 clear_bit(idx, &spec->pcm_bitmap);
1752 }
1753
1754 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1755                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1756 {
1757         int mux_idx;
1758
1759         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1760                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1761                         break;
1762         return mux_idx;
1763 }
1764
1765 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1766
1767 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1768                            struct hdmi_spec_per_pin *per_pin)
1769 {
1770         struct hda_codec *codec = per_pin->codec;
1771         struct hda_pcm *pcm;
1772         struct hda_pcm_stream *hinfo;
1773         struct snd_pcm_substream *substream;
1774         int mux_idx;
1775         bool non_pcm;
1776
1777         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1778                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1779         else
1780                 return;
1781         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1782                 return;
1783
1784         /* hdmi audio only uses playback and one substream */
1785         hinfo = pcm->stream;
1786         substream = pcm->pcm->streams[0].substream;
1787
1788         per_pin->cvt_nid = hinfo->nid;
1789
1790         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1791         if (mux_idx < per_pin->num_mux_nids)
1792                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1793                                 AC_VERB_SET_CONNECT_SEL,
1794                                 mux_idx);
1795         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1796
1797         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1798         if (substream->runtime)
1799                 per_pin->channels = substream->runtime->channels;
1800         per_pin->setup = true;
1801         per_pin->mux_idx = mux_idx;
1802
1803         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1804 }
1805
1806 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1807                            struct hdmi_spec_per_pin *per_pin)
1808 {
1809         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1810                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1811
1812         per_pin->chmap_set = false;
1813         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1814
1815         per_pin->setup = false;
1816         per_pin->channels = 0;
1817 }
1818
1819 /* update per_pin ELD from the given new ELD;
1820  * setup info frame and notification accordingly
1821  */
1822 static void update_eld(struct hda_codec *codec,
1823                        struct hdmi_spec_per_pin *per_pin,
1824                        struct hdmi_eld *eld)
1825 {
1826         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1827         struct hdmi_spec *spec = codec->spec;
1828         bool old_eld_valid = pin_eld->eld_valid;
1829         bool eld_changed;
1830
1831         if (spec->dyn_pcm_assign) {
1832                 if (eld->eld_valid) {
1833                         hdmi_attach_hda_pcm(spec, per_pin);
1834                         hdmi_pcm_setup_pin(spec, per_pin);
1835                 } else {
1836                         hdmi_pcm_reset_pin(spec, per_pin);
1837                         hdmi_detach_hda_pcm(spec, per_pin);
1838                 }
1839         }
1840
1841         if (eld->eld_valid)
1842                 snd_hdmi_show_eld(codec, &eld->info);
1843
1844         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1845         if (eld->eld_valid && pin_eld->eld_valid)
1846                 if (pin_eld->eld_size != eld->eld_size ||
1847                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1848                            eld->eld_size) != 0)
1849                         eld_changed = true;
1850
1851         pin_eld->eld_valid = eld->eld_valid;
1852         pin_eld->eld_size = eld->eld_size;
1853         if (eld->eld_valid)
1854                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1855         pin_eld->info = eld->info;
1856
1857         /*
1858          * Re-setup pin and infoframe. This is needed e.g. when
1859          * - sink is first plugged-in
1860          * - transcoder can change during stream playback on Haswell
1861          *   and this can make HW reset converter selection on a pin.
1862          */
1863         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1864                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1865                         intel_verify_pin_cvt_connect(codec, per_pin);
1866                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1867                                                      per_pin->mux_idx);
1868                 }
1869
1870                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1871         }
1872
1873         if (eld_changed)
1874                 snd_ctl_notify(codec->card,
1875                                SNDRV_CTL_EVENT_MASK_VALUE |
1876                                SNDRV_CTL_EVENT_MASK_INFO,
1877                                &per_pin->eld_ctl->id);
1878 }
1879
1880 /* update ELD and jack state via HD-audio verbs */
1881 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1882                                          int repoll)
1883 {
1884         struct hda_jack_tbl *jack;
1885         struct hda_codec *codec = per_pin->codec;
1886         struct hdmi_spec *spec = codec->spec;
1887         struct hdmi_eld *eld = &spec->temp_eld;
1888         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1889         hda_nid_t pin_nid = per_pin->pin_nid;
1890         /*
1891          * Always execute a GetPinSense verb here, even when called from
1892          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1893          * response's PD bit is not the real PD value, but indicates that
1894          * the real PD value changed. An older version of the HD-audio
1895          * specification worked this way. Hence, we just ignore the data in
1896          * the unsolicited response to avoid custom WARs.
1897          */
1898         int present;
1899         bool ret;
1900         bool do_repoll = false;
1901
1902         snd_hda_power_up_pm(codec);
1903         present = snd_hda_pin_sense(codec, pin_nid);
1904
1905         mutex_lock(&per_pin->lock);
1906         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1907         if (pin_eld->monitor_present)
1908                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1909         else
1910                 eld->eld_valid = false;
1911
1912         codec_dbg(codec,
1913                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1914                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1915
1916         if (eld->eld_valid) {
1917                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1918                                                      &eld->eld_size) < 0)
1919                         eld->eld_valid = false;
1920                 else {
1921                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1922                                                     eld->eld_size) < 0)
1923                                 eld->eld_valid = false;
1924                 }
1925                 if (!eld->eld_valid && repoll)
1926                         do_repoll = true;
1927         }
1928
1929         if (do_repoll)
1930                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1931         else
1932                 update_eld(codec, per_pin, eld);
1933
1934         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1935
1936         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1937         if (jack)
1938                 jack->block_report = !ret;
1939
1940         mutex_unlock(&per_pin->lock);
1941         snd_hda_power_down_pm(codec);
1942         return ret;
1943 }
1944
1945 /* update ELD and jack state via audio component */
1946 static void sync_eld_via_acomp(struct hda_codec *codec,
1947                                struct hdmi_spec_per_pin *per_pin)
1948 {
1949         struct hdmi_spec *spec = codec->spec;
1950         struct hdmi_eld *eld = &spec->temp_eld;
1951         int size;
1952
1953         mutex_lock(&per_pin->lock);
1954         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1955                                       &eld->monitor_present, eld->eld_buffer,
1956                                       ELD_MAX_SIZE);
1957         if (size < 0)
1958                 goto unlock;
1959         if (size > 0) {
1960                 size = min(size, ELD_MAX_SIZE);
1961                 if (snd_hdmi_parse_eld(codec, &eld->info,
1962                                        eld->eld_buffer, size) < 0)
1963                         size = -EINVAL;
1964         }
1965
1966         if (size > 0) {
1967                 eld->eld_valid = true;
1968                 eld->eld_size = size;
1969         } else {
1970                 eld->eld_valid = false;
1971                 eld->eld_size = 0;
1972         }
1973
1974         update_eld(codec, per_pin, eld);
1975         snd_jack_report(per_pin->acomp_jack,
1976                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1977  unlock:
1978         mutex_unlock(&per_pin->lock);
1979 }
1980
1981 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1982 {
1983         struct hda_codec *codec = per_pin->codec;
1984         struct hdmi_spec *spec = codec->spec;
1985         int ret;
1986
1987         mutex_lock(&spec->pcm_lock);
1988         if (codec_has_acomp(codec)) {
1989                 sync_eld_via_acomp(codec, per_pin);
1990                 ret = false; /* don't call snd_hda_jack_report_sync() */
1991         } else {
1992                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1993         }
1994         mutex_unlock(&spec->pcm_lock);
1995
1996         return ret;
1997 }
1998
1999 static void hdmi_repoll_eld(struct work_struct *work)
2000 {
2001         struct hdmi_spec_per_pin *per_pin =
2002         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
2003
2004         if (per_pin->repoll_count++ > 6)
2005                 per_pin->repoll_count = 0;
2006
2007         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
2008                 snd_hda_jack_report_sync(per_pin->codec);
2009 }
2010
2011 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2012                                              hda_nid_t nid);
2013
2014 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
2015 {
2016         struct hdmi_spec *spec = codec->spec;
2017         unsigned int caps, config;
2018         int pin_idx;
2019         struct hdmi_spec_per_pin *per_pin;
2020         int err;
2021
2022         caps = snd_hda_query_pin_caps(codec, pin_nid);
2023         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
2024                 return 0;
2025
2026         config = snd_hda_codec_get_pincfg(codec, pin_nid);
2027         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
2028                 return 0;
2029
2030         if (is_haswell_plus(codec))
2031                 intel_haswell_fixup_connect_list(codec, pin_nid);
2032
2033         pin_idx = spec->num_pins;
2034         per_pin = snd_array_new(&spec->pins);
2035         if (!per_pin)
2036                 return -ENOMEM;
2037
2038         per_pin->pin_nid = pin_nid;
2039         per_pin->non_pcm = false;
2040         if (spec->dyn_pcm_assign)
2041                 per_pin->pcm_idx = -1;
2042         else {
2043                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
2044                 per_pin->pcm_idx = pin_idx;
2045         }
2046         per_pin->pin_nid_idx = pin_idx;
2047
2048         err = hdmi_read_pin_conn(codec, pin_idx);
2049         if (err < 0)
2050                 return err;
2051
2052         spec->num_pins++;
2053
2054         return 0;
2055 }
2056
2057 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2058 {
2059         struct hdmi_spec *spec = codec->spec;
2060         struct hdmi_spec_per_cvt *per_cvt;
2061         unsigned int chans;
2062         int err;
2063
2064         chans = get_wcaps(codec, cvt_nid);
2065         chans = get_wcaps_channels(chans);
2066
2067         per_cvt = snd_array_new(&spec->cvts);
2068         if (!per_cvt)
2069                 return -ENOMEM;
2070
2071         per_cvt->cvt_nid = cvt_nid;
2072         per_cvt->channels_min = 2;
2073         if (chans <= 16) {
2074                 per_cvt->channels_max = chans;
2075                 if (chans > spec->channels_max)
2076                         spec->channels_max = chans;
2077         }
2078
2079         err = snd_hda_query_supported_pcm(codec, cvt_nid,
2080                                           &per_cvt->rates,
2081                                           &per_cvt->formats,
2082                                           &per_cvt->maxbps);
2083         if (err < 0)
2084                 return err;
2085
2086         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
2087                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
2088         spec->num_cvts++;
2089
2090         return 0;
2091 }
2092
2093 static int hdmi_parse_codec(struct hda_codec *codec)
2094 {
2095         hda_nid_t nid;
2096         int i, nodes;
2097
2098         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
2099         if (!nid || nodes < 0) {
2100                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
2101                 return -EINVAL;
2102         }
2103
2104         for (i = 0; i < nodes; i++, nid++) {
2105                 unsigned int caps;
2106                 unsigned int type;
2107
2108                 caps = get_wcaps(codec, nid);
2109                 type = get_wcaps_type(caps);
2110
2111                 if (!(caps & AC_WCAP_DIGITAL))
2112                         continue;
2113
2114                 switch (type) {
2115                 case AC_WID_AUD_OUT:
2116                         hdmi_add_cvt(codec, nid);
2117                         break;
2118                 case AC_WID_PIN:
2119                         hdmi_add_pin(codec, nid);
2120                         break;
2121                 }
2122         }
2123
2124         return 0;
2125 }
2126
2127 /*
2128  */
2129 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2130 {
2131         struct hda_spdif_out *spdif;
2132         bool non_pcm;
2133
2134         mutex_lock(&codec->spdif_mutex);
2135         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2136         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2137         mutex_unlock(&codec->spdif_mutex);
2138         return non_pcm;
2139 }
2140
2141 /*
2142  * HDMI callbacks
2143  */
2144
2145 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2146                                            struct hda_codec *codec,
2147                                            unsigned int stream_tag,
2148                                            unsigned int format,
2149                                            struct snd_pcm_substream *substream)
2150 {
2151         hda_nid_t cvt_nid = hinfo->nid;
2152         struct hdmi_spec *spec = codec->spec;
2153         int pin_idx;
2154         struct hdmi_spec_per_pin *per_pin;
2155         hda_nid_t pin_nid;
2156         struct snd_pcm_runtime *runtime = substream->runtime;
2157         bool non_pcm;
2158         int pinctl;
2159         int err;
2160
2161         mutex_lock(&spec->pcm_lock);
2162         pin_idx = hinfo_to_pin_index(codec, hinfo);
2163         if (spec->dyn_pcm_assign && pin_idx < 0) {
2164                 /* when dyn_pcm_assign and pcm is not bound to a pin
2165                  * skip pin setup and return 0 to make audio playback
2166                  * be ongoing
2167                  */
2168                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2169                 snd_hda_codec_setup_stream(codec, cvt_nid,
2170                                         stream_tag, 0, format);
2171                 mutex_unlock(&spec->pcm_lock);
2172                 return 0;
2173         }
2174
2175         if (snd_BUG_ON(pin_idx < 0)) {
2176                 mutex_unlock(&spec->pcm_lock);
2177                 return -EINVAL;
2178         }
2179         per_pin = get_pin(spec, pin_idx);
2180         pin_nid = per_pin->pin_nid;
2181         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
2182                 /* Verify pin:cvt selections to avoid silent audio after S3.
2183                  * After S3, the audio driver restores pin:cvt selections
2184                  * but this can happen before gfx is ready and such selection
2185                  * is overlooked by HW. Thus multiple pins can share a same
2186                  * default convertor and mute control will affect each other,
2187                  * which can cause a resumed audio playback become silent
2188                  * after S3.
2189                  */
2190                 intel_verify_pin_cvt_connect(codec, per_pin);
2191                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
2192         }
2193
2194         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2195         /* Todo: add DP1.2 MST audio support later */
2196         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
2197
2198         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2199         mutex_lock(&per_pin->lock);
2200         per_pin->channels = substream->runtime->channels;
2201         per_pin->setup = true;
2202
2203         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2204         mutex_unlock(&per_pin->lock);
2205         if (spec->dyn_pin_out) {
2206                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
2207                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2208                 snd_hda_codec_write(codec, pin_nid, 0,
2209                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2210                                     pinctl | PIN_OUT);
2211         }
2212
2213         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
2214                                  stream_tag, format);
2215         mutex_unlock(&spec->pcm_lock);
2216         return err;
2217 }
2218
2219 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2220                                              struct hda_codec *codec,
2221                                              struct snd_pcm_substream *substream)
2222 {
2223         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2224         return 0;
2225 }
2226
2227 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2228                           struct hda_codec *codec,
2229                           struct snd_pcm_substream *substream)
2230 {
2231         struct hdmi_spec *spec = codec->spec;
2232         int cvt_idx, pin_idx, pcm_idx;
2233         struct hdmi_spec_per_cvt *per_cvt;
2234         struct hdmi_spec_per_pin *per_pin;
2235         int pinctl;
2236
2237         if (hinfo->nid) {
2238                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2239                 if (snd_BUG_ON(pcm_idx < 0))
2240                         return -EINVAL;
2241                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2242                 if (snd_BUG_ON(cvt_idx < 0))
2243                         return -EINVAL;
2244                 per_cvt = get_cvt(spec, cvt_idx);
2245
2246                 snd_BUG_ON(!per_cvt->assigned);
2247                 per_cvt->assigned = 0;
2248                 hinfo->nid = 0;
2249
2250                 mutex_lock(&spec->pcm_lock);
2251                 clear_bit(pcm_idx, &spec->pcm_in_use);
2252                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2253                 if (spec->dyn_pcm_assign && pin_idx < 0) {
2254                         mutex_unlock(&spec->pcm_lock);
2255                         return 0;
2256                 }
2257
2258                 if (snd_BUG_ON(pin_idx < 0)) {
2259                         mutex_unlock(&spec->pcm_lock);
2260                         return -EINVAL;
2261                 }
2262                 per_pin = get_pin(spec, pin_idx);
2263
2264                 if (spec->dyn_pin_out) {
2265                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2266                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2267                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2268                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2269                                             pinctl & ~PIN_OUT);
2270                 }
2271
2272                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2273
2274                 mutex_lock(&per_pin->lock);
2275                 per_pin->chmap_set = false;
2276                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2277
2278                 per_pin->setup = false;
2279                 per_pin->channels = 0;
2280                 mutex_unlock(&per_pin->lock);
2281                 mutex_unlock(&spec->pcm_lock);
2282         }
2283
2284         return 0;
2285 }
2286
2287 static const struct hda_pcm_ops generic_ops = {
2288         .open = hdmi_pcm_open,
2289         .close = hdmi_pcm_close,
2290         .prepare = generic_hdmi_playback_pcm_prepare,
2291         .cleanup = generic_hdmi_playback_pcm_cleanup,
2292 };
2293
2294 /*
2295  * ALSA API channel-map control callbacks
2296  */
2297 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
2298                                struct snd_ctl_elem_info *uinfo)
2299 {
2300         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2301         struct hda_codec *codec = info->private_data;
2302         struct hdmi_spec *spec = codec->spec;
2303         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2304         uinfo->count = spec->channels_max;
2305         uinfo->value.integer.min = 0;
2306         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
2307         return 0;
2308 }
2309
2310 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2311                                                   int channels)
2312 {
2313         /* If the speaker allocation matches the channel count, it is OK.*/
2314         if (cap->channels != channels)
2315                 return -1;
2316
2317         /* all channels are remappable freely */
2318         return SNDRV_CTL_TLVT_CHMAP_VAR;
2319 }
2320
2321 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
2322                                         unsigned int *chmap, int channels)
2323 {
2324         int count = 0;
2325         int c;
2326
2327         for (c = 7; c >= 0; c--) {
2328                 int spk = cap->speakers[c];
2329                 if (!spk)
2330                         continue;
2331
2332                 chmap[count++] = spk_to_chmap(spk);
2333         }
2334
2335         WARN_ON(count != channels);
2336 }
2337
2338 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2339                               unsigned int size, unsigned int __user *tlv)
2340 {
2341         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2342         struct hda_codec *codec = info->private_data;
2343         struct hdmi_spec *spec = codec->spec;
2344         unsigned int __user *dst;
2345         int chs, count = 0;
2346
2347         if (size < 8)
2348                 return -ENOMEM;
2349         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2350                 return -EFAULT;
2351         size -= 8;
2352         dst = tlv + 2;
2353         for (chs = 2; chs <= spec->channels_max; chs++) {
2354                 int i;
2355                 struct cea_channel_speaker_allocation *cap;
2356                 cap = channel_allocations;
2357                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2358                         int chs_bytes = chs * 4;
2359                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2360                         unsigned int tlv_chmap[8];
2361
2362                         if (type < 0)
2363                                 continue;
2364                         if (size < 8)
2365                                 return -ENOMEM;
2366                         if (put_user(type, dst) ||
2367                             put_user(chs_bytes, dst + 1))
2368                                 return -EFAULT;
2369                         dst += 2;
2370                         size -= 8;
2371                         count += 8;
2372                         if (size < chs_bytes)
2373                                 return -ENOMEM;
2374                         size -= chs_bytes;
2375                         count += chs_bytes;
2376                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2377                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2378                                 return -EFAULT;
2379                         dst += chs;
2380                 }
2381         }
2382         if (put_user(count, tlv + 1))
2383                 return -EFAULT;
2384         return 0;
2385 }
2386
2387 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2388                               struct snd_ctl_elem_value *ucontrol)
2389 {
2390         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2391         struct hda_codec *codec = info->private_data;
2392         struct hdmi_spec *spec = codec->spec;
2393         int pin_idx = kcontrol->private_value;
2394         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2395         int i;
2396
2397         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2398                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2399         return 0;
2400 }
2401
2402 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2403                               struct snd_ctl_elem_value *ucontrol)
2404 {
2405         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2406         struct hda_codec *codec = info->private_data;
2407         struct hdmi_spec *spec = codec->spec;
2408         int pin_idx = kcontrol->private_value;
2409         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2410         unsigned int ctl_idx;
2411         struct snd_pcm_substream *substream;
2412         unsigned char chmap[8];
2413         int i, err, ca, prepared = 0;
2414
2415         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2416         substream = snd_pcm_chmap_substream(info, ctl_idx);
2417         if (!substream || !substream->runtime)
2418                 return 0; /* just for avoiding error from alsactl restore */
2419         switch (substream->runtime->status->state) {
2420         case SNDRV_PCM_STATE_OPEN:
2421         case SNDRV_PCM_STATE_SETUP:
2422                 break;
2423         case SNDRV_PCM_STATE_PREPARED:
2424                 prepared = 1;
2425                 break;
2426         default:
2427                 return -EBUSY;
2428         }
2429         memset(chmap, 0, sizeof(chmap));
2430         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2431                 chmap[i] = ucontrol->value.integer.value[i];
2432         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2433                 return 0;
2434         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2435         if (ca < 0)
2436                 return -EINVAL;
2437         if (spec->ops.chmap_validate) {
2438                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2439                 if (err)
2440                         return err;
2441         }
2442         mutex_lock(&per_pin->lock);
2443         per_pin->chmap_set = true;
2444         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2445         if (prepared)
2446                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2447         mutex_unlock(&per_pin->lock);
2448
2449         return 0;
2450 }
2451
2452 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2453 {
2454         struct hdmi_spec *spec = codec->spec;
2455         int pin_idx;
2456
2457         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2458                 struct hda_pcm *info;
2459                 struct hda_pcm_stream *pstr;
2460
2461                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2462                 if (!info)
2463                         return -ENOMEM;
2464
2465                 spec->pcm_rec[pin_idx].pcm = info;
2466                 spec->pcm_used++;
2467                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2468                 info->own_chmap = true;
2469
2470                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2471                 pstr->substreams = 1;
2472                 pstr->ops = generic_ops;
2473                 /* other pstr fields are set in open */
2474         }
2475
2476         return 0;
2477 }
2478
2479 static void free_acomp_jack_priv(struct snd_jack *jack)
2480 {
2481         struct hdmi_spec_per_pin *per_pin = jack->private_data;
2482
2483         per_pin->acomp_jack = NULL;
2484 }
2485
2486 static int add_acomp_jack_kctl(struct hda_codec *codec,
2487                                struct hdmi_spec_per_pin *per_pin,
2488                                const char *name)
2489 {
2490         struct snd_jack *jack;
2491         int err;
2492
2493         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2494                            true, false);
2495         if (err < 0)
2496                 return err;
2497         per_pin->acomp_jack = jack;
2498         jack->private_data = per_pin;
2499         jack->private_free = free_acomp_jack_priv;
2500         return 0;
2501 }
2502
2503 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2504 {
2505         char hdmi_str[32] = "HDMI/DP";
2506         struct hdmi_spec *spec = codec->spec;
2507         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2508         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2509         bool phantom_jack;
2510
2511         if (pcmdev > 0)
2512                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2513         if (codec_has_acomp(codec))
2514                 return add_acomp_jack_kctl(codec, per_pin, hdmi_str);
2515         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2516         if (phantom_jack)
2517                 strncat(hdmi_str, " Phantom",
2518                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2519
2520         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2521                                      phantom_jack);
2522 }
2523
2524 static int generic_hdmi_build_controls(struct hda_codec *codec)
2525 {
2526         struct hdmi_spec *spec = codec->spec;
2527         int err;
2528         int pin_idx;
2529
2530         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2531                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2532
2533                 err = generic_hdmi_build_jack(codec, pin_idx);
2534                 if (err < 0)
2535                         return err;
2536
2537                 err = snd_hda_create_dig_out_ctls(codec,
2538                                                   per_pin->pin_nid,
2539                                                   per_pin->mux_nids[0],
2540                                                   HDA_PCM_TYPE_HDMI);
2541                 if (err < 0)
2542                         return err;
2543                 /* pin number is the same with pcm number so far */
2544                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2545
2546                 /* add control for ELD Bytes */
2547                 err = hdmi_create_eld_ctl(codec, pin_idx,
2548                                 get_pcm_rec(spec, pin_idx)->device);
2549
2550                 if (err < 0)
2551                         return err;
2552
2553                 hdmi_present_sense(per_pin, 0);
2554         }
2555
2556         /* add channel maps */
2557         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2558                 struct hda_pcm *pcm;
2559                 struct snd_pcm_chmap *chmap;
2560                 struct snd_kcontrol *kctl;
2561                 int i;
2562
2563                 pcm = get_pcm_rec(spec, pin_idx);
2564                 if (!pcm || !pcm->pcm)
2565                         break;
2566                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2567                                              SNDRV_PCM_STREAM_PLAYBACK,
2568                                              NULL, 0, pin_idx, &chmap);
2569                 if (err < 0)
2570                         return err;
2571                 /* override handlers */
2572                 chmap->private_data = codec;
2573                 kctl = chmap->kctl;
2574                 for (i = 0; i < kctl->count; i++)
2575                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2576                 kctl->info = hdmi_chmap_ctl_info;
2577                 kctl->get = hdmi_chmap_ctl_get;
2578                 kctl->put = hdmi_chmap_ctl_put;
2579                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2580         }
2581
2582         return 0;
2583 }
2584
2585 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2586 {
2587         struct hdmi_spec *spec = codec->spec;
2588         int pin_idx;
2589
2590         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2591                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2592
2593                 per_pin->codec = codec;
2594                 mutex_init(&per_pin->lock);
2595                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2596                 eld_proc_new(per_pin, pin_idx);
2597         }
2598         return 0;
2599 }
2600
2601 static int generic_hdmi_init(struct hda_codec *codec)
2602 {
2603         struct hdmi_spec *spec = codec->spec;
2604         int pin_idx;
2605
2606         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2607                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2608                 hda_nid_t pin_nid = per_pin->pin_nid;
2609
2610                 hdmi_init_pin(codec, pin_nid);
2611                 if (!codec_has_acomp(codec))
2612                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2613                                 codec->jackpoll_interval > 0 ?
2614                                 jack_callback : NULL);
2615         }
2616         return 0;
2617 }
2618
2619 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2620 {
2621         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2622         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2623 }
2624
2625 static void hdmi_array_free(struct hdmi_spec *spec)
2626 {
2627         snd_array_free(&spec->pins);
2628         snd_array_free(&spec->cvts);
2629 }
2630
2631 static void generic_hdmi_free(struct hda_codec *codec)
2632 {
2633         struct hdmi_spec *spec = codec->spec;
2634         int pin_idx;
2635
2636         if (codec_has_acomp(codec))
2637                 snd_hdac_i915_register_notifier(NULL);
2638
2639         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2640                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2641
2642                 cancel_delayed_work_sync(&per_pin->work);
2643                 eld_proc_free(per_pin);
2644                 if (per_pin->acomp_jack)
2645                         snd_device_free(codec->card, per_pin->acomp_jack);
2646         }
2647
2648         if (spec->i915_bound)
2649                 snd_hdac_i915_exit(&codec->bus->core);
2650         hdmi_array_free(spec);
2651         kfree(spec);
2652 }
2653
2654 #ifdef CONFIG_PM
2655 static int generic_hdmi_resume(struct hda_codec *codec)
2656 {
2657         struct hdmi_spec *spec = codec->spec;
2658         int pin_idx;
2659
2660         codec->patch_ops.init(codec);
2661         regcache_sync(codec->core.regmap);
2662
2663         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2664                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2665                 hdmi_present_sense(per_pin, 1);
2666         }
2667         return 0;
2668 }
2669 #endif
2670
2671 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2672         .init                   = generic_hdmi_init,
2673         .free                   = generic_hdmi_free,
2674         .build_pcms             = generic_hdmi_build_pcms,
2675         .build_controls         = generic_hdmi_build_controls,
2676         .unsol_event            = hdmi_unsol_event,
2677 #ifdef CONFIG_PM
2678         .resume                 = generic_hdmi_resume,
2679 #endif
2680 };
2681
2682 static const struct hdmi_ops generic_standard_hdmi_ops = {
2683         .pin_get_eld                            = snd_hdmi_get_eld,
2684         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2685         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2686         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2687         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2688         .setup_stream                           = hdmi_setup_stream,
2689         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2690         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2691 };
2692
2693
2694 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2695                                              hda_nid_t nid)
2696 {
2697         struct hdmi_spec *spec = codec->spec;
2698         hda_nid_t conns[4];
2699         int nconns;
2700
2701         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2702         if (nconns == spec->num_cvts &&
2703             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2704                 return;
2705
2706         /* override pins connection list */
2707         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2708         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2709 }
2710
2711 #define INTEL_VENDOR_NID 0x08
2712 #define INTEL_GET_VENDOR_VERB 0xf81
2713 #define INTEL_SET_VENDOR_VERB 0x781
2714 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2715 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2716
2717 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2718                                           bool update_tree)
2719 {
2720         unsigned int vendor_param;
2721
2722         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2723                                 INTEL_GET_VENDOR_VERB, 0);
2724         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2725                 return;
2726
2727         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2728         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2729                                 INTEL_SET_VENDOR_VERB, vendor_param);
2730         if (vendor_param == -1)
2731                 return;
2732
2733         if (update_tree)
2734                 snd_hda_codec_update_widgets(codec);
2735 }
2736
2737 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2738 {
2739         unsigned int vendor_param;
2740
2741         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2742                                 INTEL_GET_VENDOR_VERB, 0);
2743         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2744                 return;
2745
2746         /* enable DP1.2 mode */
2747         vendor_param |= INTEL_EN_DP12;
2748         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2749         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2750                                 INTEL_SET_VENDOR_VERB, vendor_param);
2751 }
2752
2753 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2754  * Otherwise you may get severe h/w communication errors.
2755  */
2756 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2757                                 unsigned int power_state)
2758 {
2759         if (power_state == AC_PWRST_D0) {
2760                 intel_haswell_enable_all_pins(codec, false);
2761                 intel_haswell_fixup_enable_dp12(codec);
2762         }
2763
2764         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2765         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2766 }
2767
2768 static void intel_pin_eld_notify(void *audio_ptr, int port)
2769 {
2770         struct hda_codec *codec = audio_ptr;
2771         int pin_nid = port + 0x04;
2772
2773         /* skip notification during system suspend (but not in runtime PM);
2774          * the state will be updated at resume
2775          */
2776         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2777                 return;
2778         /* ditto during suspend/resume process itself */
2779         if (atomic_read(&(codec)->core.in_pm))
2780                 return;
2781
2782         check_presence_and_report(codec, pin_nid);
2783 }
2784
2785 static int patch_generic_hdmi(struct hda_codec *codec)
2786 {
2787         struct hdmi_spec *spec;
2788
2789         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2790         if (spec == NULL)
2791                 return -ENOMEM;
2792
2793         spec->ops = generic_standard_hdmi_ops;
2794         mutex_init(&spec->pcm_lock);
2795         codec->spec = spec;
2796         hdmi_array_init(spec, 4);
2797
2798         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2799         if (!codec_has_acomp(codec) &&
2800             (codec->core.vendor_id >> 16) == 0x8086)
2801                 if (!snd_hdac_i915_init(&codec->bus->core))
2802                         spec->i915_bound = true;
2803
2804         if (is_haswell_plus(codec)) {
2805                 intel_haswell_enable_all_pins(codec, true);
2806                 intel_haswell_fixup_enable_dp12(codec);
2807         }
2808
2809         /* For Valleyview/Cherryview, only the display codec is in the display
2810          * power well and can use link_power ops to request/release the power.
2811          * For Haswell/Broadwell, the controller is also in the power well and
2812          * can cover the codec power request, and so need not set this flag.
2813          * For previous platforms, there is no such power well feature.
2814          */
2815         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2816                         is_broxton(codec))
2817                 codec->core.link_power_control = 1;
2818
2819         if (codec_has_acomp(codec)) {
2820                 codec->depop_delay = 0;
2821                 spec->i915_audio_ops.audio_ptr = codec;
2822                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2823                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2824         }
2825
2826         if (hdmi_parse_codec(codec) < 0) {
2827                 if (spec->i915_bound)
2828                         snd_hdac_i915_exit(&codec->bus->core);
2829                 codec->spec = NULL;
2830                 kfree(spec);
2831                 return -EINVAL;
2832         }
2833         codec->patch_ops = generic_hdmi_patch_ops;
2834         if (is_haswell_plus(codec)) {
2835                 codec->patch_ops.set_power_state = haswell_set_power_state;
2836                 codec->dp_mst = true;
2837         }
2838
2839         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2840         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2841                 codec->auto_runtime_pm = 1;
2842
2843         generic_hdmi_init_per_pins(codec);
2844
2845         init_channel_allocations();
2846
2847         return 0;
2848 }
2849
2850 /*
2851  * Shared non-generic implementations
2852  */
2853
2854 static int simple_playback_build_pcms(struct hda_codec *codec)
2855 {
2856         struct hdmi_spec *spec = codec->spec;
2857         struct hda_pcm *info;
2858         unsigned int chans;
2859         struct hda_pcm_stream *pstr;
2860         struct hdmi_spec_per_cvt *per_cvt;
2861
2862         per_cvt = get_cvt(spec, 0);
2863         chans = get_wcaps(codec, per_cvt->cvt_nid);
2864         chans = get_wcaps_channels(chans);
2865
2866         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2867         if (!info)
2868                 return -ENOMEM;
2869         spec->pcm_rec[0].pcm = info;
2870         info->pcm_type = HDA_PCM_TYPE_HDMI;
2871         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2872         *pstr = spec->pcm_playback;
2873         pstr->nid = per_cvt->cvt_nid;
2874         if (pstr->channels_max <= 2 && chans && chans <= 16)
2875                 pstr->channels_max = chans;
2876
2877         return 0;
2878 }
2879
2880 /* unsolicited event for jack sensing */
2881 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2882                                     unsigned int res)
2883 {
2884         snd_hda_jack_set_dirty_all(codec);
2885         snd_hda_jack_report_sync(codec);
2886 }
2887
2888 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2889  * as long as spec->pins[] is set correctly
2890  */
2891 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2892
2893 static int simple_playback_build_controls(struct hda_codec *codec)
2894 {
2895         struct hdmi_spec *spec = codec->spec;
2896         struct hdmi_spec_per_cvt *per_cvt;
2897         int err;
2898
2899         per_cvt = get_cvt(spec, 0);
2900         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2901                                           per_cvt->cvt_nid,
2902                                           HDA_PCM_TYPE_HDMI);
2903         if (err < 0)
2904                 return err;
2905         return simple_hdmi_build_jack(codec, 0);
2906 }
2907
2908 static int simple_playback_init(struct hda_codec *codec)
2909 {
2910         struct hdmi_spec *spec = codec->spec;
2911         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2912         hda_nid_t pin = per_pin->pin_nid;
2913
2914         snd_hda_codec_write(codec, pin, 0,
2915                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2916         /* some codecs require to unmute the pin */
2917         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2918                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2919                                     AMP_OUT_UNMUTE);
2920         snd_hda_jack_detect_enable(codec, pin);
2921         return 0;
2922 }
2923
2924 static void simple_playback_free(struct hda_codec *codec)
2925 {
2926         struct hdmi_spec *spec = codec->spec;
2927
2928         hdmi_array_free(spec);
2929         kfree(spec);
2930 }
2931
2932 /*
2933  * Nvidia specific implementations
2934  */
2935
2936 #define Nv_VERB_SET_Channel_Allocation          0xF79
2937 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2938 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2939 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2940
2941 #define nvhdmi_master_con_nid_7x        0x04
2942 #define nvhdmi_master_pin_nid_7x        0x05
2943
2944 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2945         /*front, rear, clfe, rear_surr */
2946         0x6, 0x8, 0xa, 0xc,
2947 };
2948
2949 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2950         /* set audio protect on */
2951         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2952         /* enable digital output on pin widget */
2953         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2954         {} /* terminator */
2955 };
2956
2957 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2958         /* set audio protect on */
2959         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2960         /* enable digital output on pin widget */
2961         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2962         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2963         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2964         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2965         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2966         {} /* terminator */
2967 };
2968
2969 #ifdef LIMITED_RATE_FMT_SUPPORT
2970 /* support only the safe format and rate */
2971 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2972 #define SUPPORTED_MAXBPS        16
2973 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2974 #else
2975 /* support all rates and formats */
2976 #define SUPPORTED_RATES \
2977         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2978         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2979          SNDRV_PCM_RATE_192000)
2980 #define SUPPORTED_MAXBPS        24
2981 #define SUPPORTED_FORMATS \
2982         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2983 #endif
2984
2985 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2986 {
2987         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2988         return 0;
2989 }
2990
2991 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2992 {
2993         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2994         return 0;
2995 }
2996
2997 static unsigned int channels_2_6_8[] = {
2998         2, 6, 8
2999 };
3000
3001 static unsigned int channels_2_8[] = {
3002         2, 8
3003 };
3004
3005 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3006         .count = ARRAY_SIZE(channels_2_6_8),
3007         .list = channels_2_6_8,
3008         .mask = 0,
3009 };
3010
3011 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3012         .count = ARRAY_SIZE(channels_2_8),
3013         .list = channels_2_8,
3014         .mask = 0,
3015 };
3016
3017 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3018                                     struct hda_codec *codec,
3019                                     struct snd_pcm_substream *substream)
3020 {
3021         struct hdmi_spec *spec = codec->spec;
3022         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3023
3024         switch (codec->preset->vendor_id) {
3025         case 0x10de0002:
3026         case 0x10de0003:
3027         case 0x10de0005:
3028         case 0x10de0006:
3029                 hw_constraints_channels = &hw_constraints_2_8_channels;
3030                 break;
3031         case 0x10de0007:
3032                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3033                 break;
3034         default:
3035                 break;
3036         }
3037
3038         if (hw_constraints_channels != NULL) {
3039                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3040                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3041                                 hw_constraints_channels);
3042         } else {
3043                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3044                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3045         }
3046
3047         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3048 }
3049
3050 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3051                                      struct hda_codec *codec,
3052                                      struct snd_pcm_substream *substream)
3053 {
3054         struct hdmi_spec *spec = codec->spec;
3055         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3056 }
3057
3058 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3059                                        struct hda_codec *codec,
3060                                        unsigned int stream_tag,
3061                                        unsigned int format,
3062                                        struct snd_pcm_substream *substream)
3063 {
3064         struct hdmi_spec *spec = codec->spec;
3065         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3066                                              stream_tag, format, substream);
3067 }
3068
3069 static const struct hda_pcm_stream simple_pcm_playback = {
3070         .substreams = 1,
3071         .channels_min = 2,
3072         .channels_max = 2,
3073         .ops = {
3074                 .open = simple_playback_pcm_open,
3075                 .close = simple_playback_pcm_close,
3076                 .prepare = simple_playback_pcm_prepare
3077         },
3078 };
3079
3080 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3081         .build_controls = simple_playback_build_controls,
3082         .build_pcms = simple_playback_build_pcms,
3083         .init = simple_playback_init,
3084         .free = simple_playback_free,
3085         .unsol_event = simple_hdmi_unsol_event,
3086 };
3087
3088 static int patch_simple_hdmi(struct hda_codec *codec,
3089                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3090 {
3091         struct hdmi_spec *spec;
3092         struct hdmi_spec_per_cvt *per_cvt;
3093         struct hdmi_spec_per_pin *per_pin;
3094
3095         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3096         if (!spec)
3097                 return -ENOMEM;
3098
3099         codec->spec = spec;
3100         hdmi_array_init(spec, 1);
3101
3102         spec->multiout.num_dacs = 0;  /* no analog */
3103         spec->multiout.max_channels = 2;
3104         spec->multiout.dig_out_nid = cvt_nid;
3105         spec->num_cvts = 1;
3106         spec->num_pins = 1;
3107         per_pin = snd_array_new(&spec->pins);
3108         per_cvt = snd_array_new(&spec->cvts);
3109         if (!per_pin || !per_cvt) {
3110                 simple_playback_free(codec);
3111                 return -ENOMEM;
3112         }
3113         per_cvt->cvt_nid = cvt_nid;
3114         per_pin->pin_nid = pin_nid;
3115         spec->pcm_playback = simple_pcm_playback;
3116
3117         codec->patch_ops = simple_hdmi_patch_ops;
3118
3119         return 0;
3120 }
3121
3122 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3123                                                     int channels)
3124 {
3125         unsigned int chanmask;
3126         int chan = channels ? (channels - 1) : 1;
3127
3128         switch (channels) {
3129         default:
3130         case 0:
3131         case 2:
3132                 chanmask = 0x00;
3133                 break;
3134         case 4:
3135                 chanmask = 0x08;
3136                 break;
3137         case 6:
3138                 chanmask = 0x0b;
3139                 break;
3140         case 8:
3141                 chanmask = 0x13;
3142                 break;
3143         }
3144
3145         /* Set the audio infoframe channel allocation and checksum fields.  The
3146          * channel count is computed implicitly by the hardware. */
3147         snd_hda_codec_write(codec, 0x1, 0,
3148                         Nv_VERB_SET_Channel_Allocation, chanmask);
3149
3150         snd_hda_codec_write(codec, 0x1, 0,
3151                         Nv_VERB_SET_Info_Frame_Checksum,
3152                         (0x71 - chan - chanmask));
3153 }
3154
3155 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3156                                    struct hda_codec *codec,
3157                                    struct snd_pcm_substream *substream)
3158 {
3159         struct hdmi_spec *spec = codec->spec;
3160         int i;
3161
3162         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3163                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3164         for (i = 0; i < 4; i++) {
3165                 /* set the stream id */
3166                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3167                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3168                 /* set the stream format */
3169                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3170                                 AC_VERB_SET_STREAM_FORMAT, 0);
3171         }
3172
3173         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3174          * streams are disabled. */
3175         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3176
3177         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3178 }
3179
3180 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3181                                      struct hda_codec *codec,
3182                                      unsigned int stream_tag,
3183                                      unsigned int format,
3184                                      struct snd_pcm_substream *substream)
3185 {
3186         int chs;
3187         unsigned int dataDCC2, channel_id;
3188         int i;
3189         struct hdmi_spec *spec = codec->spec;
3190         struct hda_spdif_out *spdif;
3191         struct hdmi_spec_per_cvt *per_cvt;
3192
3193         mutex_lock(&codec->spdif_mutex);
3194         per_cvt = get_cvt(spec, 0);
3195         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3196
3197         chs = substream->runtime->channels;
3198
3199         dataDCC2 = 0x2;
3200
3201         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3202         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3203                 snd_hda_codec_write(codec,
3204                                 nvhdmi_master_con_nid_7x,
3205                                 0,
3206                                 AC_VERB_SET_DIGI_CONVERT_1,
3207                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3208
3209         /* set the stream id */
3210         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3211                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3212
3213         /* set the stream format */
3214         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3215                         AC_VERB_SET_STREAM_FORMAT, format);
3216
3217         /* turn on again (if needed) */
3218         /* enable and set the channel status audio/data flag */
3219         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3220                 snd_hda_codec_write(codec,
3221                                 nvhdmi_master_con_nid_7x,
3222                                 0,
3223                                 AC_VERB_SET_DIGI_CONVERT_1,
3224                                 spdif->ctls & 0xff);
3225                 snd_hda_codec_write(codec,
3226                                 nvhdmi_master_con_nid_7x,
3227                                 0,
3228                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3229         }
3230
3231         for (i = 0; i < 4; i++) {
3232                 if (chs == 2)
3233                         channel_id = 0;
3234                 else
3235                         channel_id = i * 2;
3236
3237                 /* turn off SPDIF once;
3238                  *otherwise the IEC958 bits won't be updated
3239                  */
3240                 if (codec->spdif_status_reset &&
3241                 (spdif->ctls & AC_DIG1_ENABLE))
3242                         snd_hda_codec_write(codec,
3243                                 nvhdmi_con_nids_7x[i],
3244                                 0,
3245                                 AC_VERB_SET_DIGI_CONVERT_1,
3246                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3247                 /* set the stream id */
3248                 snd_hda_codec_write(codec,
3249                                 nvhdmi_con_nids_7x[i],
3250                                 0,
3251                                 AC_VERB_SET_CHANNEL_STREAMID,
3252                                 (stream_tag << 4) | channel_id);
3253                 /* set the stream format */
3254                 snd_hda_codec_write(codec,
3255                                 nvhdmi_con_nids_7x[i],
3256                                 0,
3257                                 AC_VERB_SET_STREAM_FORMAT,
3258                                 format);
3259                 /* turn on again (if needed) */
3260                 /* enable and set the channel status audio/data flag */
3261                 if (codec->spdif_status_reset &&
3262                 (spdif->ctls & AC_DIG1_ENABLE)) {
3263                         snd_hda_codec_write(codec,
3264                                         nvhdmi_con_nids_7x[i],
3265                                         0,
3266                                         AC_VERB_SET_DIGI_CONVERT_1,
3267                                         spdif->ctls & 0xff);
3268                         snd_hda_codec_write(codec,
3269                                         nvhdmi_con_nids_7x[i],
3270                                         0,
3271                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3272                 }
3273         }
3274
3275         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3276
3277         mutex_unlock(&codec->spdif_mutex);
3278         return 0;
3279 }
3280
3281 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3282         .substreams = 1,
3283         .channels_min = 2,
3284         .channels_max = 8,
3285         .nid = nvhdmi_master_con_nid_7x,
3286         .rates = SUPPORTED_RATES,
3287         .maxbps = SUPPORTED_MAXBPS,
3288         .formats = SUPPORTED_FORMATS,
3289         .ops = {
3290                 .open = simple_playback_pcm_open,
3291                 .close = nvhdmi_8ch_7x_pcm_close,
3292                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3293         },
3294 };
3295
3296 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3297 {
3298         struct hdmi_spec *spec;
3299         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3300                                     nvhdmi_master_pin_nid_7x);
3301         if (err < 0)
3302                 return err;
3303
3304         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3305         /* override the PCM rates, etc, as the codec doesn't give full list */
3306         spec = codec->spec;
3307         spec->pcm_playback.rates = SUPPORTED_RATES;
3308         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3309         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3310         return 0;
3311 }
3312
3313 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3314 {
3315         struct hdmi_spec *spec = codec->spec;
3316         int err = simple_playback_build_pcms(codec);
3317         if (!err) {
3318                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3319                 info->own_chmap = true;
3320         }
3321         return err;
3322 }
3323
3324 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3325 {
3326         struct hdmi_spec *spec = codec->spec;
3327         struct hda_pcm *info;
3328         struct snd_pcm_chmap *chmap;
3329         int err;
3330
3331         err = simple_playback_build_controls(codec);
3332         if (err < 0)
3333                 return err;
3334
3335         /* add channel maps */
3336         info = get_pcm_rec(spec, 0);
3337         err = snd_pcm_add_chmap_ctls(info->pcm,
3338                                      SNDRV_PCM_STREAM_PLAYBACK,
3339                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3340         if (err < 0)
3341                 return err;
3342         switch (codec->preset->vendor_id) {
3343         case 0x10de0002:
3344         case 0x10de0003:
3345         case 0x10de0005:
3346         case 0x10de0006:
3347                 chmap->channel_mask = (1U << 2) | (1U << 8);
3348                 break;
3349         case 0x10de0007:
3350                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3351         }
3352         return 0;
3353 }
3354
3355 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3356 {
3357         struct hdmi_spec *spec;
3358         int err = patch_nvhdmi_2ch(codec);
3359         if (err < 0)
3360                 return err;
3361         spec = codec->spec;
3362         spec->multiout.max_channels = 8;
3363         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3364         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3365         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3366         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3367
3368         /* Initialize the audio infoframe channel mask and checksum to something
3369          * valid */
3370         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3371
3372         return 0;
3373 }
3374
3375 /*
3376  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3377  * - 0x10de0015
3378  * - 0x10de0040
3379  */
3380 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3381                                                     int channels)
3382 {
3383         if (cap->ca_index == 0x00 && channels == 2)
3384                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3385
3386         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3387 }
3388
3389 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3390 {
3391         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3392                 return -EINVAL;
3393
3394         return 0;
3395 }
3396
3397 static int patch_nvhdmi(struct hda_codec *codec)
3398 {
3399         struct hdmi_spec *spec;
3400         int err;
3401
3402         err = patch_generic_hdmi(codec);
3403         if (err)
3404                 return err;
3405
3406         spec = codec->spec;
3407         spec->dyn_pin_out = true;
3408
3409         spec->ops.chmap_cea_alloc_validate_get_type =
3410                 nvhdmi_chmap_cea_alloc_validate_get_type;
3411         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3412
3413         return 0;
3414 }
3415
3416 /*
3417  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3418  * accessed using vendor-defined verbs. These registers can be used for
3419  * interoperability between the HDA and HDMI drivers.
3420  */
3421
3422 /* Audio Function Group node */
3423 #define NVIDIA_AFG_NID 0x01
3424
3425 /*
3426  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3427  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3428  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3429  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3430  * additional bit (at position 30) to signal the validity of the format.
3431  *
3432  * | 31      | 30    | 29  16 | 15   0 |
3433  * +---------+-------+--------+--------+
3434  * | TRIGGER | VALID | UNUSED | FORMAT |
3435  * +-----------------------------------|
3436  *
3437  * Note that for the trigger bit to take effect it needs to change value
3438  * (i.e. it needs to be toggled).
3439  */
3440 #define NVIDIA_GET_SCRATCH0             0xfa6
3441 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3442 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3443 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3444 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3445 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3446 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3447
3448 #define NVIDIA_GET_SCRATCH1             0xfab
3449 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3450 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3451 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3452 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3453
3454 /*
3455  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3456  * the format is invalidated so that the HDMI codec can be disabled.
3457  */
3458 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3459 {
3460         unsigned int value;
3461
3462         /* bits [31:30] contain the trigger and valid bits */
3463         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3464                                    NVIDIA_GET_SCRATCH0, 0);
3465         value = (value >> 24) & 0xff;
3466
3467         /* bits [15:0] are used to store the HDA format */
3468         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3469                             NVIDIA_SET_SCRATCH0_BYTE0,
3470                             (format >> 0) & 0xff);
3471         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3472                             NVIDIA_SET_SCRATCH0_BYTE1,
3473                             (format >> 8) & 0xff);
3474
3475         /* bits [16:24] are unused */
3476         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3477                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3478
3479         /*
3480          * Bit 30 signals that the data is valid and hence that HDMI audio can
3481          * be enabled.
3482          */
3483         if (format == 0)
3484                 value &= ~NVIDIA_SCRATCH_VALID;
3485         else
3486                 value |= NVIDIA_SCRATCH_VALID;
3487
3488         /*
3489          * Whenever the trigger bit is toggled, an interrupt is raised in the
3490          * HDMI codec. The HDMI driver will use that as trigger to update its
3491          * configuration.
3492          */
3493         value ^= NVIDIA_SCRATCH_TRIGGER;
3494
3495         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3496                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3497 }
3498
3499 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3500                                   struct hda_codec *codec,
3501                                   unsigned int stream_tag,
3502                                   unsigned int format,
3503                                   struct snd_pcm_substream *substream)
3504 {
3505         int err;
3506
3507         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3508                                                 format, substream);
3509         if (err < 0)
3510                 return err;
3511
3512         /* notify the HDMI codec of the format change */
3513         tegra_hdmi_set_format(codec, format);
3514
3515         return 0;
3516 }
3517
3518 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3519                                   struct hda_codec *codec,
3520                                   struct snd_pcm_substream *substream)
3521 {
3522         /* invalidate the format in the HDMI codec */
3523         tegra_hdmi_set_format(codec, 0);
3524
3525         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3526 }
3527
3528 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3529 {
3530         struct hdmi_spec *spec = codec->spec;
3531         unsigned int i;
3532
3533         for (i = 0; i < spec->num_pins; i++) {
3534                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3535
3536                 if (pcm->pcm_type == type)
3537                         return pcm;
3538         }
3539
3540         return NULL;
3541 }
3542
3543 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3544 {
3545         struct hda_pcm_stream *stream;
3546         struct hda_pcm *pcm;
3547         int err;
3548
3549         err = generic_hdmi_build_pcms(codec);
3550         if (err < 0)
3551                 return err;
3552
3553         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3554         if (!pcm)
3555                 return -ENODEV;
3556
3557         /*
3558          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3559          * codec about format changes.
3560          */
3561         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3562         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3563         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3564
3565         return 0;
3566 }
3567
3568 static int patch_tegra_hdmi(struct hda_codec *codec)
3569 {
3570         int err;
3571
3572         err = patch_generic_hdmi(codec);
3573         if (err)
3574                 return err;
3575
3576         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3577
3578         return 0;
3579 }
3580
3581 /*
3582  * ATI/AMD-specific implementations
3583  */
3584
3585 #define is_amdhdmi_rev3_or_later(codec) \
3586         ((codec)->core.vendor_id == 0x1002aa01 && \
3587          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3588 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3589
3590 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3591 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3592 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3593 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3594 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3595 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3596 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3597 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3598 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3599 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3600 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3601 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3602 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3603 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3604 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3605 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3606 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3607 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3608 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3609 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3610 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3611 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3612 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3613 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3614 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3615
3616 /* AMD specific HDA cvt verbs */
3617 #define ATI_VERB_SET_RAMP_RATE          0x770
3618 #define ATI_VERB_GET_RAMP_RATE          0xf70
3619
3620 #define ATI_OUT_ENABLE 0x1
3621
3622 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3623 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3624
3625 #define ATI_HBR_CAPABLE 0x01
3626 #define ATI_HBR_ENABLE 0x10
3627
3628 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3629                            unsigned char *buf, int *eld_size)
3630 {
3631         /* call hda_eld.c ATI/AMD-specific function */
3632         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3633                                     is_amdhdmi_rev3_or_later(codec));
3634 }
3635
3636 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3637                                         int active_channels, int conn_type)
3638 {
3639         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3640 }
3641
3642 static int atihdmi_paired_swap_fc_lfe(int pos)
3643 {
3644         /*
3645          * ATI/AMD have automatic FC/LFE swap built-in
3646          * when in pairwise mapping mode.
3647          */
3648
3649         switch (pos) {
3650                 /* see channel_allocations[].speakers[] */
3651                 case 2: return 3;
3652                 case 3: return 2;
3653                 default: break;
3654         }
3655
3656         return pos;
3657 }
3658
3659 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3660 {
3661         struct cea_channel_speaker_allocation *cap;
3662         int i, j;
3663
3664         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3665
3666         cap = &channel_allocations[get_channel_allocation_order(ca)];
3667         for (i = 0; i < chs; ++i) {
3668                 int mask = to_spk_mask(map[i]);
3669                 bool ok = false;
3670                 bool companion_ok = false;
3671
3672                 if (!mask)
3673                         continue;
3674
3675                 for (j = 0 + i % 2; j < 8; j += 2) {
3676                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3677                         if (cap->speakers[chan_idx] == mask) {
3678                                 /* channel is in a supported position */
3679                                 ok = true;
3680
3681                                 if (i % 2 == 0 && i + 1 < chs) {
3682                                         /* even channel, check the odd companion */
3683                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3684                                         int comp_mask_req = to_spk_mask(map[i+1]);
3685                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3686
3687                                         if (comp_mask_req == comp_mask_act)
3688                                                 companion_ok = true;
3689                                         else
3690                                                 return -EINVAL;
3691                                 }
3692                                 break;
3693                         }
3694                 }
3695
3696                 if (!ok)
3697                         return -EINVAL;
3698
3699                 if (companion_ok)
3700                         i++; /* companion channel already checked */
3701         }
3702
3703         return 0;
3704 }
3705
3706 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3707                                         int hdmi_slot, int stream_channel)
3708 {
3709         int verb;
3710         int ati_channel_setup = 0;
3711
3712         if (hdmi_slot > 7)
3713                 return -EINVAL;
3714
3715         if (!has_amd_full_remap_support(codec)) {
3716                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3717
3718                 /* In case this is an odd slot but without stream channel, do not
3719                  * disable the slot since the corresponding even slot could have a
3720                  * channel. In case neither have a channel, the slot pair will be
3721                  * disabled when this function is called for the even slot. */
3722                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3723                         return 0;
3724
3725                 hdmi_slot -= hdmi_slot % 2;
3726
3727                 if (stream_channel != 0xf)
3728                         stream_channel -= stream_channel % 2;
3729         }
3730
3731         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3732
3733         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3734
3735         if (stream_channel != 0xf)
3736                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3737
3738         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3739 }
3740
3741 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3742                                         int asp_slot)
3743 {
3744         bool was_odd = false;
3745         int ati_asp_slot = asp_slot;
3746         int verb;
3747         int ati_channel_setup;
3748
3749         if (asp_slot > 7)
3750                 return -EINVAL;
3751
3752         if (!has_amd_full_remap_support(codec)) {
3753                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3754                 if (ati_asp_slot % 2 != 0) {
3755                         ati_asp_slot -= 1;
3756                         was_odd = true;
3757                 }
3758         }
3759
3760         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3761
3762         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3763
3764         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3765                 return 0xf;
3766
3767         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3768 }
3769
3770 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3771                                                             int channels)
3772 {
3773         int c;
3774
3775         /*
3776          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3777          * we need to take that into account (a single channel may take 2
3778          * channel slots if we need to carry a silent channel next to it).
3779          * On Rev3+ AMD codecs this function is not used.
3780          */
3781         int chanpairs = 0;
3782
3783         /* We only produce even-numbered channel count TLVs */
3784         if ((channels % 2) != 0)
3785                 return -1;
3786
3787         for (c = 0; c < 7; c += 2) {
3788                 if (cap->speakers[c] || cap->speakers[c+1])
3789                         chanpairs++;
3790         }
3791
3792         if (chanpairs * 2 != channels)
3793                 return -1;
3794
3795         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3796 }
3797
3798 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3799                                                   unsigned int *chmap, int channels)
3800 {
3801         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3802         int count = 0;
3803         int c;
3804
3805         for (c = 7; c >= 0; c--) {
3806                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3807                 int spk = cap->speakers[chan];
3808                 if (!spk) {
3809                         /* add N/A channel if the companion channel is occupied */
3810                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3811                                 chmap[count++] = SNDRV_CHMAP_NA;
3812
3813                         continue;
3814                 }
3815
3816                 chmap[count++] = spk_to_chmap(spk);
3817         }
3818
3819         WARN_ON(count != channels);
3820 }
3821
3822 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3823                                  bool hbr)
3824 {
3825         int hbr_ctl, hbr_ctl_new;
3826
3827         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3828         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3829                 if (hbr)
3830                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3831                 else
3832                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3833
3834                 codec_dbg(codec,
3835                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3836                                 pin_nid,
3837                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3838                                 hbr_ctl_new);
3839
3840                 if (hbr_ctl != hbr_ctl_new)
3841                         snd_hda_codec_write(codec, pin_nid, 0,
3842                                                 ATI_VERB_SET_HBR_CONTROL,
3843                                                 hbr_ctl_new);
3844
3845         } else if (hbr)
3846                 return -EINVAL;
3847
3848         return 0;
3849 }
3850
3851 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3852                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3853 {
3854
3855         if (is_amdhdmi_rev3_or_later(codec)) {
3856                 int ramp_rate = 180; /* default as per AMD spec */
3857                 /* disable ramp-up/down for non-pcm as per AMD spec */
3858                 if (format & AC_FMT_TYPE_NON_PCM)
3859                         ramp_rate = 0;
3860
3861                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3862         }
3863
3864         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3865 }
3866
3867
3868 static int atihdmi_init(struct hda_codec *codec)
3869 {
3870         struct hdmi_spec *spec = codec->spec;
3871         int pin_idx, err;
3872
3873         err = generic_hdmi_init(codec);
3874
3875         if (err)
3876                 return err;
3877
3878         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3879                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3880
3881                 /* make sure downmix information in infoframe is zero */
3882                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3883
3884                 /* enable channel-wise remap mode if supported */
3885                 if (has_amd_full_remap_support(codec))
3886                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3887                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3888                                             ATI_MULTICHANNEL_MODE_SINGLE);
3889         }
3890
3891         return 0;
3892 }
3893
3894 static int patch_atihdmi(struct hda_codec *codec)
3895 {
3896         struct hdmi_spec *spec;
3897         struct hdmi_spec_per_cvt *per_cvt;
3898         int err, cvt_idx;
3899
3900         err = patch_generic_hdmi(codec);
3901
3902         if (err)
3903                 return err;
3904
3905         codec->patch_ops.init = atihdmi_init;
3906
3907         spec = codec->spec;
3908
3909         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3910         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3911         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3912         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3913         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3914         spec->ops.setup_stream = atihdmi_setup_stream;
3915
3916         if (!has_amd_full_remap_support(codec)) {
3917                 /* override to ATI/AMD-specific versions with pairwise mapping */
3918                 spec->ops.chmap_cea_alloc_validate_get_type =
3919                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3920                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3921                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3922         }
3923
3924         /* ATI/AMD converters do not advertise all of their capabilities */
3925         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3926                 per_cvt = get_cvt(spec, cvt_idx);
3927                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3928                 per_cvt->rates |= SUPPORTED_RATES;
3929                 per_cvt->formats |= SUPPORTED_FORMATS;
3930                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3931         }
3932
3933         spec->channels_max = max(spec->channels_max, 8u);
3934
3935         return 0;
3936 }
3937
3938 /* VIA HDMI Implementation */
3939 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3940 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3941
3942 static int patch_via_hdmi(struct hda_codec *codec)
3943 {
3944         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3945 }
3946
3947 /*
3948  * patch entries
3949  */
3950 static const struct hda_device_id snd_hda_id_hdmi[] = {
3951 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3952 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3953 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3954 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3955 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3956 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3957 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3958 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3959 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3960 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3961 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3962 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3963 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3964 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3965 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3966 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3967 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3968 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3969 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3970 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3971 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3972 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3973 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3974 /* 17 is known to be absent */
3975 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3976 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3977 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3978 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3979 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3980 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3981 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3982 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3983 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3984 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3985 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3986 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3987 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3988 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3989 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3990 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3991 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3992 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3993 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3994 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3995 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3996 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3997 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3998 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3999 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4000 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4001 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
4002 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4003 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4004 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4005 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
4006 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
4007 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
4008 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
4009 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
4010 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
4011 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
4012 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
4013 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4014 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
4015 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
4016 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4017 /* special ID for generic HDMI */
4018 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4019 {} /* terminator */
4020 };
4021 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4022
4023 MODULE_LICENSE("GPL");
4024 MODULE_DESCRIPTION("HDMI HD-audio codec");
4025 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4026 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4027 MODULE_ALIAS("snd-hda-codec-atihdmi");
4028
4029 static struct hda_codec_driver hdmi_driver = {
4030         .id = snd_hda_id_hdmi,
4031 };
4032
4033 module_hda_codec_driver(hdmi_driver);