sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         /* pin idx, different device entries on the same pin use the same idx */
  79         int pin_nid_idx;
  80         int num_mux_nids;
  81         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  82         int mux_idx;
  83         hda_nid_t cvt_nid;
  84
  85         struct hda_codec *codec;
  86         struct hdmi_eld sink_eld;
  87         struct mutex lock;
  88         struct delayed_work work;
  89         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  90         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  91         int repoll_count;
  92         bool setup; /* the stream has been set up by prepare callback */
  93         int channels; /* current number of channels */
  94         bool non_pcm;
  95         bool chmap_set;         /* channel-map override by ALSA API? */
  96         unsigned char chmap[8]; /* ALSA API channel-map */
  97 #ifdef CONFIG_SND_PROC_FS
  98         struct snd_info_entry *proc_entry;
  99 #endif
 100 };
 101
 102 struct cea_channel_speaker_allocation;
 103
 104 /* operations used by generic code that can be overridden by patches */
 105 struct hdmi_ops {
 106         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 107                            unsigned char *buf, int *eld_size);
 108
 109         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 110         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 111                                     int asp_slot);
 112         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 113                                     int asp_slot, int channel);
 114
 115         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 116                                     int ca, int active_channels, int conn_type);
 117
 118         /* enable/disable HBR (HD passthrough) */
 119         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 120
 121         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 122                             hda_nid_t pin_nid, u32 stream_tag, int format);
 123
 124         /* Helpers for producing the channel map TLVs. These can be overridden
 125          * for devices that have non-standard mapping requirements. */
 126         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 127                                                  int channels);
 128         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 129                                        unsigned int *chmap, int channels);
 130
 131         /* check that the user-given chmap is supported */
 132         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 133 };
 134
 135 struct hdmi_pcm {
 136         struct hda_pcm *pcm;
 137         struct snd_jack *jack;
 138         struct snd_kcontrol *eld_ctl;
 139 };
 140
 141 struct hdmi_spec {
 142         int num_cvts;
 143         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 144         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 145
 146         int num_pins;
 147         struct snd_array pins; /* struct hdmi_spec_per_pin */
 148         struct hdmi_pcm pcm_rec[16];
 149         struct mutex pcm_lock;
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158         unsigned int channels_max; /* max over all cvts */
 159
 160         struct hdmi_eld temp_eld;
 161         struct hdmi_ops ops;
 162
 163         bool dyn_pin_out;
 164         bool dyn_pcm_assign;
 165         /*
 166          * Non-generic VIA/NVIDIA specific
 167          */
 168         struct hda_multi_out multiout;
 169         struct hda_pcm_stream pcm_playback;
 170
 171         /* i915/powerwell (Haswell+/Valleyview+) specific */
 172         struct i915_audio_component_audio_ops i915_audio_ops;
 173         bool i915_bound; /* was i915 bound in this driver? */
 174 };
 175
 176 #ifdef CONFIG_SND_HDA_I915
 177 #define codec_has_acomp(codec) \
 178         ((codec)->bus->core.audio_component != NULL)
 179 #else
 180 #define codec_has_acomp(codec)  false
 181 #endif
 182
 183 struct hdmi_audio_infoframe {
 184         u8 type; /* 0x84 */
 185         u8 ver;  /* 0x01 */
 186         u8 len;  /* 0x0a */
 187
 188         u8 checksum;
 189
 190         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 191         u8 SS01_SF24;
 192         u8 CXT04;
 193         u8 CA;
 194         u8 LFEPBL01_LSV36_DM_INH7;
 195 };
 196
 197 struct dp_audio_infoframe {
 198         u8 type; /* 0x84 */
 199         u8 len;  /* 0x1b */
 200         u8 ver;  /* 0x11 << 2 */
 201
 202         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 203         u8 SS01_SF24;
 204         u8 CXT04;
 205         u8 CA;
 206         u8 LFEPBL01_LSV36_DM_INH7;
 207 };
 208
 209 union audio_infoframe {
 210         struct hdmi_audio_infoframe hdmi;
 211         struct dp_audio_infoframe dp;
 212         u8 bytes[0];
 213 };
 214
 215 /*
 216  * CEA speaker placement:
 217  *
 218  *        FLH       FCH        FRH
 219  *  FLW    FL  FLC   FC   FRC   FR   FRW
 220  *
 221  *                                  LFE
 222  *                     TC
 223  *
 224  *          RL  RLC   RC   RRC   RR
 225  *
 226  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 227  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 228  */
 229 enum cea_speaker_placement {
 230         FL  = (1 <<  0),        /* Front Left           */
 231         FC  = (1 <<  1),        /* Front Center         */
 232         FR  = (1 <<  2),        /* Front Right          */
 233         FLC = (1 <<  3),        /* Front Left Center    */
 234         FRC = (1 <<  4),        /* Front Right Center   */
 235         RL  = (1 <<  5),        /* Rear Left            */
 236         RC  = (1 <<  6),        /* Rear Center          */
 237         RR  = (1 <<  7),        /* Rear Right           */
 238         RLC = (1 <<  8),        /* Rear Left Center     */
 239         RRC = (1 <<  9),        /* Rear Right Center    */
 240         LFE = (1 << 10),        /* Low Frequency Effect */
 241         FLW = (1 << 11),        /* Front Left Wide      */
 242         FRW = (1 << 12),        /* Front Right Wide     */
 243         FLH = (1 << 13),        /* Front Left High      */
 244         FCH = (1 << 14),        /* Front Center High    */
 245         FRH = (1 << 15),        /* Front Right High     */
 246         TC  = (1 << 16),        /* Top Center           */
 247 };
 248
 249 /*
 250  * ELD SA bits in the CEA Speaker Allocation data block
 251  */
 252 static int eld_speaker_allocation_bits[] = {
 253         [0] = FL | FR,
 254         [1] = LFE,
 255         [2] = FC,
 256         [3] = RL | RR,
 257         [4] = RC,
 258         [5] = FLC | FRC,
 259         [6] = RLC | RRC,
 260         /* the following are not defined in ELD yet */
 261         [7] = FLW | FRW,
 262         [8] = FLH | FRH,
 263         [9] = TC,
 264         [10] = FCH,
 265 };
 266
 267 struct cea_channel_speaker_allocation {
 268         int ca_index;
 269         int speakers[8];
 270
 271         /* derived values, just for convenience */
 272         int channels;
 273         int spk_mask;
 274 };
 275
 276 /*
 277  * ALSA sequence is:
 278  *
 279  *       surround40   surround41   surround50   surround51   surround71
 280  * ch0   front left   =            =            =            =
 281  * ch1   front right  =            =            =            =
 282  * ch2   rear left    =            =            =            =
 283  * ch3   rear right   =            =            =            =
 284  * ch4                LFE          center       center       center
 285  * ch5                                          LFE          LFE
 286  * ch6                                                       side left
 287  * ch7                                                       side right
 288  *
 289  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 290  */
 291 static int hdmi_channel_mapping[0x32][8] = {
 292         /* stereo */
 293         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 294         /* 2.1 */
 295         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 296         /* Dolby Surround */
 297         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 298         /* surround40 */
 299         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 300         /* 4ch */
 301         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 302         /* surround41 */
 303         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 304         /* surround50 */
 305         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 306         /* surround51 */
 307         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 308         /* 7.1 */
 309         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 310 };
 311
 312 /*
 313  * This is an ordered list!
 314  *
 315  * The preceding ones have better chances to be selected by
 316  * hdmi_channel_allocation().
 317  */
 318 static struct cea_channel_speaker_allocation channel_allocations[] = {
 319 /*                        channel:   7     6    5    4    3     2    1    0  */
 320 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 321                                  /* 2.1 */
 322 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 323                                  /* Dolby Surround */
 324 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 325                                  /* surround40 */
 326 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 327                                  /* surround41 */
 328 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 329                                  /* surround50 */
 330 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 331                                  /* surround51 */
 332 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 333                                  /* 6.1 */
 334 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335                                  /* surround71 */
 336 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337
 338 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 340 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 341 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 343 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 344 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 345 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 346 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 347 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 348 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 349 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 350 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 351 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 352 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 353 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 354 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 355 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 356 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 357 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 358 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 359 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 360 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 361 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 362 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 363 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 364 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 365 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 366 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 367 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 368 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 369 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 370 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 371 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 372 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 373 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 374 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 375 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 376 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 377 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 378 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 379 };
 380
 381
 382 /*
 383  * HDMI routines
 384  */
 385
 386 #define get_pin(spec, idx) \
 387         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 388 #define get_cvt(spec, idx) \
 389         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 390 /* obtain hdmi_pcm object assigned to idx */
 391 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 392 /* obtain hda_pcm object assigned to idx */
 393 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 394
 395 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 396 {
 397         struct hdmi_spec *spec = codec->spec;
 398         int pin_idx;
 399
 400         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 401                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 402                         return pin_idx;
 403
 404         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 405         return -EINVAL;
 406 }
 407
 408 static int hinfo_to_pcm_index(struct hda_codec *codec,
 409                         struct hda_pcm_stream *hinfo)
 410 {
 411         struct hdmi_spec *spec = codec->spec;
 412         int pcm_idx;
 413
 414         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 415                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 416                         return pcm_idx;
 417
 418         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 419         return -EINVAL;
 420 }
 421
 422 static int hinfo_to_pin_index(struct hda_codec *codec,
 423                               struct hda_pcm_stream *hinfo)
 424 {
 425         struct hdmi_spec *spec = codec->spec;
 426         struct hdmi_spec_per_pin *per_pin;
 427         int pin_idx;
 428
 429         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 430                 per_pin = get_pin(spec, pin_idx);
 431                 if (per_pin->pcm &&
 432                         per_pin->pcm->pcm->stream == hinfo)
 433                         return pin_idx;
 434         }
 435
 436         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 437         return -EINVAL;
 438 }
 439
 440 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 441                                                 int pcm_idx)
 442 {
 443         int i;
 444         struct hdmi_spec_per_pin *per_pin;
 445
 446         for (i = 0; i < spec->num_pins; i++) {
 447                 per_pin = get_pin(spec, i);
 448                 if (per_pin->pcm_idx == pcm_idx)
 449                         return per_pin;
 450         }
 451         return NULL;
 452 }
 453
 454 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 455 {
 456         struct hdmi_spec *spec = codec->spec;
 457         int cvt_idx;
 458
 459         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 460                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 461                         return cvt_idx;
 462
 463         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 464         return -EINVAL;
 465 }
 466
 467 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 468                         struct snd_ctl_elem_info *uinfo)
 469 {
 470         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 471         struct hdmi_spec *spec = codec->spec;
 472         struct hdmi_spec_per_pin *per_pin;
 473         struct hdmi_eld *eld;
 474         int pcm_idx;
 475
 476         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 477
 478         pcm_idx = kcontrol->private_value;
 479         mutex_lock(&spec->pcm_lock);
 480         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 481         if (!per_pin) {
 482                 /* no pin is bound to the pcm */
 483                 uinfo->count = 0;
 484                 mutex_unlock(&spec->pcm_lock);
 485                 return 0;
 486         }
 487         eld = &per_pin->sink_eld;
 488         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 489         mutex_unlock(&spec->pcm_lock);
 490
 491         return 0;
 492 }
 493
 494 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 495                         struct snd_ctl_elem_value *ucontrol)
 496 {
 497         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 498         struct hdmi_spec *spec = codec->spec;
 499         struct hdmi_spec_per_pin *per_pin;
 500         struct hdmi_eld *eld;
 501         int pcm_idx;
 502
 503         pcm_idx = kcontrol->private_value;
 504         mutex_lock(&spec->pcm_lock);
 505         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 506         if (!per_pin) {
 507                 /* no pin is bound to the pcm */
 508                 memset(ucontrol->value.bytes.data, 0,
 509                        ARRAY_SIZE(ucontrol->value.bytes.data));
 510                 mutex_unlock(&spec->pcm_lock);
 511                 return 0;
 512         }
 513         eld = &per_pin->sink_eld;
 514
 515         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 516             eld->eld_size > ELD_MAX_SIZE) {
 517                 mutex_unlock(&spec->pcm_lock);
 518                 snd_BUG();
 519                 return -EINVAL;
 520         }
 521
 522         memset(ucontrol->value.bytes.data, 0,
 523                ARRAY_SIZE(ucontrol->value.bytes.data));
 524         if (eld->eld_valid)
 525                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 526                        eld->eld_size);
 527         mutex_unlock(&spec->pcm_lock);
 528
 529         return 0;
 530 }
 531
 532 static struct snd_kcontrol_new eld_bytes_ctl = {
 533         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 534         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 535         .name = "ELD",
 536         .info = hdmi_eld_ctl_info,
 537         .get = hdmi_eld_ctl_get,
 538 };
 539
 540 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 541                         int device)
 542 {
 543         struct snd_kcontrol *kctl;
 544         struct hdmi_spec *spec = codec->spec;
 545         int err;
 546
 547         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 548         if (!kctl)
 549                 return -ENOMEM;
 550         kctl->private_value = pcm_idx;
 551         kctl->id.device = device;
 552
 553         /* no pin nid is associated with the kctl now
 554          * tbd: associate pin nid to eld ctl later
 555          */
 556         err = snd_hda_ctl_add(codec, 0, kctl);
 557         if (err < 0)
 558                 return err;
 559
 560         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 561         return 0;
 562 }
 563
 564 #ifdef BE_PARANOID
 565 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 566                                 int *packet_index, int *byte_index)
 567 {
 568         int val;
 569
 570         val = snd_hda_codec_read(codec, pin_nid, 0,
 571                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 572
 573         *packet_index = val >> 5;
 574         *byte_index = val & 0x1f;
 575 }
 576 #endif
 577
 578 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 579                                 int packet_index, int byte_index)
 580 {
 581         int val;
 582
 583         val = (packet_index << 5) | (byte_index & 0x1f);
 584
 585         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 586 }
 587
 588 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 589                                 unsigned char val)
 590 {
 591         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 592 }
 593
 594 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 595 {
 596         struct hdmi_spec *spec = codec->spec;
 597         int pin_out;
 598
 599         /* Unmute */
 600         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 601                 snd_hda_codec_write(codec, pin_nid, 0,
 602                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 603
 604         if (spec->dyn_pin_out)
 605                 /* Disable pin out until stream is active */
 606                 pin_out = 0;
 607         else
 608                 /* Enable pin out: some machines with GM965 gets broken output
 609                  * when the pin is disabled or changed while using with HDMI
 610                  */
 611                 pin_out = PIN_OUT;
 612
 613         snd_hda_codec_write(codec, pin_nid, 0,
 614                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 615 }
 616
 617 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 618 {
 619         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 620                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 621 }
 622
 623 static void hdmi_set_channel_count(struct hda_codec *codec,
 624                                    hda_nid_t cvt_nid, int chs)
 625 {
 626         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 627                 snd_hda_codec_write(codec, cvt_nid, 0,
 628                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 629 }
 630
 631 /*
 632  * ELD proc files
 633  */
 634
 635 #ifdef CONFIG_SND_PROC_FS
 636 static void print_eld_info(struct snd_info_entry *entry,
 637                            struct snd_info_buffer *buffer)
 638 {
 639         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 640
 641         mutex_lock(&per_pin->lock);
 642         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 643         mutex_unlock(&per_pin->lock);
 644 }
 645
 646 static void write_eld_info(struct snd_info_entry *entry,
 647                            struct snd_info_buffer *buffer)
 648 {
 649         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 650
 651         mutex_lock(&per_pin->lock);
 652         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 653         mutex_unlock(&per_pin->lock);
 654 }
 655
 656 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 657 {
 658         char name[32];
 659         struct hda_codec *codec = per_pin->codec;
 660         struct snd_info_entry *entry;
 661         int err;
 662
 663         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 664         err = snd_card_proc_new(codec->card, name, &entry);
 665         if (err < 0)
 666                 return err;
 667
 668         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 669         entry->c.text.write = write_eld_info;
 670         entry->mode |= S_IWUSR;
 671         per_pin->proc_entry = entry;
 672
 673         return 0;
 674 }
 675
 676 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 677 {
 678         if (!per_pin->codec->bus->shutdown) {
 679                 snd_info_free_entry(per_pin->proc_entry);
 680                 per_pin->proc_entry = NULL;
 681         }
 682 }
 683 #else
 684 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 685                                int index)
 686 {
 687         return 0;
 688 }
 689 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 690 {
 691 }
 692 #endif
 693
 694 /*
 695  * Channel mapping routines
 696  */
 697
 698 /*
 699  * Compute derived values in channel_allocations[].
 700  */
 701 static void init_channel_allocations(void)
 702 {
 703         int i, j;
 704         struct cea_channel_speaker_allocation *p;
 705
 706         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 707                 p = channel_allocations + i;
 708                 p->channels = 0;
 709                 p->spk_mask = 0;
 710                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 711                         if (p->speakers[j]) {
 712                                 p->channels++;
 713                                 p->spk_mask |= p->speakers[j];
 714                         }
 715         }
 716 }
 717
 718 static int get_channel_allocation_order(int ca)
 719 {
 720         int i;
 721
 722         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 723                 if (channel_allocations[i].ca_index == ca)
 724                         break;
 725         }
 726         return i;
 727 }
 728
 729 /*
 730  * The transformation takes two steps:
 731  *
 732  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 733  *            spk_mask => (channel_allocations[])         => ai->CA
 734  *
 735  * TODO: it could select the wrong CA from multiple candidates.
 736 */
 737 static int hdmi_channel_allocation(struct hda_codec *codec,
 738                                    struct hdmi_eld *eld, int channels)
 739 {
 740         int i;
 741         int ca = 0;
 742         int spk_mask = 0;
 743         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 744
 745         /*
 746          * CA defaults to 0 for basic stereo audio
 747          */
 748         if (channels <= 2)
 749                 return 0;
 750
 751         /*
 752          * expand ELD's speaker allocation mask
 753          *
 754          * ELD tells the speaker mask in a compact(paired) form,
 755          * expand ELD's notions to match the ones used by Audio InfoFrame.
 756          */
 757         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 758                 if (eld->info.spk_alloc & (1 << i))
 759                         spk_mask |= eld_speaker_allocation_bits[i];
 760         }
 761
 762         /* search for the first working match in the CA table */
 763         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 764                 if (channels == channel_allocations[i].channels &&
 765                     (spk_mask & channel_allocations[i].spk_mask) ==
 766                                 channel_allocations[i].spk_mask) {
 767                         ca = channel_allocations[i].ca_index;
 768                         break;
 769                 }
 770         }
 771
 772         if (!ca) {
 773                 /* if there was no match, select the regular ALSA channel
 774                  * allocation with the matching number of channels */
 775                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 776                         if (channels == channel_allocations[i].channels) {
 777                                 ca = channel_allocations[i].ca_index;
 778                                 break;
 779                         }
 780                 }
 781         }
 782
 783         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 784         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 785                     ca, channels, buf);
 786
 787         return ca;
 788 }
 789
 790 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 791                                        hda_nid_t pin_nid)
 792 {
 793 #ifdef CONFIG_SND_DEBUG_VERBOSE
 794         struct hdmi_spec *spec = codec->spec;
 795         int i;
 796         int channel;
 797
 798         for (i = 0; i < 8; i++) {
 799                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 800                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 801                                                 channel, i);
 802         }
 803 #endif
 804 }
 805
 806 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 807                                        hda_nid_t pin_nid,
 808                                        bool non_pcm,
 809                                        int ca)
 810 {
 811         struct hdmi_spec *spec = codec->spec;
 812         struct cea_channel_speaker_allocation *ch_alloc;
 813         int i;
 814         int err;
 815         int order;
 816         int non_pcm_mapping[8];
 817
 818         order = get_channel_allocation_order(ca);
 819         ch_alloc = &channel_allocations[order];
 820
 821         if (hdmi_channel_mapping[ca][1] == 0) {
 822                 int hdmi_slot = 0;
 823                 /* fill actual channel mappings in ALSA channel (i) order */
 824                 for (i = 0; i < ch_alloc->channels; i++) {
 825                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 826                                 hdmi_slot++; /* skip zero slots */
 827
 828                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 829                 }
 830                 /* fill the rest of the slots with ALSA channel 0xf */
 831                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 832                         if (!ch_alloc->speakers[7 - hdmi_slot])
 833                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 834         }
 835
 836         if (non_pcm) {
 837                 for (i = 0; i < ch_alloc->channels; i++)
 838                         non_pcm_mapping[i] = (i << 4) | i;
 839                 for (; i < 8; i++)
 840                         non_pcm_mapping[i] = (0xf << 4) | i;
 841         }
 842
 843         for (i = 0; i < 8; i++) {
 844                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 845                 int hdmi_slot = slotsetup & 0x0f;
 846                 int channel = (slotsetup & 0xf0) >> 4;
 847                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 848                 if (err) {
 849                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 850                         break;
 851                 }
 852         }
 853 }
 854
 855 struct channel_map_table {
 856         unsigned char map;              /* ALSA API channel map position */
 857         int spk_mask;                   /* speaker position bit mask */
 858 };
 859
 860 static struct channel_map_table map_tables[] = {
 861         { SNDRV_CHMAP_FL,       FL },
 862         { SNDRV_CHMAP_FR,       FR },
 863         { SNDRV_CHMAP_RL,       RL },
 864         { SNDRV_CHMAP_RR,       RR },
 865         { SNDRV_CHMAP_LFE,      LFE },
 866         { SNDRV_CHMAP_FC,       FC },
 867         { SNDRV_CHMAP_RLC,      RLC },
 868         { SNDRV_CHMAP_RRC,      RRC },
 869         { SNDRV_CHMAP_RC,       RC },
 870         { SNDRV_CHMAP_FLC,      FLC },
 871         { SNDRV_CHMAP_FRC,      FRC },
 872         { SNDRV_CHMAP_TFL,      FLH },
 873         { SNDRV_CHMAP_TFR,      FRH },
 874         { SNDRV_CHMAP_FLW,      FLW },
 875         { SNDRV_CHMAP_FRW,      FRW },
 876         { SNDRV_CHMAP_TC,       TC },
 877         { SNDRV_CHMAP_TFC,      FCH },
 878         {} /* terminator */
 879 };
 880
 881 /* from ALSA API channel position to speaker bit mask */
 882 static int to_spk_mask(unsigned char c)
 883 {
 884         struct channel_map_table *t = map_tables;
 885         for (; t->map; t++) {
 886                 if (t->map == c)
 887                         return t->spk_mask;
 888         }
 889         return 0;
 890 }
 891
 892 /* from ALSA API channel position to CEA slot */
 893 static int to_cea_slot(int ordered_ca, unsigned char pos)
 894 {
 895         int mask = to_spk_mask(pos);
 896         int i;
 897
 898         if (mask) {
 899                 for (i = 0; i < 8; i++) {
 900                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 901                                 return i;
 902                 }
 903         }
 904
 905         return -1;
 906 }
 907
 908 /* from speaker bit mask to ALSA API channel position */
 909 static int spk_to_chmap(int spk)
 910 {
 911         struct channel_map_table *t = map_tables;
 912         for (; t->map; t++) {
 913                 if (t->spk_mask == spk)
 914                         return t->map;
 915         }
 916         return 0;
 917 }
 918
 919 /* from CEA slot to ALSA API channel position */
 920 static int from_cea_slot(int ordered_ca, unsigned char slot)
 921 {
 922         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 923
 924         return spk_to_chmap(mask);
 925 }
 926
 927 /* get the CA index corresponding to the given ALSA API channel map */
 928 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 929 {
 930         int i, spks = 0, spk_mask = 0;
 931
 932         for (i = 0; i < chs; i++) {
 933                 int mask = to_spk_mask(map[i]);
 934                 if (mask) {
 935                         spk_mask |= mask;
 936                         spks++;
 937                 }
 938         }
 939
 940         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 941                 if ((chs == channel_allocations[i].channels ||
 942                      spks == channel_allocations[i].channels) &&
 943                     (spk_mask & channel_allocations[i].spk_mask) ==
 944                                 channel_allocations[i].spk_mask)
 945                         return channel_allocations[i].ca_index;
 946         }
 947         return -1;
 948 }
 949
 950 /* set up the channel slots for the given ALSA API channel map */
 951 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 952                                              hda_nid_t pin_nid,
 953                                              int chs, unsigned char *map,
 954                                              int ca)
 955 {
 956         struct hdmi_spec *spec = codec->spec;
 957         int ordered_ca = get_channel_allocation_order(ca);
 958         int alsa_pos, hdmi_slot;
 959         int assignments[8] = {[0 ... 7] = 0xf};
 960
 961         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 962
 963                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 964
 965                 if (hdmi_slot < 0)
 966                         continue; /* unassigned channel */
 967
 968                 assignments[hdmi_slot] = alsa_pos;
 969         }
 970
 971         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 972                 int err;
 973
 974                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 975                                                      assignments[hdmi_slot]);
 976                 if (err)
 977                         return -EINVAL;
 978         }
 979         return 0;
 980 }
 981
 982 /* store ALSA API channel map from the current default map */
 983 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 984 {
 985         int i;
 986         int ordered_ca = get_channel_allocation_order(ca);
 987         for (i = 0; i < 8; i++) {
 988                 if (i < channel_allocations[ordered_ca].channels)
 989                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 990                 else
 991                         map[i] = 0;
 992         }
 993 }
 994
 995 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 996                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 997                                        int channels, unsigned char *map,
 998                                        bool chmap_set)
 999 {
1000         if (!non_pcm && chmap_set) {
1001                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
1002                                                   channels, map, ca);
1003         } else {
1004                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
1005                 hdmi_setup_fake_chmap(map, ca);
1006         }
1007
1008         hdmi_debug_channel_mapping(codec, pin_nid);
1009 }
1010
1011 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
1012                                      int asp_slot, int channel)
1013 {
1014         return snd_hda_codec_write(codec, pin_nid, 0,
1015                                    AC_VERB_SET_HDMI_CHAN_SLOT,
1016                                    (channel << 4) | asp_slot);
1017 }
1018
1019 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
1020                                      int asp_slot)
1021 {
1022         return (snd_hda_codec_read(codec, pin_nid, 0,
1023                                    AC_VERB_GET_HDMI_CHAN_SLOT,
1024                                    asp_slot) & 0xf0) >> 4;
1025 }
1026
1027 /*
1028  * Audio InfoFrame routines
1029  */
1030
1031 /*
1032  * Enable Audio InfoFrame Transmission
1033  */
1034 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
1035                                        hda_nid_t pin_nid)
1036 {
1037         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1038         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1039                                                 AC_DIPXMIT_BEST);
1040 }
1041
1042 /*
1043  * Disable Audio InfoFrame Transmission
1044  */
1045 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
1046                                       hda_nid_t pin_nid)
1047 {
1048         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1049         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1050                                                 AC_DIPXMIT_DISABLE);
1051 }
1052
1053 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
1054 {
1055 #ifdef CONFIG_SND_DEBUG_VERBOSE
1056         int i;
1057         int size;
1058
1059         size = snd_hdmi_get_eld_size(codec, pin_nid);
1060         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
1061
1062         for (i = 0; i < 8; i++) {
1063                 size = snd_hda_codec_read(codec, pin_nid, 0,
1064                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1065                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1066         }
1067 #endif
1068 }
1069
1070 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1071 {
1072 #ifdef BE_PARANOID
1073         int i, j;
1074         int size;
1075         int pi, bi;
1076         for (i = 0; i < 8; i++) {
1077                 size = snd_hda_codec_read(codec, pin_nid, 0,
1078                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1079                 if (size == 0)
1080                         continue;
1081
1082                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1083                 for (j = 1; j < 1000; j++) {
1084                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1085                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1086                         if (pi != i)
1087                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1088                                                 bi, pi, i);
1089                         if (bi == 0) /* byte index wrapped around */
1090                                 break;
1091                 }
1092                 codec_dbg(codec,
1093                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1094                         i, size, j);
1095         }
1096 #endif
1097 }
1098
1099 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1100 {
1101         u8 *bytes = (u8 *)hdmi_ai;
1102         u8 sum = 0;
1103         int i;
1104
1105         hdmi_ai->checksum = 0;
1106
1107         for (i = 0; i < sizeof(*hdmi_ai); i++)
1108                 sum += bytes[i];
1109
1110         hdmi_ai->checksum = -sum;
1111 }
1112
1113 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1114                                       hda_nid_t pin_nid,
1115                                       u8 *dip, int size)
1116 {
1117         int i;
1118
1119         hdmi_debug_dip_size(codec, pin_nid);
1120         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1121
1122         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1123         for (i = 0; i < size; i++)
1124                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1125 }
1126
1127 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1128                                     u8 *dip, int size)
1129 {
1130         u8 val;
1131         int i;
1132
1133         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1134                                                             != AC_DIPXMIT_BEST)
1135                 return false;
1136
1137         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1138         for (i = 0; i < size; i++) {
1139                 val = snd_hda_codec_read(codec, pin_nid, 0,
1140                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1141                 if (val != dip[i])
1142                         return false;
1143         }
1144
1145         return true;
1146 }
1147
1148 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1149                                      hda_nid_t pin_nid,
1150                                      int ca, int active_channels,
1151                                      int conn_type)
1152 {
1153         union audio_infoframe ai;
1154
1155         memset(&ai, 0, sizeof(ai));
1156         if (conn_type == 0) { /* HDMI */
1157                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1158
1159                 hdmi_ai->type           = 0x84;
1160                 hdmi_ai->ver            = 0x01;
1161                 hdmi_ai->len            = 0x0a;
1162                 hdmi_ai->CC02_CT47      = active_channels - 1;
1163                 hdmi_ai->CA             = ca;
1164                 hdmi_checksum_audio_infoframe(hdmi_ai);
1165         } else if (conn_type == 1) { /* DisplayPort */
1166                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1167
1168                 dp_ai->type             = 0x84;
1169                 dp_ai->len              = 0x1b;
1170                 dp_ai->ver              = 0x11 << 2;
1171                 dp_ai->CC02_CT47        = active_channels - 1;
1172                 dp_ai->CA               = ca;
1173         } else {
1174                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1175                             pin_nid);
1176                 return;
1177         }
1178
1179         /*
1180          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1181          * sizeof(*dp_ai) to avoid partial match/update problems when
1182          * the user switches between HDMI/DP monitors.
1183          */
1184         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1185                                         sizeof(ai))) {
1186                 codec_dbg(codec,
1187                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1188                             pin_nid,
1189                             active_channels, ca);
1190                 hdmi_stop_infoframe_trans(codec, pin_nid);
1191                 hdmi_fill_audio_infoframe(codec, pin_nid,
1192                                             ai.bytes, sizeof(ai));
1193                 hdmi_start_infoframe_trans(codec, pin_nid);
1194         }
1195 }
1196
1197 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1198                                        struct hdmi_spec_per_pin *per_pin,
1199                                        bool non_pcm)
1200 {
1201         struct hdmi_spec *spec = codec->spec;
1202         hda_nid_t pin_nid = per_pin->pin_nid;
1203         int channels = per_pin->channels;
1204         int active_channels;
1205         struct hdmi_eld *eld;
1206         int ca, ordered_ca;
1207
1208         if (!channels)
1209                 return;
1210
1211         if (is_haswell_plus(codec))
1212                 snd_hda_codec_write(codec, pin_nid, 0,
1213                                             AC_VERB_SET_AMP_GAIN_MUTE,
1214                                             AMP_OUT_UNMUTE);
1215
1216         eld = &per_pin->sink_eld;
1217
1218         if (!non_pcm && per_pin->chmap_set)
1219                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1220         else
1221                 ca = hdmi_channel_allocation(codec, eld, channels);
1222         if (ca < 0)
1223                 ca = 0;
1224
1225         ordered_ca = get_channel_allocation_order(ca);
1226         active_channels = channel_allocations[ordered_ca].channels;
1227
1228         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1229
1230         /*
1231          * always configure channel mapping, it may have been changed by the
1232          * user in the meantime
1233          */
1234         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1235                                    channels, per_pin->chmap,
1236                                    per_pin->chmap_set);
1237
1238         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1239                                       eld->info.conn_type);
1240
1241         per_pin->non_pcm = non_pcm;
1242 }
1243
1244 /*
1245  * Unsolicited events
1246  */
1247
1248 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1249
1250 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1251 {
1252         struct hdmi_spec *spec = codec->spec;
1253         int pin_idx = pin_nid_to_pin_index(codec, nid);
1254
1255         if (pin_idx < 0)
1256                 return;
1257         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1258                 snd_hda_jack_report_sync(codec);
1259 }
1260
1261 static void jack_callback(struct hda_codec *codec,
1262                           struct hda_jack_callback *jack)
1263 {
1264         check_presence_and_report(codec, jack->nid);
1265 }
1266
1267 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1268 {
1269         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1270         struct hda_jack_tbl *jack;
1271         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1272
1273         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1274         if (!jack)
1275                 return;
1276         jack->jack_dirty = 1;
1277
1278         codec_dbg(codec,
1279                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1280                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1281                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1282
1283         check_presence_and_report(codec, jack->nid);
1284 }
1285
1286 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1287 {
1288         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1289         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1290         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1291         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1292
1293         codec_info(codec,
1294                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1295                 codec->addr,
1296                 tag,
1297                 subtag,
1298                 cp_state,
1299                 cp_ready);
1300
1301         /* TODO */
1302         if (cp_state)
1303                 ;
1304         if (cp_ready)
1305                 ;
1306 }
1307
1308
1309 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1310 {
1311         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1312         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1313
1314         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1315                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1316                 return;
1317         }
1318
1319         if (subtag == 0)
1320                 hdmi_intrinsic_event(codec, res);
1321         else
1322                 hdmi_non_intrinsic_event(codec, res);
1323 }
1324
1325 static void haswell_verify_D0(struct hda_codec *codec,
1326                 hda_nid_t cvt_nid, hda_nid_t nid)
1327 {
1328         int pwr;
1329
1330         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1331          * thus pins could only choose converter 0 for use. Make sure the
1332          * converters are in correct power state */
1333         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1334                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1335
1336         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1337                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1338                                     AC_PWRST_D0);
1339                 msleep(40);
1340                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1341                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1342                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1343         }
1344 }
1345
1346 /*
1347  * Callbacks
1348  */
1349
1350 /* HBR should be Non-PCM, 8 channels */
1351 #define is_hbr_format(format) \
1352         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1353
1354 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1355                               bool hbr)
1356 {
1357         int pinctl, new_pinctl;
1358
1359         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1360                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1361                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1362
1363                 if (pinctl < 0)
1364                         return hbr ? -EINVAL : 0;
1365
1366                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1367                 if (hbr)
1368                         new_pinctl |= AC_PINCTL_EPT_HBR;
1369                 else
1370                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1371
1372                 codec_dbg(codec,
1373                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1374                             pin_nid,
1375                             pinctl == new_pinctl ? "" : "new-",
1376                             new_pinctl);
1377
1378                 if (pinctl != new_pinctl)
1379                         snd_hda_codec_write(codec, pin_nid, 0,
1380                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1381                                             new_pinctl);
1382         } else if (hbr)
1383                 return -EINVAL;
1384
1385         return 0;
1386 }
1387
1388 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1389                               hda_nid_t pin_nid, u32 stream_tag, int format)
1390 {
1391         struct hdmi_spec *spec = codec->spec;
1392         int err;
1393
1394         if (is_haswell_plus(codec))
1395                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1396
1397         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1398
1399         if (err) {
1400                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1401                 return err;
1402         }
1403
1404         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1405         return 0;
1406 }
1407
1408 /* Try to find an available converter
1409  * If pin_idx is less then zero, just try to find an available converter.
1410  * Otherwise, try to find an available converter and get the cvt mux index
1411  * of the pin.
1412  */
1413 static int hdmi_choose_cvt(struct hda_codec *codec,
1414                         int pin_idx, int *cvt_id, int *mux_id)
1415 {
1416         struct hdmi_spec *spec = codec->spec;
1417         struct hdmi_spec_per_pin *per_pin;
1418         struct hdmi_spec_per_cvt *per_cvt = NULL;
1419         int cvt_idx, mux_idx = 0;
1420
1421         /* pin_idx < 0 means no pin will be bound to the converter */
1422         if (pin_idx < 0)
1423                 per_pin = NULL;
1424         else
1425                 per_pin = get_pin(spec, pin_idx);
1426
1427         /* Dynamically assign converter to stream */
1428         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1429                 per_cvt = get_cvt(spec, cvt_idx);
1430
1431                 /* Must not already be assigned */
1432                 if (per_cvt->assigned)
1433                         continue;
1434                 if (per_pin == NULL)
1435                         break;
1436                 /* Must be in pin's mux's list of converters */
1437                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1438                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1439                                 break;
1440                 /* Not in mux list */
1441                 if (mux_idx == per_pin->num_mux_nids)
1442                         continue;
1443                 break;
1444         }
1445
1446         /* No free converters */
1447         if (cvt_idx == spec->num_cvts)
1448                 return -EBUSY;
1449
1450         if (per_pin != NULL)
1451                 per_pin->mux_idx = mux_idx;
1452
1453         if (cvt_id)
1454                 *cvt_id = cvt_idx;
1455         if (mux_id)
1456                 *mux_id = mux_idx;
1457
1458         return 0;
1459 }
1460
1461 /* Assure the pin select the right convetor */
1462 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1463                         struct hdmi_spec_per_pin *per_pin)
1464 {
1465         hda_nid_t pin_nid = per_pin->pin_nid;
1466         int mux_idx, curr;
1467
1468         mux_idx = per_pin->mux_idx;
1469         curr = snd_hda_codec_read(codec, pin_nid, 0,
1470                                           AC_VERB_GET_CONNECT_SEL, 0);
1471         if (curr != mux_idx)
1472                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1473                                             AC_VERB_SET_CONNECT_SEL,
1474                                             mux_idx);
1475 }
1476
1477 /* get the mux index for the converter of the pins
1478  * converter's mux index is the same for all pins on Intel platform
1479  */
1480 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1481                         hda_nid_t cvt_nid)
1482 {
1483         int i;
1484
1485         for (i = 0; i < spec->num_cvts; i++)
1486                 if (spec->cvt_nids[i] == cvt_nid)
1487                         return i;
1488         return -EINVAL;
1489 }
1490
1491 /* Intel HDMI workaround to fix audio routing issue:
1492  * For some Intel display codecs, pins share the same connection list.
1493  * So a conveter can be selected by multiple pins and playback on any of these
1494  * pins will generate sound on the external display, because audio flows from
1495  * the same converter to the display pipeline. Also muting one pin may make
1496  * other pins have no sound output.
1497  * So this function assures that an assigned converter for a pin is not selected
1498  * by any other pins.
1499  */
1500 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1501                         hda_nid_t pin_nid, int mux_idx)
1502 {
1503         struct hdmi_spec *spec = codec->spec;
1504         hda_nid_t nid;
1505         int cvt_idx, curr;
1506         struct hdmi_spec_per_cvt *per_cvt;
1507
1508         /* configure all pins, including "no physical connection" ones */
1509         for_each_hda_codec_node(nid, codec) {
1510                 unsigned int wid_caps = get_wcaps(codec, nid);
1511                 unsigned int wid_type = get_wcaps_type(wid_caps);
1512
1513                 if (wid_type != AC_WID_PIN)
1514                         continue;
1515
1516                 if (nid == pin_nid)
1517                         continue;
1518
1519                 curr = snd_hda_codec_read(codec, nid, 0,
1520                                           AC_VERB_GET_CONNECT_SEL, 0);
1521                 if (curr != mux_idx)
1522                         continue;
1523
1524                 /* choose an unassigned converter. The conveters in the
1525                  * connection list are in the same order as in the codec.
1526                  */
1527                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1528                         per_cvt = get_cvt(spec, cvt_idx);
1529                         if (!per_cvt->assigned) {
1530                                 codec_dbg(codec,
1531                                           "choose cvt %d for pin nid %d\n",
1532                                         cvt_idx, nid);
1533                                 snd_hda_codec_write_cache(codec, nid, 0,
1534                                             AC_VERB_SET_CONNECT_SEL,
1535                                             cvt_idx);
1536                                 break;
1537                         }
1538                 }
1539         }
1540 }
1541
1542 /* A wrapper of intel_not_share_asigned_cvt() */
1543 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1544                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1545 {
1546         int mux_idx;
1547         struct hdmi_spec *spec = codec->spec;
1548
1549         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1550                 return;
1551
1552         /* On Intel platform, the mapping of converter nid to
1553          * mux index of the pins are always the same.
1554          * The pin nid may be 0, this means all pins will not
1555          * share the converter.
1556          */
1557         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1558         if (mux_idx >= 0)
1559                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1560 }
1561
1562 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1563  * in dyn_pcm_assign mode.
1564  */
1565 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1566                          struct hda_codec *codec,
1567                          struct snd_pcm_substream *substream)
1568 {
1569         struct hdmi_spec *spec = codec->spec;
1570         struct snd_pcm_runtime *runtime = substream->runtime;
1571         int cvt_idx, pcm_idx;
1572         struct hdmi_spec_per_cvt *per_cvt = NULL;
1573         int err;
1574
1575         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1576         if (pcm_idx < 0)
1577                 return -EINVAL;
1578
1579         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1580         if (err)
1581                 return err;
1582
1583         per_cvt = get_cvt(spec, cvt_idx);
1584         per_cvt->assigned = 1;
1585         hinfo->nid = per_cvt->cvt_nid;
1586
1587         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1588
1589         set_bit(pcm_idx, &spec->pcm_in_use);
1590         /* todo: setup spdif ctls assign */
1591
1592         /* Initially set the converter's capabilities */
1593         hinfo->channels_min = per_cvt->channels_min;
1594         hinfo->channels_max = per_cvt->channels_max;
1595         hinfo->rates = per_cvt->rates;
1596         hinfo->formats = per_cvt->formats;
1597         hinfo->maxbps = per_cvt->maxbps;
1598
1599         /* Store the updated parameters */
1600         runtime->hw.channels_min = hinfo->channels_min;
1601         runtime->hw.channels_max = hinfo->channels_max;
1602         runtime->hw.formats = hinfo->formats;
1603         runtime->hw.rates = hinfo->rates;
1604
1605         snd_pcm_hw_constraint_step(substream->runtime, 0,
1606                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1607         return 0;
1608 }
1609
1610 /*
1611  * HDA PCM callbacks
1612  */
1613 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1614                          struct hda_codec *codec,
1615                          struct snd_pcm_substream *substream)
1616 {
1617         struct hdmi_spec *spec = codec->spec;
1618         struct snd_pcm_runtime *runtime = substream->runtime;
1619         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1620         struct hdmi_spec_per_pin *per_pin;
1621         struct hdmi_eld *eld;
1622         struct hdmi_spec_per_cvt *per_cvt = NULL;
1623         int err;
1624
1625         /* Validate hinfo */
1626         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1627         if (pcm_idx < 0)
1628                 return -EINVAL;
1629
1630         mutex_lock(&spec->pcm_lock);
1631         pin_idx = hinfo_to_pin_index(codec, hinfo);
1632         if (!spec->dyn_pcm_assign) {
1633                 if (snd_BUG_ON(pin_idx < 0)) {
1634                         mutex_unlock(&spec->pcm_lock);
1635                         return -EINVAL;
1636                 }
1637         } else {
1638                 /* no pin is assigned to the PCM
1639                  * PA need pcm open successfully when probe
1640                  */
1641                 if (pin_idx < 0) {
1642                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1643                         mutex_unlock(&spec->pcm_lock);
1644                         return err;
1645                 }
1646         }
1647
1648         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1649         if (err < 0) {
1650                 mutex_unlock(&spec->pcm_lock);
1651                 return err;
1652         }
1653
1654         per_cvt = get_cvt(spec, cvt_idx);
1655         /* Claim converter */
1656         per_cvt->assigned = 1;
1657
1658         set_bit(pcm_idx, &spec->pcm_in_use);
1659         per_pin = get_pin(spec, pin_idx);
1660         per_pin->cvt_nid = per_cvt->cvt_nid;
1661         hinfo->nid = per_cvt->cvt_nid;
1662
1663         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1664                             AC_VERB_SET_CONNECT_SEL,
1665                             mux_idx);
1666
1667         /* configure unused pins to choose other converters */
1668         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1669                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1670
1671         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1672
1673         /* Initially set the converter's capabilities */
1674         hinfo->channels_min = per_cvt->channels_min;
1675         hinfo->channels_max = per_cvt->channels_max;
1676         hinfo->rates = per_cvt->rates;
1677         hinfo->formats = per_cvt->formats;
1678         hinfo->maxbps = per_cvt->maxbps;
1679
1680         eld = &per_pin->sink_eld;
1681         /* Restrict capabilities by ELD if this isn't disabled */
1682         if (!static_hdmi_pcm && eld->eld_valid) {
1683                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1684                 if (hinfo->channels_min > hinfo->channels_max ||
1685                     !hinfo->rates || !hinfo->formats) {
1686                         per_cvt->assigned = 0;
1687                         hinfo->nid = 0;
1688                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1689                         mutex_unlock(&spec->pcm_lock);
1690                         return -ENODEV;
1691                 }
1692         }
1693
1694         mutex_unlock(&spec->pcm_lock);
1695         /* Store the updated parameters */
1696         runtime->hw.channels_min = hinfo->channels_min;
1697         runtime->hw.channels_max = hinfo->channels_max;
1698         runtime->hw.formats = hinfo->formats;
1699         runtime->hw.rates = hinfo->rates;
1700
1701         snd_pcm_hw_constraint_step(substream->runtime, 0,
1702                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1703         return 0;
1704 }
1705
1706 /*
1707  * HDA/HDMI auto parsing
1708  */
1709 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1710 {
1711         struct hdmi_spec *spec = codec->spec;
1712         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1713         hda_nid_t pin_nid = per_pin->pin_nid;
1714
1715         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1716                 codec_warn(codec,
1717                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1718                            pin_nid, get_wcaps(codec, pin_nid));
1719                 return -EINVAL;
1720         }
1721
1722         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1723                                                         per_pin->mux_nids,
1724                                                         HDA_MAX_CONNECTIONS);
1725
1726         return 0;
1727 }
1728
1729 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1730                                 struct hdmi_spec_per_pin *per_pin)
1731 {
1732         int i;
1733
1734         /* try the prefer PCM */
1735         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1736                 return per_pin->pin_nid_idx;
1737
1738         /* have a second try; check the "reserved area" over num_pins */
1739         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1740                 if (!test_bit(i, &spec->pcm_bitmap))
1741                         return i;
1742         }
1743
1744         /* the last try; check the empty slots in pins */
1745         for (i = 0; i < spec->num_pins; i++) {
1746                 if (!test_bit(i, &spec->pcm_bitmap))
1747                         return i;
1748         }
1749         return -EBUSY;
1750 }
1751
1752 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1753                                 struct hdmi_spec_per_pin *per_pin)
1754 {
1755         int idx;
1756
1757         /* pcm already be attached to the pin */
1758         if (per_pin->pcm)
1759                 return;
1760         idx = hdmi_find_pcm_slot(spec, per_pin);
1761         if (idx == -EBUSY)
1762                 return;
1763         per_pin->pcm_idx = idx;
1764         per_pin->pcm = get_hdmi_pcm(spec, idx);
1765         set_bit(idx, &spec->pcm_bitmap);
1766 }
1767
1768 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1769                                 struct hdmi_spec_per_pin *per_pin)
1770 {
1771         int idx;
1772
1773         /* pcm already be detached from the pin */
1774         if (!per_pin->pcm)
1775                 return;
1776         idx = per_pin->pcm_idx;
1777         per_pin->pcm_idx = -1;
1778         per_pin->pcm = NULL;
1779         if (idx >= 0 && idx < spec->pcm_used)
1780                 clear_bit(idx, &spec->pcm_bitmap);
1781 }
1782
1783 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1784                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1785 {
1786         int mux_idx;
1787
1788         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1789                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1790                         break;
1791         return mux_idx;
1792 }
1793
1794 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1795
1796 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1797                            struct hdmi_spec_per_pin *per_pin)
1798 {
1799         struct hda_codec *codec = per_pin->codec;
1800         struct hda_pcm *pcm;
1801         struct hda_pcm_stream *hinfo;
1802         struct snd_pcm_substream *substream;
1803         int mux_idx;
1804         bool non_pcm;
1805
1806         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1807                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1808         else
1809                 return;
1810         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1811                 return;
1812
1813         /* hdmi audio only uses playback and one substream */
1814         hinfo = pcm->stream;
1815         substream = pcm->pcm->streams[0].substream;
1816
1817         per_pin->cvt_nid = hinfo->nid;
1818
1819         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1820         if (mux_idx < per_pin->num_mux_nids)
1821                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1822                                 AC_VERB_SET_CONNECT_SEL,
1823                                 mux_idx);
1824         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1825
1826         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1827         if (substream->runtime)
1828                 per_pin->channels = substream->runtime->channels;
1829         per_pin->setup = true;
1830         per_pin->mux_idx = mux_idx;
1831
1832         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1833 }
1834
1835 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1836                            struct hdmi_spec_per_pin *per_pin)
1837 {
1838         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1839                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1840
1841         per_pin->chmap_set = false;
1842         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1843
1844         per_pin->setup = false;
1845         per_pin->channels = 0;
1846 }
1847
1848 /* update per_pin ELD from the given new ELD;
1849  * setup info frame and notification accordingly
1850  */
1851 static void update_eld(struct hda_codec *codec,
1852                        struct hdmi_spec_per_pin *per_pin,
1853                        struct hdmi_eld *eld)
1854 {
1855         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1856         struct hdmi_spec *spec = codec->spec;
1857         bool old_eld_valid = pin_eld->eld_valid;
1858         bool eld_changed;
1859         int pcm_idx = -1;
1860
1861         /* for monitor disconnection, save pcm_idx firstly */
1862         pcm_idx = per_pin->pcm_idx;
1863         if (spec->dyn_pcm_assign) {
1864                 if (eld->eld_valid) {
1865                         hdmi_attach_hda_pcm(spec, per_pin);
1866                         hdmi_pcm_setup_pin(spec, per_pin);
1867                 } else {
1868                         hdmi_pcm_reset_pin(spec, per_pin);
1869                         hdmi_detach_hda_pcm(spec, per_pin);
1870                 }
1871         }
1872         /* if pcm_idx == -1, it means this is in monitor connection event
1873          * we can get the correct pcm_idx now.
1874          */
1875         if (pcm_idx == -1)
1876                 pcm_idx = per_pin->pcm_idx;
1877
1878         if (eld->eld_valid)
1879                 snd_hdmi_show_eld(codec, &eld->info);
1880
1881         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1882         if (eld->eld_valid && pin_eld->eld_valid)
1883                 if (pin_eld->eld_size != eld->eld_size ||
1884                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1885                            eld->eld_size) != 0)
1886                         eld_changed = true;
1887
1888         pin_eld->eld_valid = eld->eld_valid;
1889         pin_eld->eld_size = eld->eld_size;
1890         if (eld->eld_valid)
1891                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1892         pin_eld->info = eld->info;
1893
1894         /*
1895          * Re-setup pin and infoframe. This is needed e.g. when
1896          * - sink is first plugged-in
1897          * - transcoder can change during stream playback on Haswell
1898          *   and this can make HW reset converter selection on a pin.
1899          */
1900         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1901                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1902                         intel_verify_pin_cvt_connect(codec, per_pin);
1903                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1904                                                      per_pin->mux_idx);
1905                 }
1906
1907                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1908         }
1909
1910         if (eld_changed && pcm_idx >= 0)
1911                 snd_ctl_notify(codec->card,
1912                                SNDRV_CTL_EVENT_MASK_VALUE |
1913                                SNDRV_CTL_EVENT_MASK_INFO,
1914                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1915 }
1916
1917 /* update ELD and jack state via HD-audio verbs */
1918 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1919                                          int repoll)
1920 {
1921         struct hda_jack_tbl *jack;
1922         struct hda_codec *codec = per_pin->codec;
1923         struct hdmi_spec *spec = codec->spec;
1924         struct hdmi_eld *eld = &spec->temp_eld;
1925         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1926         hda_nid_t pin_nid = per_pin->pin_nid;
1927         /*
1928          * Always execute a GetPinSense verb here, even when called from
1929          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1930          * response's PD bit is not the real PD value, but indicates that
1931          * the real PD value changed. An older version of the HD-audio
1932          * specification worked this way. Hence, we just ignore the data in
1933          * the unsolicited response to avoid custom WARs.
1934          */
1935         int present;
1936         bool ret;
1937         bool do_repoll = false;
1938
1939         snd_hda_power_up_pm(codec);
1940         present = snd_hda_pin_sense(codec, pin_nid);
1941
1942         mutex_lock(&per_pin->lock);
1943         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1944         if (pin_eld->monitor_present)
1945                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1946         else
1947                 eld->eld_valid = false;
1948
1949         codec_dbg(codec,
1950                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1951                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1952
1953         if (eld->eld_valid) {
1954                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1955                                                      &eld->eld_size) < 0)
1956                         eld->eld_valid = false;
1957                 else {
1958                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1959                                                     eld->eld_size) < 0)
1960                                 eld->eld_valid = false;
1961                 }
1962                 if (!eld->eld_valid && repoll)
1963                         do_repoll = true;
1964         }
1965
1966         if (do_repoll)
1967                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1968         else
1969                 update_eld(codec, per_pin, eld);
1970
1971         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1972
1973         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1974         if (jack)
1975                 jack->block_report = !ret;
1976
1977         mutex_unlock(&per_pin->lock);
1978         snd_hda_power_down_pm(codec);
1979         return ret;
1980 }
1981
1982 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1983                                  struct hdmi_spec_per_pin *per_pin)
1984 {
1985         struct hdmi_spec *spec = codec->spec;
1986         struct snd_jack *jack = NULL;
1987         struct hda_jack_tbl *jack_tbl;
1988
1989         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1990          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1991          * NULL even after snd_hda_jack_tbl_clear() is called to
1992          * free snd_jack. This may cause access invalid memory
1993          * when calling snd_jack_report
1994          */
1995         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1996                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1997         else if (!spec->dyn_pcm_assign) {
1998                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1999                 if (jack_tbl)
2000                         jack = jack_tbl->jack;
2001         }
2002         return jack;
2003 }
2004
2005 /* update ELD and jack state via audio component */
2006 static void sync_eld_via_acomp(struct hda_codec *codec,
2007                                struct hdmi_spec_per_pin *per_pin)
2008 {
2009         struct hdmi_spec *spec = codec->spec;
2010         struct hdmi_eld *eld = &spec->temp_eld;
2011         struct snd_jack *jack = NULL;
2012         int size;
2013
2014         mutex_lock(&per_pin->lock);
2015         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
2016                                       &eld->monitor_present, eld->eld_buffer,
2017                                       ELD_MAX_SIZE);
2018         if (size < 0)
2019                 goto unlock;
2020         if (size > 0) {
2021                 size = min(size, ELD_MAX_SIZE);
2022                 if (snd_hdmi_parse_eld(codec, &eld->info,
2023                                        eld->eld_buffer, size) < 0)
2024                         size = -EINVAL;
2025         }
2026
2027         if (size > 0) {
2028                 eld->eld_valid = true;
2029                 eld->eld_size = size;
2030         } else {
2031                 eld->eld_valid = false;
2032                 eld->eld_size = 0;
2033         }
2034
2035         /* pcm_idx >=0 before update_eld() means it is in monitor
2036          * disconnected event. Jack must be fetched before update_eld()
2037          */
2038         jack = pin_idx_to_jack(codec, per_pin);
2039         update_eld(codec, per_pin, eld);
2040         if (jack == NULL)
2041                 jack = pin_idx_to_jack(codec, per_pin);
2042         if (jack == NULL)
2043                 goto unlock;
2044         snd_jack_report(jack,
2045                         eld->monitor_present ? SND_JACK_AVOUT : 0);
2046  unlock:
2047         mutex_unlock(&per_pin->lock);
2048 }
2049
2050 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
2051 {
2052         struct hda_codec *codec = per_pin->codec;
2053         struct hdmi_spec *spec = codec->spec;
2054         int ret;
2055
2056         mutex_lock(&spec->pcm_lock);
2057         if (codec_has_acomp(codec)) {
2058                 sync_eld_via_acomp(codec, per_pin);
2059                 ret = false; /* don't call snd_hda_jack_report_sync() */
2060         } else {
2061                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
2062         }
2063         mutex_unlock(&spec->pcm_lock);
2064
2065         return ret;
2066 }
2067
2068 static void hdmi_repoll_eld(struct work_struct *work)
2069 {
2070         struct hdmi_spec_per_pin *per_pin =
2071         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
2072
2073         if (per_pin->repoll_count++ > 6)
2074                 per_pin->repoll_count = 0;
2075
2076         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
2077                 snd_hda_jack_report_sync(per_pin->codec);
2078 }
2079
2080 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2081                                              hda_nid_t nid);
2082
2083 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
2084 {
2085         struct hdmi_spec *spec = codec->spec;
2086         unsigned int caps, config;
2087         int pin_idx;
2088         struct hdmi_spec_per_pin *per_pin;
2089         int err;
2090
2091         caps = snd_hda_query_pin_caps(codec, pin_nid);
2092         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
2093                 return 0;
2094
2095         config = snd_hda_codec_get_pincfg(codec, pin_nid);
2096         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
2097                 return 0;
2098
2099         if (is_haswell_plus(codec))
2100                 intel_haswell_fixup_connect_list(codec, pin_nid);
2101
2102         pin_idx = spec->num_pins;
2103         per_pin = snd_array_new(&spec->pins);
2104         if (!per_pin)
2105                 return -ENOMEM;
2106
2107         per_pin->pin_nid = pin_nid;
2108         per_pin->non_pcm = false;
2109         if (spec->dyn_pcm_assign)
2110                 per_pin->pcm_idx = -1;
2111         else {
2112                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
2113                 per_pin->pcm_idx = pin_idx;
2114         }
2115         per_pin->pin_nid_idx = pin_idx;
2116
2117         err = hdmi_read_pin_conn(codec, pin_idx);
2118         if (err < 0)
2119                 return err;
2120
2121         spec->num_pins++;
2122
2123         return 0;
2124 }
2125
2126 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2127 {
2128         struct hdmi_spec *spec = codec->spec;
2129         struct hdmi_spec_per_cvt *per_cvt;
2130         unsigned int chans;
2131         int err;
2132
2133         chans = get_wcaps(codec, cvt_nid);
2134         chans = get_wcaps_channels(chans);
2135
2136         per_cvt = snd_array_new(&spec->cvts);
2137         if (!per_cvt)
2138                 return -ENOMEM;
2139
2140         per_cvt->cvt_nid = cvt_nid;
2141         per_cvt->channels_min = 2;
2142         if (chans <= 16) {
2143                 per_cvt->channels_max = chans;
2144                 if (chans > spec->channels_max)
2145                         spec->channels_max = chans;
2146         }
2147
2148         err = snd_hda_query_supported_pcm(codec, cvt_nid,
2149                                           &per_cvt->rates,
2150                                           &per_cvt->formats,
2151                                           &per_cvt->maxbps);
2152         if (err < 0)
2153                 return err;
2154
2155         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
2156                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
2157         spec->num_cvts++;
2158
2159         return 0;
2160 }
2161
2162 static int hdmi_parse_codec(struct hda_codec *codec)
2163 {
2164         hda_nid_t nid;
2165         int i, nodes;
2166
2167         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
2168         if (!nid || nodes < 0) {
2169                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
2170                 return -EINVAL;
2171         }
2172
2173         for (i = 0; i < nodes; i++, nid++) {
2174                 unsigned int caps;
2175                 unsigned int type;
2176
2177                 caps = get_wcaps(codec, nid);
2178                 type = get_wcaps_type(caps);
2179
2180                 if (!(caps & AC_WCAP_DIGITAL))
2181                         continue;
2182
2183                 switch (type) {
2184                 case AC_WID_AUD_OUT:
2185                         hdmi_add_cvt(codec, nid);
2186                         break;
2187                 case AC_WID_PIN:
2188                         hdmi_add_pin(codec, nid);
2189                         break;
2190                 }
2191         }
2192
2193         return 0;
2194 }
2195
2196 /*
2197  */
2198 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2199 {
2200         struct hda_spdif_out *spdif;
2201         bool non_pcm;
2202
2203         mutex_lock(&codec->spdif_mutex);
2204         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2205         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2206         mutex_unlock(&codec->spdif_mutex);
2207         return non_pcm;
2208 }
2209
2210 /*
2211  * HDMI callbacks
2212  */
2213
2214 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2215                                            struct hda_codec *codec,
2216                                            unsigned int stream_tag,
2217                                            unsigned int format,
2218                                            struct snd_pcm_substream *substream)
2219 {
2220         hda_nid_t cvt_nid = hinfo->nid;
2221         struct hdmi_spec *spec = codec->spec;
2222         int pin_idx;
2223         struct hdmi_spec_per_pin *per_pin;
2224         hda_nid_t pin_nid;
2225         struct snd_pcm_runtime *runtime = substream->runtime;
2226         bool non_pcm;
2227         int pinctl;
2228         int err;
2229
2230         mutex_lock(&spec->pcm_lock);
2231         pin_idx = hinfo_to_pin_index(codec, hinfo);
2232         if (spec->dyn_pcm_assign && pin_idx < 0) {
2233                 /* when dyn_pcm_assign and pcm is not bound to a pin
2234                  * skip pin setup and return 0 to make audio playback
2235                  * be ongoing
2236                  */
2237                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2238                 snd_hda_codec_setup_stream(codec, cvt_nid,
2239                                         stream_tag, 0, format);
2240                 mutex_unlock(&spec->pcm_lock);
2241                 return 0;
2242         }
2243
2244         if (snd_BUG_ON(pin_idx < 0)) {
2245                 mutex_unlock(&spec->pcm_lock);
2246                 return -EINVAL;
2247         }
2248         per_pin = get_pin(spec, pin_idx);
2249         pin_nid = per_pin->pin_nid;
2250         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
2251                 /* Verify pin:cvt selections to avoid silent audio after S3.
2252                  * After S3, the audio driver restores pin:cvt selections
2253                  * but this can happen before gfx is ready and such selection
2254                  * is overlooked by HW. Thus multiple pins can share a same
2255                  * default convertor and mute control will affect each other,
2256                  * which can cause a resumed audio playback become silent
2257                  * after S3.
2258                  */
2259                 intel_verify_pin_cvt_connect(codec, per_pin);
2260                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
2261         }
2262
2263         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2264         /* Todo: add DP1.2 MST audio support later */
2265         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
2266
2267         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2268         mutex_lock(&per_pin->lock);
2269         per_pin->channels = substream->runtime->channels;
2270         per_pin->setup = true;
2271
2272         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2273         mutex_unlock(&per_pin->lock);
2274         if (spec->dyn_pin_out) {
2275                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
2276                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2277                 snd_hda_codec_write(codec, pin_nid, 0,
2278                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2279                                     pinctl | PIN_OUT);
2280         }
2281
2282         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
2283                                  stream_tag, format);
2284         mutex_unlock(&spec->pcm_lock);
2285         return err;
2286 }
2287
2288 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2289                                              struct hda_codec *codec,
2290                                              struct snd_pcm_substream *substream)
2291 {
2292         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2293         return 0;
2294 }
2295
2296 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2297                           struct hda_codec *codec,
2298                           struct snd_pcm_substream *substream)
2299 {
2300         struct hdmi_spec *spec = codec->spec;
2301         int cvt_idx, pin_idx, pcm_idx;
2302         struct hdmi_spec_per_cvt *per_cvt;
2303         struct hdmi_spec_per_pin *per_pin;
2304         int pinctl;
2305
2306         if (hinfo->nid) {
2307                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2308                 if (snd_BUG_ON(pcm_idx < 0))
2309                         return -EINVAL;
2310                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2311                 if (snd_BUG_ON(cvt_idx < 0))
2312                         return -EINVAL;
2313                 per_cvt = get_cvt(spec, cvt_idx);
2314
2315                 snd_BUG_ON(!per_cvt->assigned);
2316                 per_cvt->assigned = 0;
2317                 hinfo->nid = 0;
2318
2319                 mutex_lock(&spec->pcm_lock);
2320                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2321                 clear_bit(pcm_idx, &spec->pcm_in_use);
2322                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2323                 if (spec->dyn_pcm_assign && pin_idx < 0) {
2324                         mutex_unlock(&spec->pcm_lock);
2325                         return 0;
2326                 }
2327
2328                 if (snd_BUG_ON(pin_idx < 0)) {
2329                         mutex_unlock(&spec->pcm_lock);
2330                         return -EINVAL;
2331                 }
2332                 per_pin = get_pin(spec, pin_idx);
2333
2334                 if (spec->dyn_pin_out) {
2335                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2336                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2337                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2338                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2339                                             pinctl & ~PIN_OUT);
2340                 }
2341
2342                 mutex_lock(&per_pin->lock);
2343                 per_pin->chmap_set = false;
2344                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2345
2346                 per_pin->setup = false;
2347                 per_pin->channels = 0;
2348                 mutex_unlock(&per_pin->lock);
2349                 mutex_unlock(&spec->pcm_lock);
2350         }
2351
2352         return 0;
2353 }
2354
2355 static const struct hda_pcm_ops generic_ops = {
2356         .open = hdmi_pcm_open,
2357         .close = hdmi_pcm_close,
2358         .prepare = generic_hdmi_playback_pcm_prepare,
2359         .cleanup = generic_hdmi_playback_pcm_cleanup,
2360 };
2361
2362 /*
2363  * ALSA API channel-map control callbacks
2364  */
2365 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
2366                                struct snd_ctl_elem_info *uinfo)
2367 {
2368         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2369         struct hda_codec *codec = info->private_data;
2370         struct hdmi_spec *spec = codec->spec;
2371         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2372         uinfo->count = spec->channels_max;
2373         uinfo->value.integer.min = 0;
2374         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
2375         return 0;
2376 }
2377
2378 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2379                                                   int channels)
2380 {
2381         /* If the speaker allocation matches the channel count, it is OK.*/
2382         if (cap->channels != channels)
2383                 return -1;
2384
2385         /* all channels are remappable freely */
2386         return SNDRV_CTL_TLVT_CHMAP_VAR;
2387 }
2388
2389 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
2390                                         unsigned int *chmap, int channels)
2391 {
2392         int count = 0;
2393         int c;
2394
2395         for (c = 7; c >= 0; c--) {
2396                 int spk = cap->speakers[c];
2397                 if (!spk)
2398                         continue;
2399
2400                 chmap[count++] = spk_to_chmap(spk);
2401         }
2402
2403         WARN_ON(count != channels);
2404 }
2405
2406 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2407                               unsigned int size, unsigned int __user *tlv)
2408 {
2409         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2410         struct hda_codec *codec = info->private_data;
2411         struct hdmi_spec *spec = codec->spec;
2412         unsigned int __user *dst;
2413         int chs, count = 0;
2414
2415         if (size < 8)
2416                 return -ENOMEM;
2417         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2418                 return -EFAULT;
2419         size -= 8;
2420         dst = tlv + 2;
2421         for (chs = 2; chs <= spec->channels_max; chs++) {
2422                 int i;
2423                 struct cea_channel_speaker_allocation *cap;
2424                 cap = channel_allocations;
2425                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2426                         int chs_bytes = chs * 4;
2427                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2428                         unsigned int tlv_chmap[8];
2429
2430                         if (type < 0)
2431                                 continue;
2432                         if (size < 8)
2433                                 return -ENOMEM;
2434                         if (put_user(type, dst) ||
2435                             put_user(chs_bytes, dst + 1))
2436                                 return -EFAULT;
2437                         dst += 2;
2438                         size -= 8;
2439                         count += 8;
2440                         if (size < chs_bytes)
2441                                 return -ENOMEM;
2442                         size -= chs_bytes;
2443                         count += chs_bytes;
2444                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2445                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2446                                 return -EFAULT;
2447                         dst += chs;
2448                 }
2449         }
2450         if (put_user(count, tlv + 1))
2451                 return -EFAULT;
2452         return 0;
2453 }
2454
2455 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2456                               struct snd_ctl_elem_value *ucontrol)
2457 {
2458         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2459         struct hda_codec *codec = info->private_data;
2460         struct hdmi_spec *spec = codec->spec;
2461         int pcm_idx = kcontrol->private_value;
2462         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2463         int i;
2464
2465         if (!per_pin) {
2466                 for (i = 0; i < spec->channels_max; i++)
2467                         ucontrol->value.integer.value[i] = 0;
2468                 return 0;
2469         }
2470
2471         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2472                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2473         return 0;
2474 }
2475
2476 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2477                               struct snd_ctl_elem_value *ucontrol)
2478 {
2479         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2480         struct hda_codec *codec = info->private_data;
2481         struct hdmi_spec *spec = codec->spec;
2482         int pcm_idx = kcontrol->private_value;
2483         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2484         unsigned int ctl_idx;
2485         struct snd_pcm_substream *substream;
2486         unsigned char chmap[8];
2487         int i, err, ca, prepared = 0;
2488
2489         /* No monitor is connected in dyn_pcm_assign.
2490          * It's invalid to setup the chmap
2491          */
2492         if (!per_pin)
2493                 return 0;
2494
2495         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2496         substream = snd_pcm_chmap_substream(info, ctl_idx);
2497         if (!substream || !substream->runtime)
2498                 return 0; /* just for avoiding error from alsactl restore */
2499         switch (substream->runtime->status->state) {
2500         case SNDRV_PCM_STATE_OPEN:
2501         case SNDRV_PCM_STATE_SETUP:
2502                 break;
2503         case SNDRV_PCM_STATE_PREPARED:
2504                 prepared = 1;
2505                 break;
2506         default:
2507                 return -EBUSY;
2508         }
2509         memset(chmap, 0, sizeof(chmap));
2510         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2511                 chmap[i] = ucontrol->value.integer.value[i];
2512         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2513                 return 0;
2514         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2515         if (ca < 0)
2516                 return -EINVAL;
2517         if (spec->ops.chmap_validate) {
2518                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2519                 if (err)
2520                         return err;
2521         }
2522         mutex_lock(&per_pin->lock);
2523         per_pin->chmap_set = true;
2524         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2525         if (prepared)
2526                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2527         mutex_unlock(&per_pin->lock);
2528
2529         return 0;
2530 }
2531
2532 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2533 {
2534         struct hdmi_spec *spec = codec->spec;
2535         int pin_idx;
2536
2537         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2538                 struct hda_pcm *info;
2539                 struct hda_pcm_stream *pstr;
2540
2541                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2542                 if (!info)
2543                         return -ENOMEM;
2544
2545                 spec->pcm_rec[pin_idx].pcm = info;
2546                 spec->pcm_used++;
2547                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2548                 info->own_chmap = true;
2549
2550                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2551                 pstr->substreams = 1;
2552                 pstr->ops = generic_ops;
2553                 /* other pstr fields are set in open */
2554         }
2555
2556         return 0;
2557 }
2558
2559 static void free_hdmi_jack_priv(struct snd_jack *jack)
2560 {
2561         struct hdmi_pcm *pcm = jack->private_data;
2562
2563         pcm->jack = NULL;
2564 }
2565
2566 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2567                                struct hdmi_spec *spec,
2568                                int pcm_idx,
2569                                const char *name)
2570 {
2571         struct snd_jack *jack;
2572         int err;
2573
2574         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2575                            true, false);
2576         if (err < 0)
2577                 return err;
2578
2579         spec->pcm_rec[pcm_idx].jack = jack;
2580         jack->private_data = &spec->pcm_rec[pcm_idx];
2581         jack->private_free = free_hdmi_jack_priv;
2582         return 0;
2583 }
2584
2585 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2586 {
2587         char hdmi_str[32] = "HDMI/DP";
2588         struct hdmi_spec *spec = codec->spec;
2589         struct hdmi_spec_per_pin *per_pin;
2590         struct hda_jack_tbl *jack;
2591         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2592         bool phantom_jack;
2593         int ret;
2594
2595         if (pcmdev > 0)
2596                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2597
2598         if (spec->dyn_pcm_assign)
2599                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2600
2601         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2602         /* if !dyn_pcm_assign, it must be non-MST mode.
2603          * This means pcms and pins are statically mapped.
2604          * And pcm_idx is pin_idx.
2605          */
2606         per_pin = get_pin(spec, pcm_idx);
2607         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2608         if (phantom_jack)
2609                 strncat(hdmi_str, " Phantom",
2610                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2611         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2612                                     phantom_jack);
2613         if (ret < 0)
2614                 return ret;
2615         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2616         if (jack == NULL)
2617                 return 0;
2618         /* assign jack->jack to pcm_rec[].jack to
2619          * align with dyn_pcm_assign mode
2620          */
2621         spec->pcm_rec[pcm_idx].jack = jack->jack;
2622         return 0;
2623 }
2624
2625 static int generic_hdmi_build_controls(struct hda_codec *codec)
2626 {
2627         struct hdmi_spec *spec = codec->spec;
2628         int err;
2629         int pin_idx, pcm_idx;
2630
2631
2632         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2633                 err = generic_hdmi_build_jack(codec, pcm_idx);
2634                 if (err < 0)
2635                         return err;
2636
2637                 /* create the spdif for each pcm
2638                  * pin will be bound when monitor is connected
2639                  */
2640                 if (spec->dyn_pcm_assign)
2641                         err = snd_hda_create_dig_out_ctls(codec,
2642                                           0, spec->cvt_nids[0],
2643                                           HDA_PCM_TYPE_HDMI);
2644                 else {
2645                         struct hdmi_spec_per_pin *per_pin =
2646                                 get_pin(spec, pcm_idx);
2647                         err = snd_hda_create_dig_out_ctls(codec,
2648                                                   per_pin->pin_nid,
2649                                                   per_pin->mux_nids[0],
2650                                                   HDA_PCM_TYPE_HDMI);
2651                 }
2652                 if (err < 0)
2653                         return err;
2654                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2655
2656                 /* add control for ELD Bytes */
2657                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2658                                         get_pcm_rec(spec, pcm_idx)->device);
2659                 if (err < 0)
2660                         return err;
2661         }
2662
2663         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2664                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2665
2666                 hdmi_present_sense(per_pin, 0);
2667         }
2668
2669         /* add channel maps */
2670         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2671                 struct hda_pcm *pcm;
2672                 struct snd_pcm_chmap *chmap;
2673                 struct snd_kcontrol *kctl;
2674                 int i;
2675
2676                 pcm = get_pcm_rec(spec, pcm_idx);
2677                 if (!pcm || !pcm->pcm)
2678                         break;
2679                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2680                                              SNDRV_PCM_STREAM_PLAYBACK,
2681                                              NULL, 0, pcm_idx, &chmap);
2682                 if (err < 0)
2683                         return err;
2684                 /* override handlers */
2685                 chmap->private_data = codec;
2686                 kctl = chmap->kctl;
2687                 for (i = 0; i < kctl->count; i++)
2688                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2689                 kctl->info = hdmi_chmap_ctl_info;
2690                 kctl->get = hdmi_chmap_ctl_get;
2691                 kctl->put = hdmi_chmap_ctl_put;
2692                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2693         }
2694
2695         return 0;
2696 }
2697
2698 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2699 {
2700         struct hdmi_spec *spec = codec->spec;
2701         int pin_idx;
2702
2703         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2704                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2705
2706                 per_pin->codec = codec;
2707                 mutex_init(&per_pin->lock);
2708                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2709                 eld_proc_new(per_pin, pin_idx);
2710         }
2711         return 0;
2712 }
2713
2714 static int generic_hdmi_init(struct hda_codec *codec)
2715 {
2716         struct hdmi_spec *spec = codec->spec;
2717         int pin_idx;
2718
2719         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2720                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2721                 hda_nid_t pin_nid = per_pin->pin_nid;
2722
2723                 hdmi_init_pin(codec, pin_nid);
2724                 if (!codec_has_acomp(codec))
2725                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2726                                 codec->jackpoll_interval > 0 ?
2727                                 jack_callback : NULL);
2728         }
2729         return 0;
2730 }
2731
2732 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2733 {
2734         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2735         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2736 }
2737
2738 static void hdmi_array_free(struct hdmi_spec *spec)
2739 {
2740         snd_array_free(&spec->pins);
2741         snd_array_free(&spec->cvts);
2742 }
2743
2744 static void generic_hdmi_free(struct hda_codec *codec)
2745 {
2746         struct hdmi_spec *spec = codec->spec;
2747         int pin_idx, pcm_idx;
2748
2749         if (codec_has_acomp(codec))
2750                 snd_hdac_i915_register_notifier(NULL);
2751
2752         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2753                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2754                 cancel_delayed_work_sync(&per_pin->work);
2755                 eld_proc_free(per_pin);
2756         }
2757
2758         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2759                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2760                         continue;
2761                 if (spec->dyn_pcm_assign)
2762                         snd_device_free(codec->card,
2763                                         spec->pcm_rec[pcm_idx].jack);
2764                 else
2765                         spec->pcm_rec[pcm_idx].jack = NULL;
2766         }
2767
2768         if (spec->i915_bound)
2769                 snd_hdac_i915_exit(&codec->bus->core);
2770         hdmi_array_free(spec);
2771         kfree(spec);
2772 }
2773
2774 #ifdef CONFIG_PM
2775 static int generic_hdmi_resume(struct hda_codec *codec)
2776 {
2777         struct hdmi_spec *spec = codec->spec;
2778         int pin_idx;
2779
2780         codec->patch_ops.init(codec);
2781         regcache_sync(codec->core.regmap);
2782
2783         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2784                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2785                 hdmi_present_sense(per_pin, 1);
2786         }
2787         return 0;
2788 }
2789 #endif
2790
2791 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2792         .init                   = generic_hdmi_init,
2793         .free                   = generic_hdmi_free,
2794         .build_pcms             = generic_hdmi_build_pcms,
2795         .build_controls         = generic_hdmi_build_controls,
2796         .unsol_event            = hdmi_unsol_event,
2797 #ifdef CONFIG_PM
2798         .resume                 = generic_hdmi_resume,
2799 #endif
2800 };
2801
2802 static const struct hdmi_ops generic_standard_hdmi_ops = {
2803         .pin_get_eld                            = snd_hdmi_get_eld,
2804         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2805         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2806         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2807         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2808         .setup_stream                           = hdmi_setup_stream,
2809         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2810         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2811 };
2812
2813
2814 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2815                                              hda_nid_t nid)
2816 {
2817         struct hdmi_spec *spec = codec->spec;
2818         hda_nid_t conns[4];
2819         int nconns;
2820
2821         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2822         if (nconns == spec->num_cvts &&
2823             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2824                 return;
2825
2826         /* override pins connection list */
2827         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2828         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2829 }
2830
2831 #define INTEL_VENDOR_NID 0x08
2832 #define INTEL_GET_VENDOR_VERB 0xf81
2833 #define INTEL_SET_VENDOR_VERB 0x781
2834 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2835 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2836
2837 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2838                                           bool update_tree)
2839 {
2840         unsigned int vendor_param;
2841
2842         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2843                                 INTEL_GET_VENDOR_VERB, 0);
2844         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2845                 return;
2846
2847         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2848         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2849                                 INTEL_SET_VENDOR_VERB, vendor_param);
2850         if (vendor_param == -1)
2851                 return;
2852
2853         if (update_tree)
2854                 snd_hda_codec_update_widgets(codec);
2855 }
2856
2857 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2858 {
2859         unsigned int vendor_param;
2860
2861         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2862                                 INTEL_GET_VENDOR_VERB, 0);
2863         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2864                 return;
2865
2866         /* enable DP1.2 mode */
2867         vendor_param |= INTEL_EN_DP12;
2868         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2869         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2870                                 INTEL_SET_VENDOR_VERB, vendor_param);
2871 }
2872
2873 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2874  * Otherwise you may get severe h/w communication errors.
2875  */
2876 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2877                                 unsigned int power_state)
2878 {
2879         if (power_state == AC_PWRST_D0) {
2880                 intel_haswell_enable_all_pins(codec, false);
2881                 intel_haswell_fixup_enable_dp12(codec);
2882         }
2883
2884         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2885         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2886 }
2887
2888 static void intel_pin_eld_notify(void *audio_ptr, int port)
2889 {
2890         struct hda_codec *codec = audio_ptr;
2891         int pin_nid = port + 0x04;
2892
2893         /* skip notification during system suspend (but not in runtime PM);
2894          * the state will be updated at resume
2895          */
2896         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2897                 return;
2898         /* ditto during suspend/resume process itself */
2899         if (atomic_read(&(codec)->core.in_pm))
2900                 return;
2901
2902         check_presence_and_report(codec, pin_nid);
2903 }
2904
2905 static int patch_generic_hdmi(struct hda_codec *codec)
2906 {
2907         struct hdmi_spec *spec;
2908
2909         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2910         if (spec == NULL)
2911                 return -ENOMEM;
2912
2913         spec->ops = generic_standard_hdmi_ops;
2914         mutex_init(&spec->pcm_lock);
2915         codec->spec = spec;
2916         hdmi_array_init(spec, 4);
2917
2918         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2919         if (!codec_has_acomp(codec) &&
2920             (codec->core.vendor_id >> 16) == 0x8086)
2921                 if (!snd_hdac_i915_init(&codec->bus->core))
2922                         spec->i915_bound = true;
2923
2924         if (is_haswell_plus(codec)) {
2925                 intel_haswell_enable_all_pins(codec, true);
2926                 intel_haswell_fixup_enable_dp12(codec);
2927         }
2928
2929         /* For Valleyview/Cherryview, only the display codec is in the display
2930          * power well and can use link_power ops to request/release the power.
2931          * For Haswell/Broadwell, the controller is also in the power well and
2932          * can cover the codec power request, and so need not set this flag.
2933          * For previous platforms, there is no such power well feature.
2934          */
2935         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2936                         is_broxton(codec))
2937                 codec->core.link_power_control = 1;
2938
2939         if (hdmi_parse_codec(codec) < 0) {
2940                 if (spec->i915_bound)
2941                         snd_hdac_i915_exit(&codec->bus->core);
2942                 codec->spec = NULL;
2943                 kfree(spec);
2944                 return -EINVAL;
2945         }
2946         codec->patch_ops = generic_hdmi_patch_ops;
2947         if (is_haswell_plus(codec)) {
2948                 codec->patch_ops.set_power_state = haswell_set_power_state;
2949                 codec->dp_mst = true;
2950         }
2951
2952         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2953         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2954                 codec->auto_runtime_pm = 1;
2955
2956         generic_hdmi_init_per_pins(codec);
2957
2958         init_channel_allocations();
2959
2960         if (codec_has_acomp(codec)) {
2961                 codec->depop_delay = 0;
2962                 spec->i915_audio_ops.audio_ptr = codec;
2963                 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2964                  * will call pin_eld_notify with using audio_ptr pointer
2965                  * We need make sure audio_ptr is really setup
2966                  */
2967                 wmb();
2968                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2969                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2970         }
2971
2972         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2973         return 0;
2974 }
2975
2976 /*
2977  * Shared non-generic implementations
2978  */
2979
2980 static int simple_playback_build_pcms(struct hda_codec *codec)
2981 {
2982         struct hdmi_spec *spec = codec->spec;
2983         struct hda_pcm *info;
2984         unsigned int chans;
2985         struct hda_pcm_stream *pstr;
2986         struct hdmi_spec_per_cvt *per_cvt;
2987
2988         per_cvt = get_cvt(spec, 0);
2989         chans = get_wcaps(codec, per_cvt->cvt_nid);
2990         chans = get_wcaps_channels(chans);
2991
2992         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2993         if (!info)
2994                 return -ENOMEM;
2995         spec->pcm_rec[0].pcm = info;
2996         info->pcm_type = HDA_PCM_TYPE_HDMI;
2997         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2998         *pstr = spec->pcm_playback;
2999         pstr->nid = per_cvt->cvt_nid;
3000         if (pstr->channels_max <= 2 && chans && chans <= 16)
3001                 pstr->channels_max = chans;
3002
3003         return 0;
3004 }
3005
3006 /* unsolicited event for jack sensing */
3007 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3008                                     unsigned int res)
3009 {
3010         snd_hda_jack_set_dirty_all(codec);
3011         snd_hda_jack_report_sync(codec);
3012 }
3013
3014 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3015  * as long as spec->pins[] is set correctly
3016  */
3017 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3018
3019 static int simple_playback_build_controls(struct hda_codec *codec)
3020 {
3021         struct hdmi_spec *spec = codec->spec;
3022         struct hdmi_spec_per_cvt *per_cvt;
3023         int err;
3024
3025         per_cvt = get_cvt(spec, 0);
3026         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3027                                           per_cvt->cvt_nid,
3028                                           HDA_PCM_TYPE_HDMI);
3029         if (err < 0)
3030                 return err;
3031         return simple_hdmi_build_jack(codec, 0);
3032 }
3033
3034 static int simple_playback_init(struct hda_codec *codec)
3035 {
3036         struct hdmi_spec *spec = codec->spec;
3037         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3038         hda_nid_t pin = per_pin->pin_nid;
3039
3040         snd_hda_codec_write(codec, pin, 0,
3041                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3042         /* some codecs require to unmute the pin */
3043         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3044                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3045                                     AMP_OUT_UNMUTE);
3046         snd_hda_jack_detect_enable(codec, pin);
3047         return 0;
3048 }
3049
3050 static void simple_playback_free(struct hda_codec *codec)
3051 {
3052         struct hdmi_spec *spec = codec->spec;
3053
3054         hdmi_array_free(spec);
3055         kfree(spec);
3056 }
3057
3058 /*
3059  * Nvidia specific implementations
3060  */
3061
3062 #define Nv_VERB_SET_Channel_Allocation          0xF79
3063 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3064 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3065 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3066
3067 #define nvhdmi_master_con_nid_7x        0x04
3068 #define nvhdmi_master_pin_nid_7x        0x05
3069
3070 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3071         /*front, rear, clfe, rear_surr */
3072         0x6, 0x8, 0xa, 0xc,
3073 };
3074
3075 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3076         /* set audio protect on */
3077         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3078         /* enable digital output on pin widget */
3079         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3080         {} /* terminator */
3081 };
3082
3083 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3084         /* set audio protect on */
3085         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3086         /* enable digital output on pin widget */
3087         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3088         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3089         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3090         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3091         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3092         {} /* terminator */
3093 };
3094
3095 #ifdef LIMITED_RATE_FMT_SUPPORT
3096 /* support only the safe format and rate */
3097 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3098 #define SUPPORTED_MAXBPS        16
3099 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3100 #else
3101 /* support all rates and formats */
3102 #define SUPPORTED_RATES \
3103         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3104         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3105          SNDRV_PCM_RATE_192000)
3106 #define SUPPORTED_MAXBPS        24
3107 #define SUPPORTED_FORMATS \
3108         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3109 #endif
3110
3111 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3112 {
3113         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3114         return 0;
3115 }
3116
3117 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3118 {
3119         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3120         return 0;
3121 }
3122
3123 static unsigned int channels_2_6_8[] = {
3124         2, 6, 8
3125 };
3126
3127 static unsigned int channels_2_8[] = {
3128         2, 8
3129 };
3130
3131 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3132         .count = ARRAY_SIZE(channels_2_6_8),
3133         .list = channels_2_6_8,
3134         .mask = 0,
3135 };
3136
3137 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3138         .count = ARRAY_SIZE(channels_2_8),
3139         .list = channels_2_8,
3140         .mask = 0,
3141 };
3142
3143 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3144                                     struct hda_codec *codec,
3145                                     struct snd_pcm_substream *substream)
3146 {
3147         struct hdmi_spec *spec = codec->spec;
3148         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3149
3150         switch (codec->preset->vendor_id) {
3151         case 0x10de0002:
3152         case 0x10de0003:
3153         case 0x10de0005:
3154         case 0x10de0006:
3155                 hw_constraints_channels = &hw_constraints_2_8_channels;
3156                 break;
3157         case 0x10de0007:
3158                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3159                 break;
3160         default:
3161                 break;
3162         }
3163
3164         if (hw_constraints_channels != NULL) {
3165                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3166                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3167                                 hw_constraints_channels);
3168         } else {
3169                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3170                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3171         }
3172
3173         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3174 }
3175
3176 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3177                                      struct hda_codec *codec,
3178                                      struct snd_pcm_substream *substream)
3179 {
3180         struct hdmi_spec *spec = codec->spec;
3181         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3182 }
3183
3184 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3185                                        struct hda_codec *codec,
3186                                        unsigned int stream_tag,
3187                                        unsigned int format,
3188                                        struct snd_pcm_substream *substream)
3189 {
3190         struct hdmi_spec *spec = codec->spec;
3191         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3192                                              stream_tag, format, substream);
3193 }
3194
3195 static const struct hda_pcm_stream simple_pcm_playback = {
3196         .substreams = 1,
3197         .channels_min = 2,
3198         .channels_max = 2,
3199         .ops = {
3200                 .open = simple_playback_pcm_open,
3201                 .close = simple_playback_pcm_close,
3202                 .prepare = simple_playback_pcm_prepare
3203         },
3204 };
3205
3206 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3207         .build_controls = simple_playback_build_controls,
3208         .build_pcms = simple_playback_build_pcms,
3209         .init = simple_playback_init,
3210         .free = simple_playback_free,
3211         .unsol_event = simple_hdmi_unsol_event,
3212 };
3213
3214 static int patch_simple_hdmi(struct hda_codec *codec,
3215                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3216 {
3217         struct hdmi_spec *spec;
3218         struct hdmi_spec_per_cvt *per_cvt;
3219         struct hdmi_spec_per_pin *per_pin;
3220
3221         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3222         if (!spec)
3223                 return -ENOMEM;
3224
3225         codec->spec = spec;
3226         hdmi_array_init(spec, 1);
3227
3228         spec->multiout.num_dacs = 0;  /* no analog */
3229         spec->multiout.max_channels = 2;
3230         spec->multiout.dig_out_nid = cvt_nid;
3231         spec->num_cvts = 1;
3232         spec->num_pins = 1;
3233         per_pin = snd_array_new(&spec->pins);
3234         per_cvt = snd_array_new(&spec->cvts);
3235         if (!per_pin || !per_cvt) {
3236                 simple_playback_free(codec);
3237                 return -ENOMEM;
3238         }
3239         per_cvt->cvt_nid = cvt_nid;
3240         per_pin->pin_nid = pin_nid;
3241         spec->pcm_playback = simple_pcm_playback;
3242
3243         codec->patch_ops = simple_hdmi_patch_ops;
3244
3245         return 0;
3246 }
3247
3248 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3249                                                     int channels)
3250 {
3251         unsigned int chanmask;
3252         int chan = channels ? (channels - 1) : 1;
3253
3254         switch (channels) {
3255         default:
3256         case 0:
3257         case 2:
3258                 chanmask = 0x00;
3259                 break;
3260         case 4:
3261                 chanmask = 0x08;
3262                 break;
3263         case 6:
3264                 chanmask = 0x0b;
3265                 break;
3266         case 8:
3267                 chanmask = 0x13;
3268                 break;
3269         }
3270
3271         /* Set the audio infoframe channel allocation and checksum fields.  The
3272          * channel count is computed implicitly by the hardware. */
3273         snd_hda_codec_write(codec, 0x1, 0,
3274                         Nv_VERB_SET_Channel_Allocation, chanmask);
3275
3276         snd_hda_codec_write(codec, 0x1, 0,
3277                         Nv_VERB_SET_Info_Frame_Checksum,
3278                         (0x71 - chan - chanmask));
3279 }
3280
3281 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3282                                    struct hda_codec *codec,
3283                                    struct snd_pcm_substream *substream)
3284 {
3285         struct hdmi_spec *spec = codec->spec;
3286         int i;
3287
3288         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3289                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3290         for (i = 0; i < 4; i++) {
3291                 /* set the stream id */
3292                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3293                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3294                 /* set the stream format */
3295                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3296                                 AC_VERB_SET_STREAM_FORMAT, 0);
3297         }
3298
3299         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3300          * streams are disabled. */
3301         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3302
3303         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3304 }
3305
3306 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3307                                      struct hda_codec *codec,
3308                                      unsigned int stream_tag,
3309                                      unsigned int format,
3310                                      struct snd_pcm_substream *substream)
3311 {
3312         int chs;
3313         unsigned int dataDCC2, channel_id;
3314         int i;
3315         struct hdmi_spec *spec = codec->spec;
3316         struct hda_spdif_out *spdif;
3317         struct hdmi_spec_per_cvt *per_cvt;
3318
3319         mutex_lock(&codec->spdif_mutex);
3320         per_cvt = get_cvt(spec, 0);
3321         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3322
3323         chs = substream->runtime->channels;
3324
3325         dataDCC2 = 0x2;
3326
3327         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3328         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3329                 snd_hda_codec_write(codec,
3330                                 nvhdmi_master_con_nid_7x,
3331                                 0,
3332                                 AC_VERB_SET_DIGI_CONVERT_1,
3333                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3334
3335         /* set the stream id */
3336         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3337                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3338
3339         /* set the stream format */
3340         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3341                         AC_VERB_SET_STREAM_FORMAT, format);
3342
3343         /* turn on again (if needed) */
3344         /* enable and set the channel status audio/data flag */
3345         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3346                 snd_hda_codec_write(codec,
3347                                 nvhdmi_master_con_nid_7x,
3348                                 0,
3349                                 AC_VERB_SET_DIGI_CONVERT_1,
3350                                 spdif->ctls & 0xff);
3351                 snd_hda_codec_write(codec,
3352                                 nvhdmi_master_con_nid_7x,
3353                                 0,
3354                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3355         }
3356
3357         for (i = 0; i < 4; i++) {
3358                 if (chs == 2)
3359                         channel_id = 0;
3360                 else
3361                         channel_id = i * 2;
3362
3363                 /* turn off SPDIF once;
3364                  *otherwise the IEC958 bits won't be updated
3365                  */
3366                 if (codec->spdif_status_reset &&
3367                 (spdif->ctls & AC_DIG1_ENABLE))
3368                         snd_hda_codec_write(codec,
3369                                 nvhdmi_con_nids_7x[i],
3370                                 0,
3371                                 AC_VERB_SET_DIGI_CONVERT_1,
3372                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3373                 /* set the stream id */
3374                 snd_hda_codec_write(codec,
3375                                 nvhdmi_con_nids_7x[i],
3376                                 0,
3377                                 AC_VERB_SET_CHANNEL_STREAMID,
3378                                 (stream_tag << 4) | channel_id);
3379                 /* set the stream format */
3380                 snd_hda_codec_write(codec,
3381                                 nvhdmi_con_nids_7x[i],
3382                                 0,
3383                                 AC_VERB_SET_STREAM_FORMAT,
3384                                 format);
3385                 /* turn on again (if needed) */
3386                 /* enable and set the channel status audio/data flag */
3387                 if (codec->spdif_status_reset &&
3388                 (spdif->ctls & AC_DIG1_ENABLE)) {
3389                         snd_hda_codec_write(codec,
3390                                         nvhdmi_con_nids_7x[i],
3391                                         0,
3392                                         AC_VERB_SET_DIGI_CONVERT_1,
3393                                         spdif->ctls & 0xff);
3394                         snd_hda_codec_write(codec,
3395                                         nvhdmi_con_nids_7x[i],
3396                                         0,
3397                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3398                 }
3399         }
3400
3401         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3402
3403         mutex_unlock(&codec->spdif_mutex);
3404         return 0;
3405 }
3406
3407 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3408         .substreams = 1,
3409         .channels_min = 2,
3410         .channels_max = 8,
3411         .nid = nvhdmi_master_con_nid_7x,
3412         .rates = SUPPORTED_RATES,
3413         .maxbps = SUPPORTED_MAXBPS,
3414         .formats = SUPPORTED_FORMATS,
3415         .ops = {
3416                 .open = simple_playback_pcm_open,
3417                 .close = nvhdmi_8ch_7x_pcm_close,
3418                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3419         },
3420 };
3421
3422 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3423 {
3424         struct hdmi_spec *spec;
3425         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3426                                     nvhdmi_master_pin_nid_7x);
3427         if (err < 0)
3428                 return err;
3429
3430         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3431         /* override the PCM rates, etc, as the codec doesn't give full list */
3432         spec = codec->spec;
3433         spec->pcm_playback.rates = SUPPORTED_RATES;
3434         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3435         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3436         return 0;
3437 }
3438
3439 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3440 {
3441         struct hdmi_spec *spec = codec->spec;
3442         int err = simple_playback_build_pcms(codec);
3443         if (!err) {
3444                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3445                 info->own_chmap = true;
3446         }
3447         return err;
3448 }
3449
3450 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3451 {
3452         struct hdmi_spec *spec = codec->spec;
3453         struct hda_pcm *info;
3454         struct snd_pcm_chmap *chmap;
3455         int err;
3456
3457         err = simple_playback_build_controls(codec);
3458         if (err < 0)
3459                 return err;
3460
3461         /* add channel maps */
3462         info = get_pcm_rec(spec, 0);
3463         err = snd_pcm_add_chmap_ctls(info->pcm,
3464                                      SNDRV_PCM_STREAM_PLAYBACK,
3465                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3466         if (err < 0)
3467                 return err;
3468         switch (codec->preset->vendor_id) {
3469         case 0x10de0002:
3470         case 0x10de0003:
3471         case 0x10de0005:
3472         case 0x10de0006:
3473                 chmap->channel_mask = (1U << 2) | (1U << 8);
3474                 break;
3475         case 0x10de0007:
3476                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3477         }
3478         return 0;
3479 }
3480
3481 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3482 {
3483         struct hdmi_spec *spec;
3484         int err = patch_nvhdmi_2ch(codec);
3485         if (err < 0)
3486                 return err;
3487         spec = codec->spec;
3488         spec->multiout.max_channels = 8;
3489         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3490         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3491         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3492         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3493
3494         /* Initialize the audio infoframe channel mask and checksum to something
3495          * valid */
3496         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3497
3498         return 0;
3499 }
3500
3501 /*
3502  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3503  * - 0x10de0015
3504  * - 0x10de0040
3505  */
3506 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3507                                                     int channels)
3508 {
3509         if (cap->ca_index == 0x00 && channels == 2)
3510                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3511
3512         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3513 }
3514
3515 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3516 {
3517         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3518                 return -EINVAL;
3519
3520         return 0;
3521 }
3522
3523 static int patch_nvhdmi(struct hda_codec *codec)
3524 {
3525         struct hdmi_spec *spec;
3526         int err;
3527
3528         err = patch_generic_hdmi(codec);
3529         if (err)
3530                 return err;
3531
3532         spec = codec->spec;
3533         spec->dyn_pin_out = true;
3534
3535         spec->ops.chmap_cea_alloc_validate_get_type =
3536                 nvhdmi_chmap_cea_alloc_validate_get_type;
3537         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3538
3539         return 0;
3540 }
3541
3542 /*
3543  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3544  * accessed using vendor-defined verbs. These registers can be used for
3545  * interoperability between the HDA and HDMI drivers.
3546  */
3547
3548 /* Audio Function Group node */
3549 #define NVIDIA_AFG_NID 0x01
3550
3551 /*
3552  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3553  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3554  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3555  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3556  * additional bit (at position 30) to signal the validity of the format.
3557  *
3558  * | 31      | 30    | 29  16 | 15   0 |
3559  * +---------+-------+--------+--------+
3560  * | TRIGGER | VALID | UNUSED | FORMAT |
3561  * +-----------------------------------|
3562  *
3563  * Note that for the trigger bit to take effect it needs to change value
3564  * (i.e. it needs to be toggled).
3565  */
3566 #define NVIDIA_GET_SCRATCH0             0xfa6
3567 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3568 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3569 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3570 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3571 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3572 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3573
3574 #define NVIDIA_GET_SCRATCH1             0xfab
3575 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3576 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3577 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3578 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3579
3580 /*
3581  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3582  * the format is invalidated so that the HDMI codec can be disabled.
3583  */
3584 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3585 {
3586         unsigned int value;
3587
3588         /* bits [31:30] contain the trigger and valid bits */
3589         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3590                                    NVIDIA_GET_SCRATCH0, 0);
3591         value = (value >> 24) & 0xff;
3592
3593         /* bits [15:0] are used to store the HDA format */
3594         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3595                             NVIDIA_SET_SCRATCH0_BYTE0,
3596                             (format >> 0) & 0xff);
3597         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3598                             NVIDIA_SET_SCRATCH0_BYTE1,
3599                             (format >> 8) & 0xff);
3600
3601         /* bits [16:24] are unused */
3602         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3603                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3604
3605         /*
3606          * Bit 30 signals that the data is valid and hence that HDMI audio can
3607          * be enabled.
3608          */
3609         if (format == 0)
3610                 value &= ~NVIDIA_SCRATCH_VALID;
3611         else
3612                 value |= NVIDIA_SCRATCH_VALID;
3613
3614         /*
3615          * Whenever the trigger bit is toggled, an interrupt is raised in the
3616          * HDMI codec. The HDMI driver will use that as trigger to update its
3617          * configuration.
3618          */
3619         value ^= NVIDIA_SCRATCH_TRIGGER;
3620
3621         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3622                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3623 }
3624
3625 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3626                                   struct hda_codec *codec,
3627                                   unsigned int stream_tag,
3628                                   unsigned int format,
3629                                   struct snd_pcm_substream *substream)
3630 {
3631         int err;
3632
3633         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3634                                                 format, substream);
3635         if (err < 0)
3636                 return err;
3637
3638         /* notify the HDMI codec of the format change */
3639         tegra_hdmi_set_format(codec, format);
3640
3641         return 0;
3642 }
3643
3644 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3645                                   struct hda_codec *codec,
3646                                   struct snd_pcm_substream *substream)
3647 {
3648         /* invalidate the format in the HDMI codec */
3649         tegra_hdmi_set_format(codec, 0);
3650
3651         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3652 }
3653
3654 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3655 {
3656         struct hdmi_spec *spec = codec->spec;
3657         unsigned int i;
3658
3659         for (i = 0; i < spec->num_pins; i++) {
3660                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3661
3662                 if (pcm->pcm_type == type)
3663                         return pcm;
3664         }
3665
3666         return NULL;
3667 }
3668
3669 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3670 {
3671         struct hda_pcm_stream *stream;
3672         struct hda_pcm *pcm;
3673         int err;
3674
3675         err = generic_hdmi_build_pcms(codec);
3676         if (err < 0)
3677                 return err;
3678
3679         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3680         if (!pcm)
3681                 return -ENODEV;
3682
3683         /*
3684          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3685          * codec about format changes.
3686          */
3687         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3688         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3689         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3690
3691         return 0;
3692 }
3693
3694 static int patch_tegra_hdmi(struct hda_codec *codec)
3695 {
3696         int err;
3697
3698         err = patch_generic_hdmi(codec);
3699         if (err)
3700                 return err;
3701
3702         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3703
3704         return 0;
3705 }
3706
3707 /*
3708  * ATI/AMD-specific implementations
3709  */
3710
3711 #define is_amdhdmi_rev3_or_later(codec) \
3712         ((codec)->core.vendor_id == 0x1002aa01 && \
3713          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3714 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3715
3716 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3717 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3718 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3719 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3720 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3721 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3722 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3723 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3724 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3725 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3726 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3727 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3728 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3729 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3730 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3731 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3732 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3733 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3734 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3735 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3736 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3737 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3738 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3739 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3740 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3741
3742 /* AMD specific HDA cvt verbs */
3743 #define ATI_VERB_SET_RAMP_RATE          0x770
3744 #define ATI_VERB_GET_RAMP_RATE          0xf70
3745
3746 #define ATI_OUT_ENABLE 0x1
3747
3748 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3749 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3750
3751 #define ATI_HBR_CAPABLE 0x01
3752 #define ATI_HBR_ENABLE 0x10
3753
3754 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3755                            unsigned char *buf, int *eld_size)
3756 {
3757         /* call hda_eld.c ATI/AMD-specific function */
3758         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3759                                     is_amdhdmi_rev3_or_later(codec));
3760 }
3761
3762 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3763                                         int active_channels, int conn_type)
3764 {
3765         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3766 }
3767
3768 static int atihdmi_paired_swap_fc_lfe(int pos)
3769 {
3770         /*
3771          * ATI/AMD have automatic FC/LFE swap built-in
3772          * when in pairwise mapping mode.
3773          */
3774
3775         switch (pos) {
3776                 /* see channel_allocations[].speakers[] */
3777                 case 2: return 3;
3778                 case 3: return 2;
3779                 default: break;
3780         }
3781
3782         return pos;
3783 }
3784
3785 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3786 {
3787         struct cea_channel_speaker_allocation *cap;
3788         int i, j;
3789
3790         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3791
3792         cap = &channel_allocations[get_channel_allocation_order(ca)];
3793         for (i = 0; i < chs; ++i) {
3794                 int mask = to_spk_mask(map[i]);
3795                 bool ok = false;
3796                 bool companion_ok = false;
3797
3798                 if (!mask)
3799                         continue;
3800
3801                 for (j = 0 + i % 2; j < 8; j += 2) {
3802                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3803                         if (cap->speakers[chan_idx] == mask) {
3804                                 /* channel is in a supported position */
3805                                 ok = true;
3806
3807                                 if (i % 2 == 0 && i + 1 < chs) {
3808                                         /* even channel, check the odd companion */
3809                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3810                                         int comp_mask_req = to_spk_mask(map[i+1]);
3811                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3812
3813                                         if (comp_mask_req == comp_mask_act)
3814                                                 companion_ok = true;
3815                                         else
3816                                                 return -EINVAL;
3817                                 }
3818                                 break;
3819                         }
3820                 }
3821
3822                 if (!ok)
3823                         return -EINVAL;
3824
3825                 if (companion_ok)
3826                         i++; /* companion channel already checked */
3827         }
3828
3829         return 0;
3830 }
3831
3832 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3833                                         int hdmi_slot, int stream_channel)
3834 {
3835         int verb;
3836         int ati_channel_setup = 0;
3837
3838         if (hdmi_slot > 7)
3839                 return -EINVAL;
3840
3841         if (!has_amd_full_remap_support(codec)) {
3842                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3843
3844                 /* In case this is an odd slot but without stream channel, do not
3845                  * disable the slot since the corresponding even slot could have a
3846                  * channel. In case neither have a channel, the slot pair will be
3847                  * disabled when this function is called for the even slot. */
3848                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3849                         return 0;
3850
3851                 hdmi_slot -= hdmi_slot % 2;
3852
3853                 if (stream_channel != 0xf)
3854                         stream_channel -= stream_channel % 2;
3855         }
3856
3857         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3858
3859         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3860
3861         if (stream_channel != 0xf)
3862                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3863
3864         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3865 }
3866
3867 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3868                                         int asp_slot)
3869 {
3870         bool was_odd = false;
3871         int ati_asp_slot = asp_slot;
3872         int verb;
3873         int ati_channel_setup;
3874
3875         if (asp_slot > 7)
3876                 return -EINVAL;
3877
3878         if (!has_amd_full_remap_support(codec)) {
3879                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3880                 if (ati_asp_slot % 2 != 0) {
3881                         ati_asp_slot -= 1;
3882                         was_odd = true;
3883                 }
3884         }
3885
3886         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3887
3888         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3889
3890         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3891                 return 0xf;
3892
3893         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3894 }
3895
3896 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3897                                                             int channels)
3898 {
3899         int c;
3900
3901         /*
3902          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3903          * we need to take that into account (a single channel may take 2
3904          * channel slots if we need to carry a silent channel next to it).
3905          * On Rev3+ AMD codecs this function is not used.
3906          */
3907         int chanpairs = 0;
3908
3909         /* We only produce even-numbered channel count TLVs */
3910         if ((channels % 2) != 0)
3911                 return -1;
3912
3913         for (c = 0; c < 7; c += 2) {
3914                 if (cap->speakers[c] || cap->speakers[c+1])
3915                         chanpairs++;
3916         }
3917
3918         if (chanpairs * 2 != channels)
3919                 return -1;
3920
3921         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3922 }
3923
3924 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3925                                                   unsigned int *chmap, int channels)
3926 {
3927         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3928         int count = 0;
3929         int c;
3930
3931         for (c = 7; c >= 0; c--) {
3932                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3933                 int spk = cap->speakers[chan];
3934                 if (!spk) {
3935                         /* add N/A channel if the companion channel is occupied */
3936                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3937                                 chmap[count++] = SNDRV_CHMAP_NA;
3938
3939                         continue;
3940                 }
3941
3942                 chmap[count++] = spk_to_chmap(spk);
3943         }
3944
3945         WARN_ON(count != channels);
3946 }
3947
3948 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3949                                  bool hbr)
3950 {
3951         int hbr_ctl, hbr_ctl_new;
3952
3953         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3954         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3955                 if (hbr)
3956                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3957                 else
3958                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3959
3960                 codec_dbg(codec,
3961                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3962                                 pin_nid,
3963                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3964                                 hbr_ctl_new);
3965
3966                 if (hbr_ctl != hbr_ctl_new)
3967                         snd_hda_codec_write(codec, pin_nid, 0,
3968                                                 ATI_VERB_SET_HBR_CONTROL,
3969                                                 hbr_ctl_new);
3970
3971         } else if (hbr)
3972                 return -EINVAL;
3973
3974         return 0;
3975 }
3976
3977 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3978                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3979 {
3980
3981         if (is_amdhdmi_rev3_or_later(codec)) {
3982                 int ramp_rate = 180; /* default as per AMD spec */
3983                 /* disable ramp-up/down for non-pcm as per AMD spec */
3984                 if (format & AC_FMT_TYPE_NON_PCM)
3985                         ramp_rate = 0;
3986
3987                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3988         }
3989
3990         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3991 }
3992
3993
3994 static int atihdmi_init(struct hda_codec *codec)
3995 {
3996         struct hdmi_spec *spec = codec->spec;
3997         int pin_idx, err;
3998
3999         err = generic_hdmi_init(codec);
4000
4001         if (err)
4002                 return err;
4003
4004         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4005                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4006
4007                 /* make sure downmix information in infoframe is zero */
4008                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4009
4010                 /* enable channel-wise remap mode if supported */
4011                 if (has_amd_full_remap_support(codec))
4012                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4013                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4014                                             ATI_MULTICHANNEL_MODE_SINGLE);
4015         }
4016
4017         return 0;
4018 }
4019
4020 static int patch_atihdmi(struct hda_codec *codec)
4021 {
4022         struct hdmi_spec *spec;
4023         struct hdmi_spec_per_cvt *per_cvt;
4024         int err, cvt_idx;
4025
4026         err = patch_generic_hdmi(codec);
4027
4028         if (err)
4029                 return err;
4030
4031         codec->patch_ops.init = atihdmi_init;
4032
4033         spec = codec->spec;
4034
4035         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4036         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4037         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4038         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4039         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4040         spec->ops.setup_stream = atihdmi_setup_stream;
4041
4042         if (!has_amd_full_remap_support(codec)) {
4043                 /* override to ATI/AMD-specific versions with pairwise mapping */
4044                 spec->ops.chmap_cea_alloc_validate_get_type =
4045                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4046                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
4047                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
4048         }
4049
4050         /* ATI/AMD converters do not advertise all of their capabilities */
4051         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4052                 per_cvt = get_cvt(spec, cvt_idx);
4053                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4054                 per_cvt->rates |= SUPPORTED_RATES;
4055                 per_cvt->formats |= SUPPORTED_FORMATS;
4056                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4057         }
4058
4059         spec->channels_max = max(spec->channels_max, 8u);
4060
4061         return 0;
4062 }
4063
4064 /* VIA HDMI Implementation */
4065 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4066 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4067
4068 static int patch_via_hdmi(struct hda_codec *codec)
4069 {
4070         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4071 }
4072
4073 /*
4074  * patch entries
4075  */
4076 static const struct hda_device_id snd_hda_id_hdmi[] = {
4077 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4078 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4079 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4080 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4081 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4082 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4083 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4084 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4085 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4086 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4087 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4088 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4089 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4090 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4091 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4092 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4093 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4094 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4095 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4096 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4097 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4098 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4099 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4100 /* 17 is known to be absent */
4101 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4102 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4103 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4104 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4105 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4106 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4107 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4108 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4109 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4110 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4111 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4112 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4113 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4114 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4115 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4116 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4117 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4118 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4119 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4120 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4121 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4122 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4123 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4124 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4125 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4126 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4127 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4128 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
4129 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4130 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4131 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4132 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
4133 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
4134 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
4135 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
4136 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
4137 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
4138 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
4139 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
4140 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4141 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
4142 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
4143 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4144 /* special ID for generic HDMI */
4145 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4146 {} /* terminator */
4147 };
4148 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4149
4150 MODULE_LICENSE("GPL");
4151 MODULE_DESCRIPTION("HDMI HD-audio codec");
4152 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4153 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4154 MODULE_ALIAS("snd-hda-codec-atihdmi");
4155
4156 static struct hda_codec_driver hdmi_driver = {
4157         .id = snd_hda_id_hdmi,
4158 };
4159
4160 module_hda_codec_driver(hdmi_driver);