Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[cascardo/linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
10  *
11  *  Authors:
12  *                      Wu Fengguang <wfg@linux.intel.com>
13  *
14  *  Maintained by:
15  *                      Wu Fengguang <wfg@linux.intel.com>
16  *
17  *  This program is free software; you can redistribute it and/or modify it
18  *  under the terms of the GNU General Public License as published by the Free
19  *  Software Foundation; either version 2 of the License, or (at your option)
20  *  any later version.
21  *
22  *  This program is distributed in the hope that it will be useful, but
23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
25  *  for more details.
26  *
27  *  You should have received a copy of the GNU General Public License
28  *  along with this program; if not, write to the Free Software Foundation,
29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
30  */
31
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
42 #include "hda_jack.h"
43
44 static bool static_hdmi_pcm;
45 module_param(static_hdmi_pcm, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47
48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
51
52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
53 #define is_cherryview(codec) ((codec)->vendor_id == 0x80862883)
54 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
55
56 struct hdmi_spec_per_cvt {
57         hda_nid_t cvt_nid;
58         int assigned;
59         unsigned int channels_min;
60         unsigned int channels_max;
61         u32 rates;
62         u64 formats;
63         unsigned int maxbps;
64 };
65
66 /* max. connections to a widget */
67 #define HDA_MAX_CONNECTIONS     32
68
69 struct hdmi_spec_per_pin {
70         hda_nid_t pin_nid;
71         int num_mux_nids;
72         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
73         int mux_idx;
74         hda_nid_t cvt_nid;
75
76         struct hda_codec *codec;
77         struct hdmi_eld sink_eld;
78         struct mutex lock;
79         struct delayed_work work;
80         struct snd_kcontrol *eld_ctl;
81         int repoll_count;
82         bool setup; /* the stream has been set up by prepare callback */
83         int channels; /* current number of channels */
84         bool non_pcm;
85         bool chmap_set;         /* channel-map override by ALSA API? */
86         unsigned char chmap[8]; /* ALSA API channel-map */
87         char pcm_name[8];       /* filled in build_pcm callbacks */
88 #ifdef CONFIG_PROC_FS
89         struct snd_info_entry *proc_entry;
90 #endif
91 };
92
93 struct cea_channel_speaker_allocation;
94
95 /* operations used by generic code that can be overridden by patches */
96 struct hdmi_ops {
97         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
98                            unsigned char *buf, int *eld_size);
99
100         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
101         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
102                                     int asp_slot);
103         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
104                                     int asp_slot, int channel);
105
106         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
107                                     int ca, int active_channels, int conn_type);
108
109         /* enable/disable HBR (HD passthrough) */
110         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
111
112         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
113                             hda_nid_t pin_nid, u32 stream_tag, int format);
114
115         /* Helpers for producing the channel map TLVs. These can be overridden
116          * for devices that have non-standard mapping requirements. */
117         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
118                                                  int channels);
119         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
120                                        unsigned int *chmap, int channels);
121
122         /* check that the user-given chmap is supported */
123         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
124 };
125
126 struct hdmi_spec {
127         int num_cvts;
128         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
129         hda_nid_t cvt_nids[4]; /* only for haswell fix */
130
131         int num_pins;
132         struct snd_array pins; /* struct hdmi_spec_per_pin */
133         struct snd_array pcm_rec; /* struct hda_pcm */
134         unsigned int channels_max; /* max over all cvts */
135
136         struct hdmi_eld temp_eld;
137         struct hdmi_ops ops;
138
139         bool dyn_pin_out;
140
141         /*
142          * Non-generic VIA/NVIDIA specific
143          */
144         struct hda_multi_out multiout;
145         struct hda_pcm_stream pcm_playback;
146 };
147
148
149 struct hdmi_audio_infoframe {
150         u8 type; /* 0x84 */
151         u8 ver;  /* 0x01 */
152         u8 len;  /* 0x0a */
153
154         u8 checksum;
155
156         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
157         u8 SS01_SF24;
158         u8 CXT04;
159         u8 CA;
160         u8 LFEPBL01_LSV36_DM_INH7;
161 };
162
163 struct dp_audio_infoframe {
164         u8 type; /* 0x84 */
165         u8 len;  /* 0x1b */
166         u8 ver;  /* 0x11 << 2 */
167
168         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
169         u8 SS01_SF24;
170         u8 CXT04;
171         u8 CA;
172         u8 LFEPBL01_LSV36_DM_INH7;
173 };
174
175 union audio_infoframe {
176         struct hdmi_audio_infoframe hdmi;
177         struct dp_audio_infoframe dp;
178         u8 bytes[0];
179 };
180
181 /*
182  * CEA speaker placement:
183  *
184  *        FLH       FCH        FRH
185  *  FLW    FL  FLC   FC   FRC   FR   FRW
186  *
187  *                                  LFE
188  *                     TC
189  *
190  *          RL  RLC   RC   RRC   RR
191  *
192  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
193  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
194  */
195 enum cea_speaker_placement {
196         FL  = (1 <<  0),        /* Front Left           */
197         FC  = (1 <<  1),        /* Front Center         */
198         FR  = (1 <<  2),        /* Front Right          */
199         FLC = (1 <<  3),        /* Front Left Center    */
200         FRC = (1 <<  4),        /* Front Right Center   */
201         RL  = (1 <<  5),        /* Rear Left            */
202         RC  = (1 <<  6),        /* Rear Center          */
203         RR  = (1 <<  7),        /* Rear Right           */
204         RLC = (1 <<  8),        /* Rear Left Center     */
205         RRC = (1 <<  9),        /* Rear Right Center    */
206         LFE = (1 << 10),        /* Low Frequency Effect */
207         FLW = (1 << 11),        /* Front Left Wide      */
208         FRW = (1 << 12),        /* Front Right Wide     */
209         FLH = (1 << 13),        /* Front Left High      */
210         FCH = (1 << 14),        /* Front Center High    */
211         FRH = (1 << 15),        /* Front Right High     */
212         TC  = (1 << 16),        /* Top Center           */
213 };
214
215 /*
216  * ELD SA bits in the CEA Speaker Allocation data block
217  */
218 static int eld_speaker_allocation_bits[] = {
219         [0] = FL | FR,
220         [1] = LFE,
221         [2] = FC,
222         [3] = RL | RR,
223         [4] = RC,
224         [5] = FLC | FRC,
225         [6] = RLC | RRC,
226         /* the following are not defined in ELD yet */
227         [7] = FLW | FRW,
228         [8] = FLH | FRH,
229         [9] = TC,
230         [10] = FCH,
231 };
232
233 struct cea_channel_speaker_allocation {
234         int ca_index;
235         int speakers[8];
236
237         /* derived values, just for convenience */
238         int channels;
239         int spk_mask;
240 };
241
242 /*
243  * ALSA sequence is:
244  *
245  *       surround40   surround41   surround50   surround51   surround71
246  * ch0   front left   =            =            =            =
247  * ch1   front right  =            =            =            =
248  * ch2   rear left    =            =            =            =
249  * ch3   rear right   =            =            =            =
250  * ch4                LFE          center       center       center
251  * ch5                                          LFE          LFE
252  * ch6                                                       side left
253  * ch7                                                       side right
254  *
255  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
256  */
257 static int hdmi_channel_mapping[0x32][8] = {
258         /* stereo */
259         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
260         /* 2.1 */
261         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
262         /* Dolby Surround */
263         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
264         /* surround40 */
265         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
266         /* 4ch */
267         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
268         /* surround41 */
269         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
270         /* surround50 */
271         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
272         /* surround51 */
273         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
274         /* 7.1 */
275         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
276 };
277
278 /*
279  * This is an ordered list!
280  *
281  * The preceding ones have better chances to be selected by
282  * hdmi_channel_allocation().
283  */
284 static struct cea_channel_speaker_allocation channel_allocations[] = {
285 /*                        channel:   7     6    5    4    3     2    1    0  */
286 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
287                                  /* 2.1 */
288 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
289                                  /* Dolby Surround */
290 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
291                                  /* surround40 */
292 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
293                                  /* surround41 */
294 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
295                                  /* surround50 */
296 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
297                                  /* surround51 */
298 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
299                                  /* 6.1 */
300 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
301                                  /* surround71 */
302 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
303
304 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
305 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
306 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
307 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
308 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
309 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
310 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
311 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
312 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
313 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
314 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
315 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
316 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
317 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
318 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
319 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
320 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
321 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
322 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
323 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
324 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
325 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
326 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
327 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
328 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
329 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
330 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
331 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
332 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
333 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
334 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
335 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
336 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
337 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
338 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
339 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
340 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
341 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
342 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
343 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
344 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
345 };
346
347
348 /*
349  * HDMI routines
350  */
351
352 #define get_pin(spec, idx) \
353         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
354 #define get_cvt(spec, idx) \
355         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
356 #define get_pcm_rec(spec, idx) \
357         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
358
359 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
360 {
361         struct hdmi_spec *spec = codec->spec;
362         int pin_idx;
363
364         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
365                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
366                         return pin_idx;
367
368         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
369         return -EINVAL;
370 }
371
372 static int hinfo_to_pin_index(struct hda_codec *codec,
373                               struct hda_pcm_stream *hinfo)
374 {
375         struct hdmi_spec *spec = codec->spec;
376         int pin_idx;
377
378         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
379                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
380                         return pin_idx;
381
382         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
383         return -EINVAL;
384 }
385
386 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
387 {
388         struct hdmi_spec *spec = codec->spec;
389         int cvt_idx;
390
391         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
392                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
393                         return cvt_idx;
394
395         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
396         return -EINVAL;
397 }
398
399 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
400                         struct snd_ctl_elem_info *uinfo)
401 {
402         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
403         struct hdmi_spec *spec = codec->spec;
404         struct hdmi_spec_per_pin *per_pin;
405         struct hdmi_eld *eld;
406         int pin_idx;
407
408         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
409
410         pin_idx = kcontrol->private_value;
411         per_pin = get_pin(spec, pin_idx);
412         eld = &per_pin->sink_eld;
413
414         mutex_lock(&per_pin->lock);
415         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
416         mutex_unlock(&per_pin->lock);
417
418         return 0;
419 }
420
421 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
422                         struct snd_ctl_elem_value *ucontrol)
423 {
424         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
425         struct hdmi_spec *spec = codec->spec;
426         struct hdmi_spec_per_pin *per_pin;
427         struct hdmi_eld *eld;
428         int pin_idx;
429
430         pin_idx = kcontrol->private_value;
431         per_pin = get_pin(spec, pin_idx);
432         eld = &per_pin->sink_eld;
433
434         mutex_lock(&per_pin->lock);
435         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
436                 mutex_unlock(&per_pin->lock);
437                 snd_BUG();
438                 return -EINVAL;
439         }
440
441         memset(ucontrol->value.bytes.data, 0,
442                ARRAY_SIZE(ucontrol->value.bytes.data));
443         if (eld->eld_valid)
444                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
445                        eld->eld_size);
446         mutex_unlock(&per_pin->lock);
447
448         return 0;
449 }
450
451 static struct snd_kcontrol_new eld_bytes_ctl = {
452         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
453         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
454         .name = "ELD",
455         .info = hdmi_eld_ctl_info,
456         .get = hdmi_eld_ctl_get,
457 };
458
459 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
460                         int device)
461 {
462         struct snd_kcontrol *kctl;
463         struct hdmi_spec *spec = codec->spec;
464         int err;
465
466         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
467         if (!kctl)
468                 return -ENOMEM;
469         kctl->private_value = pin_idx;
470         kctl->id.device = device;
471
472         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
473         if (err < 0)
474                 return err;
475
476         get_pin(spec, pin_idx)->eld_ctl = kctl;
477         return 0;
478 }
479
480 #ifdef BE_PARANOID
481 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
482                                 int *packet_index, int *byte_index)
483 {
484         int val;
485
486         val = snd_hda_codec_read(codec, pin_nid, 0,
487                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
488
489         *packet_index = val >> 5;
490         *byte_index = val & 0x1f;
491 }
492 #endif
493
494 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
495                                 int packet_index, int byte_index)
496 {
497         int val;
498
499         val = (packet_index << 5) | (byte_index & 0x1f);
500
501         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
502 }
503
504 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
505                                 unsigned char val)
506 {
507         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
508 }
509
510 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
511 {
512         struct hdmi_spec *spec = codec->spec;
513         int pin_out;
514
515         /* Unmute */
516         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
517                 snd_hda_codec_write(codec, pin_nid, 0,
518                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
519
520         if (spec->dyn_pin_out)
521                 /* Disable pin out until stream is active */
522                 pin_out = 0;
523         else
524                 /* Enable pin out: some machines with GM965 gets broken output
525                  * when the pin is disabled or changed while using with HDMI
526                  */
527                 pin_out = PIN_OUT;
528
529         snd_hda_codec_write(codec, pin_nid, 0,
530                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
531 }
532
533 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
534 {
535         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
536                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
537 }
538
539 static void hdmi_set_channel_count(struct hda_codec *codec,
540                                    hda_nid_t cvt_nid, int chs)
541 {
542         if (chs != hdmi_get_channel_count(codec, cvt_nid))
543                 snd_hda_codec_write(codec, cvt_nid, 0,
544                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
545 }
546
547 /*
548  * ELD proc files
549  */
550
551 #ifdef CONFIG_PROC_FS
552 static void print_eld_info(struct snd_info_entry *entry,
553                            struct snd_info_buffer *buffer)
554 {
555         struct hdmi_spec_per_pin *per_pin = entry->private_data;
556
557         mutex_lock(&per_pin->lock);
558         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
559         mutex_unlock(&per_pin->lock);
560 }
561
562 static void write_eld_info(struct snd_info_entry *entry,
563                            struct snd_info_buffer *buffer)
564 {
565         struct hdmi_spec_per_pin *per_pin = entry->private_data;
566
567         mutex_lock(&per_pin->lock);
568         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
569         mutex_unlock(&per_pin->lock);
570 }
571
572 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
573 {
574         char name[32];
575         struct hda_codec *codec = per_pin->codec;
576         struct snd_info_entry *entry;
577         int err;
578
579         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
580         err = snd_card_proc_new(codec->bus->card, name, &entry);
581         if (err < 0)
582                 return err;
583
584         snd_info_set_text_ops(entry, per_pin, print_eld_info);
585         entry->c.text.write = write_eld_info;
586         entry->mode |= S_IWUSR;
587         per_pin->proc_entry = entry;
588
589         return 0;
590 }
591
592 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
593 {
594         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
595                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
596                 per_pin->proc_entry = NULL;
597         }
598 }
599 #else
600 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
601                                int index)
602 {
603         return 0;
604 }
605 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
606 {
607 }
608 #endif
609
610 /*
611  * Channel mapping routines
612  */
613
614 /*
615  * Compute derived values in channel_allocations[].
616  */
617 static void init_channel_allocations(void)
618 {
619         int i, j;
620         struct cea_channel_speaker_allocation *p;
621
622         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
623                 p = channel_allocations + i;
624                 p->channels = 0;
625                 p->spk_mask = 0;
626                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
627                         if (p->speakers[j]) {
628                                 p->channels++;
629                                 p->spk_mask |= p->speakers[j];
630                         }
631         }
632 }
633
634 static int get_channel_allocation_order(int ca)
635 {
636         int i;
637
638         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
639                 if (channel_allocations[i].ca_index == ca)
640                         break;
641         }
642         return i;
643 }
644
645 /*
646  * The transformation takes two steps:
647  *
648  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
649  *            spk_mask => (channel_allocations[])         => ai->CA
650  *
651  * TODO: it could select the wrong CA from multiple candidates.
652 */
653 static int hdmi_channel_allocation(struct hda_codec *codec,
654                                    struct hdmi_eld *eld, int channels)
655 {
656         int i;
657         int ca = 0;
658         int spk_mask = 0;
659         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
660
661         /*
662          * CA defaults to 0 for basic stereo audio
663          */
664         if (channels <= 2)
665                 return 0;
666
667         /*
668          * expand ELD's speaker allocation mask
669          *
670          * ELD tells the speaker mask in a compact(paired) form,
671          * expand ELD's notions to match the ones used by Audio InfoFrame.
672          */
673         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
674                 if (eld->info.spk_alloc & (1 << i))
675                         spk_mask |= eld_speaker_allocation_bits[i];
676         }
677
678         /* search for the first working match in the CA table */
679         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
680                 if (channels == channel_allocations[i].channels &&
681                     (spk_mask & channel_allocations[i].spk_mask) ==
682                                 channel_allocations[i].spk_mask) {
683                         ca = channel_allocations[i].ca_index;
684                         break;
685                 }
686         }
687
688         if (!ca) {
689                 /* if there was no match, select the regular ALSA channel
690                  * allocation with the matching number of channels */
691                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
692                         if (channels == channel_allocations[i].channels) {
693                                 ca = channel_allocations[i].ca_index;
694                                 break;
695                         }
696                 }
697         }
698
699         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
700         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
701                     ca, channels, buf);
702
703         return ca;
704 }
705
706 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
707                                        hda_nid_t pin_nid)
708 {
709 #ifdef CONFIG_SND_DEBUG_VERBOSE
710         struct hdmi_spec *spec = codec->spec;
711         int i;
712         int channel;
713
714         for (i = 0; i < 8; i++) {
715                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
716                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
717                                                 channel, i);
718         }
719 #endif
720 }
721
722 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
723                                        hda_nid_t pin_nid,
724                                        bool non_pcm,
725                                        int ca)
726 {
727         struct hdmi_spec *spec = codec->spec;
728         struct cea_channel_speaker_allocation *ch_alloc;
729         int i;
730         int err;
731         int order;
732         int non_pcm_mapping[8];
733
734         order = get_channel_allocation_order(ca);
735         ch_alloc = &channel_allocations[order];
736
737         if (hdmi_channel_mapping[ca][1] == 0) {
738                 int hdmi_slot = 0;
739                 /* fill actual channel mappings in ALSA channel (i) order */
740                 for (i = 0; i < ch_alloc->channels; i++) {
741                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
742                                 hdmi_slot++; /* skip zero slots */
743
744                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
745                 }
746                 /* fill the rest of the slots with ALSA channel 0xf */
747                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
748                         if (!ch_alloc->speakers[7 - hdmi_slot])
749                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
750         }
751
752         if (non_pcm) {
753                 for (i = 0; i < ch_alloc->channels; i++)
754                         non_pcm_mapping[i] = (i << 4) | i;
755                 for (; i < 8; i++)
756                         non_pcm_mapping[i] = (0xf << 4) | i;
757         }
758
759         for (i = 0; i < 8; i++) {
760                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
761                 int hdmi_slot = slotsetup & 0x0f;
762                 int channel = (slotsetup & 0xf0) >> 4;
763                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
764                 if (err) {
765                         codec_dbg(codec, "HDMI: channel mapping failed\n");
766                         break;
767                 }
768         }
769 }
770
771 struct channel_map_table {
772         unsigned char map;              /* ALSA API channel map position */
773         int spk_mask;                   /* speaker position bit mask */
774 };
775
776 static struct channel_map_table map_tables[] = {
777         { SNDRV_CHMAP_FL,       FL },
778         { SNDRV_CHMAP_FR,       FR },
779         { SNDRV_CHMAP_RL,       RL },
780         { SNDRV_CHMAP_RR,       RR },
781         { SNDRV_CHMAP_LFE,      LFE },
782         { SNDRV_CHMAP_FC,       FC },
783         { SNDRV_CHMAP_RLC,      RLC },
784         { SNDRV_CHMAP_RRC,      RRC },
785         { SNDRV_CHMAP_RC,       RC },
786         { SNDRV_CHMAP_FLC,      FLC },
787         { SNDRV_CHMAP_FRC,      FRC },
788         { SNDRV_CHMAP_TFL,      FLH },
789         { SNDRV_CHMAP_TFR,      FRH },
790         { SNDRV_CHMAP_FLW,      FLW },
791         { SNDRV_CHMAP_FRW,      FRW },
792         { SNDRV_CHMAP_TC,       TC },
793         { SNDRV_CHMAP_TFC,      FCH },
794         {} /* terminator */
795 };
796
797 /* from ALSA API channel position to speaker bit mask */
798 static int to_spk_mask(unsigned char c)
799 {
800         struct channel_map_table *t = map_tables;
801         for (; t->map; t++) {
802                 if (t->map == c)
803                         return t->spk_mask;
804         }
805         return 0;
806 }
807
808 /* from ALSA API channel position to CEA slot */
809 static int to_cea_slot(int ordered_ca, unsigned char pos)
810 {
811         int mask = to_spk_mask(pos);
812         int i;
813
814         if (mask) {
815                 for (i = 0; i < 8; i++) {
816                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
817                                 return i;
818                 }
819         }
820
821         return -1;
822 }
823
824 /* from speaker bit mask to ALSA API channel position */
825 static int spk_to_chmap(int spk)
826 {
827         struct channel_map_table *t = map_tables;
828         for (; t->map; t++) {
829                 if (t->spk_mask == spk)
830                         return t->map;
831         }
832         return 0;
833 }
834
835 /* from CEA slot to ALSA API channel position */
836 static int from_cea_slot(int ordered_ca, unsigned char slot)
837 {
838         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
839
840         return spk_to_chmap(mask);
841 }
842
843 /* get the CA index corresponding to the given ALSA API channel map */
844 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
845 {
846         int i, spks = 0, spk_mask = 0;
847
848         for (i = 0; i < chs; i++) {
849                 int mask = to_spk_mask(map[i]);
850                 if (mask) {
851                         spk_mask |= mask;
852                         spks++;
853                 }
854         }
855
856         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
857                 if ((chs == channel_allocations[i].channels ||
858                      spks == channel_allocations[i].channels) &&
859                     (spk_mask & channel_allocations[i].spk_mask) ==
860                                 channel_allocations[i].spk_mask)
861                         return channel_allocations[i].ca_index;
862         }
863         return -1;
864 }
865
866 /* set up the channel slots for the given ALSA API channel map */
867 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
868                                              hda_nid_t pin_nid,
869                                              int chs, unsigned char *map,
870                                              int ca)
871 {
872         struct hdmi_spec *spec = codec->spec;
873         int ordered_ca = get_channel_allocation_order(ca);
874         int alsa_pos, hdmi_slot;
875         int assignments[8] = {[0 ... 7] = 0xf};
876
877         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
878
879                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
880
881                 if (hdmi_slot < 0)
882                         continue; /* unassigned channel */
883
884                 assignments[hdmi_slot] = alsa_pos;
885         }
886
887         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
888                 int err;
889
890                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
891                                                      assignments[hdmi_slot]);
892                 if (err)
893                         return -EINVAL;
894         }
895         return 0;
896 }
897
898 /* store ALSA API channel map from the current default map */
899 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
900 {
901         int i;
902         int ordered_ca = get_channel_allocation_order(ca);
903         for (i = 0; i < 8; i++) {
904                 if (i < channel_allocations[ordered_ca].channels)
905                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
906                 else
907                         map[i] = 0;
908         }
909 }
910
911 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
912                                        hda_nid_t pin_nid, bool non_pcm, int ca,
913                                        int channels, unsigned char *map,
914                                        bool chmap_set)
915 {
916         if (!non_pcm && chmap_set) {
917                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
918                                                   channels, map, ca);
919         } else {
920                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
921                 hdmi_setup_fake_chmap(map, ca);
922         }
923
924         hdmi_debug_channel_mapping(codec, pin_nid);
925 }
926
927 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
928                                      int asp_slot, int channel)
929 {
930         return snd_hda_codec_write(codec, pin_nid, 0,
931                                    AC_VERB_SET_HDMI_CHAN_SLOT,
932                                    (channel << 4) | asp_slot);
933 }
934
935 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
936                                      int asp_slot)
937 {
938         return (snd_hda_codec_read(codec, pin_nid, 0,
939                                    AC_VERB_GET_HDMI_CHAN_SLOT,
940                                    asp_slot) & 0xf0) >> 4;
941 }
942
943 /*
944  * Audio InfoFrame routines
945  */
946
947 /*
948  * Enable Audio InfoFrame Transmission
949  */
950 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
951                                        hda_nid_t pin_nid)
952 {
953         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
954         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
955                                                 AC_DIPXMIT_BEST);
956 }
957
958 /*
959  * Disable Audio InfoFrame Transmission
960  */
961 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
962                                       hda_nid_t pin_nid)
963 {
964         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
965         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
966                                                 AC_DIPXMIT_DISABLE);
967 }
968
969 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
970 {
971 #ifdef CONFIG_SND_DEBUG_VERBOSE
972         int i;
973         int size;
974
975         size = snd_hdmi_get_eld_size(codec, pin_nid);
976         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
977
978         for (i = 0; i < 8; i++) {
979                 size = snd_hda_codec_read(codec, pin_nid, 0,
980                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
981                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
982         }
983 #endif
984 }
985
986 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
987 {
988 #ifdef BE_PARANOID
989         int i, j;
990         int size;
991         int pi, bi;
992         for (i = 0; i < 8; i++) {
993                 size = snd_hda_codec_read(codec, pin_nid, 0,
994                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
995                 if (size == 0)
996                         continue;
997
998                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
999                 for (j = 1; j < 1000; j++) {
1000                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1001                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1002                         if (pi != i)
1003                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1004                                                 bi, pi, i);
1005                         if (bi == 0) /* byte index wrapped around */
1006                                 break;
1007                 }
1008                 codec_dbg(codec,
1009                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1010                         i, size, j);
1011         }
1012 #endif
1013 }
1014
1015 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1016 {
1017         u8 *bytes = (u8 *)hdmi_ai;
1018         u8 sum = 0;
1019         int i;
1020
1021         hdmi_ai->checksum = 0;
1022
1023         for (i = 0; i < sizeof(*hdmi_ai); i++)
1024                 sum += bytes[i];
1025
1026         hdmi_ai->checksum = -sum;
1027 }
1028
1029 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1030                                       hda_nid_t pin_nid,
1031                                       u8 *dip, int size)
1032 {
1033         int i;
1034
1035         hdmi_debug_dip_size(codec, pin_nid);
1036         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1037
1038         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1039         for (i = 0; i < size; i++)
1040                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1041 }
1042
1043 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1044                                     u8 *dip, int size)
1045 {
1046         u8 val;
1047         int i;
1048
1049         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1050                                                             != AC_DIPXMIT_BEST)
1051                 return false;
1052
1053         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1054         for (i = 0; i < size; i++) {
1055                 val = snd_hda_codec_read(codec, pin_nid, 0,
1056                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1057                 if (val != dip[i])
1058                         return false;
1059         }
1060
1061         return true;
1062 }
1063
1064 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1065                                      hda_nid_t pin_nid,
1066                                      int ca, int active_channels,
1067                                      int conn_type)
1068 {
1069         union audio_infoframe ai;
1070
1071         memset(&ai, 0, sizeof(ai));
1072         if (conn_type == 0) { /* HDMI */
1073                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1074
1075                 hdmi_ai->type           = 0x84;
1076                 hdmi_ai->ver            = 0x01;
1077                 hdmi_ai->len            = 0x0a;
1078                 hdmi_ai->CC02_CT47      = active_channels - 1;
1079                 hdmi_ai->CA             = ca;
1080                 hdmi_checksum_audio_infoframe(hdmi_ai);
1081         } else if (conn_type == 1) { /* DisplayPort */
1082                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1083
1084                 dp_ai->type             = 0x84;
1085                 dp_ai->len              = 0x1b;
1086                 dp_ai->ver              = 0x11 << 2;
1087                 dp_ai->CC02_CT47        = active_channels - 1;
1088                 dp_ai->CA               = ca;
1089         } else {
1090                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1091                             pin_nid);
1092                 return;
1093         }
1094
1095         /*
1096          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1097          * sizeof(*dp_ai) to avoid partial match/update problems when
1098          * the user switches between HDMI/DP monitors.
1099          */
1100         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1101                                         sizeof(ai))) {
1102                 codec_dbg(codec,
1103                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1104                             pin_nid,
1105                             active_channels, ca);
1106                 hdmi_stop_infoframe_trans(codec, pin_nid);
1107                 hdmi_fill_audio_infoframe(codec, pin_nid,
1108                                             ai.bytes, sizeof(ai));
1109                 hdmi_start_infoframe_trans(codec, pin_nid);
1110         }
1111 }
1112
1113 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1114                                        struct hdmi_spec_per_pin *per_pin,
1115                                        bool non_pcm)
1116 {
1117         struct hdmi_spec *spec = codec->spec;
1118         hda_nid_t pin_nid = per_pin->pin_nid;
1119         int channels = per_pin->channels;
1120         int active_channels;
1121         struct hdmi_eld *eld;
1122         int ca, ordered_ca;
1123
1124         if (!channels)
1125                 return;
1126
1127         if (is_haswell_plus(codec))
1128                 snd_hda_codec_write(codec, pin_nid, 0,
1129                                             AC_VERB_SET_AMP_GAIN_MUTE,
1130                                             AMP_OUT_UNMUTE);
1131
1132         eld = &per_pin->sink_eld;
1133
1134         if (!non_pcm && per_pin->chmap_set)
1135                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1136         else
1137                 ca = hdmi_channel_allocation(codec, eld, channels);
1138         if (ca < 0)
1139                 ca = 0;
1140
1141         ordered_ca = get_channel_allocation_order(ca);
1142         active_channels = channel_allocations[ordered_ca].channels;
1143
1144         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1145
1146         /*
1147          * always configure channel mapping, it may have been changed by the
1148          * user in the meantime
1149          */
1150         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1151                                    channels, per_pin->chmap,
1152                                    per_pin->chmap_set);
1153
1154         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1155                                       eld->info.conn_type);
1156
1157         per_pin->non_pcm = non_pcm;
1158 }
1159
1160 /*
1161  * Unsolicited events
1162  */
1163
1164 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1165
1166 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1167 {
1168         struct hdmi_spec *spec = codec->spec;
1169         int pin_idx = pin_nid_to_pin_index(codec, jack->nid);
1170         if (pin_idx < 0)
1171                 return;
1172
1173         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1174                 snd_hda_jack_report_sync(codec);
1175 }
1176
1177 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1178 {
1179         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1180         struct hda_jack_tbl *jack;
1181         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1182
1183         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1184         if (!jack)
1185                 return;
1186         jack->jack_dirty = 1;
1187
1188         codec_dbg(codec,
1189                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1190                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1191                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1192
1193         jack_callback(codec, jack);
1194 }
1195
1196 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1197 {
1198         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1199         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1200         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1201         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1202
1203         codec_info(codec,
1204                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1205                 codec->addr,
1206                 tag,
1207                 subtag,
1208                 cp_state,
1209                 cp_ready);
1210
1211         /* TODO */
1212         if (cp_state)
1213                 ;
1214         if (cp_ready)
1215                 ;
1216 }
1217
1218
1219 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1220 {
1221         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1222         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1223
1224         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1225                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1226                 return;
1227         }
1228
1229         if (subtag == 0)
1230                 hdmi_intrinsic_event(codec, res);
1231         else
1232                 hdmi_non_intrinsic_event(codec, res);
1233 }
1234
1235 static void haswell_verify_D0(struct hda_codec *codec,
1236                 hda_nid_t cvt_nid, hda_nid_t nid)
1237 {
1238         int pwr;
1239
1240         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1241          * thus pins could only choose converter 0 for use. Make sure the
1242          * converters are in correct power state */
1243         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1244                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1245
1246         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1247                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1248                                     AC_PWRST_D0);
1249                 msleep(40);
1250                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1251                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1252                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1253         }
1254 }
1255
1256 /*
1257  * Callbacks
1258  */
1259
1260 /* HBR should be Non-PCM, 8 channels */
1261 #define is_hbr_format(format) \
1262         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1263
1264 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1265                               bool hbr)
1266 {
1267         int pinctl, new_pinctl;
1268
1269         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1270                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1271                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1272
1273                 if (pinctl < 0)
1274                         return hbr ? -EINVAL : 0;
1275
1276                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1277                 if (hbr)
1278                         new_pinctl |= AC_PINCTL_EPT_HBR;
1279                 else
1280                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1281
1282                 codec_dbg(codec,
1283                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1284                             pin_nid,
1285                             pinctl == new_pinctl ? "" : "new-",
1286                             new_pinctl);
1287
1288                 if (pinctl != new_pinctl)
1289                         snd_hda_codec_write(codec, pin_nid, 0,
1290                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1291                                             new_pinctl);
1292         } else if (hbr)
1293                 return -EINVAL;
1294
1295         return 0;
1296 }
1297
1298 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1299                               hda_nid_t pin_nid, u32 stream_tag, int format)
1300 {
1301         struct hdmi_spec *spec = codec->spec;
1302         int err;
1303
1304         if (is_haswell_plus(codec))
1305                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1306
1307         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1308
1309         if (err) {
1310                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1311                 return err;
1312         }
1313
1314         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1315         return 0;
1316 }
1317
1318 static int hdmi_choose_cvt(struct hda_codec *codec,
1319                         int pin_idx, int *cvt_id, int *mux_id)
1320 {
1321         struct hdmi_spec *spec = codec->spec;
1322         struct hdmi_spec_per_pin *per_pin;
1323         struct hdmi_spec_per_cvt *per_cvt = NULL;
1324         int cvt_idx, mux_idx = 0;
1325
1326         per_pin = get_pin(spec, pin_idx);
1327
1328         /* Dynamically assign converter to stream */
1329         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1330                 per_cvt = get_cvt(spec, cvt_idx);
1331
1332                 /* Must not already be assigned */
1333                 if (per_cvt->assigned)
1334                         continue;
1335                 /* Must be in pin's mux's list of converters */
1336                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1337                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1338                                 break;
1339                 /* Not in mux list */
1340                 if (mux_idx == per_pin->num_mux_nids)
1341                         continue;
1342                 break;
1343         }
1344
1345         /* No free converters */
1346         if (cvt_idx == spec->num_cvts)
1347                 return -ENODEV;
1348
1349         per_pin->mux_idx = mux_idx;
1350
1351         if (cvt_id)
1352                 *cvt_id = cvt_idx;
1353         if (mux_id)
1354                 *mux_id = mux_idx;
1355
1356         return 0;
1357 }
1358
1359 /* Assure the pin select the right convetor */
1360 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1361                         struct hdmi_spec_per_pin *per_pin)
1362 {
1363         hda_nid_t pin_nid = per_pin->pin_nid;
1364         int mux_idx, curr;
1365
1366         mux_idx = per_pin->mux_idx;
1367         curr = snd_hda_codec_read(codec, pin_nid, 0,
1368                                           AC_VERB_GET_CONNECT_SEL, 0);
1369         if (curr != mux_idx)
1370                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1371                                             AC_VERB_SET_CONNECT_SEL,
1372                                             mux_idx);
1373 }
1374
1375 /* Intel HDMI workaround to fix audio routing issue:
1376  * For some Intel display codecs, pins share the same connection list.
1377  * So a conveter can be selected by multiple pins and playback on any of these
1378  * pins will generate sound on the external display, because audio flows from
1379  * the same converter to the display pipeline. Also muting one pin may make
1380  * other pins have no sound output.
1381  * So this function assures that an assigned converter for a pin is not selected
1382  * by any other pins.
1383  */
1384 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1385                         hda_nid_t pin_nid, int mux_idx)
1386 {
1387         struct hdmi_spec *spec = codec->spec;
1388         hda_nid_t nid, end_nid;
1389         int cvt_idx, curr;
1390         struct hdmi_spec_per_cvt *per_cvt;
1391
1392         /* configure all pins, including "no physical connection" ones */
1393         end_nid = codec->start_nid + codec->num_nodes;
1394         for (nid = codec->start_nid; nid < end_nid; nid++) {
1395                 unsigned int wid_caps = get_wcaps(codec, nid);
1396                 unsigned int wid_type = get_wcaps_type(wid_caps);
1397
1398                 if (wid_type != AC_WID_PIN)
1399                         continue;
1400
1401                 if (nid == pin_nid)
1402                         continue;
1403
1404                 curr = snd_hda_codec_read(codec, nid, 0,
1405                                           AC_VERB_GET_CONNECT_SEL, 0);
1406                 if (curr != mux_idx)
1407                         continue;
1408
1409                 /* choose an unassigned converter. The conveters in the
1410                  * connection list are in the same order as in the codec.
1411                  */
1412                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1413                         per_cvt = get_cvt(spec, cvt_idx);
1414                         if (!per_cvt->assigned) {
1415                                 codec_dbg(codec,
1416                                           "choose cvt %d for pin nid %d\n",
1417                                         cvt_idx, nid);
1418                                 snd_hda_codec_write_cache(codec, nid, 0,
1419                                             AC_VERB_SET_CONNECT_SEL,
1420                                             cvt_idx);
1421                                 break;
1422                         }
1423                 }
1424         }
1425 }
1426
1427 /*
1428  * HDA PCM callbacks
1429  */
1430 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1431                          struct hda_codec *codec,
1432                          struct snd_pcm_substream *substream)
1433 {
1434         struct hdmi_spec *spec = codec->spec;
1435         struct snd_pcm_runtime *runtime = substream->runtime;
1436         int pin_idx, cvt_idx, mux_idx = 0;
1437         struct hdmi_spec_per_pin *per_pin;
1438         struct hdmi_eld *eld;
1439         struct hdmi_spec_per_cvt *per_cvt = NULL;
1440         int err;
1441
1442         /* Validate hinfo */
1443         pin_idx = hinfo_to_pin_index(codec, hinfo);
1444         if (snd_BUG_ON(pin_idx < 0))
1445                 return -EINVAL;
1446         per_pin = get_pin(spec, pin_idx);
1447         eld = &per_pin->sink_eld;
1448
1449         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1450         if (err < 0)
1451                 return err;
1452
1453         per_cvt = get_cvt(spec, cvt_idx);
1454         /* Claim converter */
1455         per_cvt->assigned = 1;
1456         per_pin->cvt_nid = per_cvt->cvt_nid;
1457         hinfo->nid = per_cvt->cvt_nid;
1458
1459         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1460                             AC_VERB_SET_CONNECT_SEL,
1461                             mux_idx);
1462
1463         /* configure unused pins to choose other converters */
1464         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1465                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1466
1467         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1468
1469         /* Initially set the converter's capabilities */
1470         hinfo->channels_min = per_cvt->channels_min;
1471         hinfo->channels_max = per_cvt->channels_max;
1472         hinfo->rates = per_cvt->rates;
1473         hinfo->formats = per_cvt->formats;
1474         hinfo->maxbps = per_cvt->maxbps;
1475
1476         /* Restrict capabilities by ELD if this isn't disabled */
1477         if (!static_hdmi_pcm && eld->eld_valid) {
1478                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1479                 if (hinfo->channels_min > hinfo->channels_max ||
1480                     !hinfo->rates || !hinfo->formats) {
1481                         per_cvt->assigned = 0;
1482                         hinfo->nid = 0;
1483                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1484                         return -ENODEV;
1485                 }
1486         }
1487
1488         /* Store the updated parameters */
1489         runtime->hw.channels_min = hinfo->channels_min;
1490         runtime->hw.channels_max = hinfo->channels_max;
1491         runtime->hw.formats = hinfo->formats;
1492         runtime->hw.rates = hinfo->rates;
1493
1494         snd_pcm_hw_constraint_step(substream->runtime, 0,
1495                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1496         return 0;
1497 }
1498
1499 /*
1500  * HDA/HDMI auto parsing
1501  */
1502 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1503 {
1504         struct hdmi_spec *spec = codec->spec;
1505         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1506         hda_nid_t pin_nid = per_pin->pin_nid;
1507
1508         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1509                 codec_warn(codec,
1510                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1511                            pin_nid, get_wcaps(codec, pin_nid));
1512                 return -EINVAL;
1513         }
1514
1515         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1516                                                         per_pin->mux_nids,
1517                                                         HDA_MAX_CONNECTIONS);
1518
1519         return 0;
1520 }
1521
1522 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1523 {
1524         struct hda_jack_tbl *jack;
1525         struct hda_codec *codec = per_pin->codec;
1526         struct hdmi_spec *spec = codec->spec;
1527         struct hdmi_eld *eld = &spec->temp_eld;
1528         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1529         hda_nid_t pin_nid = per_pin->pin_nid;
1530         /*
1531          * Always execute a GetPinSense verb here, even when called from
1532          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1533          * response's PD bit is not the real PD value, but indicates that
1534          * the real PD value changed. An older version of the HD-audio
1535          * specification worked this way. Hence, we just ignore the data in
1536          * the unsolicited response to avoid custom WARs.
1537          */
1538         int present;
1539         bool update_eld = false;
1540         bool eld_changed = false;
1541         bool ret;
1542
1543         snd_hda_power_up(codec);
1544         present = snd_hda_pin_sense(codec, pin_nid);
1545
1546         mutex_lock(&per_pin->lock);
1547         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1548         if (pin_eld->monitor_present)
1549                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1550         else
1551                 eld->eld_valid = false;
1552
1553         codec_dbg(codec,
1554                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1555                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1556
1557         if (eld->eld_valid) {
1558                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1559                                                      &eld->eld_size) < 0)
1560                         eld->eld_valid = false;
1561                 else {
1562                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1563                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1564                                                     eld->eld_size) < 0)
1565                                 eld->eld_valid = false;
1566                 }
1567
1568                 if (eld->eld_valid) {
1569                         snd_hdmi_show_eld(codec, &eld->info);
1570                         update_eld = true;
1571                 }
1572                 else if (repoll) {
1573                         queue_delayed_work(codec->bus->workq,
1574                                            &per_pin->work,
1575                                            msecs_to_jiffies(300));
1576                         goto unlock;
1577                 }
1578         }
1579
1580         if (pin_eld->eld_valid && !eld->eld_valid) {
1581                 update_eld = true;
1582                 eld_changed = true;
1583         }
1584         if (update_eld) {
1585                 bool old_eld_valid = pin_eld->eld_valid;
1586                 pin_eld->eld_valid = eld->eld_valid;
1587                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1588                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1589                                      eld->eld_size) != 0;
1590                 if (eld_changed)
1591                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1592                                eld->eld_size);
1593                 pin_eld->eld_size = eld->eld_size;
1594                 pin_eld->info = eld->info;
1595
1596                 /*
1597                  * Re-setup pin and infoframe. This is needed e.g. when
1598                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1599                  * - transcoder can change during stream playback on Haswell
1600                  *   and this can make HW reset converter selection on a pin.
1601                  */
1602                 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1603                         if (is_haswell_plus(codec) ||
1604                                 is_valleyview_plus(codec)) {
1605                                 intel_verify_pin_cvt_connect(codec, per_pin);
1606                                 intel_not_share_assigned_cvt(codec, pin_nid,
1607                                                         per_pin->mux_idx);
1608                         }
1609
1610                         hdmi_setup_audio_infoframe(codec, per_pin,
1611                                                    per_pin->non_pcm);
1612                 }
1613         }
1614
1615         if (eld_changed)
1616                 snd_ctl_notify(codec->bus->card,
1617                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1618                                &per_pin->eld_ctl->id);
1619  unlock:
1620         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1621
1622         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1623         if (jack)
1624                 jack->block_report = !ret;
1625
1626         mutex_unlock(&per_pin->lock);
1627         snd_hda_power_down(codec);
1628         return ret;
1629 }
1630
1631 static void hdmi_repoll_eld(struct work_struct *work)
1632 {
1633         struct hdmi_spec_per_pin *per_pin =
1634         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1635
1636         if (per_pin->repoll_count++ > 6)
1637                 per_pin->repoll_count = 0;
1638
1639         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1640                 snd_hda_jack_report_sync(per_pin->codec);
1641 }
1642
1643 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1644                                              hda_nid_t nid);
1645
1646 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1647 {
1648         struct hdmi_spec *spec = codec->spec;
1649         unsigned int caps, config;
1650         int pin_idx;
1651         struct hdmi_spec_per_pin *per_pin;
1652         int err;
1653
1654         caps = snd_hda_query_pin_caps(codec, pin_nid);
1655         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1656                 return 0;
1657
1658         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1659         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1660                 return 0;
1661
1662         if (is_haswell_plus(codec))
1663                 intel_haswell_fixup_connect_list(codec, pin_nid);
1664
1665         pin_idx = spec->num_pins;
1666         per_pin = snd_array_new(&spec->pins);
1667         if (!per_pin)
1668                 return -ENOMEM;
1669
1670         per_pin->pin_nid = pin_nid;
1671         per_pin->non_pcm = false;
1672
1673         err = hdmi_read_pin_conn(codec, pin_idx);
1674         if (err < 0)
1675                 return err;
1676
1677         spec->num_pins++;
1678
1679         return 0;
1680 }
1681
1682 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1683 {
1684         struct hdmi_spec *spec = codec->spec;
1685         struct hdmi_spec_per_cvt *per_cvt;
1686         unsigned int chans;
1687         int err;
1688
1689         chans = get_wcaps(codec, cvt_nid);
1690         chans = get_wcaps_channels(chans);
1691
1692         per_cvt = snd_array_new(&spec->cvts);
1693         if (!per_cvt)
1694                 return -ENOMEM;
1695
1696         per_cvt->cvt_nid = cvt_nid;
1697         per_cvt->channels_min = 2;
1698         if (chans <= 16) {
1699                 per_cvt->channels_max = chans;
1700                 if (chans > spec->channels_max)
1701                         spec->channels_max = chans;
1702         }
1703
1704         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1705                                           &per_cvt->rates,
1706                                           &per_cvt->formats,
1707                                           &per_cvt->maxbps);
1708         if (err < 0)
1709                 return err;
1710
1711         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1712                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1713         spec->num_cvts++;
1714
1715         return 0;
1716 }
1717
1718 static int hdmi_parse_codec(struct hda_codec *codec)
1719 {
1720         hda_nid_t nid;
1721         int i, nodes;
1722
1723         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1724         if (!nid || nodes < 0) {
1725                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1726                 return -EINVAL;
1727         }
1728
1729         for (i = 0; i < nodes; i++, nid++) {
1730                 unsigned int caps;
1731                 unsigned int type;
1732
1733                 caps = get_wcaps(codec, nid);
1734                 type = get_wcaps_type(caps);
1735
1736                 if (!(caps & AC_WCAP_DIGITAL))
1737                         continue;
1738
1739                 switch (type) {
1740                 case AC_WID_AUD_OUT:
1741                         hdmi_add_cvt(codec, nid);
1742                         break;
1743                 case AC_WID_PIN:
1744                         hdmi_add_pin(codec, nid);
1745                         break;
1746                 }
1747         }
1748
1749         return 0;
1750 }
1751
1752 /*
1753  */
1754 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1755 {
1756         struct hda_spdif_out *spdif;
1757         bool non_pcm;
1758
1759         mutex_lock(&codec->spdif_mutex);
1760         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1761         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1762         mutex_unlock(&codec->spdif_mutex);
1763         return non_pcm;
1764 }
1765
1766
1767 /*
1768  * HDMI callbacks
1769  */
1770
1771 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1772                                            struct hda_codec *codec,
1773                                            unsigned int stream_tag,
1774                                            unsigned int format,
1775                                            struct snd_pcm_substream *substream)
1776 {
1777         hda_nid_t cvt_nid = hinfo->nid;
1778         struct hdmi_spec *spec = codec->spec;
1779         int pin_idx = hinfo_to_pin_index(codec, hinfo);
1780         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1781         hda_nid_t pin_nid = per_pin->pin_nid;
1782         bool non_pcm;
1783         int pinctl;
1784
1785         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1786                 /* Verify pin:cvt selections to avoid silent audio after S3.
1787                  * After S3, the audio driver restores pin:cvt selections
1788                  * but this can happen before gfx is ready and such selection
1789                  * is overlooked by HW. Thus multiple pins can share a same
1790                  * default convertor and mute control will affect each other,
1791                  * which can cause a resumed audio playback become silent
1792                  * after S3.
1793                  */
1794                 intel_verify_pin_cvt_connect(codec, per_pin);
1795                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1796         }
1797
1798         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1799         mutex_lock(&per_pin->lock);
1800         per_pin->channels = substream->runtime->channels;
1801         per_pin->setup = true;
1802
1803         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1804         mutex_unlock(&per_pin->lock);
1805
1806         if (spec->dyn_pin_out) {
1807                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1808                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1809                 snd_hda_codec_write(codec, pin_nid, 0,
1810                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1811                                     pinctl | PIN_OUT);
1812         }
1813
1814         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1815 }
1816
1817 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1818                                              struct hda_codec *codec,
1819                                              struct snd_pcm_substream *substream)
1820 {
1821         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1822         return 0;
1823 }
1824
1825 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1826                           struct hda_codec *codec,
1827                           struct snd_pcm_substream *substream)
1828 {
1829         struct hdmi_spec *spec = codec->spec;
1830         int cvt_idx, pin_idx;
1831         struct hdmi_spec_per_cvt *per_cvt;
1832         struct hdmi_spec_per_pin *per_pin;
1833         int pinctl;
1834
1835         if (hinfo->nid) {
1836                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1837                 if (snd_BUG_ON(cvt_idx < 0))
1838                         return -EINVAL;
1839                 per_cvt = get_cvt(spec, cvt_idx);
1840
1841                 snd_BUG_ON(!per_cvt->assigned);
1842                 per_cvt->assigned = 0;
1843                 hinfo->nid = 0;
1844
1845                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1846                 if (snd_BUG_ON(pin_idx < 0))
1847                         return -EINVAL;
1848                 per_pin = get_pin(spec, pin_idx);
1849
1850                 if (spec->dyn_pin_out) {
1851                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1852                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1853                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1854                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1855                                             pinctl & ~PIN_OUT);
1856                 }
1857
1858                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1859
1860                 mutex_lock(&per_pin->lock);
1861                 per_pin->chmap_set = false;
1862                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1863
1864                 per_pin->setup = false;
1865                 per_pin->channels = 0;
1866                 mutex_unlock(&per_pin->lock);
1867         }
1868
1869         return 0;
1870 }
1871
1872 static const struct hda_pcm_ops generic_ops = {
1873         .open = hdmi_pcm_open,
1874         .close = hdmi_pcm_close,
1875         .prepare = generic_hdmi_playback_pcm_prepare,
1876         .cleanup = generic_hdmi_playback_pcm_cleanup,
1877 };
1878
1879 /*
1880  * ALSA API channel-map control callbacks
1881  */
1882 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1883                                struct snd_ctl_elem_info *uinfo)
1884 {
1885         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1886         struct hda_codec *codec = info->private_data;
1887         struct hdmi_spec *spec = codec->spec;
1888         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1889         uinfo->count = spec->channels_max;
1890         uinfo->value.integer.min = 0;
1891         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1892         return 0;
1893 }
1894
1895 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1896                                                   int channels)
1897 {
1898         /* If the speaker allocation matches the channel count, it is OK.*/
1899         if (cap->channels != channels)
1900                 return -1;
1901
1902         /* all channels are remappable freely */
1903         return SNDRV_CTL_TLVT_CHMAP_VAR;
1904 }
1905
1906 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1907                                         unsigned int *chmap, int channels)
1908 {
1909         int count = 0;
1910         int c;
1911
1912         for (c = 7; c >= 0; c--) {
1913                 int spk = cap->speakers[c];
1914                 if (!spk)
1915                         continue;
1916
1917                 chmap[count++] = spk_to_chmap(spk);
1918         }
1919
1920         WARN_ON(count != channels);
1921 }
1922
1923 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1924                               unsigned int size, unsigned int __user *tlv)
1925 {
1926         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1927         struct hda_codec *codec = info->private_data;
1928         struct hdmi_spec *spec = codec->spec;
1929         unsigned int __user *dst;
1930         int chs, count = 0;
1931
1932         if (size < 8)
1933                 return -ENOMEM;
1934         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1935                 return -EFAULT;
1936         size -= 8;
1937         dst = tlv + 2;
1938         for (chs = 2; chs <= spec->channels_max; chs++) {
1939                 int i;
1940                 struct cea_channel_speaker_allocation *cap;
1941                 cap = channel_allocations;
1942                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1943                         int chs_bytes = chs * 4;
1944                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1945                         unsigned int tlv_chmap[8];
1946
1947                         if (type < 0)
1948                                 continue;
1949                         if (size < 8)
1950                                 return -ENOMEM;
1951                         if (put_user(type, dst) ||
1952                             put_user(chs_bytes, dst + 1))
1953                                 return -EFAULT;
1954                         dst += 2;
1955                         size -= 8;
1956                         count += 8;
1957                         if (size < chs_bytes)
1958                                 return -ENOMEM;
1959                         size -= chs_bytes;
1960                         count += chs_bytes;
1961                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1962                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1963                                 return -EFAULT;
1964                         dst += chs;
1965                 }
1966         }
1967         if (put_user(count, tlv + 1))
1968                 return -EFAULT;
1969         return 0;
1970 }
1971
1972 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1973                               struct snd_ctl_elem_value *ucontrol)
1974 {
1975         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1976         struct hda_codec *codec = info->private_data;
1977         struct hdmi_spec *spec = codec->spec;
1978         int pin_idx = kcontrol->private_value;
1979         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1980         int i;
1981
1982         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1983                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1984         return 0;
1985 }
1986
1987 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1988                               struct snd_ctl_elem_value *ucontrol)
1989 {
1990         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1991         struct hda_codec *codec = info->private_data;
1992         struct hdmi_spec *spec = codec->spec;
1993         int pin_idx = kcontrol->private_value;
1994         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1995         unsigned int ctl_idx;
1996         struct snd_pcm_substream *substream;
1997         unsigned char chmap[8];
1998         int i, err, ca, prepared = 0;
1999
2000         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2001         substream = snd_pcm_chmap_substream(info, ctl_idx);
2002         if (!substream || !substream->runtime)
2003                 return 0; /* just for avoiding error from alsactl restore */
2004         switch (substream->runtime->status->state) {
2005         case SNDRV_PCM_STATE_OPEN:
2006         case SNDRV_PCM_STATE_SETUP:
2007                 break;
2008         case SNDRV_PCM_STATE_PREPARED:
2009                 prepared = 1;
2010                 break;
2011         default:
2012                 return -EBUSY;
2013         }
2014         memset(chmap, 0, sizeof(chmap));
2015         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2016                 chmap[i] = ucontrol->value.integer.value[i];
2017         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2018                 return 0;
2019         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2020         if (ca < 0)
2021                 return -EINVAL;
2022         if (spec->ops.chmap_validate) {
2023                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2024                 if (err)
2025                         return err;
2026         }
2027         mutex_lock(&per_pin->lock);
2028         per_pin->chmap_set = true;
2029         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2030         if (prepared)
2031                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2032         mutex_unlock(&per_pin->lock);
2033
2034         return 0;
2035 }
2036
2037 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2038 {
2039         struct hdmi_spec *spec = codec->spec;
2040         int pin_idx;
2041
2042         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2043                 struct hda_pcm *info;
2044                 struct hda_pcm_stream *pstr;
2045                 struct hdmi_spec_per_pin *per_pin;
2046
2047                 per_pin = get_pin(spec, pin_idx);
2048                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2049                 info = snd_array_new(&spec->pcm_rec);
2050                 if (!info)
2051                         return -ENOMEM;
2052                 info->name = per_pin->pcm_name;
2053                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2054                 info->own_chmap = true;
2055
2056                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2057                 pstr->substreams = 1;
2058                 pstr->ops = generic_ops;
2059                 /* other pstr fields are set in open */
2060         }
2061
2062         codec->num_pcms = spec->num_pins;
2063         codec->pcm_info = spec->pcm_rec.list;
2064
2065         return 0;
2066 }
2067
2068 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2069 {
2070         char hdmi_str[32] = "HDMI/DP";
2071         struct hdmi_spec *spec = codec->spec;
2072         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2073         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2074
2075         if (pcmdev > 0)
2076                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2077         if (!is_jack_detectable(codec, per_pin->pin_nid))
2078                 strncat(hdmi_str, " Phantom",
2079                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2080
2081         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2082 }
2083
2084 static int generic_hdmi_build_controls(struct hda_codec *codec)
2085 {
2086         struct hdmi_spec *spec = codec->spec;
2087         int err;
2088         int pin_idx;
2089
2090         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2091                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2092
2093                 err = generic_hdmi_build_jack(codec, pin_idx);
2094                 if (err < 0)
2095                         return err;
2096
2097                 err = snd_hda_create_dig_out_ctls(codec,
2098                                                   per_pin->pin_nid,
2099                                                   per_pin->mux_nids[0],
2100                                                   HDA_PCM_TYPE_HDMI);
2101                 if (err < 0)
2102                         return err;
2103                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2104
2105                 /* add control for ELD Bytes */
2106                 err = hdmi_create_eld_ctl(codec, pin_idx,
2107                                           get_pcm_rec(spec, pin_idx)->device);
2108
2109                 if (err < 0)
2110                         return err;
2111
2112                 hdmi_present_sense(per_pin, 0);
2113         }
2114
2115         /* add channel maps */
2116         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2117                 struct snd_pcm_chmap *chmap;
2118                 struct snd_kcontrol *kctl;
2119                 int i;
2120
2121                 if (!codec->pcm_info[pin_idx].pcm)
2122                         break;
2123                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2124                                              SNDRV_PCM_STREAM_PLAYBACK,
2125                                              NULL, 0, pin_idx, &chmap);
2126                 if (err < 0)
2127                         return err;
2128                 /* override handlers */
2129                 chmap->private_data = codec;
2130                 kctl = chmap->kctl;
2131                 for (i = 0; i < kctl->count; i++)
2132                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2133                 kctl->info = hdmi_chmap_ctl_info;
2134                 kctl->get = hdmi_chmap_ctl_get;
2135                 kctl->put = hdmi_chmap_ctl_put;
2136                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2137         }
2138
2139         return 0;
2140 }
2141
2142 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2143 {
2144         struct hdmi_spec *spec = codec->spec;
2145         int pin_idx;
2146
2147         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2148                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2149
2150                 per_pin->codec = codec;
2151                 mutex_init(&per_pin->lock);
2152                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2153                 eld_proc_new(per_pin, pin_idx);
2154         }
2155         return 0;
2156 }
2157
2158 static int generic_hdmi_init(struct hda_codec *codec)
2159 {
2160         struct hdmi_spec *spec = codec->spec;
2161         int pin_idx;
2162
2163         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2164                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2165                 hda_nid_t pin_nid = per_pin->pin_nid;
2166
2167                 hdmi_init_pin(codec, pin_nid);
2168                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2169                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2170         }
2171         return 0;
2172 }
2173
2174 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2175 {
2176         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2177         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2178         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2179 }
2180
2181 static void hdmi_array_free(struct hdmi_spec *spec)
2182 {
2183         snd_array_free(&spec->pins);
2184         snd_array_free(&spec->cvts);
2185         snd_array_free(&spec->pcm_rec);
2186 }
2187
2188 static void generic_hdmi_free(struct hda_codec *codec)
2189 {
2190         struct hdmi_spec *spec = codec->spec;
2191         int pin_idx;
2192
2193         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2194                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2195
2196                 cancel_delayed_work(&per_pin->work);
2197                 eld_proc_free(per_pin);
2198         }
2199
2200         flush_workqueue(codec->bus->workq);
2201         hdmi_array_free(spec);
2202         kfree(spec);
2203 }
2204
2205 #ifdef CONFIG_PM
2206 static int generic_hdmi_resume(struct hda_codec *codec)
2207 {
2208         struct hdmi_spec *spec = codec->spec;
2209         int pin_idx;
2210
2211         codec->patch_ops.init(codec);
2212         snd_hda_codec_resume_amp(codec);
2213         snd_hda_codec_resume_cache(codec);
2214
2215         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2216                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2217                 hdmi_present_sense(per_pin, 1);
2218         }
2219         return 0;
2220 }
2221 #endif
2222
2223 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2224         .init                   = generic_hdmi_init,
2225         .free                   = generic_hdmi_free,
2226         .build_pcms             = generic_hdmi_build_pcms,
2227         .build_controls         = generic_hdmi_build_controls,
2228         .unsol_event            = hdmi_unsol_event,
2229 #ifdef CONFIG_PM
2230         .resume                 = generic_hdmi_resume,
2231 #endif
2232 };
2233
2234 static const struct hdmi_ops generic_standard_hdmi_ops = {
2235         .pin_get_eld                            = snd_hdmi_get_eld,
2236         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2237         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2238         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2239         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2240         .setup_stream                           = hdmi_setup_stream,
2241         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2242         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2243 };
2244
2245
2246 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2247                                              hda_nid_t nid)
2248 {
2249         struct hdmi_spec *spec = codec->spec;
2250         hda_nid_t conns[4];
2251         int nconns;
2252
2253         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2254         if (nconns == spec->num_cvts &&
2255             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2256                 return;
2257
2258         /* override pins connection list */
2259         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2260         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2261 }
2262
2263 #define INTEL_VENDOR_NID 0x08
2264 #define INTEL_GET_VENDOR_VERB 0xf81
2265 #define INTEL_SET_VENDOR_VERB 0x781
2266 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2267 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2268
2269 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2270                                           bool update_tree)
2271 {
2272         unsigned int vendor_param;
2273
2274         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2275                                 INTEL_GET_VENDOR_VERB, 0);
2276         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2277                 return;
2278
2279         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2280         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2281                                 INTEL_SET_VENDOR_VERB, vendor_param);
2282         if (vendor_param == -1)
2283                 return;
2284
2285         if (update_tree)
2286                 snd_hda_codec_update_widgets(codec);
2287 }
2288
2289 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2290 {
2291         unsigned int vendor_param;
2292
2293         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2294                                 INTEL_GET_VENDOR_VERB, 0);
2295         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2296                 return;
2297
2298         /* enable DP1.2 mode */
2299         vendor_param |= INTEL_EN_DP12;
2300         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2301                                 INTEL_SET_VENDOR_VERB, vendor_param);
2302 }
2303
2304 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2305  * Otherwise you may get severe h/w communication errors.
2306  */
2307 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2308                                 unsigned int power_state)
2309 {
2310         if (power_state == AC_PWRST_D0) {
2311                 intel_haswell_enable_all_pins(codec, false);
2312                 intel_haswell_fixup_enable_dp12(codec);
2313         }
2314
2315         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2316         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2317 }
2318
2319 static int patch_generic_hdmi(struct hda_codec *codec)
2320 {
2321         struct hdmi_spec *spec;
2322
2323         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2324         if (spec == NULL)
2325                 return -ENOMEM;
2326
2327         spec->ops = generic_standard_hdmi_ops;
2328         codec->spec = spec;
2329         hdmi_array_init(spec, 4);
2330
2331         if (is_haswell_plus(codec)) {
2332                 intel_haswell_enable_all_pins(codec, true);
2333                 intel_haswell_fixup_enable_dp12(codec);
2334         }
2335
2336         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2337                 codec->depop_delay = 0;
2338
2339         if (hdmi_parse_codec(codec) < 0) {
2340                 codec->spec = NULL;
2341                 kfree(spec);
2342                 return -EINVAL;
2343         }
2344         codec->patch_ops = generic_hdmi_patch_ops;
2345         if (is_haswell_plus(codec)) {
2346                 codec->patch_ops.set_power_state = haswell_set_power_state;
2347                 codec->dp_mst = true;
2348         }
2349
2350         generic_hdmi_init_per_pins(codec);
2351
2352         init_channel_allocations();
2353
2354         return 0;
2355 }
2356
2357 /*
2358  * Shared non-generic implementations
2359  */
2360
2361 static int simple_playback_build_pcms(struct hda_codec *codec)
2362 {
2363         struct hdmi_spec *spec = codec->spec;
2364         struct hda_pcm *info;
2365         unsigned int chans;
2366         struct hda_pcm_stream *pstr;
2367         struct hdmi_spec_per_cvt *per_cvt;
2368
2369         per_cvt = get_cvt(spec, 0);
2370         chans = get_wcaps(codec, per_cvt->cvt_nid);
2371         chans = get_wcaps_channels(chans);
2372
2373         info = snd_array_new(&spec->pcm_rec);
2374         if (!info)
2375                 return -ENOMEM;
2376         info->name = get_pin(spec, 0)->pcm_name;
2377         sprintf(info->name, "HDMI 0");
2378         info->pcm_type = HDA_PCM_TYPE_HDMI;
2379         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2380         *pstr = spec->pcm_playback;
2381         pstr->nid = per_cvt->cvt_nid;
2382         if (pstr->channels_max <= 2 && chans && chans <= 16)
2383                 pstr->channels_max = chans;
2384
2385         codec->num_pcms = 1;
2386         codec->pcm_info = info;
2387
2388         return 0;
2389 }
2390
2391 /* unsolicited event for jack sensing */
2392 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2393                                     unsigned int res)
2394 {
2395         snd_hda_jack_set_dirty_all(codec);
2396         snd_hda_jack_report_sync(codec);
2397 }
2398
2399 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2400  * as long as spec->pins[] is set correctly
2401  */
2402 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2403
2404 static int simple_playback_build_controls(struct hda_codec *codec)
2405 {
2406         struct hdmi_spec *spec = codec->spec;
2407         struct hdmi_spec_per_cvt *per_cvt;
2408         int err;
2409
2410         per_cvt = get_cvt(spec, 0);
2411         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2412                                           per_cvt->cvt_nid,
2413                                           HDA_PCM_TYPE_HDMI);
2414         if (err < 0)
2415                 return err;
2416         return simple_hdmi_build_jack(codec, 0);
2417 }
2418
2419 static int simple_playback_init(struct hda_codec *codec)
2420 {
2421         struct hdmi_spec *spec = codec->spec;
2422         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2423         hda_nid_t pin = per_pin->pin_nid;
2424
2425         snd_hda_codec_write(codec, pin, 0,
2426                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2427         /* some codecs require to unmute the pin */
2428         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2429                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2430                                     AMP_OUT_UNMUTE);
2431         snd_hda_jack_detect_enable(codec, pin, pin);
2432         return 0;
2433 }
2434
2435 static void simple_playback_free(struct hda_codec *codec)
2436 {
2437         struct hdmi_spec *spec = codec->spec;
2438
2439         hdmi_array_free(spec);
2440         kfree(spec);
2441 }
2442
2443 /*
2444  * Nvidia specific implementations
2445  */
2446
2447 #define Nv_VERB_SET_Channel_Allocation          0xF79
2448 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2449 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2450 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2451
2452 #define nvhdmi_master_con_nid_7x        0x04
2453 #define nvhdmi_master_pin_nid_7x        0x05
2454
2455 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2456         /*front, rear, clfe, rear_surr */
2457         0x6, 0x8, 0xa, 0xc,
2458 };
2459
2460 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2461         /* set audio protect on */
2462         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2463         /* enable digital output on pin widget */
2464         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2465         {} /* terminator */
2466 };
2467
2468 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2469         /* set audio protect on */
2470         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2471         /* enable digital output on pin widget */
2472         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2473         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2474         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2475         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2476         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2477         {} /* terminator */
2478 };
2479
2480 #ifdef LIMITED_RATE_FMT_SUPPORT
2481 /* support only the safe format and rate */
2482 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2483 #define SUPPORTED_MAXBPS        16
2484 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2485 #else
2486 /* support all rates and formats */
2487 #define SUPPORTED_RATES \
2488         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2489         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2490          SNDRV_PCM_RATE_192000)
2491 #define SUPPORTED_MAXBPS        24
2492 #define SUPPORTED_FORMATS \
2493         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2494 #endif
2495
2496 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2497 {
2498         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2499         return 0;
2500 }
2501
2502 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2503 {
2504         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2505         return 0;
2506 }
2507
2508 static unsigned int channels_2_6_8[] = {
2509         2, 6, 8
2510 };
2511
2512 static unsigned int channels_2_8[] = {
2513         2, 8
2514 };
2515
2516 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2517         .count = ARRAY_SIZE(channels_2_6_8),
2518         .list = channels_2_6_8,
2519         .mask = 0,
2520 };
2521
2522 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2523         .count = ARRAY_SIZE(channels_2_8),
2524         .list = channels_2_8,
2525         .mask = 0,
2526 };
2527
2528 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2529                                     struct hda_codec *codec,
2530                                     struct snd_pcm_substream *substream)
2531 {
2532         struct hdmi_spec *spec = codec->spec;
2533         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2534
2535         switch (codec->preset->id) {
2536         case 0x10de0002:
2537         case 0x10de0003:
2538         case 0x10de0005:
2539         case 0x10de0006:
2540                 hw_constraints_channels = &hw_constraints_2_8_channels;
2541                 break;
2542         case 0x10de0007:
2543                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2544                 break;
2545         default:
2546                 break;
2547         }
2548
2549         if (hw_constraints_channels != NULL) {
2550                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2551                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2552                                 hw_constraints_channels);
2553         } else {
2554                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2555                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2556         }
2557
2558         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2559 }
2560
2561 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2562                                      struct hda_codec *codec,
2563                                      struct snd_pcm_substream *substream)
2564 {
2565         struct hdmi_spec *spec = codec->spec;
2566         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2567 }
2568
2569 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2570                                        struct hda_codec *codec,
2571                                        unsigned int stream_tag,
2572                                        unsigned int format,
2573                                        struct snd_pcm_substream *substream)
2574 {
2575         struct hdmi_spec *spec = codec->spec;
2576         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2577                                              stream_tag, format, substream);
2578 }
2579
2580 static const struct hda_pcm_stream simple_pcm_playback = {
2581         .substreams = 1,
2582         .channels_min = 2,
2583         .channels_max = 2,
2584         .ops = {
2585                 .open = simple_playback_pcm_open,
2586                 .close = simple_playback_pcm_close,
2587                 .prepare = simple_playback_pcm_prepare
2588         },
2589 };
2590
2591 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2592         .build_controls = simple_playback_build_controls,
2593         .build_pcms = simple_playback_build_pcms,
2594         .init = simple_playback_init,
2595         .free = simple_playback_free,
2596         .unsol_event = simple_hdmi_unsol_event,
2597 };
2598
2599 static int patch_simple_hdmi(struct hda_codec *codec,
2600                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2601 {
2602         struct hdmi_spec *spec;
2603         struct hdmi_spec_per_cvt *per_cvt;
2604         struct hdmi_spec_per_pin *per_pin;
2605
2606         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2607         if (!spec)
2608                 return -ENOMEM;
2609
2610         codec->spec = spec;
2611         hdmi_array_init(spec, 1);
2612
2613         spec->multiout.num_dacs = 0;  /* no analog */
2614         spec->multiout.max_channels = 2;
2615         spec->multiout.dig_out_nid = cvt_nid;
2616         spec->num_cvts = 1;
2617         spec->num_pins = 1;
2618         per_pin = snd_array_new(&spec->pins);
2619         per_cvt = snd_array_new(&spec->cvts);
2620         if (!per_pin || !per_cvt) {
2621                 simple_playback_free(codec);
2622                 return -ENOMEM;
2623         }
2624         per_cvt->cvt_nid = cvt_nid;
2625         per_pin->pin_nid = pin_nid;
2626         spec->pcm_playback = simple_pcm_playback;
2627
2628         codec->patch_ops = simple_hdmi_patch_ops;
2629
2630         return 0;
2631 }
2632
2633 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2634                                                     int channels)
2635 {
2636         unsigned int chanmask;
2637         int chan = channels ? (channels - 1) : 1;
2638
2639         switch (channels) {
2640         default:
2641         case 0:
2642         case 2:
2643                 chanmask = 0x00;
2644                 break;
2645         case 4:
2646                 chanmask = 0x08;
2647                 break;
2648         case 6:
2649                 chanmask = 0x0b;
2650                 break;
2651         case 8:
2652                 chanmask = 0x13;
2653                 break;
2654         }
2655
2656         /* Set the audio infoframe channel allocation and checksum fields.  The
2657          * channel count is computed implicitly by the hardware. */
2658         snd_hda_codec_write(codec, 0x1, 0,
2659                         Nv_VERB_SET_Channel_Allocation, chanmask);
2660
2661         snd_hda_codec_write(codec, 0x1, 0,
2662                         Nv_VERB_SET_Info_Frame_Checksum,
2663                         (0x71 - chan - chanmask));
2664 }
2665
2666 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2667                                    struct hda_codec *codec,
2668                                    struct snd_pcm_substream *substream)
2669 {
2670         struct hdmi_spec *spec = codec->spec;
2671         int i;
2672
2673         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2674                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2675         for (i = 0; i < 4; i++) {
2676                 /* set the stream id */
2677                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2678                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2679                 /* set the stream format */
2680                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2681                                 AC_VERB_SET_STREAM_FORMAT, 0);
2682         }
2683
2684         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2685          * streams are disabled. */
2686         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2687
2688         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2689 }
2690
2691 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2692                                      struct hda_codec *codec,
2693                                      unsigned int stream_tag,
2694                                      unsigned int format,
2695                                      struct snd_pcm_substream *substream)
2696 {
2697         int chs;
2698         unsigned int dataDCC2, channel_id;
2699         int i;
2700         struct hdmi_spec *spec = codec->spec;
2701         struct hda_spdif_out *spdif;
2702         struct hdmi_spec_per_cvt *per_cvt;
2703
2704         mutex_lock(&codec->spdif_mutex);
2705         per_cvt = get_cvt(spec, 0);
2706         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2707
2708         chs = substream->runtime->channels;
2709
2710         dataDCC2 = 0x2;
2711
2712         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2713         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2714                 snd_hda_codec_write(codec,
2715                                 nvhdmi_master_con_nid_7x,
2716                                 0,
2717                                 AC_VERB_SET_DIGI_CONVERT_1,
2718                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2719
2720         /* set the stream id */
2721         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2722                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2723
2724         /* set the stream format */
2725         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2726                         AC_VERB_SET_STREAM_FORMAT, format);
2727
2728         /* turn on again (if needed) */
2729         /* enable and set the channel status audio/data flag */
2730         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2731                 snd_hda_codec_write(codec,
2732                                 nvhdmi_master_con_nid_7x,
2733                                 0,
2734                                 AC_VERB_SET_DIGI_CONVERT_1,
2735                                 spdif->ctls & 0xff);
2736                 snd_hda_codec_write(codec,
2737                                 nvhdmi_master_con_nid_7x,
2738                                 0,
2739                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2740         }
2741
2742         for (i = 0; i < 4; i++) {
2743                 if (chs == 2)
2744                         channel_id = 0;
2745                 else
2746                         channel_id = i * 2;
2747
2748                 /* turn off SPDIF once;
2749                  *otherwise the IEC958 bits won't be updated
2750                  */
2751                 if (codec->spdif_status_reset &&
2752                 (spdif->ctls & AC_DIG1_ENABLE))
2753                         snd_hda_codec_write(codec,
2754                                 nvhdmi_con_nids_7x[i],
2755                                 0,
2756                                 AC_VERB_SET_DIGI_CONVERT_1,
2757                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2758                 /* set the stream id */
2759                 snd_hda_codec_write(codec,
2760                                 nvhdmi_con_nids_7x[i],
2761                                 0,
2762                                 AC_VERB_SET_CHANNEL_STREAMID,
2763                                 (stream_tag << 4) | channel_id);
2764                 /* set the stream format */
2765                 snd_hda_codec_write(codec,
2766                                 nvhdmi_con_nids_7x[i],
2767                                 0,
2768                                 AC_VERB_SET_STREAM_FORMAT,
2769                                 format);
2770                 /* turn on again (if needed) */
2771                 /* enable and set the channel status audio/data flag */
2772                 if (codec->spdif_status_reset &&
2773                 (spdif->ctls & AC_DIG1_ENABLE)) {
2774                         snd_hda_codec_write(codec,
2775                                         nvhdmi_con_nids_7x[i],
2776                                         0,
2777                                         AC_VERB_SET_DIGI_CONVERT_1,
2778                                         spdif->ctls & 0xff);
2779                         snd_hda_codec_write(codec,
2780                                         nvhdmi_con_nids_7x[i],
2781                                         0,
2782                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2783                 }
2784         }
2785
2786         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2787
2788         mutex_unlock(&codec->spdif_mutex);
2789         return 0;
2790 }
2791
2792 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2793         .substreams = 1,
2794         .channels_min = 2,
2795         .channels_max = 8,
2796         .nid = nvhdmi_master_con_nid_7x,
2797         .rates = SUPPORTED_RATES,
2798         .maxbps = SUPPORTED_MAXBPS,
2799         .formats = SUPPORTED_FORMATS,
2800         .ops = {
2801                 .open = simple_playback_pcm_open,
2802                 .close = nvhdmi_8ch_7x_pcm_close,
2803                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2804         },
2805 };
2806
2807 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2808 {
2809         struct hdmi_spec *spec;
2810         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2811                                     nvhdmi_master_pin_nid_7x);
2812         if (err < 0)
2813                 return err;
2814
2815         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2816         /* override the PCM rates, etc, as the codec doesn't give full list */
2817         spec = codec->spec;
2818         spec->pcm_playback.rates = SUPPORTED_RATES;
2819         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2820         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2821         return 0;
2822 }
2823
2824 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2825 {
2826         struct hdmi_spec *spec = codec->spec;
2827         int err = simple_playback_build_pcms(codec);
2828         if (!err) {
2829                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2830                 info->own_chmap = true;
2831         }
2832         return err;
2833 }
2834
2835 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2836 {
2837         struct hdmi_spec *spec = codec->spec;
2838         struct hda_pcm *info;
2839         struct snd_pcm_chmap *chmap;
2840         int err;
2841
2842         err = simple_playback_build_controls(codec);
2843         if (err < 0)
2844                 return err;
2845
2846         /* add channel maps */
2847         info = get_pcm_rec(spec, 0);
2848         err = snd_pcm_add_chmap_ctls(info->pcm,
2849                                      SNDRV_PCM_STREAM_PLAYBACK,
2850                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2851         if (err < 0)
2852                 return err;
2853         switch (codec->preset->id) {
2854         case 0x10de0002:
2855         case 0x10de0003:
2856         case 0x10de0005:
2857         case 0x10de0006:
2858                 chmap->channel_mask = (1U << 2) | (1U << 8);
2859                 break;
2860         case 0x10de0007:
2861                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2862         }
2863         return 0;
2864 }
2865
2866 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2867 {
2868         struct hdmi_spec *spec;
2869         int err = patch_nvhdmi_2ch(codec);
2870         if (err < 0)
2871                 return err;
2872         spec = codec->spec;
2873         spec->multiout.max_channels = 8;
2874         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2875         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2876         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2877         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2878
2879         /* Initialize the audio infoframe channel mask and checksum to something
2880          * valid */
2881         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2882
2883         return 0;
2884 }
2885
2886 /*
2887  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2888  * - 0x10de0015
2889  * - 0x10de0040
2890  */
2891 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2892                                                     int channels)
2893 {
2894         if (cap->ca_index == 0x00 && channels == 2)
2895                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2896
2897         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2898 }
2899
2900 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2901 {
2902         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2903                 return -EINVAL;
2904
2905         return 0;
2906 }
2907
2908 static int patch_nvhdmi(struct hda_codec *codec)
2909 {
2910         struct hdmi_spec *spec;
2911         int err;
2912
2913         err = patch_generic_hdmi(codec);
2914         if (err)
2915                 return err;
2916
2917         spec = codec->spec;
2918         spec->dyn_pin_out = true;
2919
2920         spec->ops.chmap_cea_alloc_validate_get_type =
2921                 nvhdmi_chmap_cea_alloc_validate_get_type;
2922         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2923
2924         return 0;
2925 }
2926
2927 /*
2928  * ATI/AMD-specific implementations
2929  */
2930
2931 #define is_amdhdmi_rev3_or_later(codec) \
2932         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2933 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2934
2935 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2936 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2937 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2938 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2939 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2940 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2941 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2942 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2943 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2944 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2945 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2946 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2947 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2948 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2949 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2950 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2951 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2952 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2953 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2954 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2955 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2956 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2957 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2958 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2959 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2960
2961 /* AMD specific HDA cvt verbs */
2962 #define ATI_VERB_SET_RAMP_RATE          0x770
2963 #define ATI_VERB_GET_RAMP_RATE          0xf70
2964
2965 #define ATI_OUT_ENABLE 0x1
2966
2967 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2968 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2969
2970 #define ATI_HBR_CAPABLE 0x01
2971 #define ATI_HBR_ENABLE 0x10
2972
2973 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2974                            unsigned char *buf, int *eld_size)
2975 {
2976         /* call hda_eld.c ATI/AMD-specific function */
2977         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2978                                     is_amdhdmi_rev3_or_later(codec));
2979 }
2980
2981 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2982                                         int active_channels, int conn_type)
2983 {
2984         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2985 }
2986
2987 static int atihdmi_paired_swap_fc_lfe(int pos)
2988 {
2989         /*
2990          * ATI/AMD have automatic FC/LFE swap built-in
2991          * when in pairwise mapping mode.
2992          */
2993
2994         switch (pos) {
2995                 /* see channel_allocations[].speakers[] */
2996                 case 2: return 3;
2997                 case 3: return 2;
2998                 default: break;
2999         }
3000
3001         return pos;
3002 }
3003
3004 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3005 {
3006         struct cea_channel_speaker_allocation *cap;
3007         int i, j;
3008
3009         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3010
3011         cap = &channel_allocations[get_channel_allocation_order(ca)];
3012         for (i = 0; i < chs; ++i) {
3013                 int mask = to_spk_mask(map[i]);
3014                 bool ok = false;
3015                 bool companion_ok = false;
3016
3017                 if (!mask)
3018                         continue;
3019
3020                 for (j = 0 + i % 2; j < 8; j += 2) {
3021                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3022                         if (cap->speakers[chan_idx] == mask) {
3023                                 /* channel is in a supported position */
3024                                 ok = true;
3025
3026                                 if (i % 2 == 0 && i + 1 < chs) {
3027                                         /* even channel, check the odd companion */
3028                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3029                                         int comp_mask_req = to_spk_mask(map[i+1]);
3030                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3031
3032                                         if (comp_mask_req == comp_mask_act)
3033                                                 companion_ok = true;
3034                                         else
3035                                                 return -EINVAL;
3036                                 }
3037                                 break;
3038                         }
3039                 }
3040
3041                 if (!ok)
3042                         return -EINVAL;
3043
3044                 if (companion_ok)
3045                         i++; /* companion channel already checked */
3046         }
3047
3048         return 0;
3049 }
3050
3051 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3052                                         int hdmi_slot, int stream_channel)
3053 {
3054         int verb;
3055         int ati_channel_setup = 0;
3056
3057         if (hdmi_slot > 7)
3058                 return -EINVAL;
3059
3060         if (!has_amd_full_remap_support(codec)) {
3061                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3062
3063                 /* In case this is an odd slot but without stream channel, do not
3064                  * disable the slot since the corresponding even slot could have a
3065                  * channel. In case neither have a channel, the slot pair will be
3066                  * disabled when this function is called for the even slot. */
3067                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3068                         return 0;
3069
3070                 hdmi_slot -= hdmi_slot % 2;
3071
3072                 if (stream_channel != 0xf)
3073                         stream_channel -= stream_channel % 2;
3074         }
3075
3076         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3077
3078         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3079
3080         if (stream_channel != 0xf)
3081                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3082
3083         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3084 }
3085
3086 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3087                                         int asp_slot)
3088 {
3089         bool was_odd = false;
3090         int ati_asp_slot = asp_slot;
3091         int verb;
3092         int ati_channel_setup;
3093
3094         if (asp_slot > 7)
3095                 return -EINVAL;
3096
3097         if (!has_amd_full_remap_support(codec)) {
3098                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3099                 if (ati_asp_slot % 2 != 0) {
3100                         ati_asp_slot -= 1;
3101                         was_odd = true;
3102                 }
3103         }
3104
3105         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3106
3107         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3108
3109         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3110                 return 0xf;
3111
3112         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3113 }
3114
3115 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3116                                                             int channels)
3117 {
3118         int c;
3119
3120         /*
3121          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3122          * we need to take that into account (a single channel may take 2
3123          * channel slots if we need to carry a silent channel next to it).
3124          * On Rev3+ AMD codecs this function is not used.
3125          */
3126         int chanpairs = 0;
3127
3128         /* We only produce even-numbered channel count TLVs */
3129         if ((channels % 2) != 0)
3130                 return -1;
3131
3132         for (c = 0; c < 7; c += 2) {
3133                 if (cap->speakers[c] || cap->speakers[c+1])
3134                         chanpairs++;
3135         }
3136
3137         if (chanpairs * 2 != channels)
3138                 return -1;
3139
3140         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3141 }
3142
3143 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3144                                                   unsigned int *chmap, int channels)
3145 {
3146         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3147         int count = 0;
3148         int c;
3149
3150         for (c = 7; c >= 0; c--) {
3151                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3152                 int spk = cap->speakers[chan];
3153                 if (!spk) {
3154                         /* add N/A channel if the companion channel is occupied */
3155                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3156                                 chmap[count++] = SNDRV_CHMAP_NA;
3157
3158                         continue;
3159                 }
3160
3161                 chmap[count++] = spk_to_chmap(spk);
3162         }
3163
3164         WARN_ON(count != channels);
3165 }
3166
3167 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3168                                  bool hbr)
3169 {
3170         int hbr_ctl, hbr_ctl_new;
3171
3172         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3173         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3174                 if (hbr)
3175                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3176                 else
3177                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3178
3179                 codec_dbg(codec,
3180                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3181                                 pin_nid,
3182                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3183                                 hbr_ctl_new);
3184
3185                 if (hbr_ctl != hbr_ctl_new)
3186                         snd_hda_codec_write(codec, pin_nid, 0,
3187                                                 ATI_VERB_SET_HBR_CONTROL,
3188                                                 hbr_ctl_new);
3189
3190         } else if (hbr)
3191                 return -EINVAL;
3192
3193         return 0;
3194 }
3195
3196 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3197                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3198 {
3199
3200         if (is_amdhdmi_rev3_or_later(codec)) {
3201                 int ramp_rate = 180; /* default as per AMD spec */
3202                 /* disable ramp-up/down for non-pcm as per AMD spec */
3203                 if (format & AC_FMT_TYPE_NON_PCM)
3204                         ramp_rate = 0;
3205
3206                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3207         }
3208
3209         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3210 }
3211
3212
3213 static int atihdmi_init(struct hda_codec *codec)
3214 {
3215         struct hdmi_spec *spec = codec->spec;
3216         int pin_idx, err;
3217
3218         err = generic_hdmi_init(codec);
3219
3220         if (err)
3221                 return err;
3222
3223         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3224                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3225
3226                 /* make sure downmix information in infoframe is zero */
3227                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3228
3229                 /* enable channel-wise remap mode if supported */
3230                 if (has_amd_full_remap_support(codec))
3231                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3232                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3233                                             ATI_MULTICHANNEL_MODE_SINGLE);
3234         }
3235
3236         return 0;
3237 }
3238
3239 static int patch_atihdmi(struct hda_codec *codec)
3240 {
3241         struct hdmi_spec *spec;
3242         struct hdmi_spec_per_cvt *per_cvt;
3243         int err, cvt_idx;
3244
3245         err = patch_generic_hdmi(codec);
3246
3247         if (err)
3248                 return err;
3249
3250         codec->patch_ops.init = atihdmi_init;
3251
3252         spec = codec->spec;
3253
3254         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3255         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3256         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3257         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3258         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3259         spec->ops.setup_stream = atihdmi_setup_stream;
3260
3261         if (!has_amd_full_remap_support(codec)) {
3262                 /* override to ATI/AMD-specific versions with pairwise mapping */
3263                 spec->ops.chmap_cea_alloc_validate_get_type =
3264                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3265                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3266                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3267         }
3268
3269         /* ATI/AMD converters do not advertise all of their capabilities */
3270         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3271                 per_cvt = get_cvt(spec, cvt_idx);
3272                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3273                 per_cvt->rates |= SUPPORTED_RATES;
3274                 per_cvt->formats |= SUPPORTED_FORMATS;
3275                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3276         }
3277
3278         spec->channels_max = max(spec->channels_max, 8u);
3279
3280         return 0;
3281 }
3282
3283 /* VIA HDMI Implementation */
3284 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3285 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3286
3287 static int patch_via_hdmi(struct hda_codec *codec)
3288 {
3289         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3290 }
3291
3292 /*
3293  * called from hda_codec.c for generic HDMI support
3294  */
3295 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3296 {
3297         return patch_generic_hdmi(codec);
3298 }
3299 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3300
3301 /*
3302  * patch entries
3303  */
3304 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3305 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3306 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3307 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3308 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3309 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3310 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3311 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3312 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3313 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3314 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3315 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3316 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3317 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3318 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3319 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3320 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3321 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3322 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3323 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3324 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3325 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3326 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3327 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3328 /* 17 is known to be absent */
3329 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3330 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3331 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3332 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3333 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3334 { .id = 0x10de0028, .name = "Tegra12x HDMI",    .patch = patch_nvhdmi },
3335 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3336 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3337 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3338 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3339 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3340 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3341 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3342 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3343 { .id = 0x10de0070, .name = "GPU 70 HDMI/DP",   .patch = patch_nvhdmi },
3344 { .id = 0x10de0071, .name = "GPU 71 HDMI/DP",   .patch = patch_nvhdmi },
3345 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3346 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3347 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3348 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3349 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3350 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3351 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3352 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3353 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3354 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3355 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3356 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3357 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3358 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3359 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3360 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3361 { .id = 0x80862883, .name = "Braswell HDMI",    .patch = patch_generic_hdmi },
3362 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3363 {} /* terminator */
3364 };
3365
3366 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3367 MODULE_ALIAS("snd-hda-codec-id:10027919");
3368 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3369 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3370 MODULE_ALIAS("snd-hda-codec-id:10951390");
3371 MODULE_ALIAS("snd-hda-codec-id:10951392");
3372 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3373 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3374 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3375 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3376 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3377 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3378 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3379 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3380 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3381 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3382 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3383 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3384 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3385 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3386 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3387 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3388 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3389 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3390 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3391 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3392 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3393 MODULE_ALIAS("snd-hda-codec-id:10de0028");
3394 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3395 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3396 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3397 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3398 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3399 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3400 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3401 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3402 MODULE_ALIAS("snd-hda-codec-id:10de0070");
3403 MODULE_ALIAS("snd-hda-codec-id:10de0071");
3404 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3405 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3406 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3407 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3408 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3409 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3410 MODULE_ALIAS("snd-hda-codec-id:80860054");
3411 MODULE_ALIAS("snd-hda-codec-id:80862801");
3412 MODULE_ALIAS("snd-hda-codec-id:80862802");
3413 MODULE_ALIAS("snd-hda-codec-id:80862803");
3414 MODULE_ALIAS("snd-hda-codec-id:80862804");
3415 MODULE_ALIAS("snd-hda-codec-id:80862805");
3416 MODULE_ALIAS("snd-hda-codec-id:80862806");
3417 MODULE_ALIAS("snd-hda-codec-id:80862807");
3418 MODULE_ALIAS("snd-hda-codec-id:80862808");
3419 MODULE_ALIAS("snd-hda-codec-id:80862880");
3420 MODULE_ALIAS("snd-hda-codec-id:80862882");
3421 MODULE_ALIAS("snd-hda-codec-id:80862883");
3422 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3423
3424 MODULE_LICENSE("GPL");
3425 MODULE_DESCRIPTION("HDMI HD-audio codec");
3426 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3427 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3428 MODULE_ALIAS("snd-hda-codec-atihdmi");
3429
3430 static struct hda_codec_preset_list intel_list = {
3431         .preset = snd_hda_preset_hdmi,
3432         .owner = THIS_MODULE,
3433 };
3434
3435 static int __init patch_hdmi_init(void)
3436 {
3437         return snd_hda_add_codec_preset(&intel_list);
3438 }
3439
3440 static void __exit patch_hdmi_exit(void)
3441 {
3442         snd_hda_delete_codec_preset(&intel_list);
3443 }
3444
3445 module_init(patch_hdmi_init)
3446 module_exit(patch_hdmi_exit)