sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include "hda_codec.h"
  41 #include "hda_local.h"
  42 #include "hda_jack.h"
  43
  44 static bool static_hdmi_pcm;
  45 module_param(static_hdmi_pcm, bool, 0644);
  46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
  50 #define is_skylake(codec) ((codec)->vendor_id == 0x80862809)
  51 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  52                                         || is_skylake(codec))
  53
  54 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  55 #define is_cherryview(codec) ((codec)->vendor_id == 0x80862883)
  56 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  57
  58 struct hdmi_spec_per_cvt {
  59         hda_nid_t cvt_nid;
  60         int assigned;
  61         unsigned int channels_min;
  62         unsigned int channels_max;
  63         u32 rates;
  64         u64 formats;
  65         unsigned int maxbps;
  66 };
  67
  68 /* max. connections to a widget */
  69 #define HDA_MAX_CONNECTIONS     32
  70
  71 struct hdmi_spec_per_pin {
  72         hda_nid_t pin_nid;
  73         int num_mux_nids;
  74         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  75         int mux_idx;
  76         hda_nid_t cvt_nid;
  77
  78         struct hda_codec *codec;
  79         struct hdmi_eld sink_eld;
  80         struct mutex lock;
  81         struct delayed_work work;
  82         struct snd_kcontrol *eld_ctl;
  83         int repoll_count;
  84         bool setup; /* the stream has been set up by prepare callback */
  85         int channels; /* current number of channels */
  86         bool non_pcm;
  87         bool chmap_set;         /* channel-map override by ALSA API? */
  88         unsigned char chmap[8]; /* ALSA API channel-map */
  89         char pcm_name[8];       /* filled in build_pcm callbacks */
  90 #ifdef CONFIG_PROC_FS
  91         struct snd_info_entry *proc_entry;
  92 #endif
  93 };
  94
  95 struct cea_channel_speaker_allocation;
  96
  97 /* operations used by generic code that can be overridden by patches */
  98 struct hdmi_ops {
  99         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 100                            unsigned char *buf, int *eld_size);
 101
 102         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 103         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 104                                     int asp_slot);
 105         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                                     int asp_slot, int channel);
 107
 108         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                                     int ca, int active_channels, int conn_type);
 110
 111         /* enable/disable HBR (HD passthrough) */
 112         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 113
 114         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 115                             hda_nid_t pin_nid, u32 stream_tag, int format);
 116
 117         /* Helpers for producing the channel map TLVs. These can be overridden
 118          * for devices that have non-standard mapping requirements. */
 119         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 120                                                  int channels);
 121         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 122                                        unsigned int *chmap, int channels);
 123
 124         /* check that the user-given chmap is supported */
 125         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 126 };
 127
 128 struct hdmi_spec {
 129         int num_cvts;
 130         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 131         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 132
 133         int num_pins;
 134         struct snd_array pins; /* struct hdmi_spec_per_pin */
 135         struct snd_array pcm_rec; /* struct hda_pcm */
 136         unsigned int channels_max; /* max over all cvts */
 137
 138         struct hdmi_eld temp_eld;
 139         struct hdmi_ops ops;
 140
 141         bool dyn_pin_out;
 142
 143         /*
 144          * Non-generic VIA/NVIDIA specific
 145          */
 146         struct hda_multi_out multiout;
 147         struct hda_pcm_stream pcm_playback;
 148 };
 149
 150
 151 struct hdmi_audio_infoframe {
 152         u8 type; /* 0x84 */
 153         u8 ver;  /* 0x01 */
 154         u8 len;  /* 0x0a */
 155
 156         u8 checksum;
 157
 158         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 159         u8 SS01_SF24;
 160         u8 CXT04;
 161         u8 CA;
 162         u8 LFEPBL01_LSV36_DM_INH7;
 163 };
 164
 165 struct dp_audio_infoframe {
 166         u8 type; /* 0x84 */
 167         u8 len;  /* 0x1b */
 168         u8 ver;  /* 0x11 << 2 */
 169
 170         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 171         u8 SS01_SF24;
 172         u8 CXT04;
 173         u8 CA;
 174         u8 LFEPBL01_LSV36_DM_INH7;
 175 };
 176
 177 union audio_infoframe {
 178         struct hdmi_audio_infoframe hdmi;
 179         struct dp_audio_infoframe dp;
 180         u8 bytes[0];
 181 };
 182
 183 /*
 184  * CEA speaker placement:
 185  *
 186  *        FLH       FCH        FRH
 187  *  FLW    FL  FLC   FC   FRC   FR   FRW
 188  *
 189  *                                  LFE
 190  *                     TC
 191  *
 192  *          RL  RLC   RC   RRC   RR
 193  *
 194  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 195  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 196  */
 197 enum cea_speaker_placement {
 198         FL  = (1 <<  0),        /* Front Left           */
 199         FC  = (1 <<  1),        /* Front Center         */
 200         FR  = (1 <<  2),        /* Front Right          */
 201         FLC = (1 <<  3),        /* Front Left Center    */
 202         FRC = (1 <<  4),        /* Front Right Center   */
 203         RL  = (1 <<  5),        /* Rear Left            */
 204         RC  = (1 <<  6),        /* Rear Center          */
 205         RR  = (1 <<  7),        /* Rear Right           */
 206         RLC = (1 <<  8),        /* Rear Left Center     */
 207         RRC = (1 <<  9),        /* Rear Right Center    */
 208         LFE = (1 << 10),        /* Low Frequency Effect */
 209         FLW = (1 << 11),        /* Front Left Wide      */
 210         FRW = (1 << 12),        /* Front Right Wide     */
 211         FLH = (1 << 13),        /* Front Left High      */
 212         FCH = (1 << 14),        /* Front Center High    */
 213         FRH = (1 << 15),        /* Front Right High     */
 214         TC  = (1 << 16),        /* Top Center           */
 215 };
 216
 217 /*
 218  * ELD SA bits in the CEA Speaker Allocation data block
 219  */
 220 static int eld_speaker_allocation_bits[] = {
 221         [0] = FL | FR,
 222         [1] = LFE,
 223         [2] = FC,
 224         [3] = RL | RR,
 225         [4] = RC,
 226         [5] = FLC | FRC,
 227         [6] = RLC | RRC,
 228         /* the following are not defined in ELD yet */
 229         [7] = FLW | FRW,
 230         [8] = FLH | FRH,
 231         [9] = TC,
 232         [10] = FCH,
 233 };
 234
 235 struct cea_channel_speaker_allocation {
 236         int ca_index;
 237         int speakers[8];
 238
 239         /* derived values, just for convenience */
 240         int channels;
 241         int spk_mask;
 242 };
 243
 244 /*
 245  * ALSA sequence is:
 246  *
 247  *       surround40   surround41   surround50   surround51   surround71
 248  * ch0   front left   =            =            =            =
 249  * ch1   front right  =            =            =            =
 250  * ch2   rear left    =            =            =            =
 251  * ch3   rear right   =            =            =            =
 252  * ch4                LFE          center       center       center
 253  * ch5                                          LFE          LFE
 254  * ch6                                                       side left
 255  * ch7                                                       side right
 256  *
 257  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 258  */
 259 static int hdmi_channel_mapping[0x32][8] = {
 260         /* stereo */
 261         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 262         /* 2.1 */
 263         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 264         /* Dolby Surround */
 265         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 266         /* surround40 */
 267         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 268         /* 4ch */
 269         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 270         /* surround41 */
 271         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 272         /* surround50 */
 273         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 274         /* surround51 */
 275         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 276         /* 7.1 */
 277         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 278 };
 279
 280 /*
 281  * This is an ordered list!
 282  *
 283  * The preceding ones have better chances to be selected by
 284  * hdmi_channel_allocation().
 285  */
 286 static struct cea_channel_speaker_allocation channel_allocations[] = {
 287 /*                        channel:   7     6    5    4    3     2    1    0  */
 288 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 289                                  /* 2.1 */
 290 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 291                                  /* Dolby Surround */
 292 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 293                                  /* surround40 */
 294 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 295                                  /* surround41 */
 296 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 297                                  /* surround50 */
 298 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 299                                  /* surround51 */
 300 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 301                                  /* 6.1 */
 302 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 303                                  /* surround71 */
 304 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 305
 306 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 307 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 308 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 309 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 310 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 311 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 312 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 313 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 314 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 315 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 316 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 317 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 318 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 319 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 320 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 321 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 322 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 323 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 324 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 325 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 326 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 327 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 328 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 329 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 330 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 331 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 332 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 333 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 334 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 335 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 336 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 337 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 338 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 340 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 341 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 343 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 344 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 345 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 346 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 347 };
 348
 349
 350 /*
 351  * HDMI routines
 352  */
 353
 354 #define get_pin(spec, idx) \
 355         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 356 #define get_cvt(spec, idx) \
 357         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 358 #define get_pcm_rec(spec, idx) \
 359         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 360
 361 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 362 {
 363         struct hdmi_spec *spec = codec->spec;
 364         int pin_idx;
 365
 366         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 367                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 368                         return pin_idx;
 369
 370         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 371         return -EINVAL;
 372 }
 373
 374 static int hinfo_to_pin_index(struct hda_codec *codec,
 375                               struct hda_pcm_stream *hinfo)
 376 {
 377         struct hdmi_spec *spec = codec->spec;
 378         int pin_idx;
 379
 380         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 381                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 382                         return pin_idx;
 383
 384         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 385         return -EINVAL;
 386 }
 387
 388 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 389 {
 390         struct hdmi_spec *spec = codec->spec;
 391         int cvt_idx;
 392
 393         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 394                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 395                         return cvt_idx;
 396
 397         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 398         return -EINVAL;
 399 }
 400
 401 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 402                         struct snd_ctl_elem_info *uinfo)
 403 {
 404         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 405         struct hdmi_spec *spec = codec->spec;
 406         struct hdmi_spec_per_pin *per_pin;
 407         struct hdmi_eld *eld;
 408         int pin_idx;
 409
 410         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 411
 412         pin_idx = kcontrol->private_value;
 413         per_pin = get_pin(spec, pin_idx);
 414         eld = &per_pin->sink_eld;
 415
 416         mutex_lock(&per_pin->lock);
 417         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 418         mutex_unlock(&per_pin->lock);
 419
 420         return 0;
 421 }
 422
 423 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 424                         struct snd_ctl_elem_value *ucontrol)
 425 {
 426         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 427         struct hdmi_spec *spec = codec->spec;
 428         struct hdmi_spec_per_pin *per_pin;
 429         struct hdmi_eld *eld;
 430         int pin_idx;
 431
 432         pin_idx = kcontrol->private_value;
 433         per_pin = get_pin(spec, pin_idx);
 434         eld = &per_pin->sink_eld;
 435
 436         mutex_lock(&per_pin->lock);
 437         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 438                 mutex_unlock(&per_pin->lock);
 439                 snd_BUG();
 440                 return -EINVAL;
 441         }
 442
 443         memset(ucontrol->value.bytes.data, 0,
 444                ARRAY_SIZE(ucontrol->value.bytes.data));
 445         if (eld->eld_valid)
 446                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 447                        eld->eld_size);
 448         mutex_unlock(&per_pin->lock);
 449
 450         return 0;
 451 }
 452
 453 static struct snd_kcontrol_new eld_bytes_ctl = {
 454         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 455         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 456         .name = "ELD",
 457         .info = hdmi_eld_ctl_info,
 458         .get = hdmi_eld_ctl_get,
 459 };
 460
 461 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 462                         int device)
 463 {
 464         struct snd_kcontrol *kctl;
 465         struct hdmi_spec *spec = codec->spec;
 466         int err;
 467
 468         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 469         if (!kctl)
 470                 return -ENOMEM;
 471         kctl->private_value = pin_idx;
 472         kctl->id.device = device;
 473
 474         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 475         if (err < 0)
 476                 return err;
 477
 478         get_pin(spec, pin_idx)->eld_ctl = kctl;
 479         return 0;
 480 }
 481
 482 #ifdef BE_PARANOID
 483 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 484                                 int *packet_index, int *byte_index)
 485 {
 486         int val;
 487
 488         val = snd_hda_codec_read(codec, pin_nid, 0,
 489                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 490
 491         *packet_index = val >> 5;
 492         *byte_index = val & 0x1f;
 493 }
 494 #endif
 495
 496 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 497                                 int packet_index, int byte_index)
 498 {
 499         int val;
 500
 501         val = (packet_index << 5) | (byte_index & 0x1f);
 502
 503         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 504 }
 505
 506 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 507                                 unsigned char val)
 508 {
 509         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 510 }
 511
 512 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 513 {
 514         struct hdmi_spec *spec = codec->spec;
 515         int pin_out;
 516
 517         /* Unmute */
 518         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 519                 snd_hda_codec_write(codec, pin_nid, 0,
 520                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 521
 522         if (spec->dyn_pin_out)
 523                 /* Disable pin out until stream is active */
 524                 pin_out = 0;
 525         else
 526                 /* Enable pin out: some machines with GM965 gets broken output
 527                  * when the pin is disabled or changed while using with HDMI
 528                  */
 529                 pin_out = PIN_OUT;
 530
 531         snd_hda_codec_write(codec, pin_nid, 0,
 532                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 533 }
 534
 535 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 536 {
 537         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 538                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 539 }
 540
 541 static void hdmi_set_channel_count(struct hda_codec *codec,
 542                                    hda_nid_t cvt_nid, int chs)
 543 {
 544         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 545                 snd_hda_codec_write(codec, cvt_nid, 0,
 546                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 547 }
 548
 549 /*
 550  * ELD proc files
 551  */
 552
 553 #ifdef CONFIG_PROC_FS
 554 static void print_eld_info(struct snd_info_entry *entry,
 555                            struct snd_info_buffer *buffer)
 556 {
 557         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 558
 559         mutex_lock(&per_pin->lock);
 560         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 561         mutex_unlock(&per_pin->lock);
 562 }
 563
 564 static void write_eld_info(struct snd_info_entry *entry,
 565                            struct snd_info_buffer *buffer)
 566 {
 567         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 568
 569         mutex_lock(&per_pin->lock);
 570         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 571         mutex_unlock(&per_pin->lock);
 572 }
 573
 574 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 575 {
 576         char name[32];
 577         struct hda_codec *codec = per_pin->codec;
 578         struct snd_info_entry *entry;
 579         int err;
 580
 581         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 582         err = snd_card_proc_new(codec->bus->card, name, &entry);
 583         if (err < 0)
 584                 return err;
 585
 586         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 587         entry->c.text.write = write_eld_info;
 588         entry->mode |= S_IWUSR;
 589         per_pin->proc_entry = entry;
 590
 591         return 0;
 592 }
 593
 594 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 595 {
 596         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 597                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 598                 per_pin->proc_entry = NULL;
 599         }
 600 }
 601 #else
 602 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 603                                int index)
 604 {
 605         return 0;
 606 }
 607 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 608 {
 609 }
 610 #endif
 611
 612 /*
 613  * Channel mapping routines
 614  */
 615
 616 /*
 617  * Compute derived values in channel_allocations[].
 618  */
 619 static void init_channel_allocations(void)
 620 {
 621         int i, j;
 622         struct cea_channel_speaker_allocation *p;
 623
 624         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 625                 p = channel_allocations + i;
 626                 p->channels = 0;
 627                 p->spk_mask = 0;
 628                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 629                         if (p->speakers[j]) {
 630                                 p->channels++;
 631                                 p->spk_mask |= p->speakers[j];
 632                         }
 633         }
 634 }
 635
 636 static int get_channel_allocation_order(int ca)
 637 {
 638         int i;
 639
 640         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 641                 if (channel_allocations[i].ca_index == ca)
 642                         break;
 643         }
 644         return i;
 645 }
 646
 647 /*
 648  * The transformation takes two steps:
 649  *
 650  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 651  *            spk_mask => (channel_allocations[])         => ai->CA
 652  *
 653  * TODO: it could select the wrong CA from multiple candidates.
 654 */
 655 static int hdmi_channel_allocation(struct hda_codec *codec,
 656                                    struct hdmi_eld *eld, int channels)
 657 {
 658         int i;
 659         int ca = 0;
 660         int spk_mask = 0;
 661         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 662
 663         /*
 664          * CA defaults to 0 for basic stereo audio
 665          */
 666         if (channels <= 2)
 667                 return 0;
 668
 669         /*
 670          * expand ELD's speaker allocation mask
 671          *
 672          * ELD tells the speaker mask in a compact(paired) form,
 673          * expand ELD's notions to match the ones used by Audio InfoFrame.
 674          */
 675         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 676                 if (eld->info.spk_alloc & (1 << i))
 677                         spk_mask |= eld_speaker_allocation_bits[i];
 678         }
 679
 680         /* search for the first working match in the CA table */
 681         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 682                 if (channels == channel_allocations[i].channels &&
 683                     (spk_mask & channel_allocations[i].spk_mask) ==
 684                                 channel_allocations[i].spk_mask) {
 685                         ca = channel_allocations[i].ca_index;
 686                         break;
 687                 }
 688         }
 689
 690         if (!ca) {
 691                 /* if there was no match, select the regular ALSA channel
 692                  * allocation with the matching number of channels */
 693                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 694                         if (channels == channel_allocations[i].channels) {
 695                                 ca = channel_allocations[i].ca_index;
 696                                 break;
 697                         }
 698                 }
 699         }
 700
 701         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 702         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 703                     ca, channels, buf);
 704
 705         return ca;
 706 }
 707
 708 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 709                                        hda_nid_t pin_nid)
 710 {
 711 #ifdef CONFIG_SND_DEBUG_VERBOSE
 712         struct hdmi_spec *spec = codec->spec;
 713         int i;
 714         int channel;
 715
 716         for (i = 0; i < 8; i++) {
 717                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 718                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 719                                                 channel, i);
 720         }
 721 #endif
 722 }
 723
 724 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 725                                        hda_nid_t pin_nid,
 726                                        bool non_pcm,
 727                                        int ca)
 728 {
 729         struct hdmi_spec *spec = codec->spec;
 730         struct cea_channel_speaker_allocation *ch_alloc;
 731         int i;
 732         int err;
 733         int order;
 734         int non_pcm_mapping[8];
 735
 736         order = get_channel_allocation_order(ca);
 737         ch_alloc = &channel_allocations[order];
 738
 739         if (hdmi_channel_mapping[ca][1] == 0) {
 740                 int hdmi_slot = 0;
 741                 /* fill actual channel mappings in ALSA channel (i) order */
 742                 for (i = 0; i < ch_alloc->channels; i++) {
 743                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 744                                 hdmi_slot++; /* skip zero slots */
 745
 746                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 747                 }
 748                 /* fill the rest of the slots with ALSA channel 0xf */
 749                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 750                         if (!ch_alloc->speakers[7 - hdmi_slot])
 751                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 752         }
 753
 754         if (non_pcm) {
 755                 for (i = 0; i < ch_alloc->channels; i++)
 756                         non_pcm_mapping[i] = (i << 4) | i;
 757                 for (; i < 8; i++)
 758                         non_pcm_mapping[i] = (0xf << 4) | i;
 759         }
 760
 761         for (i = 0; i < 8; i++) {
 762                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 763                 int hdmi_slot = slotsetup & 0x0f;
 764                 int channel = (slotsetup & 0xf0) >> 4;
 765                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 766                 if (err) {
 767                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 768                         break;
 769                 }
 770         }
 771 }
 772
 773 struct channel_map_table {
 774         unsigned char map;              /* ALSA API channel map position */
 775         int spk_mask;                   /* speaker position bit mask */
 776 };
 777
 778 static struct channel_map_table map_tables[] = {
 779         { SNDRV_CHMAP_FL,       FL },
 780         { SNDRV_CHMAP_FR,       FR },
 781         { SNDRV_CHMAP_RL,       RL },
 782         { SNDRV_CHMAP_RR,       RR },
 783         { SNDRV_CHMAP_LFE,      LFE },
 784         { SNDRV_CHMAP_FC,       FC },
 785         { SNDRV_CHMAP_RLC,      RLC },
 786         { SNDRV_CHMAP_RRC,      RRC },
 787         { SNDRV_CHMAP_RC,       RC },
 788         { SNDRV_CHMAP_FLC,      FLC },
 789         { SNDRV_CHMAP_FRC,      FRC },
 790         { SNDRV_CHMAP_TFL,      FLH },
 791         { SNDRV_CHMAP_TFR,      FRH },
 792         { SNDRV_CHMAP_FLW,      FLW },
 793         { SNDRV_CHMAP_FRW,      FRW },
 794         { SNDRV_CHMAP_TC,       TC },
 795         { SNDRV_CHMAP_TFC,      FCH },
 796         {} /* terminator */
 797 };
 798
 799 /* from ALSA API channel position to speaker bit mask */
 800 static int to_spk_mask(unsigned char c)
 801 {
 802         struct channel_map_table *t = map_tables;
 803         for (; t->map; t++) {
 804                 if (t->map == c)
 805                         return t->spk_mask;
 806         }
 807         return 0;
 808 }
 809
 810 /* from ALSA API channel position to CEA slot */
 811 static int to_cea_slot(int ordered_ca, unsigned char pos)
 812 {
 813         int mask = to_spk_mask(pos);
 814         int i;
 815
 816         if (mask) {
 817                 for (i = 0; i < 8; i++) {
 818                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 819                                 return i;
 820                 }
 821         }
 822
 823         return -1;
 824 }
 825
 826 /* from speaker bit mask to ALSA API channel position */
 827 static int spk_to_chmap(int spk)
 828 {
 829         struct channel_map_table *t = map_tables;
 830         for (; t->map; t++) {
 831                 if (t->spk_mask == spk)
 832                         return t->map;
 833         }
 834         return 0;
 835 }
 836
 837 /* from CEA slot to ALSA API channel position */
 838 static int from_cea_slot(int ordered_ca, unsigned char slot)
 839 {
 840         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 841
 842         return spk_to_chmap(mask);
 843 }
 844
 845 /* get the CA index corresponding to the given ALSA API channel map */
 846 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 847 {
 848         int i, spks = 0, spk_mask = 0;
 849
 850         for (i = 0; i < chs; i++) {
 851                 int mask = to_spk_mask(map[i]);
 852                 if (mask) {
 853                         spk_mask |= mask;
 854                         spks++;
 855                 }
 856         }
 857
 858         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 859                 if ((chs == channel_allocations[i].channels ||
 860                      spks == channel_allocations[i].channels) &&
 861                     (spk_mask & channel_allocations[i].spk_mask) ==
 862                                 channel_allocations[i].spk_mask)
 863                         return channel_allocations[i].ca_index;
 864         }
 865         return -1;
 866 }
 867
 868 /* set up the channel slots for the given ALSA API channel map */
 869 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 870                                              hda_nid_t pin_nid,
 871                                              int chs, unsigned char *map,
 872                                              int ca)
 873 {
 874         struct hdmi_spec *spec = codec->spec;
 875         int ordered_ca = get_channel_allocation_order(ca);
 876         int alsa_pos, hdmi_slot;
 877         int assignments[8] = {[0 ... 7] = 0xf};
 878
 879         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 880
 881                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 882
 883                 if (hdmi_slot < 0)
 884                         continue; /* unassigned channel */
 885
 886                 assignments[hdmi_slot] = alsa_pos;
 887         }
 888
 889         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 890                 int err;
 891
 892                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 893                                                      assignments[hdmi_slot]);
 894                 if (err)
 895                         return -EINVAL;
 896         }
 897         return 0;
 898 }
 899
 900 /* store ALSA API channel map from the current default map */
 901 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 902 {
 903         int i;
 904         int ordered_ca = get_channel_allocation_order(ca);
 905         for (i = 0; i < 8; i++) {
 906                 if (i < channel_allocations[ordered_ca].channels)
 907                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 908                 else
 909                         map[i] = 0;
 910         }
 911 }
 912
 913 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 914                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 915                                        int channels, unsigned char *map,
 916                                        bool chmap_set)
 917 {
 918         if (!non_pcm && chmap_set) {
 919                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 920                                                   channels, map, ca);
 921         } else {
 922                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 923                 hdmi_setup_fake_chmap(map, ca);
 924         }
 925
 926         hdmi_debug_channel_mapping(codec, pin_nid);
 927 }
 928
 929 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 930                                      int asp_slot, int channel)
 931 {
 932         return snd_hda_codec_write(codec, pin_nid, 0,
 933                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 934                                    (channel << 4) | asp_slot);
 935 }
 936
 937 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 938                                      int asp_slot)
 939 {
 940         return (snd_hda_codec_read(codec, pin_nid, 0,
 941                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 942                                    asp_slot) & 0xf0) >> 4;
 943 }
 944
 945 /*
 946  * Audio InfoFrame routines
 947  */
 948
 949 /*
 950  * Enable Audio InfoFrame Transmission
 951  */
 952 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 953                                        hda_nid_t pin_nid)
 954 {
 955         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 956         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 957                                                 AC_DIPXMIT_BEST);
 958 }
 959
 960 /*
 961  * Disable Audio InfoFrame Transmission
 962  */
 963 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 964                                       hda_nid_t pin_nid)
 965 {
 966         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 967         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 968                                                 AC_DIPXMIT_DISABLE);
 969 }
 970
 971 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 972 {
 973 #ifdef CONFIG_SND_DEBUG_VERBOSE
 974         int i;
 975         int size;
 976
 977         size = snd_hdmi_get_eld_size(codec, pin_nid);
 978         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 979
 980         for (i = 0; i < 8; i++) {
 981                 size = snd_hda_codec_read(codec, pin_nid, 0,
 982                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 983                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 984         }
 985 #endif
 986 }
 987
 988 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 989 {
 990 #ifdef BE_PARANOID
 991         int i, j;
 992         int size;
 993         int pi, bi;
 994         for (i = 0; i < 8; i++) {
 995                 size = snd_hda_codec_read(codec, pin_nid, 0,
 996                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 997                 if (size == 0)
 998                         continue;
 999
1000                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1001                 for (j = 1; j < 1000; j++) {
1002                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1003                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1004                         if (pi != i)
1005                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1006                                                 bi, pi, i);
1007                         if (bi == 0) /* byte index wrapped around */
1008                                 break;
1009                 }
1010                 codec_dbg(codec,
1011                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1012                         i, size, j);
1013         }
1014 #endif
1015 }
1016
1017 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1018 {
1019         u8 *bytes = (u8 *)hdmi_ai;
1020         u8 sum = 0;
1021         int i;
1022
1023         hdmi_ai->checksum = 0;
1024
1025         for (i = 0; i < sizeof(*hdmi_ai); i++)
1026                 sum += bytes[i];
1027
1028         hdmi_ai->checksum = -sum;
1029 }
1030
1031 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1032                                       hda_nid_t pin_nid,
1033                                       u8 *dip, int size)
1034 {
1035         int i;
1036
1037         hdmi_debug_dip_size(codec, pin_nid);
1038         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1039
1040         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1041         for (i = 0; i < size; i++)
1042                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1043 }
1044
1045 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1046                                     u8 *dip, int size)
1047 {
1048         u8 val;
1049         int i;
1050
1051         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1052                                                             != AC_DIPXMIT_BEST)
1053                 return false;
1054
1055         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1056         for (i = 0; i < size; i++) {
1057                 val = snd_hda_codec_read(codec, pin_nid, 0,
1058                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1059                 if (val != dip[i])
1060                         return false;
1061         }
1062
1063         return true;
1064 }
1065
1066 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1067                                      hda_nid_t pin_nid,
1068                                      int ca, int active_channels,
1069                                      int conn_type)
1070 {
1071         union audio_infoframe ai;
1072
1073         memset(&ai, 0, sizeof(ai));
1074         if (conn_type == 0) { /* HDMI */
1075                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1076
1077                 hdmi_ai->type           = 0x84;
1078                 hdmi_ai->ver            = 0x01;
1079                 hdmi_ai->len            = 0x0a;
1080                 hdmi_ai->CC02_CT47      = active_channels - 1;
1081                 hdmi_ai->CA             = ca;
1082                 hdmi_checksum_audio_infoframe(hdmi_ai);
1083         } else if (conn_type == 1) { /* DisplayPort */
1084                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1085
1086                 dp_ai->type             = 0x84;
1087                 dp_ai->len              = 0x1b;
1088                 dp_ai->ver              = 0x11 << 2;
1089                 dp_ai->CC02_CT47        = active_channels - 1;
1090                 dp_ai->CA               = ca;
1091         } else {
1092                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1093                             pin_nid);
1094                 return;
1095         }
1096
1097         /*
1098          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1099          * sizeof(*dp_ai) to avoid partial match/update problems when
1100          * the user switches between HDMI/DP monitors.
1101          */
1102         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1103                                         sizeof(ai))) {
1104                 codec_dbg(codec,
1105                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1106                             pin_nid,
1107                             active_channels, ca);
1108                 hdmi_stop_infoframe_trans(codec, pin_nid);
1109                 hdmi_fill_audio_infoframe(codec, pin_nid,
1110                                             ai.bytes, sizeof(ai));
1111                 hdmi_start_infoframe_trans(codec, pin_nid);
1112         }
1113 }
1114
1115 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1116                                        struct hdmi_spec_per_pin *per_pin,
1117                                        bool non_pcm)
1118 {
1119         struct hdmi_spec *spec = codec->spec;
1120         hda_nid_t pin_nid = per_pin->pin_nid;
1121         int channels = per_pin->channels;
1122         int active_channels;
1123         struct hdmi_eld *eld;
1124         int ca, ordered_ca;
1125
1126         if (!channels)
1127                 return;
1128
1129         if (is_haswell_plus(codec))
1130                 snd_hda_codec_write(codec, pin_nid, 0,
1131                                             AC_VERB_SET_AMP_GAIN_MUTE,
1132                                             AMP_OUT_UNMUTE);
1133
1134         eld = &per_pin->sink_eld;
1135
1136         if (!non_pcm && per_pin->chmap_set)
1137                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1138         else
1139                 ca = hdmi_channel_allocation(codec, eld, channels);
1140         if (ca < 0)
1141                 ca = 0;
1142
1143         ordered_ca = get_channel_allocation_order(ca);
1144         active_channels = channel_allocations[ordered_ca].channels;
1145
1146         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1147
1148         /*
1149          * always configure channel mapping, it may have been changed by the
1150          * user in the meantime
1151          */
1152         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1153                                    channels, per_pin->chmap,
1154                                    per_pin->chmap_set);
1155
1156         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1157                                       eld->info.conn_type);
1158
1159         per_pin->non_pcm = non_pcm;
1160 }
1161
1162 /*
1163  * Unsolicited events
1164  */
1165
1166 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1167
1168 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1169 {
1170         struct hdmi_spec *spec = codec->spec;
1171         int pin_idx = pin_nid_to_pin_index(codec, nid);
1172
1173         if (pin_idx < 0)
1174                 return;
1175         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1176                 snd_hda_jack_report_sync(codec);
1177 }
1178
1179 static void jack_callback(struct hda_codec *codec,
1180                           struct hda_jack_callback *jack)
1181 {
1182         check_presence_and_report(codec, jack->tbl->nid);
1183 }
1184
1185 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1186 {
1187         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1188         struct hda_jack_tbl *jack;
1189         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1190
1191         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1192         if (!jack)
1193                 return;
1194         jack->jack_dirty = 1;
1195
1196         codec_dbg(codec,
1197                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1198                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1199                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1200
1201         check_presence_and_report(codec, jack->nid);
1202 }
1203
1204 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1205 {
1206         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1207         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1208         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1209         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1210
1211         codec_info(codec,
1212                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1213                 codec->addr,
1214                 tag,
1215                 subtag,
1216                 cp_state,
1217                 cp_ready);
1218
1219         /* TODO */
1220         if (cp_state)
1221                 ;
1222         if (cp_ready)
1223                 ;
1224 }
1225
1226
1227 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1228 {
1229         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1230         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1231
1232         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1233                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1234                 return;
1235         }
1236
1237         if (subtag == 0)
1238                 hdmi_intrinsic_event(codec, res);
1239         else
1240                 hdmi_non_intrinsic_event(codec, res);
1241 }
1242
1243 static void haswell_verify_D0(struct hda_codec *codec,
1244                 hda_nid_t cvt_nid, hda_nid_t nid)
1245 {
1246         int pwr;
1247
1248         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1249          * thus pins could only choose converter 0 for use. Make sure the
1250          * converters are in correct power state */
1251         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1252                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1253
1254         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1255                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1256                                     AC_PWRST_D0);
1257                 msleep(40);
1258                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1259                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1260                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1261         }
1262 }
1263
1264 /*
1265  * Callbacks
1266  */
1267
1268 /* HBR should be Non-PCM, 8 channels */
1269 #define is_hbr_format(format) \
1270         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1271
1272 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1273                               bool hbr)
1274 {
1275         int pinctl, new_pinctl;
1276
1277         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1278                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1279                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1280
1281                 if (pinctl < 0)
1282                         return hbr ? -EINVAL : 0;
1283
1284                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1285                 if (hbr)
1286                         new_pinctl |= AC_PINCTL_EPT_HBR;
1287                 else
1288                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1289
1290                 codec_dbg(codec,
1291                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1292                             pin_nid,
1293                             pinctl == new_pinctl ? "" : "new-",
1294                             new_pinctl);
1295
1296                 if (pinctl != new_pinctl)
1297                         snd_hda_codec_write(codec, pin_nid, 0,
1298                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1299                                             new_pinctl);
1300         } else if (hbr)
1301                 return -EINVAL;
1302
1303         return 0;
1304 }
1305
1306 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1307                               hda_nid_t pin_nid, u32 stream_tag, int format)
1308 {
1309         struct hdmi_spec *spec = codec->spec;
1310         int err;
1311
1312         if (is_haswell_plus(codec))
1313                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1314
1315         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1316
1317         if (err) {
1318                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1319                 return err;
1320         }
1321
1322         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1323         return 0;
1324 }
1325
1326 static int hdmi_choose_cvt(struct hda_codec *codec,
1327                         int pin_idx, int *cvt_id, int *mux_id)
1328 {
1329         struct hdmi_spec *spec = codec->spec;
1330         struct hdmi_spec_per_pin *per_pin;
1331         struct hdmi_spec_per_cvt *per_cvt = NULL;
1332         int cvt_idx, mux_idx = 0;
1333
1334         per_pin = get_pin(spec, pin_idx);
1335
1336         /* Dynamically assign converter to stream */
1337         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1338                 per_cvt = get_cvt(spec, cvt_idx);
1339
1340                 /* Must not already be assigned */
1341                 if (per_cvt->assigned)
1342                         continue;
1343                 /* Must be in pin's mux's list of converters */
1344                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1345                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1346                                 break;
1347                 /* Not in mux list */
1348                 if (mux_idx == per_pin->num_mux_nids)
1349                         continue;
1350                 break;
1351         }
1352
1353         /* No free converters */
1354         if (cvt_idx == spec->num_cvts)
1355                 return -ENODEV;
1356
1357         per_pin->mux_idx = mux_idx;
1358
1359         if (cvt_id)
1360                 *cvt_id = cvt_idx;
1361         if (mux_id)
1362                 *mux_id = mux_idx;
1363
1364         return 0;
1365 }
1366
1367 /* Assure the pin select the right convetor */
1368 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1369                         struct hdmi_spec_per_pin *per_pin)
1370 {
1371         hda_nid_t pin_nid = per_pin->pin_nid;
1372         int mux_idx, curr;
1373
1374         mux_idx = per_pin->mux_idx;
1375         curr = snd_hda_codec_read(codec, pin_nid, 0,
1376                                           AC_VERB_GET_CONNECT_SEL, 0);
1377         if (curr != mux_idx)
1378                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1379                                             AC_VERB_SET_CONNECT_SEL,
1380                                             mux_idx);
1381 }
1382
1383 /* Intel HDMI workaround to fix audio routing issue:
1384  * For some Intel display codecs, pins share the same connection list.
1385  * So a conveter can be selected by multiple pins and playback on any of these
1386  * pins will generate sound on the external display, because audio flows from
1387  * the same converter to the display pipeline. Also muting one pin may make
1388  * other pins have no sound output.
1389  * So this function assures that an assigned converter for a pin is not selected
1390  * by any other pins.
1391  */
1392 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1393                         hda_nid_t pin_nid, int mux_idx)
1394 {
1395         struct hdmi_spec *spec = codec->spec;
1396         hda_nid_t nid, end_nid;
1397         int cvt_idx, curr;
1398         struct hdmi_spec_per_cvt *per_cvt;
1399
1400         /* configure all pins, including "no physical connection" ones */
1401         end_nid = codec->start_nid + codec->num_nodes;
1402         for (nid = codec->start_nid; nid < end_nid; nid++) {
1403                 unsigned int wid_caps = get_wcaps(codec, nid);
1404                 unsigned int wid_type = get_wcaps_type(wid_caps);
1405
1406                 if (wid_type != AC_WID_PIN)
1407                         continue;
1408
1409                 if (nid == pin_nid)
1410                         continue;
1411
1412                 curr = snd_hda_codec_read(codec, nid, 0,
1413                                           AC_VERB_GET_CONNECT_SEL, 0);
1414                 if (curr != mux_idx)
1415                         continue;
1416
1417                 /* choose an unassigned converter. The conveters in the
1418                  * connection list are in the same order as in the codec.
1419                  */
1420                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1421                         per_cvt = get_cvt(spec, cvt_idx);
1422                         if (!per_cvt->assigned) {
1423                                 codec_dbg(codec,
1424                                           "choose cvt %d for pin nid %d\n",
1425                                         cvt_idx, nid);
1426                                 snd_hda_codec_write_cache(codec, nid, 0,
1427                                             AC_VERB_SET_CONNECT_SEL,
1428                                             cvt_idx);
1429                                 break;
1430                         }
1431                 }
1432         }
1433 }
1434
1435 /*
1436  * HDA PCM callbacks
1437  */
1438 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1439                          struct hda_codec *codec,
1440                          struct snd_pcm_substream *substream)
1441 {
1442         struct hdmi_spec *spec = codec->spec;
1443         struct snd_pcm_runtime *runtime = substream->runtime;
1444         int pin_idx, cvt_idx, mux_idx = 0;
1445         struct hdmi_spec_per_pin *per_pin;
1446         struct hdmi_eld *eld;
1447         struct hdmi_spec_per_cvt *per_cvt = NULL;
1448         int err;
1449
1450         /* Validate hinfo */
1451         pin_idx = hinfo_to_pin_index(codec, hinfo);
1452         if (snd_BUG_ON(pin_idx < 0))
1453                 return -EINVAL;
1454         per_pin = get_pin(spec, pin_idx);
1455         eld = &per_pin->sink_eld;
1456
1457         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1458         if (err < 0)
1459                 return err;
1460
1461         per_cvt = get_cvt(spec, cvt_idx);
1462         /* Claim converter */
1463         per_cvt->assigned = 1;
1464         per_pin->cvt_nid = per_cvt->cvt_nid;
1465         hinfo->nid = per_cvt->cvt_nid;
1466
1467         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1468                             AC_VERB_SET_CONNECT_SEL,
1469                             mux_idx);
1470
1471         /* configure unused pins to choose other converters */
1472         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1473                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1474
1475         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1476
1477         /* Initially set the converter's capabilities */
1478         hinfo->channels_min = per_cvt->channels_min;
1479         hinfo->channels_max = per_cvt->channels_max;
1480         hinfo->rates = per_cvt->rates;
1481         hinfo->formats = per_cvt->formats;
1482         hinfo->maxbps = per_cvt->maxbps;
1483
1484         /* Restrict capabilities by ELD if this isn't disabled */
1485         if (!static_hdmi_pcm && eld->eld_valid) {
1486                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1487                 if (hinfo->channels_min > hinfo->channels_max ||
1488                     !hinfo->rates || !hinfo->formats) {
1489                         per_cvt->assigned = 0;
1490                         hinfo->nid = 0;
1491                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1492                         return -ENODEV;
1493                 }
1494         }
1495
1496         /* Store the updated parameters */
1497         runtime->hw.channels_min = hinfo->channels_min;
1498         runtime->hw.channels_max = hinfo->channels_max;
1499         runtime->hw.formats = hinfo->formats;
1500         runtime->hw.rates = hinfo->rates;
1501
1502         snd_pcm_hw_constraint_step(substream->runtime, 0,
1503                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1504         return 0;
1505 }
1506
1507 /*
1508  * HDA/HDMI auto parsing
1509  */
1510 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1511 {
1512         struct hdmi_spec *spec = codec->spec;
1513         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1514         hda_nid_t pin_nid = per_pin->pin_nid;
1515
1516         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1517                 codec_warn(codec,
1518                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1519                            pin_nid, get_wcaps(codec, pin_nid));
1520                 return -EINVAL;
1521         }
1522
1523         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1524                                                         per_pin->mux_nids,
1525                                                         HDA_MAX_CONNECTIONS);
1526
1527         return 0;
1528 }
1529
1530 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1531 {
1532         struct hda_jack_tbl *jack;
1533         struct hda_codec *codec = per_pin->codec;
1534         struct hdmi_spec *spec = codec->spec;
1535         struct hdmi_eld *eld = &spec->temp_eld;
1536         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1537         hda_nid_t pin_nid = per_pin->pin_nid;
1538         /*
1539          * Always execute a GetPinSense verb here, even when called from
1540          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1541          * response's PD bit is not the real PD value, but indicates that
1542          * the real PD value changed. An older version of the HD-audio
1543          * specification worked this way. Hence, we just ignore the data in
1544          * the unsolicited response to avoid custom WARs.
1545          */
1546         int present;
1547         bool update_eld = false;
1548         bool eld_changed = false;
1549         bool ret;
1550
1551         snd_hda_power_up(codec);
1552         present = snd_hda_pin_sense(codec, pin_nid);
1553
1554         mutex_lock(&per_pin->lock);
1555         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1556         if (pin_eld->monitor_present)
1557                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1558         else
1559                 eld->eld_valid = false;
1560
1561         codec_dbg(codec,
1562                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1563                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1564
1565         if (eld->eld_valid) {
1566                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1567                                                      &eld->eld_size) < 0)
1568                         eld->eld_valid = false;
1569                 else {
1570                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1571                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1572                                                     eld->eld_size) < 0)
1573                                 eld->eld_valid = false;
1574                 }
1575
1576                 if (eld->eld_valid) {
1577                         snd_hdmi_show_eld(codec, &eld->info);
1578                         update_eld = true;
1579                 }
1580                 else if (repoll) {
1581                         queue_delayed_work(codec->bus->workq,
1582                                            &per_pin->work,
1583                                            msecs_to_jiffies(300));
1584                         goto unlock;
1585                 }
1586         }
1587
1588         if (pin_eld->eld_valid != eld->eld_valid)
1589                 eld_changed = true;
1590
1591         if (pin_eld->eld_valid && !eld->eld_valid)
1592                 update_eld = true;
1593
1594         if (update_eld) {
1595                 bool old_eld_valid = pin_eld->eld_valid;
1596                 pin_eld->eld_valid = eld->eld_valid;
1597                 if (pin_eld->eld_size != eld->eld_size ||
1598                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1599                                      eld->eld_size) != 0) {
1600                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1601                                eld->eld_size);
1602                         eld_changed = true;
1603                 }
1604                 pin_eld->eld_size = eld->eld_size;
1605                 pin_eld->info = eld->info;
1606
1607                 /*
1608                  * Re-setup pin and infoframe. This is needed e.g. when
1609                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1610                  * - transcoder can change during stream playback on Haswell
1611                  *   and this can make HW reset converter selection on a pin.
1612                  */
1613                 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1614                         if (is_haswell_plus(codec) ||
1615                                 is_valleyview_plus(codec)) {
1616                                 intel_verify_pin_cvt_connect(codec, per_pin);
1617                                 intel_not_share_assigned_cvt(codec, pin_nid,
1618                                                         per_pin->mux_idx);
1619                         }
1620
1621                         hdmi_setup_audio_infoframe(codec, per_pin,
1622                                                    per_pin->non_pcm);
1623                 }
1624         }
1625
1626         if (eld_changed)
1627                 snd_ctl_notify(codec->bus->card,
1628                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1629                                &per_pin->eld_ctl->id);
1630  unlock:
1631         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1632
1633         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1634         if (jack)
1635                 jack->block_report = !ret;
1636
1637         mutex_unlock(&per_pin->lock);
1638         snd_hda_power_down(codec);
1639         return ret;
1640 }
1641
1642 static void hdmi_repoll_eld(struct work_struct *work)
1643 {
1644         struct hdmi_spec_per_pin *per_pin =
1645         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1646
1647         if (per_pin->repoll_count++ > 6)
1648                 per_pin->repoll_count = 0;
1649
1650         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1651                 snd_hda_jack_report_sync(per_pin->codec);
1652 }
1653
1654 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1655                                              hda_nid_t nid);
1656
1657 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1658 {
1659         struct hdmi_spec *spec = codec->spec;
1660         unsigned int caps, config;
1661         int pin_idx;
1662         struct hdmi_spec_per_pin *per_pin;
1663         int err;
1664
1665         caps = snd_hda_query_pin_caps(codec, pin_nid);
1666         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1667                 return 0;
1668
1669         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1670         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1671                 return 0;
1672
1673         if (is_haswell_plus(codec))
1674                 intel_haswell_fixup_connect_list(codec, pin_nid);
1675
1676         pin_idx = spec->num_pins;
1677         per_pin = snd_array_new(&spec->pins);
1678         if (!per_pin)
1679                 return -ENOMEM;
1680
1681         per_pin->pin_nid = pin_nid;
1682         per_pin->non_pcm = false;
1683
1684         err = hdmi_read_pin_conn(codec, pin_idx);
1685         if (err < 0)
1686                 return err;
1687
1688         spec->num_pins++;
1689
1690         return 0;
1691 }
1692
1693 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1694 {
1695         struct hdmi_spec *spec = codec->spec;
1696         struct hdmi_spec_per_cvt *per_cvt;
1697         unsigned int chans;
1698         int err;
1699
1700         chans = get_wcaps(codec, cvt_nid);
1701         chans = get_wcaps_channels(chans);
1702
1703         per_cvt = snd_array_new(&spec->cvts);
1704         if (!per_cvt)
1705                 return -ENOMEM;
1706
1707         per_cvt->cvt_nid = cvt_nid;
1708         per_cvt->channels_min = 2;
1709         if (chans <= 16) {
1710                 per_cvt->channels_max = chans;
1711                 if (chans > spec->channels_max)
1712                         spec->channels_max = chans;
1713         }
1714
1715         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1716                                           &per_cvt->rates,
1717                                           &per_cvt->formats,
1718                                           &per_cvt->maxbps);
1719         if (err < 0)
1720                 return err;
1721
1722         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1723                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1724         spec->num_cvts++;
1725
1726         return 0;
1727 }
1728
1729 static int hdmi_parse_codec(struct hda_codec *codec)
1730 {
1731         hda_nid_t nid;
1732         int i, nodes;
1733
1734         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1735         if (!nid || nodes < 0) {
1736                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1737                 return -EINVAL;
1738         }
1739
1740         for (i = 0; i < nodes; i++, nid++) {
1741                 unsigned int caps;
1742                 unsigned int type;
1743
1744                 caps = get_wcaps(codec, nid);
1745                 type = get_wcaps_type(caps);
1746
1747                 if (!(caps & AC_WCAP_DIGITAL))
1748                         continue;
1749
1750                 switch (type) {
1751                 case AC_WID_AUD_OUT:
1752                         hdmi_add_cvt(codec, nid);
1753                         break;
1754                 case AC_WID_PIN:
1755                         hdmi_add_pin(codec, nid);
1756                         break;
1757                 }
1758         }
1759
1760         return 0;
1761 }
1762
1763 /*
1764  */
1765 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1766 {
1767         struct hda_spdif_out *spdif;
1768         bool non_pcm;
1769
1770         mutex_lock(&codec->spdif_mutex);
1771         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1772         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1773         mutex_unlock(&codec->spdif_mutex);
1774         return non_pcm;
1775 }
1776
1777
1778 /*
1779  * HDMI callbacks
1780  */
1781
1782 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1783                                            struct hda_codec *codec,
1784                                            unsigned int stream_tag,
1785                                            unsigned int format,
1786                                            struct snd_pcm_substream *substream)
1787 {
1788         hda_nid_t cvt_nid = hinfo->nid;
1789         struct hdmi_spec *spec = codec->spec;
1790         int pin_idx = hinfo_to_pin_index(codec, hinfo);
1791         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1792         hda_nid_t pin_nid = per_pin->pin_nid;
1793         bool non_pcm;
1794         int pinctl;
1795
1796         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1797                 /* Verify pin:cvt selections to avoid silent audio after S3.
1798                  * After S3, the audio driver restores pin:cvt selections
1799                  * but this can happen before gfx is ready and such selection
1800                  * is overlooked by HW. Thus multiple pins can share a same
1801                  * default convertor and mute control will affect each other,
1802                  * which can cause a resumed audio playback become silent
1803                  * after S3.
1804                  */
1805                 intel_verify_pin_cvt_connect(codec, per_pin);
1806                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1807         }
1808
1809         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1810         mutex_lock(&per_pin->lock);
1811         per_pin->channels = substream->runtime->channels;
1812         per_pin->setup = true;
1813
1814         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1815         mutex_unlock(&per_pin->lock);
1816
1817         if (spec->dyn_pin_out) {
1818                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1819                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1820                 snd_hda_codec_write(codec, pin_nid, 0,
1821                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1822                                     pinctl | PIN_OUT);
1823         }
1824
1825         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1826 }
1827
1828 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1829                                              struct hda_codec *codec,
1830                                              struct snd_pcm_substream *substream)
1831 {
1832         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1833         return 0;
1834 }
1835
1836 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1837                           struct hda_codec *codec,
1838                           struct snd_pcm_substream *substream)
1839 {
1840         struct hdmi_spec *spec = codec->spec;
1841         int cvt_idx, pin_idx;
1842         struct hdmi_spec_per_cvt *per_cvt;
1843         struct hdmi_spec_per_pin *per_pin;
1844         int pinctl;
1845
1846         if (hinfo->nid) {
1847                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1848                 if (snd_BUG_ON(cvt_idx < 0))
1849                         return -EINVAL;
1850                 per_cvt = get_cvt(spec, cvt_idx);
1851
1852                 snd_BUG_ON(!per_cvt->assigned);
1853                 per_cvt->assigned = 0;
1854                 hinfo->nid = 0;
1855
1856                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1857                 if (snd_BUG_ON(pin_idx < 0))
1858                         return -EINVAL;
1859                 per_pin = get_pin(spec, pin_idx);
1860
1861                 if (spec->dyn_pin_out) {
1862                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1863                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1864                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1865                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1866                                             pinctl & ~PIN_OUT);
1867                 }
1868
1869                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1870
1871                 mutex_lock(&per_pin->lock);
1872                 per_pin->chmap_set = false;
1873                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1874
1875                 per_pin->setup = false;
1876                 per_pin->channels = 0;
1877                 mutex_unlock(&per_pin->lock);
1878         }
1879
1880         return 0;
1881 }
1882
1883 static const struct hda_pcm_ops generic_ops = {
1884         .open = hdmi_pcm_open,
1885         .close = hdmi_pcm_close,
1886         .prepare = generic_hdmi_playback_pcm_prepare,
1887         .cleanup = generic_hdmi_playback_pcm_cleanup,
1888 };
1889
1890 /*
1891  * ALSA API channel-map control callbacks
1892  */
1893 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1894                                struct snd_ctl_elem_info *uinfo)
1895 {
1896         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1897         struct hda_codec *codec = info->private_data;
1898         struct hdmi_spec *spec = codec->spec;
1899         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1900         uinfo->count = spec->channels_max;
1901         uinfo->value.integer.min = 0;
1902         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1903         return 0;
1904 }
1905
1906 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1907                                                   int channels)
1908 {
1909         /* If the speaker allocation matches the channel count, it is OK.*/
1910         if (cap->channels != channels)
1911                 return -1;
1912
1913         /* all channels are remappable freely */
1914         return SNDRV_CTL_TLVT_CHMAP_VAR;
1915 }
1916
1917 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1918                                         unsigned int *chmap, int channels)
1919 {
1920         int count = 0;
1921         int c;
1922
1923         for (c = 7; c >= 0; c--) {
1924                 int spk = cap->speakers[c];
1925                 if (!spk)
1926                         continue;
1927
1928                 chmap[count++] = spk_to_chmap(spk);
1929         }
1930
1931         WARN_ON(count != channels);
1932 }
1933
1934 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1935                               unsigned int size, unsigned int __user *tlv)
1936 {
1937         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1938         struct hda_codec *codec = info->private_data;
1939         struct hdmi_spec *spec = codec->spec;
1940         unsigned int __user *dst;
1941         int chs, count = 0;
1942
1943         if (size < 8)
1944                 return -ENOMEM;
1945         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1946                 return -EFAULT;
1947         size -= 8;
1948         dst = tlv + 2;
1949         for (chs = 2; chs <= spec->channels_max; chs++) {
1950                 int i;
1951                 struct cea_channel_speaker_allocation *cap;
1952                 cap = channel_allocations;
1953                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1954                         int chs_bytes = chs * 4;
1955                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1956                         unsigned int tlv_chmap[8];
1957
1958                         if (type < 0)
1959                                 continue;
1960                         if (size < 8)
1961                                 return -ENOMEM;
1962                         if (put_user(type, dst) ||
1963                             put_user(chs_bytes, dst + 1))
1964                                 return -EFAULT;
1965                         dst += 2;
1966                         size -= 8;
1967                         count += 8;
1968                         if (size < chs_bytes)
1969                                 return -ENOMEM;
1970                         size -= chs_bytes;
1971                         count += chs_bytes;
1972                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1973                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1974                                 return -EFAULT;
1975                         dst += chs;
1976                 }
1977         }
1978         if (put_user(count, tlv + 1))
1979                 return -EFAULT;
1980         return 0;
1981 }
1982
1983 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1984                               struct snd_ctl_elem_value *ucontrol)
1985 {
1986         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1987         struct hda_codec *codec = info->private_data;
1988         struct hdmi_spec *spec = codec->spec;
1989         int pin_idx = kcontrol->private_value;
1990         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1991         int i;
1992
1993         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1994                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1995         return 0;
1996 }
1997
1998 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1999                               struct snd_ctl_elem_value *ucontrol)
2000 {
2001         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2002         struct hda_codec *codec = info->private_data;
2003         struct hdmi_spec *spec = codec->spec;
2004         int pin_idx = kcontrol->private_value;
2005         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2006         unsigned int ctl_idx;
2007         struct snd_pcm_substream *substream;
2008         unsigned char chmap[8];
2009         int i, err, ca, prepared = 0;
2010
2011         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2012         substream = snd_pcm_chmap_substream(info, ctl_idx);
2013         if (!substream || !substream->runtime)
2014                 return 0; /* just for avoiding error from alsactl restore */
2015         switch (substream->runtime->status->state) {
2016         case SNDRV_PCM_STATE_OPEN:
2017         case SNDRV_PCM_STATE_SETUP:
2018                 break;
2019         case SNDRV_PCM_STATE_PREPARED:
2020                 prepared = 1;
2021                 break;
2022         default:
2023                 return -EBUSY;
2024         }
2025         memset(chmap, 0, sizeof(chmap));
2026         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2027                 chmap[i] = ucontrol->value.integer.value[i];
2028         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2029                 return 0;
2030         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2031         if (ca < 0)
2032                 return -EINVAL;
2033         if (spec->ops.chmap_validate) {
2034                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2035                 if (err)
2036                         return err;
2037         }
2038         mutex_lock(&per_pin->lock);
2039         per_pin->chmap_set = true;
2040         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2041         if (prepared)
2042                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2043         mutex_unlock(&per_pin->lock);
2044
2045         return 0;
2046 }
2047
2048 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2049 {
2050         struct hdmi_spec *spec = codec->spec;
2051         int pin_idx;
2052
2053         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2054                 struct hda_pcm *info;
2055                 struct hda_pcm_stream *pstr;
2056                 struct hdmi_spec_per_pin *per_pin;
2057
2058                 per_pin = get_pin(spec, pin_idx);
2059                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2060                 info = snd_array_new(&spec->pcm_rec);
2061                 if (!info)
2062                         return -ENOMEM;
2063                 info->name = per_pin->pcm_name;
2064                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2065                 info->own_chmap = true;
2066
2067                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2068                 pstr->substreams = 1;
2069                 pstr->ops = generic_ops;
2070                 /* other pstr fields are set in open */
2071         }
2072
2073         codec->num_pcms = spec->num_pins;
2074         codec->pcm_info = spec->pcm_rec.list;
2075
2076         return 0;
2077 }
2078
2079 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2080 {
2081         char hdmi_str[32] = "HDMI/DP";
2082         struct hdmi_spec *spec = codec->spec;
2083         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2084         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2085
2086         if (pcmdev > 0)
2087                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2088         if (!is_jack_detectable(codec, per_pin->pin_nid))
2089                 strncat(hdmi_str, " Phantom",
2090                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2091
2092         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2093 }
2094
2095 static int generic_hdmi_build_controls(struct hda_codec *codec)
2096 {
2097         struct hdmi_spec *spec = codec->spec;
2098         int err;
2099         int pin_idx;
2100
2101         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2102                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2103
2104                 err = generic_hdmi_build_jack(codec, pin_idx);
2105                 if (err < 0)
2106                         return err;
2107
2108                 err = snd_hda_create_dig_out_ctls(codec,
2109                                                   per_pin->pin_nid,
2110                                                   per_pin->mux_nids[0],
2111                                                   HDA_PCM_TYPE_HDMI);
2112                 if (err < 0)
2113                         return err;
2114                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2115
2116                 /* add control for ELD Bytes */
2117                 err = hdmi_create_eld_ctl(codec, pin_idx,
2118                                           get_pcm_rec(spec, pin_idx)->device);
2119
2120                 if (err < 0)
2121                         return err;
2122
2123                 hdmi_present_sense(per_pin, 0);
2124         }
2125
2126         /* add channel maps */
2127         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2128                 struct snd_pcm_chmap *chmap;
2129                 struct snd_kcontrol *kctl;
2130                 int i;
2131
2132                 if (!codec->pcm_info[pin_idx].pcm)
2133                         break;
2134                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2135                                              SNDRV_PCM_STREAM_PLAYBACK,
2136                                              NULL, 0, pin_idx, &chmap);
2137                 if (err < 0)
2138                         return err;
2139                 /* override handlers */
2140                 chmap->private_data = codec;
2141                 kctl = chmap->kctl;
2142                 for (i = 0; i < kctl->count; i++)
2143                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2144                 kctl->info = hdmi_chmap_ctl_info;
2145                 kctl->get = hdmi_chmap_ctl_get;
2146                 kctl->put = hdmi_chmap_ctl_put;
2147                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2148         }
2149
2150         return 0;
2151 }
2152
2153 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2154 {
2155         struct hdmi_spec *spec = codec->spec;
2156         int pin_idx;
2157
2158         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2159                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2160
2161                 per_pin->codec = codec;
2162                 mutex_init(&per_pin->lock);
2163                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2164                 eld_proc_new(per_pin, pin_idx);
2165         }
2166         return 0;
2167 }
2168
2169 static int generic_hdmi_init(struct hda_codec *codec)
2170 {
2171         struct hdmi_spec *spec = codec->spec;
2172         int pin_idx;
2173
2174         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2175                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2176                 hda_nid_t pin_nid = per_pin->pin_nid;
2177
2178                 hdmi_init_pin(codec, pin_nid);
2179                 snd_hda_jack_detect_enable_callback(codec, pin_nid,
2180                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2181         }
2182         return 0;
2183 }
2184
2185 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2186 {
2187         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2188         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2189         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2190 }
2191
2192 static void hdmi_array_free(struct hdmi_spec *spec)
2193 {
2194         snd_array_free(&spec->pins);
2195         snd_array_free(&spec->cvts);
2196         snd_array_free(&spec->pcm_rec);
2197 }
2198
2199 static void generic_hdmi_free(struct hda_codec *codec)
2200 {
2201         struct hdmi_spec *spec = codec->spec;
2202         int pin_idx;
2203
2204         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2205                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2206
2207                 cancel_delayed_work(&per_pin->work);
2208                 eld_proc_free(per_pin);
2209         }
2210
2211         flush_workqueue(codec->bus->workq);
2212         hdmi_array_free(spec);
2213         kfree(spec);
2214 }
2215
2216 #ifdef CONFIG_PM
2217 static int generic_hdmi_resume(struct hda_codec *codec)
2218 {
2219         struct hdmi_spec *spec = codec->spec;
2220         int pin_idx;
2221
2222         codec->patch_ops.init(codec);
2223         snd_hda_codec_resume_amp(codec);
2224         snd_hda_codec_resume_cache(codec);
2225
2226         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2227                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2228                 hdmi_present_sense(per_pin, 1);
2229         }
2230         return 0;
2231 }
2232 #endif
2233
2234 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2235         .init                   = generic_hdmi_init,
2236         .free                   = generic_hdmi_free,
2237         .build_pcms             = generic_hdmi_build_pcms,
2238         .build_controls         = generic_hdmi_build_controls,
2239         .unsol_event            = hdmi_unsol_event,
2240 #ifdef CONFIG_PM
2241         .resume                 = generic_hdmi_resume,
2242 #endif
2243 };
2244
2245 static const struct hdmi_ops generic_standard_hdmi_ops = {
2246         .pin_get_eld                            = snd_hdmi_get_eld,
2247         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2248         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2249         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2250         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2251         .setup_stream                           = hdmi_setup_stream,
2252         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2253         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2254 };
2255
2256
2257 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2258                                              hda_nid_t nid)
2259 {
2260         struct hdmi_spec *spec = codec->spec;
2261         hda_nid_t conns[4];
2262         int nconns;
2263
2264         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2265         if (nconns == spec->num_cvts &&
2266             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2267                 return;
2268
2269         /* override pins connection list */
2270         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2271         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2272 }
2273
2274 #define INTEL_VENDOR_NID 0x08
2275 #define INTEL_GET_VENDOR_VERB 0xf81
2276 #define INTEL_SET_VENDOR_VERB 0x781
2277 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2278 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2279
2280 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2281                                           bool update_tree)
2282 {
2283         unsigned int vendor_param;
2284
2285         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2286                                 INTEL_GET_VENDOR_VERB, 0);
2287         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2288                 return;
2289
2290         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2291         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2292                                 INTEL_SET_VENDOR_VERB, vendor_param);
2293         if (vendor_param == -1)
2294                 return;
2295
2296         if (update_tree)
2297                 snd_hda_codec_update_widgets(codec);
2298 }
2299
2300 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2301 {
2302         unsigned int vendor_param;
2303
2304         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2305                                 INTEL_GET_VENDOR_VERB, 0);
2306         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2307                 return;
2308
2309         /* enable DP1.2 mode */
2310         vendor_param |= INTEL_EN_DP12;
2311         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2312                                 INTEL_SET_VENDOR_VERB, vendor_param);
2313 }
2314
2315 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2316  * Otherwise you may get severe h/w communication errors.
2317  */
2318 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2319                                 unsigned int power_state)
2320 {
2321         if (power_state == AC_PWRST_D0) {
2322                 intel_haswell_enable_all_pins(codec, false);
2323                 intel_haswell_fixup_enable_dp12(codec);
2324         }
2325
2326         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2327         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2328 }
2329
2330 static int patch_generic_hdmi(struct hda_codec *codec)
2331 {
2332         struct hdmi_spec *spec;
2333
2334         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2335         if (spec == NULL)
2336                 return -ENOMEM;
2337
2338         spec->ops = generic_standard_hdmi_ops;
2339         codec->spec = spec;
2340         hdmi_array_init(spec, 4);
2341
2342         if (is_haswell_plus(codec)) {
2343                 intel_haswell_enable_all_pins(codec, true);
2344                 intel_haswell_fixup_enable_dp12(codec);
2345         }
2346
2347         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2348                 codec->depop_delay = 0;
2349
2350         if (hdmi_parse_codec(codec) < 0) {
2351                 codec->spec = NULL;
2352                 kfree(spec);
2353                 return -EINVAL;
2354         }
2355         codec->patch_ops = generic_hdmi_patch_ops;
2356         if (is_haswell_plus(codec)) {
2357                 codec->patch_ops.set_power_state = haswell_set_power_state;
2358                 codec->dp_mst = true;
2359         }
2360
2361         generic_hdmi_init_per_pins(codec);
2362
2363         init_channel_allocations();
2364
2365         return 0;
2366 }
2367
2368 /*
2369  * Shared non-generic implementations
2370  */
2371
2372 static int simple_playback_build_pcms(struct hda_codec *codec)
2373 {
2374         struct hdmi_spec *spec = codec->spec;
2375         struct hda_pcm *info;
2376         unsigned int chans;
2377         struct hda_pcm_stream *pstr;
2378         struct hdmi_spec_per_cvt *per_cvt;
2379
2380         per_cvt = get_cvt(spec, 0);
2381         chans = get_wcaps(codec, per_cvt->cvt_nid);
2382         chans = get_wcaps_channels(chans);
2383
2384         info = snd_array_new(&spec->pcm_rec);
2385         if (!info)
2386                 return -ENOMEM;
2387         info->name = get_pin(spec, 0)->pcm_name;
2388         sprintf(info->name, "HDMI 0");
2389         info->pcm_type = HDA_PCM_TYPE_HDMI;
2390         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2391         *pstr = spec->pcm_playback;
2392         pstr->nid = per_cvt->cvt_nid;
2393         if (pstr->channels_max <= 2 && chans && chans <= 16)
2394                 pstr->channels_max = chans;
2395
2396         codec->num_pcms = 1;
2397         codec->pcm_info = info;
2398
2399         return 0;
2400 }
2401
2402 /* unsolicited event for jack sensing */
2403 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2404                                     unsigned int res)
2405 {
2406         snd_hda_jack_set_dirty_all(codec);
2407         snd_hda_jack_report_sync(codec);
2408 }
2409
2410 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2411  * as long as spec->pins[] is set correctly
2412  */
2413 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2414
2415 static int simple_playback_build_controls(struct hda_codec *codec)
2416 {
2417         struct hdmi_spec *spec = codec->spec;
2418         struct hdmi_spec_per_cvt *per_cvt;
2419         int err;
2420
2421         per_cvt = get_cvt(spec, 0);
2422         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2423                                           per_cvt->cvt_nid,
2424                                           HDA_PCM_TYPE_HDMI);
2425         if (err < 0)
2426                 return err;
2427         return simple_hdmi_build_jack(codec, 0);
2428 }
2429
2430 static int simple_playback_init(struct hda_codec *codec)
2431 {
2432         struct hdmi_spec *spec = codec->spec;
2433         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2434         hda_nid_t pin = per_pin->pin_nid;
2435
2436         snd_hda_codec_write(codec, pin, 0,
2437                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2438         /* some codecs require to unmute the pin */
2439         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2440                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2441                                     AMP_OUT_UNMUTE);
2442         snd_hda_jack_detect_enable(codec, pin);
2443         return 0;
2444 }
2445
2446 static void simple_playback_free(struct hda_codec *codec)
2447 {
2448         struct hdmi_spec *spec = codec->spec;
2449
2450         hdmi_array_free(spec);
2451         kfree(spec);
2452 }
2453
2454 /*
2455  * Nvidia specific implementations
2456  */
2457
2458 #define Nv_VERB_SET_Channel_Allocation          0xF79
2459 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2460 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2461 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2462
2463 #define nvhdmi_master_con_nid_7x        0x04
2464 #define nvhdmi_master_pin_nid_7x        0x05
2465
2466 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2467         /*front, rear, clfe, rear_surr */
2468         0x6, 0x8, 0xa, 0xc,
2469 };
2470
2471 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2472         /* set audio protect on */
2473         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2474         /* enable digital output on pin widget */
2475         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2476         {} /* terminator */
2477 };
2478
2479 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2480         /* set audio protect on */
2481         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2482         /* enable digital output on pin widget */
2483         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2484         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2485         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2486         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2487         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2488         {} /* terminator */
2489 };
2490
2491 #ifdef LIMITED_RATE_FMT_SUPPORT
2492 /* support only the safe format and rate */
2493 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2494 #define SUPPORTED_MAXBPS        16
2495 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2496 #else
2497 /* support all rates and formats */
2498 #define SUPPORTED_RATES \
2499         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2500         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2501          SNDRV_PCM_RATE_192000)
2502 #define SUPPORTED_MAXBPS        24
2503 #define SUPPORTED_FORMATS \
2504         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2505 #endif
2506
2507 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2508 {
2509         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2510         return 0;
2511 }
2512
2513 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2514 {
2515         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2516         return 0;
2517 }
2518
2519 static unsigned int channels_2_6_8[] = {
2520         2, 6, 8
2521 };
2522
2523 static unsigned int channels_2_8[] = {
2524         2, 8
2525 };
2526
2527 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2528         .count = ARRAY_SIZE(channels_2_6_8),
2529         .list = channels_2_6_8,
2530         .mask = 0,
2531 };
2532
2533 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2534         .count = ARRAY_SIZE(channels_2_8),
2535         .list = channels_2_8,
2536         .mask = 0,
2537 };
2538
2539 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2540                                     struct hda_codec *codec,
2541                                     struct snd_pcm_substream *substream)
2542 {
2543         struct hdmi_spec *spec = codec->spec;
2544         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2545
2546         switch (codec->preset->id) {
2547         case 0x10de0002:
2548         case 0x10de0003:
2549         case 0x10de0005:
2550         case 0x10de0006:
2551                 hw_constraints_channels = &hw_constraints_2_8_channels;
2552                 break;
2553         case 0x10de0007:
2554                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2555                 break;
2556         default:
2557                 break;
2558         }
2559
2560         if (hw_constraints_channels != NULL) {
2561                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2562                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2563                                 hw_constraints_channels);
2564         } else {
2565                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2566                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2567         }
2568
2569         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2570 }
2571
2572 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2573                                      struct hda_codec *codec,
2574                                      struct snd_pcm_substream *substream)
2575 {
2576         struct hdmi_spec *spec = codec->spec;
2577         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2578 }
2579
2580 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2581                                        struct hda_codec *codec,
2582                                        unsigned int stream_tag,
2583                                        unsigned int format,
2584                                        struct snd_pcm_substream *substream)
2585 {
2586         struct hdmi_spec *spec = codec->spec;
2587         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2588                                              stream_tag, format, substream);
2589 }
2590
2591 static const struct hda_pcm_stream simple_pcm_playback = {
2592         .substreams = 1,
2593         .channels_min = 2,
2594         .channels_max = 2,
2595         .ops = {
2596                 .open = simple_playback_pcm_open,
2597                 .close = simple_playback_pcm_close,
2598                 .prepare = simple_playback_pcm_prepare
2599         },
2600 };
2601
2602 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2603         .build_controls = simple_playback_build_controls,
2604         .build_pcms = simple_playback_build_pcms,
2605         .init = simple_playback_init,
2606         .free = simple_playback_free,
2607         .unsol_event = simple_hdmi_unsol_event,
2608 };
2609
2610 static int patch_simple_hdmi(struct hda_codec *codec,
2611                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2612 {
2613         struct hdmi_spec *spec;
2614         struct hdmi_spec_per_cvt *per_cvt;
2615         struct hdmi_spec_per_pin *per_pin;
2616
2617         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2618         if (!spec)
2619                 return -ENOMEM;
2620
2621         codec->spec = spec;
2622         hdmi_array_init(spec, 1);
2623
2624         spec->multiout.num_dacs = 0;  /* no analog */
2625         spec->multiout.max_channels = 2;
2626         spec->multiout.dig_out_nid = cvt_nid;
2627         spec->num_cvts = 1;
2628         spec->num_pins = 1;
2629         per_pin = snd_array_new(&spec->pins);
2630         per_cvt = snd_array_new(&spec->cvts);
2631         if (!per_pin || !per_cvt) {
2632                 simple_playback_free(codec);
2633                 return -ENOMEM;
2634         }
2635         per_cvt->cvt_nid = cvt_nid;
2636         per_pin->pin_nid = pin_nid;
2637         spec->pcm_playback = simple_pcm_playback;
2638
2639         codec->patch_ops = simple_hdmi_patch_ops;
2640
2641         return 0;
2642 }
2643
2644 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2645                                                     int channels)
2646 {
2647         unsigned int chanmask;
2648         int chan = channels ? (channels - 1) : 1;
2649
2650         switch (channels) {
2651         default:
2652         case 0:
2653         case 2:
2654                 chanmask = 0x00;
2655                 break;
2656         case 4:
2657                 chanmask = 0x08;
2658                 break;
2659         case 6:
2660                 chanmask = 0x0b;
2661                 break;
2662         case 8:
2663                 chanmask = 0x13;
2664                 break;
2665         }
2666
2667         /* Set the audio infoframe channel allocation and checksum fields.  The
2668          * channel count is computed implicitly by the hardware. */
2669         snd_hda_codec_write(codec, 0x1, 0,
2670                         Nv_VERB_SET_Channel_Allocation, chanmask);
2671
2672         snd_hda_codec_write(codec, 0x1, 0,
2673                         Nv_VERB_SET_Info_Frame_Checksum,
2674                         (0x71 - chan - chanmask));
2675 }
2676
2677 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2678                                    struct hda_codec *codec,
2679                                    struct snd_pcm_substream *substream)
2680 {
2681         struct hdmi_spec *spec = codec->spec;
2682         int i;
2683
2684         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2685                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2686         for (i = 0; i < 4; i++) {
2687                 /* set the stream id */
2688                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2689                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2690                 /* set the stream format */
2691                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2692                                 AC_VERB_SET_STREAM_FORMAT, 0);
2693         }
2694
2695         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2696          * streams are disabled. */
2697         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2698
2699         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2700 }
2701
2702 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2703                                      struct hda_codec *codec,
2704                                      unsigned int stream_tag,
2705                                      unsigned int format,
2706                                      struct snd_pcm_substream *substream)
2707 {
2708         int chs;
2709         unsigned int dataDCC2, channel_id;
2710         int i;
2711         struct hdmi_spec *spec = codec->spec;
2712         struct hda_spdif_out *spdif;
2713         struct hdmi_spec_per_cvt *per_cvt;
2714
2715         mutex_lock(&codec->spdif_mutex);
2716         per_cvt = get_cvt(spec, 0);
2717         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2718
2719         chs = substream->runtime->channels;
2720
2721         dataDCC2 = 0x2;
2722
2723         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2724         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2725                 snd_hda_codec_write(codec,
2726                                 nvhdmi_master_con_nid_7x,
2727                                 0,
2728                                 AC_VERB_SET_DIGI_CONVERT_1,
2729                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2730
2731         /* set the stream id */
2732         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2733                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2734
2735         /* set the stream format */
2736         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2737                         AC_VERB_SET_STREAM_FORMAT, format);
2738
2739         /* turn on again (if needed) */
2740         /* enable and set the channel status audio/data flag */
2741         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2742                 snd_hda_codec_write(codec,
2743                                 nvhdmi_master_con_nid_7x,
2744                                 0,
2745                                 AC_VERB_SET_DIGI_CONVERT_1,
2746                                 spdif->ctls & 0xff);
2747                 snd_hda_codec_write(codec,
2748                                 nvhdmi_master_con_nid_7x,
2749                                 0,
2750                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2751         }
2752
2753         for (i = 0; i < 4; i++) {
2754                 if (chs == 2)
2755                         channel_id = 0;
2756                 else
2757                         channel_id = i * 2;
2758
2759                 /* turn off SPDIF once;
2760                  *otherwise the IEC958 bits won't be updated
2761                  */
2762                 if (codec->spdif_status_reset &&
2763                 (spdif->ctls & AC_DIG1_ENABLE))
2764                         snd_hda_codec_write(codec,
2765                                 nvhdmi_con_nids_7x[i],
2766                                 0,
2767                                 AC_VERB_SET_DIGI_CONVERT_1,
2768                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2769                 /* set the stream id */
2770                 snd_hda_codec_write(codec,
2771                                 nvhdmi_con_nids_7x[i],
2772                                 0,
2773                                 AC_VERB_SET_CHANNEL_STREAMID,
2774                                 (stream_tag << 4) | channel_id);
2775                 /* set the stream format */
2776                 snd_hda_codec_write(codec,
2777                                 nvhdmi_con_nids_7x[i],
2778                                 0,
2779                                 AC_VERB_SET_STREAM_FORMAT,
2780                                 format);
2781                 /* turn on again (if needed) */
2782                 /* enable and set the channel status audio/data flag */
2783                 if (codec->spdif_status_reset &&
2784                 (spdif->ctls & AC_DIG1_ENABLE)) {
2785                         snd_hda_codec_write(codec,
2786                                         nvhdmi_con_nids_7x[i],
2787                                         0,
2788                                         AC_VERB_SET_DIGI_CONVERT_1,
2789                                         spdif->ctls & 0xff);
2790                         snd_hda_codec_write(codec,
2791                                         nvhdmi_con_nids_7x[i],
2792                                         0,
2793                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2794                 }
2795         }
2796
2797         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2798
2799         mutex_unlock(&codec->spdif_mutex);
2800         return 0;
2801 }
2802
2803 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2804         .substreams = 1,
2805         .channels_min = 2,
2806         .channels_max = 8,
2807         .nid = nvhdmi_master_con_nid_7x,
2808         .rates = SUPPORTED_RATES,
2809         .maxbps = SUPPORTED_MAXBPS,
2810         .formats = SUPPORTED_FORMATS,
2811         .ops = {
2812                 .open = simple_playback_pcm_open,
2813                 .close = nvhdmi_8ch_7x_pcm_close,
2814                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2815         },
2816 };
2817
2818 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2819 {
2820         struct hdmi_spec *spec;
2821         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2822                                     nvhdmi_master_pin_nid_7x);
2823         if (err < 0)
2824                 return err;
2825
2826         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2827         /* override the PCM rates, etc, as the codec doesn't give full list */
2828         spec = codec->spec;
2829         spec->pcm_playback.rates = SUPPORTED_RATES;
2830         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2831         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2832         return 0;
2833 }
2834
2835 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2836 {
2837         struct hdmi_spec *spec = codec->spec;
2838         int err = simple_playback_build_pcms(codec);
2839         if (!err) {
2840                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2841                 info->own_chmap = true;
2842         }
2843         return err;
2844 }
2845
2846 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2847 {
2848         struct hdmi_spec *spec = codec->spec;
2849         struct hda_pcm *info;
2850         struct snd_pcm_chmap *chmap;
2851         int err;
2852
2853         err = simple_playback_build_controls(codec);
2854         if (err < 0)
2855                 return err;
2856
2857         /* add channel maps */
2858         info = get_pcm_rec(spec, 0);
2859         err = snd_pcm_add_chmap_ctls(info->pcm,
2860                                      SNDRV_PCM_STREAM_PLAYBACK,
2861                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2862         if (err < 0)
2863                 return err;
2864         switch (codec->preset->id) {
2865         case 0x10de0002:
2866         case 0x10de0003:
2867         case 0x10de0005:
2868         case 0x10de0006:
2869                 chmap->channel_mask = (1U << 2) | (1U << 8);
2870                 break;
2871         case 0x10de0007:
2872                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2873         }
2874         return 0;
2875 }
2876
2877 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2878 {
2879         struct hdmi_spec *spec;
2880         int err = patch_nvhdmi_2ch(codec);
2881         if (err < 0)
2882                 return err;
2883         spec = codec->spec;
2884         spec->multiout.max_channels = 8;
2885         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2886         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2887         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2888         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2889
2890         /* Initialize the audio infoframe channel mask and checksum to something
2891          * valid */
2892         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2893
2894         return 0;
2895 }
2896
2897 /*
2898  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2899  * - 0x10de0015
2900  * - 0x10de0040
2901  */
2902 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2903                                                     int channels)
2904 {
2905         if (cap->ca_index == 0x00 && channels == 2)
2906                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2907
2908         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2909 }
2910
2911 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2912 {
2913         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2914                 return -EINVAL;
2915
2916         return 0;
2917 }
2918
2919 static int patch_nvhdmi(struct hda_codec *codec)
2920 {
2921         struct hdmi_spec *spec;
2922         int err;
2923
2924         err = patch_generic_hdmi(codec);
2925         if (err)
2926                 return err;
2927
2928         spec = codec->spec;
2929         spec->dyn_pin_out = true;
2930
2931         spec->ops.chmap_cea_alloc_validate_get_type =
2932                 nvhdmi_chmap_cea_alloc_validate_get_type;
2933         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2934
2935         return 0;
2936 }
2937
2938 /*
2939  * ATI/AMD-specific implementations
2940  */
2941
2942 #define is_amdhdmi_rev3_or_later(codec) \
2943         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2944 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2945
2946 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2947 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2948 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2949 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2950 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2951 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2952 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2953 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2954 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2955 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2956 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2957 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2958 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2959 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2960 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2961 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2962 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2963 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2964 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2965 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2966 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2967 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2968 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2969 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2970 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2971
2972 /* AMD specific HDA cvt verbs */
2973 #define ATI_VERB_SET_RAMP_RATE          0x770
2974 #define ATI_VERB_GET_RAMP_RATE          0xf70
2975
2976 #define ATI_OUT_ENABLE 0x1
2977
2978 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2979 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2980
2981 #define ATI_HBR_CAPABLE 0x01
2982 #define ATI_HBR_ENABLE 0x10
2983
2984 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2985                            unsigned char *buf, int *eld_size)
2986 {
2987         /* call hda_eld.c ATI/AMD-specific function */
2988         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2989                                     is_amdhdmi_rev3_or_later(codec));
2990 }
2991
2992 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2993                                         int active_channels, int conn_type)
2994 {
2995         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2996 }
2997
2998 static int atihdmi_paired_swap_fc_lfe(int pos)
2999 {
3000         /*
3001          * ATI/AMD have automatic FC/LFE swap built-in
3002          * when in pairwise mapping mode.
3003          */
3004
3005         switch (pos) {
3006                 /* see channel_allocations[].speakers[] */
3007                 case 2: return 3;
3008                 case 3: return 2;
3009                 default: break;
3010         }
3011
3012         return pos;
3013 }
3014
3015 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3016 {
3017         struct cea_channel_speaker_allocation *cap;
3018         int i, j;
3019
3020         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3021
3022         cap = &channel_allocations[get_channel_allocation_order(ca)];
3023         for (i = 0; i < chs; ++i) {
3024                 int mask = to_spk_mask(map[i]);
3025                 bool ok = false;
3026                 bool companion_ok = false;
3027
3028                 if (!mask)
3029                         continue;
3030
3031                 for (j = 0 + i % 2; j < 8; j += 2) {
3032                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3033                         if (cap->speakers[chan_idx] == mask) {
3034                                 /* channel is in a supported position */
3035                                 ok = true;
3036
3037                                 if (i % 2 == 0 && i + 1 < chs) {
3038                                         /* even channel, check the odd companion */
3039                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3040                                         int comp_mask_req = to_spk_mask(map[i+1]);
3041                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3042
3043                                         if (comp_mask_req == comp_mask_act)
3044                                                 companion_ok = true;
3045                                         else
3046                                                 return -EINVAL;
3047                                 }
3048                                 break;
3049                         }
3050                 }
3051
3052                 if (!ok)
3053                         return -EINVAL;
3054
3055                 if (companion_ok)
3056                         i++; /* companion channel already checked */
3057         }
3058
3059         return 0;
3060 }
3061
3062 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3063                                         int hdmi_slot, int stream_channel)
3064 {
3065         int verb;
3066         int ati_channel_setup = 0;
3067
3068         if (hdmi_slot > 7)
3069                 return -EINVAL;
3070
3071         if (!has_amd_full_remap_support(codec)) {
3072                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3073
3074                 /* In case this is an odd slot but without stream channel, do not
3075                  * disable the slot since the corresponding even slot could have a
3076                  * channel. In case neither have a channel, the slot pair will be
3077                  * disabled when this function is called for the even slot. */
3078                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3079                         return 0;
3080
3081                 hdmi_slot -= hdmi_slot % 2;
3082
3083                 if (stream_channel != 0xf)
3084                         stream_channel -= stream_channel % 2;
3085         }
3086
3087         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3088
3089         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3090
3091         if (stream_channel != 0xf)
3092                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3093
3094         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3095 }
3096
3097 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3098                                         int asp_slot)
3099 {
3100         bool was_odd = false;
3101         int ati_asp_slot = asp_slot;
3102         int verb;
3103         int ati_channel_setup;
3104
3105         if (asp_slot > 7)
3106                 return -EINVAL;
3107
3108         if (!has_amd_full_remap_support(codec)) {
3109                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3110                 if (ati_asp_slot % 2 != 0) {
3111                         ati_asp_slot -= 1;
3112                         was_odd = true;
3113                 }
3114         }
3115
3116         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3117
3118         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3119
3120         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3121                 return 0xf;
3122
3123         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3124 }
3125
3126 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3127                                                             int channels)
3128 {
3129         int c;
3130
3131         /*
3132          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3133          * we need to take that into account (a single channel may take 2
3134          * channel slots if we need to carry a silent channel next to it).
3135          * On Rev3+ AMD codecs this function is not used.
3136          */
3137         int chanpairs = 0;
3138
3139         /* We only produce even-numbered channel count TLVs */
3140         if ((channels % 2) != 0)
3141                 return -1;
3142
3143         for (c = 0; c < 7; c += 2) {
3144                 if (cap->speakers[c] || cap->speakers[c+1])
3145                         chanpairs++;
3146         }
3147
3148         if (chanpairs * 2 != channels)
3149                 return -1;
3150
3151         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3152 }
3153
3154 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3155                                                   unsigned int *chmap, int channels)
3156 {
3157         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3158         int count = 0;
3159         int c;
3160
3161         for (c = 7; c >= 0; c--) {
3162                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3163                 int spk = cap->speakers[chan];
3164                 if (!spk) {
3165                         /* add N/A channel if the companion channel is occupied */
3166                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3167                                 chmap[count++] = SNDRV_CHMAP_NA;
3168
3169                         continue;
3170                 }
3171
3172                 chmap[count++] = spk_to_chmap(spk);
3173         }
3174
3175         WARN_ON(count != channels);
3176 }
3177
3178 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3179                                  bool hbr)
3180 {
3181         int hbr_ctl, hbr_ctl_new;
3182
3183         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3184         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3185                 if (hbr)
3186                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3187                 else
3188                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3189
3190                 codec_dbg(codec,
3191                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3192                                 pin_nid,
3193                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3194                                 hbr_ctl_new);
3195
3196                 if (hbr_ctl != hbr_ctl_new)
3197                         snd_hda_codec_write(codec, pin_nid, 0,
3198                                                 ATI_VERB_SET_HBR_CONTROL,
3199                                                 hbr_ctl_new);
3200
3201         } else if (hbr)
3202                 return -EINVAL;
3203
3204         return 0;
3205 }
3206
3207 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3208                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3209 {
3210
3211         if (is_amdhdmi_rev3_or_later(codec)) {
3212                 int ramp_rate = 180; /* default as per AMD spec */
3213                 /* disable ramp-up/down for non-pcm as per AMD spec */
3214                 if (format & AC_FMT_TYPE_NON_PCM)
3215                         ramp_rate = 0;
3216
3217                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3218         }
3219
3220         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3221 }
3222
3223
3224 static int atihdmi_init(struct hda_codec *codec)
3225 {
3226         struct hdmi_spec *spec = codec->spec;
3227         int pin_idx, err;
3228
3229         err = generic_hdmi_init(codec);
3230
3231         if (err)
3232                 return err;
3233
3234         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3235                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3236
3237                 /* make sure downmix information in infoframe is zero */
3238                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3239
3240                 /* enable channel-wise remap mode if supported */
3241                 if (has_amd_full_remap_support(codec))
3242                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3243                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3244                                             ATI_MULTICHANNEL_MODE_SINGLE);
3245         }
3246
3247         return 0;
3248 }
3249
3250 static int patch_atihdmi(struct hda_codec *codec)
3251 {
3252         struct hdmi_spec *spec;
3253         struct hdmi_spec_per_cvt *per_cvt;
3254         int err, cvt_idx;
3255
3256         err = patch_generic_hdmi(codec);
3257
3258         if (err)
3259                 return err;
3260
3261         codec->patch_ops.init = atihdmi_init;
3262
3263         spec = codec->spec;
3264
3265         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3266         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3267         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3268         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3269         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3270         spec->ops.setup_stream = atihdmi_setup_stream;
3271
3272         if (!has_amd_full_remap_support(codec)) {
3273                 /* override to ATI/AMD-specific versions with pairwise mapping */
3274                 spec->ops.chmap_cea_alloc_validate_get_type =
3275                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3276                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3277                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3278         }
3279
3280         /* ATI/AMD converters do not advertise all of their capabilities */
3281         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3282                 per_cvt = get_cvt(spec, cvt_idx);
3283                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3284                 per_cvt->rates |= SUPPORTED_RATES;
3285                 per_cvt->formats |= SUPPORTED_FORMATS;
3286                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3287         }
3288
3289         spec->channels_max = max(spec->channels_max, 8u);
3290
3291         return 0;
3292 }
3293
3294 /* VIA HDMI Implementation */
3295 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3296 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3297
3298 static int patch_via_hdmi(struct hda_codec *codec)
3299 {
3300         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3301 }
3302
3303 /*
3304  * called from hda_codec.c for generic HDMI support
3305  */
3306 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3307 {
3308         return patch_generic_hdmi(codec);
3309 }
3310 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3311
3312 /*
3313  * patch entries
3314  */
3315 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3316 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3317 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3318 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3319 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3320 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3321 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3322 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3323 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3324 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3325 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3326 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3327 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3328 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3329 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3330 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3331 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3332 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3333 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3334 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3335 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3336 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3337 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3338 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3339 /* 17 is known to be absent */
3340 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3341 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3342 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3343 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3344 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3345 { .id = 0x10de0028, .name = "Tegra12x HDMI",    .patch = patch_nvhdmi },
3346 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3347 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3348 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3349 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3350 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3351 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3352 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3353 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3354 { .id = 0x10de0070, .name = "GPU 70 HDMI/DP",   .patch = patch_nvhdmi },
3355 { .id = 0x10de0071, .name = "GPU 71 HDMI/DP",   .patch = patch_nvhdmi },
3356 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3357 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3358 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3359 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3360 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3361 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3362 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3363 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3364 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3365 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3366 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3367 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3368 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3369 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3370 { .id = 0x80862809, .name = "Skylake HDMI",     .patch = patch_generic_hdmi },
3371 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3372 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3373 { .id = 0x80862883, .name = "Braswell HDMI",    .patch = patch_generic_hdmi },
3374 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3375 {} /* terminator */
3376 };
3377
3378 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3379 MODULE_ALIAS("snd-hda-codec-id:10027919");
3380 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3381 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3382 MODULE_ALIAS("snd-hda-codec-id:10951390");
3383 MODULE_ALIAS("snd-hda-codec-id:10951392");
3384 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3385 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3386 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3387 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3388 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3389 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3390 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3391 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3392 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3393 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3394 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3395 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3396 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3397 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3398 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3399 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3400 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3401 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3402 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3403 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3404 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3405 MODULE_ALIAS("snd-hda-codec-id:10de0028");
3406 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3407 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3408 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3409 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3410 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3411 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3412 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3413 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3414 MODULE_ALIAS("snd-hda-codec-id:10de0070");
3415 MODULE_ALIAS("snd-hda-codec-id:10de0071");
3416 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3417 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3418 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3419 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3420 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3421 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3422 MODULE_ALIAS("snd-hda-codec-id:80860054");
3423 MODULE_ALIAS("snd-hda-codec-id:80862801");
3424 MODULE_ALIAS("snd-hda-codec-id:80862802");
3425 MODULE_ALIAS("snd-hda-codec-id:80862803");
3426 MODULE_ALIAS("snd-hda-codec-id:80862804");
3427 MODULE_ALIAS("snd-hda-codec-id:80862805");
3428 MODULE_ALIAS("snd-hda-codec-id:80862806");
3429 MODULE_ALIAS("snd-hda-codec-id:80862807");
3430 MODULE_ALIAS("snd-hda-codec-id:80862808");
3431 MODULE_ALIAS("snd-hda-codec-id:80862809");
3432 MODULE_ALIAS("snd-hda-codec-id:80862880");
3433 MODULE_ALIAS("snd-hda-codec-id:80862882");
3434 MODULE_ALIAS("snd-hda-codec-id:80862883");
3435 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3436
3437 MODULE_LICENSE("GPL");
3438 MODULE_DESCRIPTION("HDMI HD-audio codec");
3439 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3440 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3441 MODULE_ALIAS("snd-hda-codec-atihdmi");
3442
3443 static struct hda_codec_preset_list intel_list = {
3444         .preset = snd_hda_preset_hdmi,
3445         .owner = THIS_MODULE,
3446 };
3447
3448 static int __init patch_hdmi_init(void)
3449 {
3450         return snd_hda_add_codec_preset(&intel_list);
3451 }
3452
3453 static void __exit patch_hdmi_exit(void)
3454 {
3455         snd_hda_delete_codec_preset(&intel_list);
3456 }
3457
3458 module_init(patch_hdmi_init)
3459 module_exit(patch_hdmi_exit)