Linux 2.6.37
[cascardo/linux.git] / sound / pci / oxygen / oxygen.c
1 /*
2  * C-Media CMI8788 driver for C-Media's reference design and similar models
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  *
6  *
7  *  This driver is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License, version 2.
9  *
10  *  This driver is distributed in the hope that it will be useful,
11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  *  GNU General Public License for more details.
14  *
15  *  You should have received a copy of the GNU General Public License
16  *  along with this driver; if not, write to the Free Software
17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  */
19
20 /*
21  * CMI8788:
22  *
23  * SPI 0 -> 1st AK4396 (front)
24  * SPI 1 -> 2nd AK4396 (surround)
25  * SPI 2 -> 3rd AK4396 (center/LFE)
26  * SPI 3 -> WM8785
27  * SPI 4 -> 4th AK4396 (back)
28  *
29  * GPIO 0 -> DFS0 of AK5385
30  * GPIO 1 -> DFS1 of AK5385
31  * GPIO 8 -> enable headphone amplifier on HT-Omega models
32  *
33  * CM9780:
34  *
35  * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
36  */
37
38 #include <linux/delay.h>
39 #include <linux/mutex.h>
40 #include <linux/pci.h>
41 #include <sound/ac97_codec.h>
42 #include <sound/control.h>
43 #include <sound/core.h>
44 #include <sound/initval.h>
45 #include <sound/pcm.h>
46 #include <sound/pcm_params.h>
47 #include <sound/tlv.h>
48 #include "oxygen.h"
49 #include "ak4396.h"
50 #include "wm8785.h"
51
52 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
53 MODULE_DESCRIPTION("C-Media CMI8788 driver");
54 MODULE_LICENSE("GPL v2");
55 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
56
57 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
58 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
59 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
60
61 module_param_array(index, int, NULL, 0444);
62 MODULE_PARM_DESC(index, "card index");
63 module_param_array(id, charp, NULL, 0444);
64 MODULE_PARM_DESC(id, "ID string");
65 module_param_array(enable, bool, NULL, 0444);
66 MODULE_PARM_DESC(enable, "enable card");
67
68 enum {
69         MODEL_CMEDIA_REF,       /* C-Media's reference design */
70         MODEL_MERIDIAN,         /* AuzenTech X-Meridian */
71         MODEL_CLARO,            /* HT-Omega Claro */
72         MODEL_CLARO_HALO,       /* HT-Omega Claro halo */
73 };
74
75 static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
76         { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
77         { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
78         { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
79         { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
80         { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
81         { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
82         { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_CMEDIA_REF },
83         { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
84         { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
85         { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
86         { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
87         { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
88         { }
89 };
90 MODULE_DEVICE_TABLE(pci, oxygen_ids);
91
92
93 #define GPIO_AK5385_DFS_MASK    0x0003
94 #define GPIO_AK5385_DFS_NORMAL  0x0000
95 #define GPIO_AK5385_DFS_DOUBLE  0x0001
96 #define GPIO_AK5385_DFS_QUAD    0x0002
97
98 #define GPIO_CLARO_HP           0x0100
99
100 struct generic_data {
101         u8 ak4396_regs[4][5];
102         u16 wm8785_regs[3];
103 };
104
105 static void ak4396_write(struct oxygen *chip, unsigned int codec,
106                          u8 reg, u8 value)
107 {
108         /* maps ALSA channel pair number to SPI output */
109         static const u8 codec_spi_map[4] = {
110                 0, 1, 2, 4
111         };
112         struct generic_data *data = chip->model_data;
113
114         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
115                          OXYGEN_SPI_DATA_LENGTH_2 |
116                          OXYGEN_SPI_CLOCK_160 |
117                          (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
118                          OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
119                          AK4396_WRITE | (reg << 8) | value);
120         data->ak4396_regs[codec][reg] = value;
121 }
122
123 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
124                                 u8 reg, u8 value)
125 {
126         struct generic_data *data = chip->model_data;
127
128         if (value != data->ak4396_regs[codec][reg])
129                 ak4396_write(chip, codec, reg, value);
130 }
131
132 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
133 {
134         struct generic_data *data = chip->model_data;
135
136         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
137                          OXYGEN_SPI_DATA_LENGTH_2 |
138                          OXYGEN_SPI_CLOCK_160 |
139                          (3 << OXYGEN_SPI_CODEC_SHIFT) |
140                          OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
141                          (reg << 9) | value);
142         if (reg < ARRAY_SIZE(data->wm8785_regs))
143                 data->wm8785_regs[reg] = value;
144 }
145
146 static void ak4396_registers_init(struct oxygen *chip)
147 {
148         struct generic_data *data = chip->model_data;
149         unsigned int i;
150
151         for (i = 0; i < 4; ++i) {
152                 ak4396_write(chip, i, AK4396_CONTROL_1,
153                              AK4396_DIF_24_MSB | AK4396_RSTN);
154                 ak4396_write(chip, i, AK4396_CONTROL_2,
155                              data->ak4396_regs[0][AK4396_CONTROL_2]);
156                 ak4396_write(chip, i, AK4396_CONTROL_3,
157                              AK4396_PCM);
158                 ak4396_write(chip, i, AK4396_LCH_ATT,
159                              chip->dac_volume[i * 2]);
160                 ak4396_write(chip, i, AK4396_RCH_ATT,
161                              chip->dac_volume[i * 2 + 1]);
162         }
163 }
164
165 static void ak4396_init(struct oxygen *chip)
166 {
167         struct generic_data *data = chip->model_data;
168
169         data->ak4396_regs[0][AK4396_CONTROL_2] =
170                 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
171         ak4396_registers_init(chip);
172         snd_component_add(chip->card, "AK4396");
173 }
174
175 static void ak5385_init(struct oxygen *chip)
176 {
177         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
178         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
179         snd_component_add(chip->card, "AK5385");
180 }
181
182 static void wm8785_registers_init(struct oxygen *chip)
183 {
184         struct generic_data *data = chip->model_data;
185
186         wm8785_write(chip, WM8785_R7, 0);
187         wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
188         wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
189 }
190
191 static void wm8785_init(struct oxygen *chip)
192 {
193         struct generic_data *data = chip->model_data;
194
195         data->wm8785_regs[0] =
196                 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
197         data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
198         wm8785_registers_init(chip);
199         snd_component_add(chip->card, "WM8785");
200 }
201
202 static void generic_init(struct oxygen *chip)
203 {
204         ak4396_init(chip);
205         wm8785_init(chip);
206 }
207
208 static void meridian_init(struct oxygen *chip)
209 {
210         ak4396_init(chip);
211         ak5385_init(chip);
212 }
213
214 static void claro_enable_hp(struct oxygen *chip)
215 {
216         msleep(300);
217         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
218         oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
219 }
220
221 static void claro_init(struct oxygen *chip)
222 {
223         ak4396_init(chip);
224         wm8785_init(chip);
225         claro_enable_hp(chip);
226 }
227
228 static void claro_halo_init(struct oxygen *chip)
229 {
230         ak4396_init(chip);
231         ak5385_init(chip);
232         claro_enable_hp(chip);
233 }
234
235 static void generic_cleanup(struct oxygen *chip)
236 {
237 }
238
239 static void claro_disable_hp(struct oxygen *chip)
240 {
241         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
242 }
243
244 static void claro_cleanup(struct oxygen *chip)
245 {
246         claro_disable_hp(chip);
247 }
248
249 static void claro_suspend(struct oxygen *chip)
250 {
251         claro_disable_hp(chip);
252 }
253
254 static void generic_resume(struct oxygen *chip)
255 {
256         ak4396_registers_init(chip);
257         wm8785_registers_init(chip);
258 }
259
260 static void meridian_resume(struct oxygen *chip)
261 {
262         ak4396_registers_init(chip);
263 }
264
265 static void claro_resume(struct oxygen *chip)
266 {
267         ak4396_registers_init(chip);
268         claro_enable_hp(chip);
269 }
270
271 static void set_ak4396_params(struct oxygen *chip,
272                               struct snd_pcm_hw_params *params)
273 {
274         struct generic_data *data = chip->model_data;
275         unsigned int i;
276         u8 value;
277
278         value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
279         if (params_rate(params) <= 54000)
280                 value |= AK4396_DFS_NORMAL;
281         else if (params_rate(params) <= 108000)
282                 value |= AK4396_DFS_DOUBLE;
283         else
284                 value |= AK4396_DFS_QUAD;
285
286         msleep(1); /* wait for the new MCLK to become stable */
287
288         if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
289                 for (i = 0; i < 4; ++i) {
290                         ak4396_write(chip, i, AK4396_CONTROL_1,
291                                      AK4396_DIF_24_MSB);
292                         ak4396_write(chip, i, AK4396_CONTROL_2, value);
293                         ak4396_write(chip, i, AK4396_CONTROL_1,
294                                      AK4396_DIF_24_MSB | AK4396_RSTN);
295                 }
296         }
297 }
298
299 static void update_ak4396_volume(struct oxygen *chip)
300 {
301         unsigned int i;
302
303         for (i = 0; i < 4; ++i) {
304                 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
305                                     chip->dac_volume[i * 2]);
306                 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
307                                     chip->dac_volume[i * 2 + 1]);
308         }
309 }
310
311 static void update_ak4396_mute(struct oxygen *chip)
312 {
313         struct generic_data *data = chip->model_data;
314         unsigned int i;
315         u8 value;
316
317         value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
318         if (chip->dac_mute)
319                 value |= AK4396_SMUTE;
320         for (i = 0; i < 4; ++i)
321                 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
322 }
323
324 static void set_wm8785_params(struct oxygen *chip,
325                               struct snd_pcm_hw_params *params)
326 {
327         struct generic_data *data = chip->model_data;
328         unsigned int value;
329
330         value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
331         if (params_rate(params) <= 48000)
332                 value |= WM8785_OSR_SINGLE;
333         else if (params_rate(params) <= 96000)
334                 value |= WM8785_OSR_DOUBLE;
335         else
336                 value |= WM8785_OSR_QUAD;
337         if (value != data->wm8785_regs[0]) {
338                 wm8785_write(chip, WM8785_R7, 0);
339                 wm8785_write(chip, WM8785_R0, value);
340                 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
341         }
342 }
343
344 static void set_ak5385_params(struct oxygen *chip,
345                               struct snd_pcm_hw_params *params)
346 {
347         unsigned int value;
348
349         if (params_rate(params) <= 54000)
350                 value = GPIO_AK5385_DFS_NORMAL;
351         else if (params_rate(params) <= 108000)
352                 value = GPIO_AK5385_DFS_DOUBLE;
353         else
354                 value = GPIO_AK5385_DFS_QUAD;
355         oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
356                               value, GPIO_AK5385_DFS_MASK);
357 }
358
359 static int rolloff_info(struct snd_kcontrol *ctl,
360                         struct snd_ctl_elem_info *info)
361 {
362         static const char *const names[2] = {
363                 "Sharp Roll-off", "Slow Roll-off"
364         };
365
366         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
367         info->count = 1;
368         info->value.enumerated.items = 2;
369         if (info->value.enumerated.item >= 2)
370                 info->value.enumerated.item = 1;
371         strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
372         return 0;
373 }
374
375 static int rolloff_get(struct snd_kcontrol *ctl,
376                        struct snd_ctl_elem_value *value)
377 {
378         struct oxygen *chip = ctl->private_data;
379         struct generic_data *data = chip->model_data;
380
381         value->value.enumerated.item[0] =
382                 (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
383         return 0;
384 }
385
386 static int rolloff_put(struct snd_kcontrol *ctl,
387                        struct snd_ctl_elem_value *value)
388 {
389         struct oxygen *chip = ctl->private_data;
390         struct generic_data *data = chip->model_data;
391         unsigned int i;
392         int changed;
393         u8 reg;
394
395         mutex_lock(&chip->mutex);
396         reg = data->ak4396_regs[0][AK4396_CONTROL_2];
397         if (value->value.enumerated.item[0])
398                 reg |= AK4396_SLOW;
399         else
400                 reg &= ~AK4396_SLOW;
401         changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
402         if (changed) {
403                 for (i = 0; i < 4; ++i)
404                         ak4396_write(chip, i, AK4396_CONTROL_2, reg);
405         }
406         mutex_unlock(&chip->mutex);
407         return changed;
408 }
409
410 static const struct snd_kcontrol_new rolloff_control = {
411         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
412         .name = "DAC Filter Playback Enum",
413         .info = rolloff_info,
414         .get = rolloff_get,
415         .put = rolloff_put,
416 };
417
418 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
419 {
420         static const char *const names[2] = {
421                 "None", "High-pass Filter"
422         };
423
424         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
425         info->count = 1;
426         info->value.enumerated.items = 2;
427         if (info->value.enumerated.item >= 2)
428                 info->value.enumerated.item = 1;
429         strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
430         return 0;
431 }
432
433 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
434 {
435         struct oxygen *chip = ctl->private_data;
436         struct generic_data *data = chip->model_data;
437
438         value->value.enumerated.item[0] =
439                 (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
440         return 0;
441 }
442
443 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
444 {
445         struct oxygen *chip = ctl->private_data;
446         struct generic_data *data = chip->model_data;
447         unsigned int reg;
448         int changed;
449
450         mutex_lock(&chip->mutex);
451         reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
452         if (value->value.enumerated.item[0])
453                 reg |= WM8785_HPFR | WM8785_HPFL;
454         changed = reg != data->wm8785_regs[WM8785_R2];
455         if (changed)
456                 wm8785_write(chip, WM8785_R2, reg);
457         mutex_unlock(&chip->mutex);
458         return changed;
459 }
460
461 static const struct snd_kcontrol_new hpf_control = {
462         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
463         .name = "ADC Filter Capture Enum",
464         .info = hpf_info,
465         .get = hpf_get,
466         .put = hpf_put,
467 };
468
469 static int generic_mixer_init(struct oxygen *chip)
470 {
471         return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
472 }
473
474 static int generic_wm8785_mixer_init(struct oxygen *chip)
475 {
476         int err;
477
478         err = generic_mixer_init(chip);
479         if (err < 0)
480                 return err;
481         err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
482         if (err < 0)
483                 return err;
484         return 0;
485 }
486
487 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
488
489 static const struct oxygen_model model_generic = {
490         .shortname = "C-Media CMI8788",
491         .longname = "C-Media Oxygen HD Audio",
492         .chip = "CMI8788",
493         .init = generic_init,
494         .mixer_init = generic_wm8785_mixer_init,
495         .cleanup = generic_cleanup,
496         .resume = generic_resume,
497         .get_i2s_mclk = oxygen_default_i2s_mclk,
498         .set_dac_params = set_ak4396_params,
499         .set_adc_params = set_wm8785_params,
500         .update_dac_volume = update_ak4396_volume,
501         .update_dac_mute = update_ak4396_mute,
502         .dac_tlv = ak4396_db_scale,
503         .model_data_size = sizeof(struct generic_data),
504         .device_config = PLAYBACK_0_TO_I2S |
505                          PLAYBACK_1_TO_SPDIF |
506                          PLAYBACK_2_TO_AC97_1 |
507                          CAPTURE_0_FROM_I2S_1 |
508                          CAPTURE_1_FROM_SPDIF |
509                          CAPTURE_2_FROM_AC97_1 |
510                          AC97_CD_INPUT,
511         .dac_channels = 8,
512         .dac_volume_min = 0,
513         .dac_volume_max = 255,
514         .function_flags = OXYGEN_FUNCTION_SPI |
515                           OXYGEN_FUNCTION_ENABLE_SPI_4_5,
516         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
517         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
518 };
519
520 static int __devinit get_oxygen_model(struct oxygen *chip,
521                                       const struct pci_device_id *id)
522 {
523         chip->model = model_generic;
524         switch (id->driver_data) {
525         case MODEL_MERIDIAN:
526                 chip->model.init = meridian_init;
527                 chip->model.mixer_init = generic_mixer_init;
528                 chip->model.resume = meridian_resume;
529                 chip->model.set_adc_params = set_ak5385_params;
530                 chip->model.device_config = PLAYBACK_0_TO_I2S |
531                                             PLAYBACK_1_TO_SPDIF |
532                                             CAPTURE_0_FROM_I2S_2 |
533                                             CAPTURE_1_FROM_SPDIF;
534                 break;
535         case MODEL_CLARO:
536                 chip->model.init = claro_init;
537                 chip->model.cleanup = claro_cleanup;
538                 chip->model.suspend = claro_suspend;
539                 chip->model.resume = claro_resume;
540                 break;
541         case MODEL_CLARO_HALO:
542                 chip->model.init = claro_halo_init;
543                 chip->model.mixer_init = generic_mixer_init;
544                 chip->model.cleanup = claro_cleanup;
545                 chip->model.suspend = claro_suspend;
546                 chip->model.resume = claro_resume;
547                 chip->model.set_adc_params = set_ak5385_params;
548                 chip->model.device_config = PLAYBACK_0_TO_I2S |
549                                             PLAYBACK_1_TO_SPDIF |
550                                             CAPTURE_0_FROM_I2S_2 |
551                                             CAPTURE_1_FROM_SPDIF;
552                 break;
553         }
554         if (id->driver_data == MODEL_MERIDIAN ||
555             id->driver_data == MODEL_CLARO_HALO) {
556                 chip->model.misc_flags = OXYGEN_MISC_MIDI;
557                 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
558         }
559         return 0;
560 }
561
562 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
563                                           const struct pci_device_id *pci_id)
564 {
565         static int dev;
566         int err;
567
568         if (dev >= SNDRV_CARDS)
569                 return -ENODEV;
570         if (!enable[dev]) {
571                 ++dev;
572                 return -ENOENT;
573         }
574         err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
575                                oxygen_ids, get_oxygen_model);
576         if (err >= 0)
577                 ++dev;
578         return err;
579 }
580
581 static struct pci_driver oxygen_driver = {
582         .name = "CMI8788",
583         .id_table = oxygen_ids,
584         .probe = generic_oxygen_probe,
585         .remove = __devexit_p(oxygen_pci_remove),
586 #ifdef CONFIG_PM
587         .suspend = oxygen_pci_suspend,
588         .resume = oxygen_pci_resume,
589 #endif
590 };
591
592 static int __init alsa_card_oxygen_init(void)
593 {
594         return pci_register_driver(&oxygen_driver);
595 }
596
597 static void __exit alsa_card_oxygen_exit(void)
598 {
599         pci_unregister_driver(&oxygen_driver);
600 }
601
602 module_init(alsa_card_oxygen_init)
603 module_exit(alsa_card_oxygen_exit)