sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/pci.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include "oxygen.h"
  26
  27 /* most DMA channels have a 16-bit counter for 32-bit words */
  28 #define BUFFER_BYTES_MAX                ((1 << 16) * 4)
  29 /* the multichannel DMA channel has a 24-bit counter */
  30 #define BUFFER_BYTES_MAX_MULTICH        ((1 << 24) * 4)
  31
  32 #define PERIOD_BYTES_MIN                64
  33
  34 #define DEFAULT_BUFFER_BYTES            (BUFFER_BYTES_MAX / 2)
  35 #define DEFAULT_BUFFER_BYTES_MULTICH    (1024 * 1024)
  36
  37 static const struct snd_pcm_hardware oxygen_stereo_hardware = {
  38         .info = SNDRV_PCM_INFO_MMAP |
  39                 SNDRV_PCM_INFO_MMAP_VALID |
  40                 SNDRV_PCM_INFO_INTERLEAVED |
  41                 SNDRV_PCM_INFO_PAUSE |
  42                 SNDRV_PCM_INFO_SYNC_START |
  43                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
  44         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  45                    SNDRV_PCM_FMTBIT_S32_LE,
  46         .rates = SNDRV_PCM_RATE_32000 |
  47                  SNDRV_PCM_RATE_44100 |
  48                  SNDRV_PCM_RATE_48000 |
  49                  SNDRV_PCM_RATE_64000 |
  50                  SNDRV_PCM_RATE_88200 |
  51                  SNDRV_PCM_RATE_96000 |
  52                  SNDRV_PCM_RATE_176400 |
  53                  SNDRV_PCM_RATE_192000,
  54         .rate_min = 32000,
  55         .rate_max = 192000,
  56         .channels_min = 2,
  57         .channels_max = 2,
  58         .buffer_bytes_max = BUFFER_BYTES_MAX,
  59         .period_bytes_min = PERIOD_BYTES_MIN,
  60         .period_bytes_max = BUFFER_BYTES_MAX,
  61         .periods_min = 1,
  62         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
  63 };
  64 static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
  65         .info = SNDRV_PCM_INFO_MMAP |
  66                 SNDRV_PCM_INFO_MMAP_VALID |
  67                 SNDRV_PCM_INFO_INTERLEAVED |
  68                 SNDRV_PCM_INFO_PAUSE |
  69                 SNDRV_PCM_INFO_SYNC_START |
  70                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
  71         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  72                    SNDRV_PCM_FMTBIT_S32_LE,
  73         .rates = SNDRV_PCM_RATE_32000 |
  74                  SNDRV_PCM_RATE_44100 |
  75                  SNDRV_PCM_RATE_48000 |
  76                  SNDRV_PCM_RATE_64000 |
  77                  SNDRV_PCM_RATE_88200 |
  78                  SNDRV_PCM_RATE_96000 |
  79                  SNDRV_PCM_RATE_176400 |
  80                  SNDRV_PCM_RATE_192000,
  81         .rate_min = 32000,
  82         .rate_max = 192000,
  83         .channels_min = 2,
  84         .channels_max = 8,
  85         .buffer_bytes_max = BUFFER_BYTES_MAX_MULTICH,
  86         .period_bytes_min = PERIOD_BYTES_MIN,
  87         .period_bytes_max = BUFFER_BYTES_MAX_MULTICH,
  88         .periods_min = 1,
  89         .periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN,
  90 };
  91 static const struct snd_pcm_hardware oxygen_ac97_hardware = {
  92         .info = SNDRV_PCM_INFO_MMAP |
  93                 SNDRV_PCM_INFO_MMAP_VALID |
  94                 SNDRV_PCM_INFO_INTERLEAVED |
  95                 SNDRV_PCM_INFO_PAUSE |
  96                 SNDRV_PCM_INFO_SYNC_START |
  97                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
  98         .formats = SNDRV_PCM_FMTBIT_S16_LE,
  99         .rates = SNDRV_PCM_RATE_48000,
 100         .rate_min = 48000,
 101         .rate_max = 48000,
 102         .channels_min = 2,
 103         .channels_max = 2,
 104         .buffer_bytes_max = BUFFER_BYTES_MAX,
 105         .period_bytes_min = PERIOD_BYTES_MIN,
 106         .period_bytes_max = BUFFER_BYTES_MAX,
 107         .periods_min = 1,
 108         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
 109 };
 110
 111 static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
 112         [PCM_A] = &oxygen_stereo_hardware,
 113         [PCM_B] = &oxygen_stereo_hardware,
 114         [PCM_C] = &oxygen_stereo_hardware,
 115         [PCM_SPDIF] = &oxygen_stereo_hardware,
 116         [PCM_MULTICH] = &oxygen_multichannel_hardware,
 117         [PCM_AC97] = &oxygen_ac97_hardware,
 118 };
 119
 120 static inline unsigned int
 121 oxygen_substream_channel(struct snd_pcm_substream *substream)
 122 {
 123         return (unsigned int)(uintptr_t)substream->runtime->private_data;
 124 }
 125
 126 static int oxygen_open(struct snd_pcm_substream *substream,
 127                        unsigned int channel)
 128 {
 129         struct oxygen *chip = snd_pcm_substream_chip(substream);
 130         struct snd_pcm_runtime *runtime = substream->runtime;
 131         int err;
 132
 133         runtime->private_data = (void *)(uintptr_t)channel;
 134         if (channel == PCM_B && chip->has_ac97_1 &&
 135             (chip->model.device_config & CAPTURE_2_FROM_AC97_1))
 136                 runtime->hw = oxygen_ac97_hardware;
 137         else
 138                 runtime->hw = *oxygen_hardware[channel];
 139         switch (channel) {
 140         case PCM_C:
 141                 runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 |
 142                                        SNDRV_PCM_RATE_64000);
 143                 runtime->hw.rate_min = 44100;
 144                 break;
 145         case PCM_MULTICH:
 146                 runtime->hw.channels_max = chip->model.dac_channels_pcm;
 147                 break;
 148         }
 149         if (chip->model.pcm_hardware_filter)
 150                 chip->model.pcm_hardware_filter(channel, &runtime->hw);
 151         err = snd_pcm_hw_constraint_step(runtime, 0,
 152                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 153         if (err < 0)
 154                 return err;
 155         err = snd_pcm_hw_constraint_step(runtime, 0,
 156                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 157         if (err < 0)
 158                 return err;
 159         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 160                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 161                 if (err < 0)
 162                         return err;
 163         }
 164         if (runtime->hw.channels_max > 2) {
 165                 err = snd_pcm_hw_constraint_step(runtime, 0,
 166                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 167                                                  2);
 168                 if (err < 0)
 169                         return err;
 170         }
 171         if (channel == PCM_MULTICH) {
 172                 err = snd_pcm_hw_constraint_minmax
 173                         (runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 0, 8192000);
 174                 if (err < 0)
 175                         return err;
 176         }
 177         snd_pcm_set_sync(substream);
 178         chip->streams[channel] = substream;
 179
 180         mutex_lock(&chip->mutex);
 181         chip->pcm_active |= 1 << channel;
 182         if (channel == PCM_SPDIF) {
 183                 chip->spdif_pcm_bits = chip->spdif_bits;
 184                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
 185                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 186                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 187                                SNDRV_CTL_EVENT_MASK_INFO,
 188                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 189         }
 190         mutex_unlock(&chip->mutex);
 191
 192         return 0;
 193 }
 194
 195 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 196 {
 197         return oxygen_open(substream, PCM_A);
 198 }
 199
 200 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 201 {
 202         return oxygen_open(substream, PCM_B);
 203 }
 204
 205 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 206 {
 207         return oxygen_open(substream, PCM_C);
 208 }
 209
 210 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 211 {
 212         return oxygen_open(substream, PCM_SPDIF);
 213 }
 214
 215 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 216 {
 217         return oxygen_open(substream, PCM_MULTICH);
 218 }
 219
 220 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 221 {
 222         return oxygen_open(substream, PCM_AC97);
 223 }
 224
 225 static int oxygen_close(struct snd_pcm_substream *substream)
 226 {
 227         struct oxygen *chip = snd_pcm_substream_chip(substream);
 228         unsigned int channel = oxygen_substream_channel(substream);
 229
 230         mutex_lock(&chip->mutex);
 231         chip->pcm_active &= ~(1 << channel);
 232         if (channel == PCM_SPDIF) {
 233                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
 234                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 235                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 236                                SNDRV_CTL_EVENT_MASK_INFO,
 237                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 238         }
 239         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 240                 oxygen_update_spdif_source(chip);
 241         mutex_unlock(&chip->mutex);
 242
 243         chip->streams[channel] = NULL;
 244         return 0;
 245 }
 246
 247 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 248 {
 249         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 250                 return OXYGEN_FORMAT_24;
 251         else
 252                 return OXYGEN_FORMAT_16;
 253 }
 254
 255 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 256 {
 257         switch (params_rate(hw_params)) {
 258         case 32000:
 259                 return OXYGEN_RATE_32000;
 260         case 44100:
 261                 return OXYGEN_RATE_44100;
 262         default: /* 48000 */
 263                 return OXYGEN_RATE_48000;
 264         case 64000:
 265                 return OXYGEN_RATE_64000;
 266         case 88200:
 267                 return OXYGEN_RATE_88200;
 268         case 96000:
 269                 return OXYGEN_RATE_96000;
 270         case 176400:
 271                 return OXYGEN_RATE_176400;
 272         case 192000:
 273                 return OXYGEN_RATE_192000;
 274         }
 275 }
 276
 277 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
 278 {
 279         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 280                 return OXYGEN_I2S_BITS_24;
 281         else
 282                 return OXYGEN_I2S_BITS_16;
 283 }
 284
 285 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 286 {
 287         switch (params_channels(hw_params)) {
 288         default: /* 2 */
 289                 return OXYGEN_PLAY_CHANNELS_2;
 290         case 4:
 291                 return OXYGEN_PLAY_CHANNELS_4;
 292         case 6:
 293                 return OXYGEN_PLAY_CHANNELS_6;
 294         case 8:
 295                 return OXYGEN_PLAY_CHANNELS_8;
 296         }
 297 }
 298
 299 static const unsigned int channel_base_registers[PCM_COUNT] = {
 300         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 301         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 302         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 303         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 304         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 305         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 306 };
 307
 308 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 309                             struct snd_pcm_hw_params *hw_params)
 310 {
 311         struct oxygen *chip = snd_pcm_substream_chip(substream);
 312         unsigned int channel = oxygen_substream_channel(substream);
 313         int err;
 314
 315         err = snd_pcm_lib_malloc_pages(substream,
 316                                        params_buffer_bytes(hw_params));
 317         if (err < 0)
 318                 return err;
 319
 320         oxygen_write32(chip, channel_base_registers[channel],
 321                        (u32)substream->runtime->dma_addr);
 322         if (channel == PCM_MULTICH) {
 323                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 324                                params_buffer_bytes(hw_params) / 4 - 1);
 325                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 326                                params_period_bytes(hw_params) / 4 - 1);
 327         } else {
 328                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 329                                params_buffer_bytes(hw_params) / 4 - 1);
 330                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 331                                params_period_bytes(hw_params) / 4 - 1);
 332         }
 333         return 0;
 334 }
 335
 336 static u16 get_mclk(struct oxygen *chip, unsigned int channel,
 337                     struct snd_pcm_hw_params *params)
 338 {
 339         unsigned int mclks, shift;
 340
 341         if (channel == PCM_MULTICH)
 342                 mclks = chip->model.dac_mclks;
 343         else
 344                 mclks = chip->model.adc_mclks;
 345
 346         if (params_rate(params) <= 48000)
 347                 shift = 0;
 348         else if (params_rate(params) <= 96000)
 349                 shift = 2;
 350         else
 351                 shift = 4;
 352
 353         return OXYGEN_I2S_MCLK(mclks >> shift);
 354 }
 355
 356 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 357                                   struct snd_pcm_hw_params *hw_params)
 358 {
 359         struct oxygen *chip = snd_pcm_substream_chip(substream);
 360         int err;
 361
 362         err = oxygen_hw_params(substream, hw_params);
 363         if (err < 0)
 364                 return err;
 365
 366         spin_lock_irq(&chip->reg_lock);
 367         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 368                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 369                              OXYGEN_REC_FORMAT_A_MASK);
 370         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
 371                               oxygen_rate(hw_params) |
 372                               chip->model.adc_i2s_format |
 373                               get_mclk(chip, PCM_A, hw_params) |
 374                               oxygen_i2s_bits(hw_params),
 375                               OXYGEN_I2S_RATE_MASK |
 376                               OXYGEN_I2S_FORMAT_MASK |
 377                               OXYGEN_I2S_MCLK_MASK |
 378                               OXYGEN_I2S_BITS_MASK);
 379         spin_unlock_irq(&chip->reg_lock);
 380
 381         mutex_lock(&chip->mutex);
 382         chip->model.set_adc_params(chip, hw_params);
 383         mutex_unlock(&chip->mutex);
 384         return 0;
 385 }
 386
 387 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 388                                   struct snd_pcm_hw_params *hw_params)
 389 {
 390         struct oxygen *chip = snd_pcm_substream_chip(substream);
 391         int is_ac97;
 392         int err;
 393
 394         err = oxygen_hw_params(substream, hw_params);
 395         if (err < 0)
 396                 return err;
 397
 398         is_ac97 = chip->has_ac97_1 &&
 399                 (chip->model.device_config & CAPTURE_2_FROM_AC97_1);
 400
 401         spin_lock_irq(&chip->reg_lock);
 402         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 403                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 404                              OXYGEN_REC_FORMAT_B_MASK);
 405         if (!is_ac97)
 406                 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
 407                                       oxygen_rate(hw_params) |
 408                                       chip->model.adc_i2s_format |
 409                                       get_mclk(chip, PCM_B, hw_params) |
 410                                       oxygen_i2s_bits(hw_params),
 411                                       OXYGEN_I2S_RATE_MASK |
 412                                       OXYGEN_I2S_FORMAT_MASK |
 413                                       OXYGEN_I2S_MCLK_MASK |
 414                                       OXYGEN_I2S_BITS_MASK);
 415         spin_unlock_irq(&chip->reg_lock);
 416
 417         if (!is_ac97) {
 418                 mutex_lock(&chip->mutex);
 419                 chip->model.set_adc_params(chip, hw_params);
 420                 mutex_unlock(&chip->mutex);
 421         }
 422         return 0;
 423 }
 424
 425 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 426                                   struct snd_pcm_hw_params *hw_params)
 427 {
 428         struct oxygen *chip = snd_pcm_substream_chip(substream);
 429         int err;
 430
 431         err = oxygen_hw_params(substream, hw_params);
 432         if (err < 0)
 433                 return err;
 434
 435         spin_lock_irq(&chip->reg_lock);
 436         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 437                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 438                              OXYGEN_REC_FORMAT_C_MASK);
 439         spin_unlock_irq(&chip->reg_lock);
 440         return 0;
 441 }
 442
 443 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 444                                   struct snd_pcm_hw_params *hw_params)
 445 {
 446         struct oxygen *chip = snd_pcm_substream_chip(substream);
 447         int err;
 448
 449         err = oxygen_hw_params(substream, hw_params);
 450         if (err < 0)
 451                 return err;
 452
 453         mutex_lock(&chip->mutex);
 454         spin_lock_irq(&chip->reg_lock);
 455         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 456                             OXYGEN_SPDIF_OUT_ENABLE);
 457         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 458                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 459                              OXYGEN_SPDIF_FORMAT_MASK);
 460         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 461                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 462                               OXYGEN_SPDIF_OUT_RATE_MASK);
 463         oxygen_update_spdif_source(chip);
 464         spin_unlock_irq(&chip->reg_lock);
 465         mutex_unlock(&chip->mutex);
 466         return 0;
 467 }
 468
 469 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 470                                     struct snd_pcm_hw_params *hw_params)
 471 {
 472         struct oxygen *chip = snd_pcm_substream_chip(substream);
 473         int err;
 474
 475         err = oxygen_hw_params(substream, hw_params);
 476         if (err < 0)
 477                 return err;
 478
 479         mutex_lock(&chip->mutex);
 480         spin_lock_irq(&chip->reg_lock);
 481         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 482                              oxygen_play_channels(hw_params),
 483                              OXYGEN_PLAY_CHANNELS_MASK);
 484         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 485                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 486                              OXYGEN_MULTICH_FORMAT_MASK);
 487         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 488                               oxygen_rate(hw_params) |
 489                               chip->model.dac_i2s_format |
 490                               get_mclk(chip, PCM_MULTICH, hw_params) |
 491                               oxygen_i2s_bits(hw_params),
 492                               OXYGEN_I2S_RATE_MASK |
 493                               OXYGEN_I2S_FORMAT_MASK |
 494                               OXYGEN_I2S_MCLK_MASK |
 495                               OXYGEN_I2S_BITS_MASK);
 496         oxygen_update_spdif_source(chip);
 497         spin_unlock_irq(&chip->reg_lock);
 498
 499         chip->model.set_dac_params(chip, hw_params);
 500         oxygen_update_dac_routing(chip);
 501         mutex_unlock(&chip->mutex);
 502         return 0;
 503 }
 504
 505 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 506 {
 507         struct oxygen *chip = snd_pcm_substream_chip(substream);
 508         unsigned int channel = oxygen_substream_channel(substream);
 509         unsigned int channel_mask = 1 << channel;
 510
 511         spin_lock_irq(&chip->reg_lock);
 512         chip->interrupt_mask &= ~channel_mask;
 513         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 514
 515         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 516         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 517         spin_unlock_irq(&chip->reg_lock);
 518
 519         return snd_pcm_lib_free_pages(substream);
 520 }
 521
 522 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 523 {
 524         struct oxygen *chip = snd_pcm_substream_chip(substream);
 525
 526         spin_lock_irq(&chip->reg_lock);
 527         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 528                             OXYGEN_SPDIF_OUT_ENABLE);
 529         spin_unlock_irq(&chip->reg_lock);
 530         return oxygen_hw_free(substream);
 531 }
 532
 533 static int oxygen_prepare(struct snd_pcm_substream *substream)
 534 {
 535         struct oxygen *chip = snd_pcm_substream_chip(substream);
 536         unsigned int channel = oxygen_substream_channel(substream);
 537         unsigned int channel_mask = 1 << channel;
 538
 539         spin_lock_irq(&chip->reg_lock);
 540         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 541         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 542
 543         if (substream->runtime->no_period_wakeup)
 544                 chip->interrupt_mask &= ~channel_mask;
 545         else
 546                 chip->interrupt_mask |= channel_mask;
 547         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 548         spin_unlock_irq(&chip->reg_lock);
 549         return 0;
 550 }
 551
 552 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 553 {
 554         struct oxygen *chip = snd_pcm_substream_chip(substream);
 555         struct snd_pcm_substream *s;
 556         unsigned int mask = 0;
 557         int pausing;
 558
 559         switch (cmd) {
 560         case SNDRV_PCM_TRIGGER_STOP:
 561         case SNDRV_PCM_TRIGGER_START:
 562         case SNDRV_PCM_TRIGGER_SUSPEND:
 563                 pausing = 0;
 564                 break;
 565         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 566         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 567                 pausing = 1;
 568                 break;
 569         default:
 570                 return -EINVAL;
 571         }
 572
 573         snd_pcm_group_for_each_entry(s, substream) {
 574                 if (snd_pcm_substream_chip(s) == chip) {
 575                         mask |= 1 << oxygen_substream_channel(s);
 576                         snd_pcm_trigger_done(s, substream);
 577                 }
 578         }
 579
 580         spin_lock(&chip->reg_lock);
 581         if (!pausing) {
 582                 if (cmd == SNDRV_PCM_TRIGGER_START)
 583                         chip->pcm_running |= mask;
 584                 else
 585                         chip->pcm_running &= ~mask;
 586                 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 587         } else {
 588                 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
 589                         oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 590                 else
 591                         oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 592         }
 593         spin_unlock(&chip->reg_lock);
 594         return 0;
 595 }
 596
 597 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 598 {
 599         struct oxygen *chip = snd_pcm_substream_chip(substream);
 600         struct snd_pcm_runtime *runtime = substream->runtime;
 601         unsigned int channel = oxygen_substream_channel(substream);
 602         u32 curr_addr;
 603
 604         /* no spinlock, this read should be atomic */
 605         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 606         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 607 }
 608
 609 static struct snd_pcm_ops oxygen_rec_a_ops = {
 610         .open      = oxygen_rec_a_open,
 611         .close     = oxygen_close,
 612         .ioctl     = snd_pcm_lib_ioctl,
 613         .hw_params = oxygen_rec_a_hw_params,
 614         .hw_free   = oxygen_hw_free,
 615         .prepare   = oxygen_prepare,
 616         .trigger   = oxygen_trigger,
 617         .pointer   = oxygen_pointer,
 618 };
 619
 620 static struct snd_pcm_ops oxygen_rec_b_ops = {
 621         .open      = oxygen_rec_b_open,
 622         .close     = oxygen_close,
 623         .ioctl     = snd_pcm_lib_ioctl,
 624         .hw_params = oxygen_rec_b_hw_params,
 625         .hw_free   = oxygen_hw_free,
 626         .prepare   = oxygen_prepare,
 627         .trigger   = oxygen_trigger,
 628         .pointer   = oxygen_pointer,
 629 };
 630
 631 static struct snd_pcm_ops oxygen_rec_c_ops = {
 632         .open      = oxygen_rec_c_open,
 633         .close     = oxygen_close,
 634         .ioctl     = snd_pcm_lib_ioctl,
 635         .hw_params = oxygen_rec_c_hw_params,
 636         .hw_free   = oxygen_hw_free,
 637         .prepare   = oxygen_prepare,
 638         .trigger   = oxygen_trigger,
 639         .pointer   = oxygen_pointer,
 640 };
 641
 642 static struct snd_pcm_ops oxygen_spdif_ops = {
 643         .open      = oxygen_spdif_open,
 644         .close     = oxygen_close,
 645         .ioctl     = snd_pcm_lib_ioctl,
 646         .hw_params = oxygen_spdif_hw_params,
 647         .hw_free   = oxygen_spdif_hw_free,
 648         .prepare   = oxygen_prepare,
 649         .trigger   = oxygen_trigger,
 650         .pointer   = oxygen_pointer,
 651 };
 652
 653 static struct snd_pcm_ops oxygen_multich_ops = {
 654         .open      = oxygen_multich_open,
 655         .close     = oxygen_close,
 656         .ioctl     = snd_pcm_lib_ioctl,
 657         .hw_params = oxygen_multich_hw_params,
 658         .hw_free   = oxygen_hw_free,
 659         .prepare   = oxygen_prepare,
 660         .trigger   = oxygen_trigger,
 661         .pointer   = oxygen_pointer,
 662 };
 663
 664 static struct snd_pcm_ops oxygen_ac97_ops = {
 665         .open      = oxygen_ac97_open,
 666         .close     = oxygen_close,
 667         .ioctl     = snd_pcm_lib_ioctl,
 668         .hw_params = oxygen_hw_params,
 669         .hw_free   = oxygen_hw_free,
 670         .prepare   = oxygen_prepare,
 671         .trigger   = oxygen_trigger,
 672         .pointer   = oxygen_pointer,
 673 };
 674
 675 static void oxygen_pcm_free(struct snd_pcm *pcm)
 676 {
 677         snd_pcm_lib_preallocate_free_for_all(pcm);
 678 }
 679
 680 int oxygen_pcm_init(struct oxygen *chip)
 681 {
 682         struct snd_pcm *pcm;
 683         int outs, ins;
 684         int err;
 685
 686         outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S);
 687         ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 |
 688                                               CAPTURE_0_FROM_I2S_2));
 689         if (outs | ins) {
 690                 err = snd_pcm_new(chip->card, "Multichannel",
 691                                   0, outs, ins, &pcm);
 692                 if (err < 0)
 693                         return err;
 694                 if (outs)
 695                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 696                                         &oxygen_multich_ops);
 697                 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
 698                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 699                                         &oxygen_rec_a_ops);
 700                 else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2)
 701                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 702                                         &oxygen_rec_b_ops);
 703                 pcm->private_data = chip;
 704                 pcm->private_free = oxygen_pcm_free;
 705                 strcpy(pcm->name, "Multichannel");
 706                 if (outs)
 707                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 708                                                       SNDRV_DMA_TYPE_DEV,
 709                                                       snd_dma_pci_data(chip->pci),
 710                                                       DEFAULT_BUFFER_BYTES_MULTICH,
 711                                                       BUFFER_BYTES_MAX_MULTICH);
 712                 if (ins)
 713                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 714                                                       SNDRV_DMA_TYPE_DEV,
 715                                                       snd_dma_pci_data(chip->pci),
 716                                                       DEFAULT_BUFFER_BYTES,
 717                                                       BUFFER_BYTES_MAX);
 718         }
 719
 720         outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF);
 721         ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF);
 722         if (outs | ins) {
 723                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
 724                 if (err < 0)
 725                         return err;
 726                 if (outs)
 727                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 728                                         &oxygen_spdif_ops);
 729                 if (ins)
 730                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 731                                         &oxygen_rec_c_ops);
 732                 pcm->private_data = chip;
 733                 pcm->private_free = oxygen_pcm_free;
 734                 strcpy(pcm->name, "Digital");
 735                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 736                                                       snd_dma_pci_data(chip->pci),
 737                                                       DEFAULT_BUFFER_BYTES,
 738                                                       BUFFER_BYTES_MAX);
 739         }
 740
 741         if (chip->has_ac97_1) {
 742                 outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1);
 743                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
 744         } else {
 745                 outs = 0;
 746                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2);
 747         }
 748         if (outs | ins) {
 749                 err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2",
 750                                   2, outs, ins, &pcm);
 751                 if (err < 0)
 752                         return err;
 753                 if (outs) {
 754                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 755                                         &oxygen_ac97_ops);
 756                         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
 757                                              OXYGEN_REC_B_ROUTE_AC97_1,
 758                                              OXYGEN_REC_B_ROUTE_MASK);
 759                 }
 760                 if (ins)
 761                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 762                                         &oxygen_rec_b_ops);
 763                 pcm->private_data = chip;
 764                 pcm->private_free = oxygen_pcm_free;
 765                 strcpy(pcm->name, outs ? "Front Panel" : "Analog 2");
 766                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 767                                                       snd_dma_pci_data(chip->pci),
 768                                                       DEFAULT_BUFFER_BYTES,
 769                                                       BUFFER_BYTES_MAX);
 770         }
 771         return 0;
 772 }