pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show
[cascardo/linux.git] / sound / soc / codecs / rt5645.c
1 /*
2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
3  *
4  * Copyright 2013 Realtek Semiconductor Corp.
5  * Author: Bard Liao <bardliao@realtek.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/jack.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29
30 #include "rl6231.h"
31 #include "rt5645.h"
32
33 #define RT5645_DEVICE_ID 0x6308
34
35 #define RT5645_PR_RANGE_BASE (0xff + 1)
36 #define RT5645_PR_SPACING 0x100
37
38 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
39
40 static const struct regmap_range_cfg rt5645_ranges[] = {
41         {
42                 .name = "PR",
43                 .range_min = RT5645_PR_BASE,
44                 .range_max = RT5645_PR_BASE + 0xf8,
45                 .selector_reg = RT5645_PRIV_INDEX,
46                 .selector_mask = 0xff,
47                 .selector_shift = 0x0,
48                 .window_start = RT5645_PRIV_DATA,
49                 .window_len = 0x1,
50         },
51 };
52
53 static const struct reg_default init_list[] = {
54         {RT5645_PR_BASE + 0x3d, 0x3600},
55         {RT5645_PR_BASE + 0x1c, 0xfd20},
56         {RT5645_PR_BASE + 0x20, 0x611f},
57         {RT5645_PR_BASE + 0x21, 0x4040},
58         {RT5645_PR_BASE + 0x23, 0x0004},
59 };
60 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
61
62 static const struct reg_default rt5645_reg[] = {
63         { 0x00, 0x0000 },
64         { 0x01, 0xc8c8 },
65         { 0x02, 0xc8c8 },
66         { 0x03, 0xc8c8 },
67         { 0x0a, 0x0002 },
68         { 0x0b, 0x2827 },
69         { 0x0c, 0xe000 },
70         { 0x0d, 0x0000 },
71         { 0x0e, 0x0000 },
72         { 0x0f, 0x0808 },
73         { 0x14, 0x3333 },
74         { 0x16, 0x4b00 },
75         { 0x18, 0x018b },
76         { 0x19, 0xafaf },
77         { 0x1a, 0xafaf },
78         { 0x1b, 0x0001 },
79         { 0x1c, 0x2f2f },
80         { 0x1d, 0x2f2f },
81         { 0x1e, 0x0000 },
82         { 0x20, 0x0000 },
83         { 0x27, 0x7060 },
84         { 0x28, 0x7070 },
85         { 0x29, 0x8080 },
86         { 0x2a, 0x5656 },
87         { 0x2b, 0x5454 },
88         { 0x2c, 0xaaa0 },
89         { 0x2f, 0x1002 },
90         { 0x31, 0x5000 },
91         { 0x32, 0x0000 },
92         { 0x33, 0x0000 },
93         { 0x34, 0x0000 },
94         { 0x35, 0x0000 },
95         { 0x3b, 0x0000 },
96         { 0x3c, 0x007f },
97         { 0x3d, 0x0000 },
98         { 0x3e, 0x007f },
99         { 0x3f, 0x0000 },
100         { 0x40, 0x001f },
101         { 0x41, 0x0000 },
102         { 0x42, 0x001f },
103         { 0x45, 0x6000 },
104         { 0x46, 0x003e },
105         { 0x47, 0x003e },
106         { 0x48, 0xf807 },
107         { 0x4a, 0x0004 },
108         { 0x4d, 0x0000 },
109         { 0x4e, 0x0000 },
110         { 0x4f, 0x01ff },
111         { 0x50, 0x0000 },
112         { 0x51, 0x0000 },
113         { 0x52, 0x01ff },
114         { 0x53, 0xf000 },
115         { 0x56, 0x0111 },
116         { 0x57, 0x0064 },
117         { 0x58, 0xef0e },
118         { 0x59, 0xf0f0 },
119         { 0x5a, 0xef0e },
120         { 0x5b, 0xf0f0 },
121         { 0x5c, 0xef0e },
122         { 0x5d, 0xf0f0 },
123         { 0x5e, 0xf000 },
124         { 0x5f, 0x0000 },
125         { 0x61, 0x0300 },
126         { 0x62, 0x0000 },
127         { 0x63, 0x00c2 },
128         { 0x64, 0x0000 },
129         { 0x65, 0x0000 },
130         { 0x66, 0x0000 },
131         { 0x6a, 0x0000 },
132         { 0x6c, 0x0aaa },
133         { 0x70, 0x8000 },
134         { 0x71, 0x8000 },
135         { 0x72, 0x8000 },
136         { 0x73, 0x7770 },
137         { 0x74, 0x3e00 },
138         { 0x75, 0x2409 },
139         { 0x76, 0x000a },
140         { 0x77, 0x0c00 },
141         { 0x78, 0x0000 },
142         { 0x80, 0x0000 },
143         { 0x81, 0x0000 },
144         { 0x82, 0x0000 },
145         { 0x83, 0x0000 },
146         { 0x84, 0x0000 },
147         { 0x85, 0x0000 },
148         { 0x8a, 0x0000 },
149         { 0x8e, 0x0004 },
150         { 0x8f, 0x1100 },
151         { 0x90, 0x0646 },
152         { 0x91, 0x0c06 },
153         { 0x93, 0x0000 },
154         { 0x94, 0x0200 },
155         { 0x95, 0x0000 },
156         { 0x9a, 0x2184 },
157         { 0x9b, 0x010a },
158         { 0x9c, 0x0aea },
159         { 0x9d, 0x000c },
160         { 0x9e, 0x0400 },
161         { 0xa0, 0xa0a8 },
162         { 0xa1, 0x0059 },
163         { 0xa2, 0x0001 },
164         { 0xae, 0x6000 },
165         { 0xaf, 0x0000 },
166         { 0xb0, 0x6000 },
167         { 0xb1, 0x0000 },
168         { 0xb2, 0x0000 },
169         { 0xb3, 0x001f },
170         { 0xb4, 0x020c },
171         { 0xb5, 0x1f00 },
172         { 0xb6, 0x0000 },
173         { 0xbb, 0x0000 },
174         { 0xbc, 0x0000 },
175         { 0xbd, 0x0000 },
176         { 0xbe, 0x0000 },
177         { 0xbf, 0x3100 },
178         { 0xc0, 0x0000 },
179         { 0xc1, 0x0000 },
180         { 0xc2, 0x0000 },
181         { 0xc3, 0x2000 },
182         { 0xcd, 0x0000 },
183         { 0xce, 0x0000 },
184         { 0xcf, 0x1813 },
185         { 0xd0, 0x0690 },
186         { 0xd1, 0x1c17 },
187         { 0xd3, 0xb320 },
188         { 0xd4, 0x0000 },
189         { 0xd6, 0x0400 },
190         { 0xd9, 0x0809 },
191         { 0xda, 0x0000 },
192         { 0xdb, 0x0003 },
193         { 0xdc, 0x0049 },
194         { 0xdd, 0x001b },
195         { 0xe6, 0x8000 },
196         { 0xe7, 0x0200 },
197         { 0xec, 0xb300 },
198         { 0xed, 0x0000 },
199         { 0xf0, 0x001f },
200         { 0xf1, 0x020c },
201         { 0xf2, 0x1f00 },
202         { 0xf3, 0x0000 },
203         { 0xf4, 0x4000 },
204         { 0xf8, 0x0000 },
205         { 0xf9, 0x0000 },
206         { 0xfa, 0x2060 },
207         { 0xfb, 0x4040 },
208         { 0xfc, 0x0000 },
209         { 0xfd, 0x0002 },
210         { 0xfe, 0x10ec },
211         { 0xff, 0x6308 },
212 };
213
214 static int rt5645_reset(struct snd_soc_codec *codec)
215 {
216         return snd_soc_write(codec, RT5645_RESET, 0);
217 }
218
219 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
220 {
221         int i;
222
223         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
224                 if (reg >= rt5645_ranges[i].range_min &&
225                         reg <= rt5645_ranges[i].range_max) {
226                         return true;
227                 }
228         }
229
230         switch (reg) {
231         case RT5645_RESET:
232         case RT5645_PRIV_DATA:
233         case RT5645_IN1_CTRL1:
234         case RT5645_IN1_CTRL2:
235         case RT5645_IN1_CTRL3:
236         case RT5645_A_JD_CTRL1:
237         case RT5645_ADC_EQ_CTRL1:
238         case RT5645_EQ_CTRL1:
239         case RT5645_ALC_CTRL_1:
240         case RT5645_IRQ_CTRL2:
241         case RT5645_IRQ_CTRL3:
242         case RT5645_INT_IRQ_ST:
243         case RT5645_IL_CMD:
244         case RT5645_VENDOR_ID:
245         case RT5645_VENDOR_ID1:
246         case RT5645_VENDOR_ID2:
247                 return true;
248         default:
249                 return false;
250         }
251 }
252
253 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
254 {
255         int i;
256
257         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
258                 if (reg >= rt5645_ranges[i].range_min &&
259                         reg <= rt5645_ranges[i].range_max) {
260                         return true;
261                 }
262         }
263
264         switch (reg) {
265         case RT5645_RESET:
266         case RT5645_SPK_VOL:
267         case RT5645_HP_VOL:
268         case RT5645_LOUT1:
269         case RT5645_IN1_CTRL1:
270         case RT5645_IN1_CTRL2:
271         case RT5645_IN1_CTRL3:
272         case RT5645_IN2_CTRL:
273         case RT5645_INL1_INR1_VOL:
274         case RT5645_SPK_FUNC_LIM:
275         case RT5645_ADJ_HPF_CTRL:
276         case RT5645_DAC1_DIG_VOL:
277         case RT5645_DAC2_DIG_VOL:
278         case RT5645_DAC_CTRL:
279         case RT5645_STO1_ADC_DIG_VOL:
280         case RT5645_MONO_ADC_DIG_VOL:
281         case RT5645_ADC_BST_VOL1:
282         case RT5645_ADC_BST_VOL2:
283         case RT5645_STO1_ADC_MIXER:
284         case RT5645_MONO_ADC_MIXER:
285         case RT5645_AD_DA_MIXER:
286         case RT5645_STO_DAC_MIXER:
287         case RT5645_MONO_DAC_MIXER:
288         case RT5645_DIG_MIXER:
289         case RT5645_DIG_INF1_DATA:
290         case RT5645_PDM_OUT_CTRL:
291         case RT5645_REC_L1_MIXER:
292         case RT5645_REC_L2_MIXER:
293         case RT5645_REC_R1_MIXER:
294         case RT5645_REC_R2_MIXER:
295         case RT5645_HPMIXL_CTRL:
296         case RT5645_HPOMIXL_CTRL:
297         case RT5645_HPMIXR_CTRL:
298         case RT5645_HPOMIXR_CTRL:
299         case RT5645_HPO_MIXER:
300         case RT5645_SPK_L_MIXER:
301         case RT5645_SPK_R_MIXER:
302         case RT5645_SPO_MIXER:
303         case RT5645_SPO_CLSD_RATIO:
304         case RT5645_OUT_L1_MIXER:
305         case RT5645_OUT_R1_MIXER:
306         case RT5645_OUT_L_GAIN1:
307         case RT5645_OUT_L_GAIN2:
308         case RT5645_OUT_R_GAIN1:
309         case RT5645_OUT_R_GAIN2:
310         case RT5645_LOUT_MIXER:
311         case RT5645_HAPTIC_CTRL1:
312         case RT5645_HAPTIC_CTRL2:
313         case RT5645_HAPTIC_CTRL3:
314         case RT5645_HAPTIC_CTRL4:
315         case RT5645_HAPTIC_CTRL5:
316         case RT5645_HAPTIC_CTRL6:
317         case RT5645_HAPTIC_CTRL7:
318         case RT5645_HAPTIC_CTRL8:
319         case RT5645_HAPTIC_CTRL9:
320         case RT5645_HAPTIC_CTRL10:
321         case RT5645_PWR_DIG1:
322         case RT5645_PWR_DIG2:
323         case RT5645_PWR_ANLG1:
324         case RT5645_PWR_ANLG2:
325         case RT5645_PWR_MIXER:
326         case RT5645_PWR_VOL:
327         case RT5645_PRIV_INDEX:
328         case RT5645_PRIV_DATA:
329         case RT5645_I2S1_SDP:
330         case RT5645_I2S2_SDP:
331         case RT5645_ADDA_CLK1:
332         case RT5645_ADDA_CLK2:
333         case RT5645_DMIC_CTRL1:
334         case RT5645_DMIC_CTRL2:
335         case RT5645_TDM_CTRL_1:
336         case RT5645_TDM_CTRL_2:
337         case RT5645_GLB_CLK:
338         case RT5645_PLL_CTRL1:
339         case RT5645_PLL_CTRL2:
340         case RT5645_ASRC_1:
341         case RT5645_ASRC_2:
342         case RT5645_ASRC_3:
343         case RT5645_ASRC_4:
344         case RT5645_DEPOP_M1:
345         case RT5645_DEPOP_M2:
346         case RT5645_DEPOP_M3:
347         case RT5645_MICBIAS:
348         case RT5645_A_JD_CTRL1:
349         case RT5645_VAD_CTRL4:
350         case RT5645_CLSD_OUT_CTRL:
351         case RT5645_ADC_EQ_CTRL1:
352         case RT5645_ADC_EQ_CTRL2:
353         case RT5645_EQ_CTRL1:
354         case RT5645_EQ_CTRL2:
355         case RT5645_ALC_CTRL_1:
356         case RT5645_ALC_CTRL_2:
357         case RT5645_ALC_CTRL_3:
358         case RT5645_ALC_CTRL_4:
359         case RT5645_ALC_CTRL_5:
360         case RT5645_JD_CTRL:
361         case RT5645_IRQ_CTRL1:
362         case RT5645_IRQ_CTRL2:
363         case RT5645_IRQ_CTRL3:
364         case RT5645_INT_IRQ_ST:
365         case RT5645_GPIO_CTRL1:
366         case RT5645_GPIO_CTRL2:
367         case RT5645_GPIO_CTRL3:
368         case RT5645_BASS_BACK:
369         case RT5645_MP3_PLUS1:
370         case RT5645_MP3_PLUS2:
371         case RT5645_ADJ_HPF1:
372         case RT5645_ADJ_HPF2:
373         case RT5645_HP_CALIB_AMP_DET:
374         case RT5645_SV_ZCD1:
375         case RT5645_SV_ZCD2:
376         case RT5645_IL_CMD:
377         case RT5645_IL_CMD2:
378         case RT5645_IL_CMD3:
379         case RT5645_DRC1_HL_CTRL1:
380         case RT5645_DRC2_HL_CTRL1:
381         case RT5645_ADC_MONO_HP_CTRL1:
382         case RT5645_ADC_MONO_HP_CTRL2:
383         case RT5645_DRC2_CTRL1:
384         case RT5645_DRC2_CTRL2:
385         case RT5645_DRC2_CTRL3:
386         case RT5645_DRC2_CTRL4:
387         case RT5645_DRC2_CTRL5:
388         case RT5645_JD_CTRL3:
389         case RT5645_JD_CTRL4:
390         case RT5645_GEN_CTRL1:
391         case RT5645_GEN_CTRL2:
392         case RT5645_GEN_CTRL3:
393         case RT5645_VENDOR_ID:
394         case RT5645_VENDOR_ID1:
395         case RT5645_VENDOR_ID2:
396                 return true;
397         default:
398                 return false;
399         }
400 }
401
402 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
403 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
404 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
405 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
406 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
407
408 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
409 static unsigned int bst_tlv[] = {
410         TLV_DB_RANGE_HEAD(7),
411         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
412         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
413         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
414         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
415         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
416         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
417         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
418 };
419
420 static const char * const rt5645_tdm_data_swap_select[] = {
421         "L/R", "R/L", "L/L", "R/R"
422 };
423
424 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
425         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
426
427 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
428         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
429
430 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
431         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
432
433 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
434         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
435
436 static const char * const rt5645_tdm_adc_data_select[] = {
437         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
438 };
439
440 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
441                                 RT5645_TDM_CTRL_1, 8,
442                                 rt5645_tdm_adc_data_select);
443
444 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
445         /* Speaker Output Volume */
446         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
447                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
448         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
449                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
450
451         /* Headphone Output Volume */
452         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
453                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
454         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
455                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
456
457         /* OUTPUT Control */
458         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
459                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
460         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
461                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
462         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
463                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
464
465         /* DAC Digital Volume */
466         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
467                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
468         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
469                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
470         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
471                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
472
473         /* IN1/IN2 Control */
474         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
475                 RT5645_BST_SFT1, 8, 0, bst_tlv),
476         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
477                 RT5645_BST_SFT2, 8, 0, bst_tlv),
478
479         /* INL/INR Volume Control */
480         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
481                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
482
483         /* ADC Digital Volume Control */
484         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
485                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
486         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
487                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
488         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
489                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
490         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
491                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
492
493         /* ADC Boost Volume Control */
494         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
495                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
496                 adc_bst_tlv),
497         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
498                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
499                 adc_bst_tlv),
500
501         /* I2S2 function select */
502         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
503                 1, 1),
504
505         /* TDM */
506         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
507         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
508         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
509         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
510         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
511         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
512         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
513         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
514         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
515 };
516
517 /**
518  * set_dmic_clk - Set parameter of dmic.
519  *
520  * @w: DAPM widget.
521  * @kcontrol: The kcontrol of this widget.
522  * @event: Event id.
523  *
524  */
525 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
526         struct snd_kcontrol *kcontrol, int event)
527 {
528         struct snd_soc_codec *codec = w->codec;
529         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
530         int idx = -EINVAL;
531
532         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
533
534         if (idx < 0)
535                 dev_err(codec->dev, "Failed to set DMIC clock\n");
536         else
537                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
538                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
539         return idx;
540 }
541
542 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
543                          struct snd_soc_dapm_widget *sink)
544 {
545         unsigned int val;
546
547         val = snd_soc_read(source->codec, RT5645_GLB_CLK);
548         val &= RT5645_SCLK_SRC_MASK;
549         if (val == RT5645_SCLK_SRC_PLL1)
550                 return 1;
551         else
552                 return 0;
553 }
554
555 /* Digital Mixer */
556 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
557         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
558                         RT5645_M_ADC_L1_SFT, 1, 1),
559         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
560                         RT5645_M_ADC_L2_SFT, 1, 1),
561 };
562
563 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
564         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
565                         RT5645_M_ADC_R1_SFT, 1, 1),
566         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
567                         RT5645_M_ADC_R2_SFT, 1, 1),
568 };
569
570 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
571         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
572                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
573         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
574                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
575 };
576
577 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
578         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
579                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
580         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
581                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
582 };
583
584 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
585         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
586                         RT5645_M_ADCMIX_L_SFT, 1, 1),
587         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
588                         RT5645_M_DAC1_L_SFT, 1, 1),
589 };
590
591 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
592         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
593                         RT5645_M_ADCMIX_R_SFT, 1, 1),
594         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
595                         RT5645_M_DAC1_R_SFT, 1, 1),
596 };
597
598 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
599         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
600                         RT5645_M_DAC_L1_SFT, 1, 1),
601         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
602                         RT5645_M_DAC_L2_SFT, 1, 1),
603         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
604                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
605 };
606
607 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
608         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
609                         RT5645_M_DAC_R1_SFT, 1, 1),
610         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
611                         RT5645_M_DAC_R2_SFT, 1, 1),
612         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
613                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
614 };
615
616 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
617         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
618                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
619         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
620                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
621         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
622                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
623 };
624
625 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
626         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
627                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
628         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
629                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
630         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
631                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
632 };
633
634 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
635         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
636                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
637         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
638                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
639         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
640                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
641 };
642
643 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
644         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
645                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
646         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
647                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
648         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
649                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
650 };
651
652 /* Analog Input Mixer */
653 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
654         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
655                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
656         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
657                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
658         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
659                         RT5645_M_BST2_RM_L_SFT, 1, 1),
660         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
661                         RT5645_M_BST1_RM_L_SFT, 1, 1),
662         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
663                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
664 };
665
666 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
667         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
668                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
669         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
670                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
671         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
672                         RT5645_M_BST2_RM_R_SFT, 1, 1),
673         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
674                         RT5645_M_BST1_RM_R_SFT, 1, 1),
675         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
676                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
677 };
678
679 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
680         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
681                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
682         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
683                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
684         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
685                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
686         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
687                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
688 };
689
690 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
691         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
692                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
693         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
694                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
695         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
696                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
697         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
698                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
699 };
700
701 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
702         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
703                         RT5645_M_BST1_OM_L_SFT, 1, 1),
704         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
705                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
706         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
707                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
708         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
709                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
710 };
711
712 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
713         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
714                         RT5645_M_BST2_OM_R_SFT, 1, 1),
715         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
716                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
717         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
718                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
719         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
720                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
721 };
722
723 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
724         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
725                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
726         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
727                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
728         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
729                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
730         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
731                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
732 };
733
734 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
735         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
736                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
737         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
738                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
739 };
740
741 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
742         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
743                         RT5645_M_DAC1_HM_SFT, 1, 1),
744         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
745                         RT5645_M_HPVOL_HM_SFT, 1, 1),
746 };
747
748 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
749         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
750                         RT5645_M_DAC1_HV_SFT, 1, 1),
751         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
752                         RT5645_M_DAC2_HV_SFT, 1, 1),
753         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
754                         RT5645_M_IN_HV_SFT, 1, 1),
755         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
756                         RT5645_M_BST1_HV_SFT, 1, 1),
757 };
758
759 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
760         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
761                         RT5645_M_DAC1_HV_SFT, 1, 1),
762         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
763                         RT5645_M_DAC2_HV_SFT, 1, 1),
764         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
765                         RT5645_M_IN_HV_SFT, 1, 1),
766         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
767                         RT5645_M_BST2_HV_SFT, 1, 1),
768 };
769
770 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
771         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
772                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
773         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
774                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
775         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
776                         RT5645_M_OV_L_LM_SFT, 1, 1),
777         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
778                         RT5645_M_OV_R_LM_SFT, 1, 1),
779 };
780
781 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
782 static const char * const rt5645_dac1_src[] = {
783         "IF1 DAC", "IF2 DAC", "IF3 DAC"
784 };
785
786 static SOC_ENUM_SINGLE_DECL(
787         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
788         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
789
790 static const struct snd_kcontrol_new rt5645_dac1l_mux =
791         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
792
793 static SOC_ENUM_SINGLE_DECL(
794         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
795         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
796
797 static const struct snd_kcontrol_new rt5645_dac1r_mux =
798         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
799
800 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
801 static const char * const rt5645_dac12_src[] = {
802         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
803 };
804
805 static SOC_ENUM_SINGLE_DECL(
806         rt5645_dac2l_enum, RT5645_DAC_CTRL,
807         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
808
809 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
810         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
811
812 static const char * const rt5645_dacr2_src[] = {
813         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
814 };
815
816 static SOC_ENUM_SINGLE_DECL(
817         rt5645_dac2r_enum, RT5645_DAC_CTRL,
818         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
819
820 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
821         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
822
823
824 /* INL/R source */
825 static const char * const rt5645_inl_src[] = {
826         "IN2P", "MonoP"
827 };
828
829 static SOC_ENUM_SINGLE_DECL(
830         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
831         RT5645_INL_SEL_SFT, rt5645_inl_src);
832
833 static const struct snd_kcontrol_new rt5645_inl_mux =
834         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
835
836 static const char * const rt5645_inr_src[] = {
837         "IN2N", "MonoN"
838 };
839
840 static SOC_ENUM_SINGLE_DECL(
841         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
842         RT5645_INR_SEL_SFT, rt5645_inr_src);
843
844 static const struct snd_kcontrol_new rt5645_inr_mux =
845         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
846
847 /* Stereo1 ADC source */
848 /* MX-27 [12] */
849 static const char * const rt5645_stereo_adc1_src[] = {
850         "DAC MIX", "ADC"
851 };
852
853 static SOC_ENUM_SINGLE_DECL(
854         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
855         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
856
857 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
858         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
859
860 /* MX-27 [11] */
861 static const char * const rt5645_stereo_adc2_src[] = {
862         "DAC MIX", "DMIC"
863 };
864
865 static SOC_ENUM_SINGLE_DECL(
866         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
867         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
868
869 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
870         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
871
872 /* MX-27 [8] */
873 static const char * const rt5645_stereo_dmic_src[] = {
874         "DMIC1", "DMIC2"
875 };
876
877 static SOC_ENUM_SINGLE_DECL(
878         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
879         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
880
881 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
882         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
883
884 /* Mono ADC source */
885 /* MX-28 [12] */
886 static const char * const rt5645_mono_adc_l1_src[] = {
887         "Mono DAC MIXL", "ADC"
888 };
889
890 static SOC_ENUM_SINGLE_DECL(
891         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
892         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
893
894 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
895         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
896 /* MX-28 [11] */
897 static const char * const rt5645_mono_adc_l2_src[] = {
898         "Mono DAC MIXL", "DMIC"
899 };
900
901 static SOC_ENUM_SINGLE_DECL(
902         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
903         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
904
905 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
906         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
907
908 /* MX-28 [8] */
909 static const char * const rt5645_mono_dmic_src[] = {
910         "DMIC1", "DMIC2"
911 };
912
913 static SOC_ENUM_SINGLE_DECL(
914         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
915         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
916
917 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
918         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
919 /* MX-28 [1:0] */
920 static SOC_ENUM_SINGLE_DECL(
921         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
922         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
923
924 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
925         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
926 /* MX-28 [4] */
927 static const char * const rt5645_mono_adc_r1_src[] = {
928         "Mono DAC MIXR", "ADC"
929 };
930
931 static SOC_ENUM_SINGLE_DECL(
932         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
933         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
934
935 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
936         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
937 /* MX-28 [3] */
938 static const char * const rt5645_mono_adc_r2_src[] = {
939         "Mono DAC MIXR", "DMIC"
940 };
941
942 static SOC_ENUM_SINGLE_DECL(
943         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
944         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
945
946 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
947         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
948
949 /* MX-77 [9:8] */
950 static const char * const rt5645_if1_adc_in_src[] = {
951         "IF_ADC1", "IF_ADC2", "VAD_ADC"
952 };
953
954 static SOC_ENUM_SINGLE_DECL(
955         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
956         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
957
958 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
959         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
960
961 /* MX-2F [13:12] */
962 static const char * const rt5645_if2_adc_in_src[] = {
963         "IF_ADC1", "IF_ADC2", "VAD_ADC"
964 };
965
966 static SOC_ENUM_SINGLE_DECL(
967         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
968         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
969
970 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
971         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
972
973 /* MX-2F [1:0] */
974 static const char * const rt5645_if3_adc_in_src[] = {
975         "IF_ADC1", "IF_ADC2", "VAD_ADC"
976 };
977
978 static SOC_ENUM_SINGLE_DECL(
979         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
980         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
981
982 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
983         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
984
985 /* MX-31 [15] [13] [11] [9] */
986 static const char * const rt5645_pdm_src[] = {
987         "Mono DAC", "Stereo DAC"
988 };
989
990 static SOC_ENUM_SINGLE_DECL(
991         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
992         RT5645_PDM1_L_SFT, rt5645_pdm_src);
993
994 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
995         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
996
997 static SOC_ENUM_SINGLE_DECL(
998         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
999         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1000
1001 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1002         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1003
1004 /* MX-9D [9:8] */
1005 static const char * const rt5645_vad_adc_src[] = {
1006         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1007 };
1008
1009 static SOC_ENUM_SINGLE_DECL(
1010         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1011         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1012
1013 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1014         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1015
1016 static const struct snd_kcontrol_new spk_l_vol_control =
1017         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1018                 RT5645_L_MUTE_SFT, 1, 1);
1019
1020 static const struct snd_kcontrol_new spk_r_vol_control =
1021         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1022                 RT5645_R_MUTE_SFT, 1, 1);
1023
1024 static const struct snd_kcontrol_new hp_l_vol_control =
1025         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1026                 RT5645_L_MUTE_SFT, 1, 1);
1027
1028 static const struct snd_kcontrol_new hp_r_vol_control =
1029         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1030                 RT5645_R_MUTE_SFT, 1, 1);
1031
1032 static const struct snd_kcontrol_new pdm1_l_vol_control =
1033         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1034                 RT5645_M_PDM1_L, 1, 1);
1035
1036 static const struct snd_kcontrol_new pdm1_r_vol_control =
1037         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1038                 RT5645_M_PDM1_R, 1, 1);
1039
1040 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1041 {
1042         static int hp_amp_power_count;
1043         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1044
1045         if (on) {
1046                 if (hp_amp_power_count <= 0) {
1047                         /* depop parameters */
1048                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1049                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1050                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1051                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1052                                 RT5645_HP_DCC_INT1, 0x9f01);
1053                         mdelay(150);
1054                         /* headphone amp power on */
1055                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1056                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1057                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1058                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1059                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1060                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1061                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1062                                 RT5645_PWR_HA,
1063                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1064                                 RT5645_PWR_HA);
1065                         mdelay(5);
1066                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1067                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1068                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1069
1070                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1071                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1072                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1073                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1074                                 0x14, 0x1aaa);
1075                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1076                                 0x24, 0x0430);
1077                 }
1078                 hp_amp_power_count++;
1079         } else {
1080                 hp_amp_power_count--;
1081                 if (hp_amp_power_count <= 0) {
1082                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1083                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1084                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1085                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1086                         /* headphone amp power down */
1087                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1088                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1089                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1090                                 RT5645_PWR_HA, 0);
1091                 }
1092         }
1093 }
1094
1095 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1096         struct snd_kcontrol *kcontrol, int event)
1097 {
1098         struct snd_soc_codec *codec = w->codec;
1099         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1100
1101         switch (event) {
1102         case SND_SOC_DAPM_POST_PMU:
1103                 hp_amp_power(codec, 1);
1104                 /* headphone unmute sequence */
1105                 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1106                         RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1107                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1108                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1109                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1110                 regmap_write(rt5645->regmap,
1111                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1112                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1113                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1114                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1115                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1116                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1117                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1118                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1119                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1120                 msleep(40);
1121                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1122                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1123                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1124                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1125                 break;
1126
1127         case SND_SOC_DAPM_PRE_PMD:
1128                 /* headphone mute sequence */
1129                 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1130                         RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1131                         RT5645_CP_FQ3_MASK,
1132                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1133                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1134                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1135                 regmap_write(rt5645->regmap,
1136                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1137                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1138                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1139                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1140                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1141                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1142                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1143                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1144                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1145                 msleep(30);
1146                 hp_amp_power(codec, 0);
1147                 break;
1148
1149         default:
1150                 return 0;
1151         }
1152
1153         return 0;
1154 }
1155
1156 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1157         struct snd_kcontrol *kcontrol, int event)
1158 {
1159         struct snd_soc_codec *codec = w->codec;
1160
1161         switch (event) {
1162         case SND_SOC_DAPM_POST_PMU:
1163                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1164                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1165                         RT5645_PWR_CLS_D_L,
1166                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1167                         RT5645_PWR_CLS_D_L);
1168                 break;
1169
1170         case SND_SOC_DAPM_PRE_PMD:
1171                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1172                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1173                         RT5645_PWR_CLS_D_L, 0);
1174                 break;
1175
1176         default:
1177                 return 0;
1178         }
1179
1180         return 0;
1181 }
1182
1183 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1184         struct snd_kcontrol *kcontrol, int event)
1185 {
1186         struct snd_soc_codec *codec = w->codec;
1187
1188         switch (event) {
1189         case SND_SOC_DAPM_POST_PMU:
1190                 hp_amp_power(codec, 1);
1191                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1192                         RT5645_PWR_LM, RT5645_PWR_LM);
1193                 snd_soc_update_bits(codec, RT5645_LOUT1,
1194                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1195                 break;
1196
1197         case SND_SOC_DAPM_PRE_PMD:
1198                 snd_soc_update_bits(codec, RT5645_LOUT1,
1199                         RT5645_L_MUTE | RT5645_R_MUTE,
1200                         RT5645_L_MUTE | RT5645_R_MUTE);
1201                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1202                         RT5645_PWR_LM, 0);
1203                 hp_amp_power(codec, 0);
1204                 break;
1205
1206         default:
1207                 return 0;
1208         }
1209
1210         return 0;
1211 }
1212
1213 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1214         struct snd_kcontrol *kcontrol, int event)
1215 {
1216         struct snd_soc_codec *codec = w->codec;
1217
1218         switch (event) {
1219         case SND_SOC_DAPM_POST_PMU:
1220                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1221                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1222                 break;
1223
1224         case SND_SOC_DAPM_PRE_PMD:
1225                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1226                         RT5645_PWR_BST2_P, 0);
1227                 break;
1228
1229         default:
1230                 return 0;
1231         }
1232
1233         return 0;
1234 }
1235
1236 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1237         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1238                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1239         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1240                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1241
1242         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1243                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1244         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1245                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1246
1247         /* Input Side */
1248         /* micbias */
1249         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1250                         RT5645_PWR_MB1_BIT, 0),
1251         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1252                         RT5645_PWR_MB2_BIT, 0),
1253         /* Input Lines */
1254         SND_SOC_DAPM_INPUT("DMIC L1"),
1255         SND_SOC_DAPM_INPUT("DMIC R1"),
1256         SND_SOC_DAPM_INPUT("DMIC L2"),
1257         SND_SOC_DAPM_INPUT("DMIC R2"),
1258
1259         SND_SOC_DAPM_INPUT("IN1P"),
1260         SND_SOC_DAPM_INPUT("IN1N"),
1261         SND_SOC_DAPM_INPUT("IN2P"),
1262         SND_SOC_DAPM_INPUT("IN2N"),
1263
1264         SND_SOC_DAPM_INPUT("Haptic Generator"),
1265
1266         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1267         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1268         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1269                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1270         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1271                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1272         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1273                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1274         /* Boost */
1275         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1276                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1277         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1278                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1279                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1280         /* Input Volume */
1281         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1282                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1283         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1284                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1285         /* REC Mixer */
1286         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1287                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1288         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1289                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1290         /* ADCs */
1291         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1292         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1293
1294         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1295                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1296         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1297                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1298
1299         /* ADC Mux */
1300         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1301                 &rt5645_sto1_dmic_mux),
1302         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1303                 &rt5645_sto_adc2_mux),
1304         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1305                 &rt5645_sto_adc2_mux),
1306         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1307                 &rt5645_sto_adc1_mux),
1308         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1309                 &rt5645_sto_adc1_mux),
1310         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1311                 &rt5645_mono_dmic_l_mux),
1312         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1313                 &rt5645_mono_dmic_r_mux),
1314         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1315                 &rt5645_mono_adc_l2_mux),
1316         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1317                 &rt5645_mono_adc_l1_mux),
1318         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1319                 &rt5645_mono_adc_r1_mux),
1320         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1321                 &rt5645_mono_adc_r2_mux),
1322         /* ADC Mixer */
1323
1324         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1325                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1326         SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1327                 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1328         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1329                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1330                 NULL, 0),
1331         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1332                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1333                 NULL, 0),
1334         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1335                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1336         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1337                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1338                 NULL, 0),
1339         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1340                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1341         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1342                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1343                 NULL, 0),
1344
1345         /* ADC PGA */
1346         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1347         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1348         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1349         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1350         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1351         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1352         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1353         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1354         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1355         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1356
1357         /* IF1 2 Mux */
1358         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1359                 0, 0, &rt5645_if1_adc_in_mux),
1360         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1361                 0, 0, &rt5645_if2_adc_in_mux),
1362
1363         /* Digital Interface */
1364         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1365                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1366         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1367         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1368         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1369         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1370         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1371         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1372         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1373         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1374         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1375         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1376                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1377         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1378         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1379         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1380         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1381
1382         /* Digital Interface Select */
1383         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1384                 0, 0, &rt5645_vad_adc_mux),
1385
1386         /* Audio Interface */
1387         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1388         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1389         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1390         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1391
1392         /* Output Side */
1393         /* DAC mixer before sound effect  */
1394         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1395                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1396         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1397                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1398
1399         /* DAC2 channel Mux */
1400         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1401         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1402         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1403                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1404         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1405                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1406
1407         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1408         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1409
1410         /* DAC Mixer */
1411         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1412                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1413         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1414                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1415         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1416                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1417         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1418                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1419         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1420                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1421         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1422                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1423         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1424                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1425         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1426                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1427         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1428                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1429
1430         /* DACs */
1431         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1432                 0),
1433         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1434                 0),
1435         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1436                 0),
1437         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1438                 0),
1439         /* OUT Mixer */
1440         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1441                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1442         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1443                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1444         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1445                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1446         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1447                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1448         /* Ouput Volume */
1449         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1450                 &spk_l_vol_control),
1451         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1452                 &spk_r_vol_control),
1453         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1454                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1455         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1456                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1457         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1458                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1459         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1460                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1461         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1462         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1463         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1464         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1465         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1466
1467         /* HPO/LOUT/Mono Mixer */
1468         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1469                 ARRAY_SIZE(rt5645_spo_l_mix)),
1470         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1471                 ARRAY_SIZE(rt5645_spo_r_mix)),
1472         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1473                 ARRAY_SIZE(rt5645_hpo_mix)),
1474         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1475                 ARRAY_SIZE(rt5645_lout_mix)),
1476
1477         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1478                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1479         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1480                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1481         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1482                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1483
1484         /* PDM */
1485         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1486                 0, NULL, 0),
1487         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1488         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1489
1490         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1491         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1492
1493         /* Output Lines */
1494         SND_SOC_DAPM_OUTPUT("HPOL"),
1495         SND_SOC_DAPM_OUTPUT("HPOR"),
1496         SND_SOC_DAPM_OUTPUT("LOUTL"),
1497         SND_SOC_DAPM_OUTPUT("LOUTR"),
1498         SND_SOC_DAPM_OUTPUT("PDM1L"),
1499         SND_SOC_DAPM_OUTPUT("PDM1R"),
1500         SND_SOC_DAPM_OUTPUT("SPOL"),
1501         SND_SOC_DAPM_OUTPUT("SPOR"),
1502 };
1503
1504 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1505         { "IN1P", NULL, "LDO2" },
1506         { "IN2P", NULL, "LDO2" },
1507
1508         { "DMIC1", NULL, "DMIC L1" },
1509         { "DMIC1", NULL, "DMIC R1" },
1510         { "DMIC2", NULL, "DMIC L2" },
1511         { "DMIC2", NULL, "DMIC R2" },
1512
1513         { "BST1", NULL, "IN1P" },
1514         { "BST1", NULL, "IN1N" },
1515         { "BST1", NULL, "JD Power" },
1516         { "BST1", NULL, "Mic Det Power" },
1517         { "BST2", NULL, "IN2P" },
1518         { "BST2", NULL, "IN2N" },
1519
1520         { "INL VOL", NULL, "IN2P" },
1521         { "INR VOL", NULL, "IN2N" },
1522
1523         { "RECMIXL", "HPOL Switch", "HPOL" },
1524         { "RECMIXL", "INL Switch", "INL VOL" },
1525         { "RECMIXL", "BST2 Switch", "BST2" },
1526         { "RECMIXL", "BST1 Switch", "BST1" },
1527         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1528
1529         { "RECMIXR", "HPOR Switch", "HPOR" },
1530         { "RECMIXR", "INR Switch", "INR VOL" },
1531         { "RECMIXR", "BST2 Switch", "BST2" },
1532         { "RECMIXR", "BST1 Switch", "BST1" },
1533         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1534
1535         { "ADC L", NULL, "RECMIXL" },
1536         { "ADC L", NULL, "ADC L power" },
1537         { "ADC R", NULL, "RECMIXR" },
1538         { "ADC R", NULL, "ADC R power" },
1539
1540         {"DMIC L1", NULL, "DMIC CLK"},
1541         {"DMIC L1", NULL, "DMIC1 Power"},
1542         {"DMIC R1", NULL, "DMIC CLK"},
1543         {"DMIC R1", NULL, "DMIC1 Power"},
1544         {"DMIC L2", NULL, "DMIC CLK"},
1545         {"DMIC L2", NULL, "DMIC2 Power"},
1546         {"DMIC R2", NULL, "DMIC CLK"},
1547         {"DMIC R2", NULL, "DMIC2 Power"},
1548
1549         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1550         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1551
1552         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1553         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1554
1555         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1556         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1557
1558         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1559         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1560         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1561         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1562
1563         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1564         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1565         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1566         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1567
1568         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1569         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1570         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1571         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1572
1573         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1574         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1575         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1576         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1577
1578         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1579         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1580         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1581         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1582
1583         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1584         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1585         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1586
1587         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1588         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1589         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1590
1591         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1592         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1593         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1594         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1595
1596         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1597         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1598         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1599         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1600
1601         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1602         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1603         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1604
1605         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1606         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1607         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1608         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1609         { "VAD_ADC", NULL, "VAD ADC Mux" },
1610
1611         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1612         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1613         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1614
1615         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1616         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1617         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1618
1619         { "IF1 ADC", NULL, "I2S1" },
1620         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1621         { "IF2 ADC", NULL, "I2S2" },
1622         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1623
1624         { "AIF1TX", NULL, "IF1 ADC" },
1625         { "AIF1TX", NULL, "IF2 ADC" },
1626         { "AIF2TX", NULL, "IF2 ADC" },
1627
1628         { "IF1 DAC1", NULL, "AIF1RX" },
1629         { "IF1 DAC2", NULL, "AIF1RX" },
1630         { "IF2 DAC", NULL, "AIF2RX" },
1631
1632         { "IF1 DAC1", NULL, "I2S1" },
1633         { "IF1 DAC2", NULL, "I2S1" },
1634         { "IF2 DAC", NULL, "I2S2" },
1635
1636         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1637         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1638         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1639         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1640         { "IF2 DAC L", NULL, "IF2 DAC" },
1641         { "IF2 DAC R", NULL, "IF2 DAC" },
1642
1643         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1644         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1645
1646         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1647         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1648
1649         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1650         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1651         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1652         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1653         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1654         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1655
1656         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1657         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1658         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1659         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1660         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1661         { "DAC L2 Volume", NULL, "dac mono left filter" },
1662
1663         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1664         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1665         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1666         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1667         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1668         { "DAC R2 Volume", NULL, "dac mono right filter" },
1669
1670         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1671         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1672         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1673         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1674         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1675         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1676         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1677         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1678
1679         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1680         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1681         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1682         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1683         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1684         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1685         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1686         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1687
1688         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1689         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1690         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1691         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1692         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1693         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1694
1695         { "DAC L1", NULL, "Stereo DAC MIXL" },
1696         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1697         { "DAC R1", NULL, "Stereo DAC MIXR" },
1698         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1699         { "DAC L2", NULL, "Mono DAC MIXL" },
1700         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1701         { "DAC R2", NULL, "Mono DAC MIXR" },
1702         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1703
1704         { "SPK MIXL", "BST1 Switch", "BST1" },
1705         { "SPK MIXL", "INL Switch", "INL VOL" },
1706         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1707         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1708         { "SPK MIXR", "BST2 Switch", "BST2" },
1709         { "SPK MIXR", "INR Switch", "INR VOL" },
1710         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1711         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1712
1713         { "OUT MIXL", "BST1 Switch", "BST1" },
1714         { "OUT MIXL", "INL Switch", "INL VOL" },
1715         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1716         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1717
1718         { "OUT MIXR", "BST2 Switch", "BST2" },
1719         { "OUT MIXR", "INR Switch", "INR VOL" },
1720         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1721         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1722
1723         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1724         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1725         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1726         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1727         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1728         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1729         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1730         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1731         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1732         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1733
1734         { "DAC 2", NULL, "DAC L2" },
1735         { "DAC 2", NULL, "DAC R2" },
1736         { "DAC 1", NULL, "DAC L1" },
1737         { "DAC 1", NULL, "DAC R1" },
1738         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1739         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1740         { "HPOVOL", NULL, "HPOVOL L" },
1741         { "HPOVOL", NULL, "HPOVOL R" },
1742         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1743         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1744
1745         { "SPKVOL L", "Switch", "SPK MIXL" },
1746         { "SPKVOL R", "Switch", "SPK MIXR" },
1747
1748         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1749         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1750         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1751         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1752         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1753         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1754
1755         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1756         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1757         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1758         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1759
1760         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1761         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1762         { "PDM1 L Mux", NULL, "PDM1 Power" },
1763         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1764         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1765         { "PDM1 R Mux", NULL, "PDM1 Power" },
1766
1767         { "HP amp", NULL, "HPO MIX" },
1768         { "HP amp", NULL, "JD Power" },
1769         { "HP amp", NULL, "Mic Det Power" },
1770         { "HP amp", NULL, "LDO2" },
1771         { "HPOL", NULL, "HP amp" },
1772         { "HPOR", NULL, "HP amp" },
1773
1774         { "LOUT amp", NULL, "LOUT MIX" },
1775         { "LOUTL", NULL, "LOUT amp" },
1776         { "LOUTR", NULL, "LOUT amp" },
1777
1778         { "PDM1 L", "Switch", "PDM1 L Mux" },
1779         { "PDM1 R", "Switch", "PDM1 R Mux" },
1780
1781         { "PDM1L", NULL, "PDM1 L" },
1782         { "PDM1R", NULL, "PDM1 R" },
1783
1784         { "SPK amp", NULL, "SPOL MIX" },
1785         { "SPK amp", NULL, "SPOR MIX" },
1786         { "SPOL", NULL, "SPK amp" },
1787         { "SPOR", NULL, "SPK amp" },
1788 };
1789
1790 static int rt5645_hw_params(struct snd_pcm_substream *substream,
1791         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1792 {
1793         struct snd_soc_codec *codec = dai->codec;
1794         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1795         unsigned int val_len = 0, val_clk, mask_clk;
1796         int pre_div, bclk_ms, frame_size;
1797
1798         rt5645->lrck[dai->id] = params_rate(params);
1799         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1800         if (pre_div < 0) {
1801                 dev_err(codec->dev, "Unsupported clock setting\n");
1802                 return -EINVAL;
1803         }
1804         frame_size = snd_soc_params_to_frame_size(params);
1805         if (frame_size < 0) {
1806                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1807                 return -EINVAL;
1808         }
1809         bclk_ms = frame_size > 32;
1810         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1811
1812         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1813                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1814         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1815                                 bclk_ms, pre_div, dai->id);
1816
1817         switch (params_width(params)) {
1818         case 16:
1819                 break;
1820         case 20:
1821                 val_len |= RT5645_I2S_DL_20;
1822                 break;
1823         case 24:
1824                 val_len |= RT5645_I2S_DL_24;
1825                 break;
1826         case 8:
1827                 val_len |= RT5645_I2S_DL_8;
1828                 break;
1829         default:
1830                 return -EINVAL;
1831         }
1832
1833         switch (dai->id) {
1834         case RT5645_AIF1:
1835                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1836                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1837                         pre_div << RT5645_I2S_PD1_SFT;
1838                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1839                         RT5645_I2S_DL_MASK, val_len);
1840                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1841                 break;
1842         case  RT5645_AIF2:
1843                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1844                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1845                         pre_div << RT5645_I2S_PD2_SFT;
1846                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1847                         RT5645_I2S_DL_MASK, val_len);
1848                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1849                 break;
1850         default:
1851                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1852                 return -EINVAL;
1853         }
1854
1855         return 0;
1856 }
1857
1858 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1859 {
1860         struct snd_soc_codec *codec = dai->codec;
1861         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1862         unsigned int reg_val = 0;
1863
1864         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1865         case SND_SOC_DAIFMT_CBM_CFM:
1866                 rt5645->master[dai->id] = 1;
1867                 break;
1868         case SND_SOC_DAIFMT_CBS_CFS:
1869                 reg_val |= RT5645_I2S_MS_S;
1870                 rt5645->master[dai->id] = 0;
1871                 break;
1872         default:
1873                 return -EINVAL;
1874         }
1875
1876         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1877         case SND_SOC_DAIFMT_NB_NF:
1878                 break;
1879         case SND_SOC_DAIFMT_IB_NF:
1880                 reg_val |= RT5645_I2S_BP_INV;
1881                 break;
1882         default:
1883                 return -EINVAL;
1884         }
1885
1886         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1887         case SND_SOC_DAIFMT_I2S:
1888                 break;
1889         case SND_SOC_DAIFMT_LEFT_J:
1890                 reg_val |= RT5645_I2S_DF_LEFT;
1891                 break;
1892         case SND_SOC_DAIFMT_DSP_A:
1893                 reg_val |= RT5645_I2S_DF_PCM_A;
1894                 break;
1895         case SND_SOC_DAIFMT_DSP_B:
1896                 reg_val |= RT5645_I2S_DF_PCM_B;
1897                 break;
1898         default:
1899                 return -EINVAL;
1900         }
1901         switch (dai->id) {
1902         case RT5645_AIF1:
1903                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1904                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1905                         RT5645_I2S_DF_MASK, reg_val);
1906                 break;
1907         case RT5645_AIF2:
1908                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1909                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1910                         RT5645_I2S_DF_MASK, reg_val);
1911                 break;
1912         default:
1913                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1914                 return -EINVAL;
1915         }
1916         return 0;
1917 }
1918
1919 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1920                 int clk_id, unsigned int freq, int dir)
1921 {
1922         struct snd_soc_codec *codec = dai->codec;
1923         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1924         unsigned int reg_val = 0;
1925
1926         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1927                 return 0;
1928
1929         switch (clk_id) {
1930         case RT5645_SCLK_S_MCLK:
1931                 reg_val |= RT5645_SCLK_SRC_MCLK;
1932                 break;
1933         case RT5645_SCLK_S_PLL1:
1934                 reg_val |= RT5645_SCLK_SRC_PLL1;
1935                 break;
1936         case RT5645_SCLK_S_RCCLK:
1937                 reg_val |= RT5645_SCLK_SRC_RCCLK;
1938                 break;
1939         default:
1940                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1941                 return -EINVAL;
1942         }
1943         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1944                 RT5645_SCLK_SRC_MASK, reg_val);
1945         rt5645->sysclk = freq;
1946         rt5645->sysclk_src = clk_id;
1947
1948         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1949
1950         return 0;
1951 }
1952
1953 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1954                         unsigned int freq_in, unsigned int freq_out)
1955 {
1956         struct snd_soc_codec *codec = dai->codec;
1957         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1958         struct rl6231_pll_code pll_code;
1959         int ret;
1960
1961         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
1962             freq_out == rt5645->pll_out)
1963                 return 0;
1964
1965         if (!freq_in || !freq_out) {
1966                 dev_dbg(codec->dev, "PLL disabled\n");
1967
1968                 rt5645->pll_in = 0;
1969                 rt5645->pll_out = 0;
1970                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1971                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
1972                 return 0;
1973         }
1974
1975         switch (source) {
1976         case RT5645_PLL1_S_MCLK:
1977                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1978                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
1979                 break;
1980         case RT5645_PLL1_S_BCLK1:
1981         case RT5645_PLL1_S_BCLK2:
1982                 switch (dai->id) {
1983                 case RT5645_AIF1:
1984                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1985                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
1986                         break;
1987                 case  RT5645_AIF2:
1988                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1989                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
1990                         break;
1991                 default:
1992                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1993                         return -EINVAL;
1994                 }
1995                 break;
1996         default:
1997                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1998                 return -EINVAL;
1999         }
2000
2001         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2002         if (ret < 0) {
2003                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2004                 return ret;
2005         }
2006
2007         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2008                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2009                 pll_code.n_code, pll_code.k_code);
2010
2011         snd_soc_write(codec, RT5645_PLL_CTRL1,
2012                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2013         snd_soc_write(codec, RT5645_PLL_CTRL2,
2014                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2015                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2016
2017         rt5645->pll_in = freq_in;
2018         rt5645->pll_out = freq_out;
2019         rt5645->pll_src = source;
2020
2021         return 0;
2022 }
2023
2024 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2025                         unsigned int rx_mask, int slots, int slot_width)
2026 {
2027         struct snd_soc_codec *codec = dai->codec;
2028         unsigned int val = 0;
2029
2030         if (rx_mask || tx_mask)
2031                 val |= (1 << 14);
2032
2033         switch (slots) {
2034         case 4:
2035                 val |= (1 << 12);
2036                 break;
2037         case 6:
2038                 val |= (2 << 12);
2039                 break;
2040         case 8:
2041                 val |= (3 << 12);
2042                 break;
2043         case 2:
2044         default:
2045                 break;
2046         }
2047
2048         switch (slot_width) {
2049         case 20:
2050                 val |= (1 << 10);
2051                 break;
2052         case 24:
2053                 val |= (2 << 10);
2054                 break;
2055         case 32:
2056                 val |= (3 << 10);
2057                 break;
2058         case 16:
2059         default:
2060                 break;
2061         }
2062
2063         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2064
2065         return 0;
2066 }
2067
2068 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2069                         enum snd_soc_bias_level level)
2070 {
2071         switch (level) {
2072         case SND_SOC_BIAS_STANDBY:
2073                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2074                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2075                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2076                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2077                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2078                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2079                         mdelay(10);
2080                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2081                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2082                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2083                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2084                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2085                 }
2086                 break;
2087
2088         case SND_SOC_BIAS_OFF:
2089                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2090                 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2091                 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2092                 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2093                 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2094                 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2095                 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2096                 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2097                 break;
2098
2099         default:
2100                 break;
2101         }
2102         codec->dapm.bias_level = level;
2103
2104         return 0;
2105 }
2106
2107 static int rt5645_jack_detect(struct snd_soc_codec *codec,
2108         struct snd_soc_jack *jack)
2109 {
2110         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2111         int gpio_state, jack_type = 0;
2112         unsigned int val;
2113
2114         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2115
2116         dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
2117                 gpio_state);
2118
2119         if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2120                 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
2121                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
2122                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
2123                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2124                 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
2125                 snd_soc_dapm_sync(&codec->dapm);
2126
2127                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2128                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2129
2130                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2131                         RT5645_CBJ_MN_JD, 0);
2132                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2133                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2134
2135                 msleep(400);
2136                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2137                 dev_dbg(codec->dev, "val = %d\n", val);
2138
2139                 if (val == 1 || val == 2)
2140                         jack_type = SND_JACK_HEADSET;
2141                 else
2142                         jack_type = SND_JACK_HEADPHONE;
2143
2144                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2145                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2146                 snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2147                 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
2148                 snd_soc_dapm_sync(&codec->dapm);
2149         }
2150
2151         snd_soc_jack_report(rt5645->jack, jack_type, SND_JACK_HEADSET);
2152
2153         return 0;
2154 }
2155
2156 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2157         struct snd_soc_jack *jack)
2158 {
2159         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2160
2161         rt5645->jack = jack;
2162
2163         rt5645_jack_detect(codec, rt5645->jack);
2164
2165         return 0;
2166 }
2167 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2168
2169 static irqreturn_t rt5645_irq(int irq, void *data)
2170 {
2171         struct rt5645_priv *rt5645 = data;
2172
2173         rt5645_jack_detect(rt5645->codec, rt5645->jack);
2174
2175         return IRQ_HANDLED;
2176 }
2177
2178 static int rt5645_probe(struct snd_soc_codec *codec)
2179 {
2180         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2181
2182         rt5645->codec = codec;
2183
2184         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2185
2186         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2187
2188         return 0;
2189 }
2190
2191 static int rt5645_remove(struct snd_soc_codec *codec)
2192 {
2193         rt5645_reset(codec);
2194         return 0;
2195 }
2196
2197 #ifdef CONFIG_PM
2198 static int rt5645_suspend(struct snd_soc_codec *codec)
2199 {
2200         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2201
2202         regcache_cache_only(rt5645->regmap, true);
2203         regcache_mark_dirty(rt5645->regmap);
2204
2205         return 0;
2206 }
2207
2208 static int rt5645_resume(struct snd_soc_codec *codec)
2209 {
2210         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2211
2212         regcache_cache_only(rt5645->regmap, false);
2213         regcache_sync(rt5645->regmap);
2214
2215         return 0;
2216 }
2217 #else
2218 #define rt5645_suspend NULL
2219 #define rt5645_resume NULL
2220 #endif
2221
2222 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2223 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2224                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2225
2226 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2227         .hw_params = rt5645_hw_params,
2228         .set_fmt = rt5645_set_dai_fmt,
2229         .set_sysclk = rt5645_set_dai_sysclk,
2230         .set_tdm_slot = rt5645_set_tdm_slot,
2231         .set_pll = rt5645_set_dai_pll,
2232 };
2233
2234 static struct snd_soc_dai_driver rt5645_dai[] = {
2235         {
2236                 .name = "rt5645-aif1",
2237                 .id = RT5645_AIF1,
2238                 .playback = {
2239                         .stream_name = "AIF1 Playback",
2240                         .channels_min = 1,
2241                         .channels_max = 2,
2242                         .rates = RT5645_STEREO_RATES,
2243                         .formats = RT5645_FORMATS,
2244                 },
2245                 .capture = {
2246                         .stream_name = "AIF1 Capture",
2247                         .channels_min = 1,
2248                         .channels_max = 2,
2249                         .rates = RT5645_STEREO_RATES,
2250                         .formats = RT5645_FORMATS,
2251                 },
2252                 .ops = &rt5645_aif_dai_ops,
2253         },
2254         {
2255                 .name = "rt5645-aif2",
2256                 .id = RT5645_AIF2,
2257                 .playback = {
2258                         .stream_name = "AIF2 Playback",
2259                         .channels_min = 1,
2260                         .channels_max = 2,
2261                         .rates = RT5645_STEREO_RATES,
2262                         .formats = RT5645_FORMATS,
2263                 },
2264                 .capture = {
2265                         .stream_name = "AIF2 Capture",
2266                         .channels_min = 1,
2267                         .channels_max = 2,
2268                         .rates = RT5645_STEREO_RATES,
2269                         .formats = RT5645_FORMATS,
2270                 },
2271                 .ops = &rt5645_aif_dai_ops,
2272         },
2273 };
2274
2275 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2276         .probe = rt5645_probe,
2277         .remove = rt5645_remove,
2278         .suspend = rt5645_suspend,
2279         .resume = rt5645_resume,
2280         .set_bias_level = rt5645_set_bias_level,
2281         .idle_bias_off = true,
2282         .controls = rt5645_snd_controls,
2283         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2284         .dapm_widgets = rt5645_dapm_widgets,
2285         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2286         .dapm_routes = rt5645_dapm_routes,
2287         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2288 };
2289
2290 static const struct regmap_config rt5645_regmap = {
2291         .reg_bits = 8,
2292         .val_bits = 16,
2293
2294         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2295                                                RT5645_PR_SPACING),
2296         .volatile_reg = rt5645_volatile_register,
2297         .readable_reg = rt5645_readable_register,
2298
2299         .cache_type = REGCACHE_RBTREE,
2300         .reg_defaults = rt5645_reg,
2301         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2302         .ranges = rt5645_ranges,
2303         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2304 };
2305
2306 static const struct i2c_device_id rt5645_i2c_id[] = {
2307         { "rt5645", 0 },
2308         { }
2309 };
2310 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2311
2312 static int rt5645_i2c_probe(struct i2c_client *i2c,
2313                     const struct i2c_device_id *id)
2314 {
2315         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2316         struct rt5645_priv *rt5645;
2317         int ret;
2318         unsigned int val;
2319
2320         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2321                                 GFP_KERNEL);
2322         if (rt5645 == NULL)
2323                 return -ENOMEM;
2324
2325         rt5645->i2c = i2c;
2326         i2c_set_clientdata(i2c, rt5645);
2327
2328         if (pdata)
2329                 rt5645->pdata = *pdata;
2330
2331         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2332         if (IS_ERR(rt5645->regmap)) {
2333                 ret = PTR_ERR(rt5645->regmap);
2334                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2335                         ret);
2336                 return ret;
2337         }
2338
2339         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2340         if (val != RT5645_DEVICE_ID) {
2341                 dev_err(&i2c->dev,
2342                         "Device with ID register %x is not rt5645\n", val);
2343                 return -ENODEV;
2344         }
2345
2346         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2347
2348         ret = regmap_register_patch(rt5645->regmap, init_list,
2349                                     ARRAY_SIZE(init_list));
2350         if (ret != 0)
2351                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2352
2353         if (rt5645->pdata.in2_diff)
2354                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2355                                         RT5645_IN_DF2, RT5645_IN_DF2);
2356
2357         if (rt5645->pdata.dmic_en) {
2358                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2359                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2360
2361                 switch (rt5645->pdata.dmic1_data_pin) {
2362                 case RT5645_DMIC_DATA_IN2N:
2363                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2364                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2365                         break;
2366
2367                 case RT5645_DMIC_DATA_GPIO5:
2368                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2369                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2370                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2371                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2372                         break;
2373
2374                 case RT5645_DMIC_DATA_GPIO11:
2375                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2376                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2377                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2378                                 RT5645_GP11_PIN_MASK,
2379                                 RT5645_GP11_PIN_DMIC1_SDA);
2380                         break;
2381
2382                 default:
2383                         break;
2384                 }
2385
2386                 switch (rt5645->pdata.dmic2_data_pin) {
2387                 case RT5645_DMIC_DATA_IN2P:
2388                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2389                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2390                         break;
2391
2392                 case RT5645_DMIC_DATA_GPIO6:
2393                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2394                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2395                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2396                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2397                         break;
2398
2399                 case RT5645_DMIC_DATA_GPIO10:
2400                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2401                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2402                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2403                                 RT5645_GP10_PIN_MASK,
2404                                 RT5645_GP10_PIN_DMIC2_SDA);
2405                         break;
2406
2407                 case RT5645_DMIC_DATA_GPIO12:
2408                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2409                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2410                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2411                                 RT5645_GP12_PIN_MASK,
2412                                 RT5645_GP12_PIN_DMIC2_SDA);
2413                         break;
2414
2415                 default:
2416                         break;
2417                 }
2418
2419         }
2420
2421         if (rt5645->i2c->irq) {
2422                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
2423                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2424                         | IRQF_ONESHOT, "rt5645", rt5645);
2425                 if (ret)
2426                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2427         }
2428
2429         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2430                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
2431                 if (ret)
2432                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
2433
2434                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
2435                 if (ret)
2436                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
2437         }
2438
2439         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2440                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
2441 }
2442
2443 static int rt5645_i2c_remove(struct i2c_client *i2c)
2444 {
2445         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
2446
2447         if (i2c->irq)
2448                 free_irq(i2c->irq, rt5645);
2449
2450         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
2451                 gpio_free(rt5645->pdata.hp_det_gpio);
2452
2453         snd_soc_unregister_codec(&i2c->dev);
2454
2455         return 0;
2456 }
2457
2458 static struct i2c_driver rt5645_i2c_driver = {
2459         .driver = {
2460                 .name = "rt5645",
2461                 .owner = THIS_MODULE,
2462         },
2463         .probe = rt5645_i2c_probe,
2464         .remove   = rt5645_i2c_remove,
2465         .id_table = rt5645_i2c_id,
2466 };
2467 module_i2c_driver(rt5645_i2c_driver);
2468
2469 MODULE_DESCRIPTION("ASoC RT5645 driver");
2470 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2471 MODULE_LICENSE("GPL v2");