sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_gpio.h>
  22 #include <linux/pm_runtime.h>
  23
  24 #include <sound/soc.h>
  25 #include <sound/pcm_params.h>
  26
  27 #include <linux/platform_data/asoc-s3c.h>
  28
  29 #include "dma.h"
  30 #include "idma.h"
  31 #include "i2s.h"
  32 #include "i2s-regs.h"
  33
  34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  35
  36 enum samsung_dai_type {
  37         TYPE_PRI,
  38         TYPE_SEC,
  39 };
  40
  41 struct samsung_i2s_variant_regs {
  42         unsigned int    bfs_off;
  43         unsigned int    rfs_off;
  44         unsigned int    sdf_off;
  45         unsigned int    txr_off;
  46         unsigned int    rclksrc_off;
  47         unsigned int    mss_off;
  48         unsigned int    cdclkcon_off;
  49         unsigned int    lrp_off;
  50         unsigned int    bfs_mask;
  51         unsigned int    rfs_mask;
  52         unsigned int    ftx0cnt_off;
  53 };
  54
  55 struct samsung_i2s_dai_data {
  56         int dai_type;
  57         u32 quirks;
  58         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  59 };
  60
  61 struct i2s_dai {
  62         /* Platform device for this DAI */
  63         struct platform_device *pdev;
  64         /* Memory mapped SFR region */
  65         void __iomem    *addr;
  66         /* Rate of RCLK source clock */
  67         unsigned long rclk_srcrate;
  68         /* Frame Clock */
  69         unsigned frmclk;
  70         /*
  71          * Specifically requested RCLK,BCLK by MACHINE Driver.
  72          * 0 indicates CPU driver is free to choose any value.
  73          */
  74         unsigned rfs, bfs;
  75         /* I2S Controller's core clock */
  76         struct clk *clk;
  77         /* Clock for generating I2S signals */
  78         struct clk *op_clk;
  79         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  80         struct i2s_dai *pri_dai;
  81         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  82         struct i2s_dai *sec_dai;
  83 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  84 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  85         unsigned mode;
  86         /* Driver for this DAI */
  87         struct snd_soc_dai_driver i2s_dai_drv;
  88         /* DMA parameters */
  89         struct s3c_dma_params dma_playback;
  90         struct s3c_dma_params dma_capture;
  91         struct s3c_dma_params idma_playback;
  92         dma_filter_fn filter;
  93         u32     quirks;
  94         u32     suspend_i2smod;
  95         u32     suspend_i2scon;
  96         u32     suspend_i2spsr;
  97         const struct samsung_i2s_variant_regs *variant_regs;
  98
  99         /* Spinlock protecting access to the device's registers */
 100         spinlock_t spinlock;
 101         spinlock_t *lock;
 102
 103         /* Below fields are only valid if this is the primary FIFO */
 104         struct clk *clk_table[3];
 105         struct clk_onecell_data clk_data;
 106 };
 107
 108 /* Lock for cross i/f checks */
 109 static DEFINE_SPINLOCK(lock);
 110
 111 /* If this is the 'overlay' stereo DAI */
 112 static inline bool is_secondary(struct i2s_dai *i2s)
 113 {
 114         return i2s->pri_dai ? true : false;
 115 }
 116
 117 /* If operating in SoC-Slave mode */
 118 static inline bool is_slave(struct i2s_dai *i2s)
 119 {
 120         u32 mod = readl(i2s->addr + I2SMOD);
 121         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 122 }
 123
 124 /* If this interface of the controller is transmitting data */
 125 static inline bool tx_active(struct i2s_dai *i2s)
 126 {
 127         u32 active;
 128
 129         if (!i2s)
 130                 return false;
 131
 132         active = readl(i2s->addr + I2SCON);
 133
 134         if (is_secondary(i2s))
 135                 active &= CON_TXSDMA_ACTIVE;
 136         else
 137                 active &= CON_TXDMA_ACTIVE;
 138
 139         return active ? true : false;
 140 }
 141
 142 /* Return pointer to the other DAI */
 143 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 144 {
 145         return i2s->pri_dai ? : i2s->sec_dai;
 146 }
 147
 148 /* If the other interface of the controller is transmitting data */
 149 static inline bool other_tx_active(struct i2s_dai *i2s)
 150 {
 151         struct i2s_dai *other = get_other_dai(i2s);
 152
 153         return tx_active(other);
 154 }
 155
 156 /* If any interface of the controller is transmitting data */
 157 static inline bool any_tx_active(struct i2s_dai *i2s)
 158 {
 159         return tx_active(i2s) || other_tx_active(i2s);
 160 }
 161
 162 /* If this interface of the controller is receiving data */
 163 static inline bool rx_active(struct i2s_dai *i2s)
 164 {
 165         u32 active;
 166
 167         if (!i2s)
 168                 return false;
 169
 170         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 171
 172         return active ? true : false;
 173 }
 174
 175 /* If the other interface of the controller is receiving data */
 176 static inline bool other_rx_active(struct i2s_dai *i2s)
 177 {
 178         struct i2s_dai *other = get_other_dai(i2s);
 179
 180         return rx_active(other);
 181 }
 182
 183 /* If any interface of the controller is receiving data */
 184 static inline bool any_rx_active(struct i2s_dai *i2s)
 185 {
 186         return rx_active(i2s) || other_rx_active(i2s);
 187 }
 188
 189 /* If the other DAI is transmitting or receiving data */
 190 static inline bool other_active(struct i2s_dai *i2s)
 191 {
 192         return other_rx_active(i2s) || other_tx_active(i2s);
 193 }
 194
 195 /* If this DAI is transmitting or receiving data */
 196 static inline bool this_active(struct i2s_dai *i2s)
 197 {
 198         return tx_active(i2s) || rx_active(i2s);
 199 }
 200
 201 /* If the controller is active anyway */
 202 static inline bool any_active(struct i2s_dai *i2s)
 203 {
 204         return this_active(i2s) || other_active(i2s);
 205 }
 206
 207 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 208 {
 209         return snd_soc_dai_get_drvdata(dai);
 210 }
 211
 212 static inline bool is_opened(struct i2s_dai *i2s)
 213 {
 214         if (i2s && (i2s->mode & DAI_OPENED))
 215                 return true;
 216         else
 217                 return false;
 218 }
 219
 220 static inline bool is_manager(struct i2s_dai *i2s)
 221 {
 222         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 223                 return true;
 224         else
 225                 return false;
 226 }
 227
 228 /* Read RCLK of I2S (in multiples of LRCLK) */
 229 static inline unsigned get_rfs(struct i2s_dai *i2s)
 230 {
 231         u32 rfs;
 232         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 233         rfs &= i2s->variant_regs->rfs_mask;
 234
 235         switch (rfs) {
 236         case 7: return 192;
 237         case 6: return 96;
 238         case 5: return 128;
 239         case 4: return 64;
 240         case 3: return 768;
 241         case 2: return 384;
 242         case 1: return 512;
 243         default: return 256;
 244         }
 245 }
 246
 247 /* Write RCLK of I2S (in multiples of LRCLK) */
 248 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 249 {
 250         u32 mod = readl(i2s->addr + I2SMOD);
 251         int rfs_shift = i2s->variant_regs->rfs_off;
 252
 253         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 254
 255         switch (rfs) {
 256         case 192:
 257                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 258                 break;
 259         case 96:
 260                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 261                 break;
 262         case 128:
 263                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 264                 break;
 265         case 64:
 266                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 267                 break;
 268         case 768:
 269                 mod |= (MOD_RCLK_768FS << rfs_shift);
 270                 break;
 271         case 512:
 272                 mod |= (MOD_RCLK_512FS << rfs_shift);
 273                 break;
 274         case 384:
 275                 mod |= (MOD_RCLK_384FS << rfs_shift);
 276                 break;
 277         default:
 278                 mod |= (MOD_RCLK_256FS << rfs_shift);
 279                 break;
 280         }
 281
 282         writel(mod, i2s->addr + I2SMOD);
 283 }
 284
 285 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 286 static inline unsigned get_bfs(struct i2s_dai *i2s)
 287 {
 288         u32 bfs;
 289         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 290         bfs &= i2s->variant_regs->bfs_mask;
 291
 292         switch (bfs) {
 293         case 8: return 256;
 294         case 7: return 192;
 295         case 6: return 128;
 296         case 5: return 96;
 297         case 4: return 64;
 298         case 3: return 24;
 299         case 2: return 16;
 300         case 1: return 48;
 301         default: return 32;
 302         }
 303 }
 304
 305 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 306 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 307 {
 308         u32 mod = readl(i2s->addr + I2SMOD);
 309         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 310         int bfs_shift = i2s->variant_regs->bfs_off;
 311
 312         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 313         if (!tdm && bfs > 48) {
 314                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 315                 return;
 316         }
 317
 318         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 319
 320         switch (bfs) {
 321         case 48:
 322                 mod |= (MOD_BCLK_48FS << bfs_shift);
 323                 break;
 324         case 32:
 325                 mod |= (MOD_BCLK_32FS << bfs_shift);
 326                 break;
 327         case 24:
 328                 mod |= (MOD_BCLK_24FS << bfs_shift);
 329                 break;
 330         case 16:
 331                 mod |= (MOD_BCLK_16FS << bfs_shift);
 332                 break;
 333         case 64:
 334                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 335                 break;
 336         case 96:
 337                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 338                 break;
 339         case 128:
 340                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 341                 break;
 342         case 192:
 343                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 344                 break;
 345         case 256:
 346                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 347                 break;
 348         default:
 349                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 350                 return;
 351         }
 352
 353         writel(mod, i2s->addr + I2SMOD);
 354 }
 355
 356 /* Sample-Size */
 357 static inline int get_blc(struct i2s_dai *i2s)
 358 {
 359         int blc = readl(i2s->addr + I2SMOD);
 360
 361         blc = (blc >> 13) & 0x3;
 362
 363         switch (blc) {
 364         case 2: return 24;
 365         case 1: return 8;
 366         default: return 16;
 367         }
 368 }
 369
 370 /* TX Channel Control */
 371 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 372 {
 373         void __iomem *addr = i2s->addr;
 374         int txr_off = i2s->variant_regs->txr_off;
 375         u32 con = readl(addr + I2SCON);
 376         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 377
 378         if (on) {
 379                 con |= CON_ACTIVE;
 380                 con &= ~CON_TXCH_PAUSE;
 381
 382                 if (is_secondary(i2s)) {
 383                         con |= CON_TXSDMA_ACTIVE;
 384                         con &= ~CON_TXSDMA_PAUSE;
 385                 } else {
 386                         con |= CON_TXDMA_ACTIVE;
 387                         con &= ~CON_TXDMA_PAUSE;
 388                 }
 389
 390                 if (any_rx_active(i2s))
 391                         mod |= 2 << txr_off;
 392                 else
 393                         mod |= 0 << txr_off;
 394         } else {
 395                 if (is_secondary(i2s)) {
 396                         con |=  CON_TXSDMA_PAUSE;
 397                         con &= ~CON_TXSDMA_ACTIVE;
 398                 } else {
 399                         con |=  CON_TXDMA_PAUSE;
 400                         con &= ~CON_TXDMA_ACTIVE;
 401                 }
 402
 403                 if (other_tx_active(i2s)) {
 404                         writel(con, addr + I2SCON);
 405                         return;
 406                 }
 407
 408                 con |=  CON_TXCH_PAUSE;
 409
 410                 if (any_rx_active(i2s))
 411                         mod |= 1 << txr_off;
 412                 else
 413                         con &= ~CON_ACTIVE;
 414         }
 415
 416         writel(mod, addr + I2SMOD);
 417         writel(con, addr + I2SCON);
 418 }
 419
 420 /* RX Channel Control */
 421 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 422 {
 423         void __iomem *addr = i2s->addr;
 424         int txr_off = i2s->variant_regs->txr_off;
 425         u32 con = readl(addr + I2SCON);
 426         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 427
 428         if (on) {
 429                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 430                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 431
 432                 if (any_tx_active(i2s))
 433                         mod |= 2 << txr_off;
 434                 else
 435                         mod |= 1 << txr_off;
 436         } else {
 437                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 438                 con &= ~CON_RXDMA_ACTIVE;
 439
 440                 if (any_tx_active(i2s))
 441                         mod |= 0 << txr_off;
 442                 else
 443                         con &= ~CON_ACTIVE;
 444         }
 445
 446         writel(mod, addr + I2SMOD);
 447         writel(con, addr + I2SCON);
 448 }
 449
 450 /* Flush FIFO of an interface */
 451 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 452 {
 453         void __iomem *fic;
 454         u32 val;
 455
 456         if (!i2s)
 457                 return;
 458
 459         if (is_secondary(i2s))
 460                 fic = i2s->addr + I2SFICS;
 461         else
 462                 fic = i2s->addr + I2SFIC;
 463
 464         /* Flush the FIFO */
 465         writel(readl(fic) | flush, fic);
 466
 467         /* Be patient */
 468         val = msecs_to_loops(1) / 1000; /* 1 usec */
 469         while (--val)
 470                 cpu_relax();
 471
 472         writel(readl(fic) & ~flush, fic);
 473 }
 474
 475 static int i2s_set_sysclk(struct snd_soc_dai *dai,
 476           int clk_id, unsigned int rfs, int dir)
 477 {
 478         struct i2s_dai *i2s = to_info(dai);
 479         struct i2s_dai *other = get_other_dai(i2s);
 480         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 481         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 482         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 483         u32 mod, mask, val = 0;
 484         unsigned long flags;
 485
 486         spin_lock_irqsave(i2s->lock, flags);
 487         mod = readl(i2s->addr + I2SMOD);
 488         spin_unlock_irqrestore(i2s->lock, flags);
 489
 490         switch (clk_id) {
 491         case SAMSUNG_I2S_OPCLK:
 492                 mask = MOD_OPCLK_MASK;
 493                 val = dir;
 494                 break;
 495         case SAMSUNG_I2S_CDCLK:
 496                 mask = 1 << i2s_regs->cdclkcon_off;
 497                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 498                 if (dir == SND_SOC_CLOCK_IN)
 499                         rfs = 0;
 500
 501                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 502                                 (any_active(i2s) &&
 503                                 (((dir == SND_SOC_CLOCK_IN)
 504                                         && !(mod & cdcon_mask)) ||
 505                                 ((dir == SND_SOC_CLOCK_OUT)
 506                                         && (mod & cdcon_mask))))) {
 507                         dev_err(&i2s->pdev->dev,
 508                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 509                         return -EAGAIN;
 510                 }
 511
 512                 if (dir == SND_SOC_CLOCK_IN)
 513                         val = 1 << i2s_regs->cdclkcon_off;
 514
 515                 i2s->rfs = rfs;
 516                 break;
 517
 518         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 519         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 520                 mask = 1 << i2s_regs->rclksrc_off;
 521
 522                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 523                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 524                         clk_id = 0;
 525                 else
 526                         clk_id = 1;
 527
 528                 if (!any_active(i2s)) {
 529                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
 530                                 if ((clk_id && !(mod & rsrc_mask)) ||
 531                                         (!clk_id && (mod & rsrc_mask))) {
 532                                         clk_disable_unprepare(i2s->op_clk);
 533                                         clk_put(i2s->op_clk);
 534                                 } else {
 535                                         i2s->rclk_srcrate =
 536                                                 clk_get_rate(i2s->op_clk);
 537                                         return 0;
 538                                 }
 539                         }
 540
 541                         if (clk_id)
 542                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 543                                                 "i2s_opclk1");
 544                         else
 545                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 546                                                 "i2s_opclk0");
 547
 548                         if (WARN_ON(IS_ERR(i2s->op_clk)))
 549                                 return PTR_ERR(i2s->op_clk);
 550
 551                         clk_prepare_enable(i2s->op_clk);
 552                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
 553
 554                         /* Over-ride the other's */
 555                         if (other) {
 556                                 other->op_clk = i2s->op_clk;
 557                                 other->rclk_srcrate = i2s->rclk_srcrate;
 558                         }
 559                 } else if ((!clk_id && (mod & rsrc_mask))
 560                                 || (clk_id && !(mod & rsrc_mask))) {
 561                         dev_err(&i2s->pdev->dev,
 562                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 563                         return -EAGAIN;
 564                 } else {
 565                         /* Call can't be on the active DAI */
 566                         i2s->op_clk = other->op_clk;
 567                         i2s->rclk_srcrate = other->rclk_srcrate;
 568                         return 0;
 569                 }
 570
 571                 if (clk_id == 1)
 572                         val = 1 << i2s_regs->rclksrc_off;
 573                 break;
 574         default:
 575                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 576                 return -EINVAL;
 577         }
 578
 579         spin_lock_irqsave(i2s->lock, flags);
 580         mod = readl(i2s->addr + I2SMOD);
 581         mod = (mod & ~mask) | val;
 582         writel(mod, i2s->addr + I2SMOD);
 583         spin_unlock_irqrestore(i2s->lock, flags);
 584
 585         return 0;
 586 }
 587
 588 static int i2s_set_fmt(struct snd_soc_dai *dai,
 589         unsigned int fmt)
 590 {
 591         struct i2s_dai *i2s = to_info(dai);
 592         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 593         u32 mod, tmp = 0;
 594         unsigned long flags;
 595
 596         lrp_shift = i2s->variant_regs->lrp_off;
 597         sdf_shift = i2s->variant_regs->sdf_off;
 598         mod_slave = 1 << i2s->variant_regs->mss_off;
 599
 600         sdf_mask = MOD_SDF_MASK << sdf_shift;
 601         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 602
 603         /* Format is priority */
 604         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 605         case SND_SOC_DAIFMT_RIGHT_J:
 606                 tmp |= lrp_rlow;
 607                 tmp |= (MOD_SDF_MSB << sdf_shift);
 608                 break;
 609         case SND_SOC_DAIFMT_LEFT_J:
 610                 tmp |= lrp_rlow;
 611                 tmp |= (MOD_SDF_LSB << sdf_shift);
 612                 break;
 613         case SND_SOC_DAIFMT_I2S:
 614                 tmp |= (MOD_SDF_IIS << sdf_shift);
 615                 break;
 616         default:
 617                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 618                 return -EINVAL;
 619         }
 620
 621         /*
 622          * INV flag is relative to the FORMAT flag - if set it simply
 623          * flips the polarity specified by the Standard
 624          */
 625         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 626         case SND_SOC_DAIFMT_NB_NF:
 627                 break;
 628         case SND_SOC_DAIFMT_NB_IF:
 629                 if (tmp & lrp_rlow)
 630                         tmp &= ~lrp_rlow;
 631                 else
 632                         tmp |= lrp_rlow;
 633                 break;
 634         default:
 635                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 636                 return -EINVAL;
 637         }
 638
 639         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 640         case SND_SOC_DAIFMT_CBM_CFM:
 641                 tmp |= mod_slave;
 642                 break;
 643         case SND_SOC_DAIFMT_CBS_CFS:
 644                 /* Set default source clock in Master mode */
 645                 if (i2s->rclk_srcrate == 0)
 646                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 647                                                         0, SND_SOC_CLOCK_IN);
 648                 break;
 649         default:
 650                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 651                 return -EINVAL;
 652         }
 653
 654         spin_lock_irqsave(i2s->lock, flags);
 655         mod = readl(i2s->addr + I2SMOD);
 656         /*
 657          * Don't change the I2S mode if any controller is active on this
 658          * channel.
 659          */
 660         if (any_active(i2s) &&
 661                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 662                 spin_unlock_irqrestore(i2s->lock, flags);
 663                 dev_err(&i2s->pdev->dev,
 664                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 665                 return -EAGAIN;
 666         }
 667
 668         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 669         mod |= tmp;
 670         writel(mod, i2s->addr + I2SMOD);
 671         spin_unlock_irqrestore(i2s->lock, flags);
 672
 673         return 0;
 674 }
 675
 676 static int i2s_hw_params(struct snd_pcm_substream *substream,
 677         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 678 {
 679         struct i2s_dai *i2s = to_info(dai);
 680         u32 mod, mask = 0, val = 0;
 681         unsigned long flags;
 682
 683         if (!is_secondary(i2s))
 684                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 685
 686         switch (params_channels(params)) {
 687         case 6:
 688                 val |= MOD_DC2_EN;
 689         case 4:
 690                 val |= MOD_DC1_EN;
 691                 break;
 692         case 2:
 693                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 694                         i2s->dma_playback.dma_size = 4;
 695                 else
 696                         i2s->dma_capture.dma_size = 4;
 697                 break;
 698         case 1:
 699                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 700                         i2s->dma_playback.dma_size = 2;
 701                 else
 702                         i2s->dma_capture.dma_size = 2;
 703
 704                 break;
 705         default:
 706                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 707                                 params_channels(params));
 708                 return -EINVAL;
 709         }
 710
 711         if (is_secondary(i2s))
 712                 mask |= MOD_BLCS_MASK;
 713         else
 714                 mask |= MOD_BLCP_MASK;
 715
 716         if (is_manager(i2s))
 717                 mask |= MOD_BLC_MASK;
 718
 719         switch (params_width(params)) {
 720         case 8:
 721                 if (is_secondary(i2s))
 722                         val |= MOD_BLCS_8BIT;
 723                 else
 724                         val |= MOD_BLCP_8BIT;
 725                 if (is_manager(i2s))
 726                         val |= MOD_BLC_8BIT;
 727                 break;
 728         case 16:
 729                 if (is_secondary(i2s))
 730                         val |= MOD_BLCS_16BIT;
 731                 else
 732                         val |= MOD_BLCP_16BIT;
 733                 if (is_manager(i2s))
 734                         val |= MOD_BLC_16BIT;
 735                 break;
 736         case 24:
 737                 if (is_secondary(i2s))
 738                         val |= MOD_BLCS_24BIT;
 739                 else
 740                         val |= MOD_BLCP_24BIT;
 741                 if (is_manager(i2s))
 742                         val |= MOD_BLC_24BIT;
 743                 break;
 744         default:
 745                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 746                                 params_format(params));
 747                 return -EINVAL;
 748         }
 749
 750         spin_lock_irqsave(i2s->lock, flags);
 751         mod = readl(i2s->addr + I2SMOD);
 752         mod = (mod & ~mask) | val;
 753         writel(mod, i2s->addr + I2SMOD);
 754         spin_unlock_irqrestore(i2s->lock, flags);
 755
 756         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 757
 758         i2s->frmclk = params_rate(params);
 759
 760         return 0;
 761 }
 762
 763 /* We set constraints on the substream acc to the version of I2S */
 764 static int i2s_startup(struct snd_pcm_substream *substream,
 765           struct snd_soc_dai *dai)
 766 {
 767         struct i2s_dai *i2s = to_info(dai);
 768         struct i2s_dai *other = get_other_dai(i2s);
 769         unsigned long flags;
 770
 771         spin_lock_irqsave(&lock, flags);
 772
 773         i2s->mode |= DAI_OPENED;
 774
 775         if (is_manager(other))
 776                 i2s->mode &= ~DAI_MANAGER;
 777         else
 778                 i2s->mode |= DAI_MANAGER;
 779
 780         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 781                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 782
 783         spin_unlock_irqrestore(&lock, flags);
 784
 785         return 0;
 786 }
 787
 788 static void i2s_shutdown(struct snd_pcm_substream *substream,
 789         struct snd_soc_dai *dai)
 790 {
 791         struct i2s_dai *i2s = to_info(dai);
 792         struct i2s_dai *other = get_other_dai(i2s);
 793         unsigned long flags;
 794
 795         spin_lock_irqsave(&lock, flags);
 796
 797         i2s->mode &= ~DAI_OPENED;
 798         i2s->mode &= ~DAI_MANAGER;
 799
 800         if (is_opened(other))
 801                 other->mode |= DAI_MANAGER;
 802
 803         /* Reset any constraint on RFS and BFS */
 804         i2s->rfs = 0;
 805         i2s->bfs = 0;
 806
 807         spin_unlock_irqrestore(&lock, flags);
 808 }
 809
 810 static int config_setup(struct i2s_dai *i2s)
 811 {
 812         struct i2s_dai *other = get_other_dai(i2s);
 813         unsigned rfs, bfs, blc;
 814         u32 psr;
 815
 816         blc = get_blc(i2s);
 817
 818         bfs = i2s->bfs;
 819
 820         if (!bfs && other)
 821                 bfs = other->bfs;
 822
 823         /* Select least possible multiple(2) if no constraint set */
 824         if (!bfs)
 825                 bfs = blc * 2;
 826
 827         rfs = i2s->rfs;
 828
 829         if (!rfs && other)
 830                 rfs = other->rfs;
 831
 832         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 833                 dev_err(&i2s->pdev->dev,
 834                         "%d-RFS not supported for 24-blc\n", rfs);
 835                 return -EINVAL;
 836         }
 837
 838         if (!rfs) {
 839                 if (bfs == 16 || bfs == 32)
 840                         rfs = 256;
 841                 else
 842                         rfs = 384;
 843         }
 844
 845         /* If already setup and running */
 846         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 847                 dev_err(&i2s->pdev->dev,
 848                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 849                 return -EAGAIN;
 850         }
 851
 852         set_bfs(i2s, bfs);
 853         set_rfs(i2s, rfs);
 854
 855         /* Don't bother with PSR in Slave mode */
 856         if (is_slave(i2s))
 857                 return 0;
 858
 859         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 860                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
 861                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 862                 dev_dbg(&i2s->pdev->dev,
 863                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 864                                 i2s->rclk_srcrate, psr, rfs, bfs);
 865         }
 866
 867         return 0;
 868 }
 869
 870 static int i2s_trigger(struct snd_pcm_substream *substream,
 871         int cmd, struct snd_soc_dai *dai)
 872 {
 873         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 874         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 875         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 876         unsigned long flags;
 877
 878         switch (cmd) {
 879         case SNDRV_PCM_TRIGGER_START:
 880         case SNDRV_PCM_TRIGGER_RESUME:
 881         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 882                 spin_lock_irqsave(i2s->lock, flags);
 883
 884                 if (config_setup(i2s)) {
 885                         spin_unlock_irqrestore(i2s->lock, flags);
 886                         return -EINVAL;
 887                 }
 888
 889                 if (capture)
 890                         i2s_rxctrl(i2s, 1);
 891                 else
 892                         i2s_txctrl(i2s, 1);
 893
 894                 spin_unlock_irqrestore(i2s->lock, flags);
 895                 break;
 896         case SNDRV_PCM_TRIGGER_STOP:
 897         case SNDRV_PCM_TRIGGER_SUSPEND:
 898         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 899                 spin_lock_irqsave(i2s->lock, flags);
 900
 901                 if (capture) {
 902                         i2s_rxctrl(i2s, 0);
 903                         i2s_fifo(i2s, FIC_RXFLUSH);
 904                 } else {
 905                         i2s_txctrl(i2s, 0);
 906                         i2s_fifo(i2s, FIC_TXFLUSH);
 907                 }
 908
 909                 spin_unlock_irqrestore(i2s->lock, flags);
 910                 break;
 911         }
 912
 913         return 0;
 914 }
 915
 916 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 917         int div_id, int div)
 918 {
 919         struct i2s_dai *i2s = to_info(dai);
 920         struct i2s_dai *other = get_other_dai(i2s);
 921
 922         switch (div_id) {
 923         case SAMSUNG_I2S_DIV_BCLK:
 924                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 925                         || (other && other->bfs && (other->bfs != div))) {
 926                         dev_err(&i2s->pdev->dev,
 927                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 928                         return -EAGAIN;
 929                 }
 930                 i2s->bfs = div;
 931                 break;
 932         default:
 933                 dev_err(&i2s->pdev->dev,
 934                         "Invalid clock divider(%d)\n", div_id);
 935                 return -EINVAL;
 936         }
 937
 938         return 0;
 939 }
 940
 941 static snd_pcm_sframes_t
 942 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
 943 {
 944         struct i2s_dai *i2s = to_info(dai);
 945         u32 reg = readl(i2s->addr + I2SFIC);
 946         snd_pcm_sframes_t delay;
 947         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 948
 949         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 950                 delay = FIC_RXCOUNT(reg);
 951         else if (is_secondary(i2s))
 952                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
 953         else
 954                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
 955
 956         return delay;
 957 }
 958
 959 #ifdef CONFIG_PM
 960 static int i2s_suspend(struct snd_soc_dai *dai)
 961 {
 962         struct i2s_dai *i2s = to_info(dai);
 963
 964         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
 965         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
 966         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
 967
 968         return 0;
 969 }
 970
 971 static int i2s_resume(struct snd_soc_dai *dai)
 972 {
 973         struct i2s_dai *i2s = to_info(dai);
 974
 975         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
 976         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
 977         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
 978
 979         return 0;
 980 }
 981 #else
 982 #define i2s_suspend NULL
 983 #define i2s_resume  NULL
 984 #endif
 985
 986 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 987 {
 988         struct i2s_dai *i2s = to_info(dai);
 989         struct i2s_dai *other = get_other_dai(i2s);
 990         unsigned long flags;
 991
 992         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
 993                 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
 994                                            NULL);
 995         } else {
 996                 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
 997                                            &i2s->dma_capture);
 998
 999                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1000                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1001
1002                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1003                         idma_reg_addr_init(i2s->addr,
1004                                         i2s->sec_dai->idma_playback.dma_addr);
1005         }
1006
1007         /* Reset any constraint on RFS and BFS */
1008         i2s->rfs = 0;
1009         i2s->bfs = 0;
1010         i2s->rclk_srcrate = 0;
1011
1012         spin_lock_irqsave(i2s->lock, flags);
1013         i2s_txctrl(i2s, 0);
1014         i2s_rxctrl(i2s, 0);
1015         i2s_fifo(i2s, FIC_TXFLUSH);
1016         i2s_fifo(other, FIC_TXFLUSH);
1017         i2s_fifo(i2s, FIC_RXFLUSH);
1018         spin_unlock_irqrestore(i2s->lock, flags);
1019
1020         /* Gate CDCLK by default */
1021         if (!is_opened(other))
1022                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1023                                 0, SND_SOC_CLOCK_IN);
1024
1025         return 0;
1026 }
1027
1028 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1029 {
1030         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1031
1032         if (!is_secondary(i2s)) {
1033                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1034                         spin_lock(i2s->lock);
1035                         writel(0, i2s->addr + I2SCON);
1036                         spin_unlock(i2s->lock);
1037                 }
1038         }
1039
1040         return 0;
1041 }
1042
1043 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1044         .trigger = i2s_trigger,
1045         .hw_params = i2s_hw_params,
1046         .set_fmt = i2s_set_fmt,
1047         .set_clkdiv = i2s_set_clkdiv,
1048         .set_sysclk = i2s_set_sysclk,
1049         .startup = i2s_startup,
1050         .shutdown = i2s_shutdown,
1051         .delay = i2s_delay,
1052 };
1053
1054 static const struct snd_soc_component_driver samsung_i2s_component = {
1055         .name           = "samsung-i2s",
1056 };
1057
1058 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1059
1060 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1061                                         SNDRV_PCM_FMTBIT_S16_LE | \
1062                                         SNDRV_PCM_FMTBIT_S24_LE)
1063
1064 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1065 {
1066         struct i2s_dai *i2s;
1067         int ret;
1068
1069         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1070         if (i2s == NULL)
1071                 return NULL;
1072
1073         i2s->pdev = pdev;
1074         i2s->pri_dai = NULL;
1075         i2s->sec_dai = NULL;
1076         i2s->i2s_dai_drv.symmetric_rates = 1;
1077         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1078         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1079         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1080         i2s->i2s_dai_drv.suspend = i2s_suspend;
1081         i2s->i2s_dai_drv.resume = i2s_resume;
1082         i2s->i2s_dai_drv.playback.channels_min = 1;
1083         i2s->i2s_dai_drv.playback.channels_max = 2;
1084         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1085         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1086
1087         if (!sec) {
1088                 i2s->i2s_dai_drv.capture.channels_min = 1;
1089                 i2s->i2s_dai_drv.capture.channels_max = 2;
1090                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1091                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1092                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1093         } else {        /* Create a new platform_device for Secondary */
1094                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1095                 if (!i2s->pdev)
1096                         return NULL;
1097
1098                 i2s->pdev->dev.parent = &pdev->dev;
1099
1100                 platform_set_drvdata(i2s->pdev, i2s);
1101                 ret = platform_device_add(i2s->pdev);
1102                 if (ret < 0)
1103                         return NULL;
1104         }
1105
1106         return i2s;
1107 }
1108
1109 static const struct of_device_id exynos_i2s_match[];
1110
1111 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1112                                                 struct platform_device *pdev)
1113 {
1114         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1115                 const struct of_device_id *match;
1116                 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1117                 return match ? match->data : NULL;
1118         } else {
1119                 return (struct samsung_i2s_dai_data *)
1120                                 platform_get_device_id(pdev)->driver_data;
1121         }
1122 }
1123
1124 #ifdef CONFIG_PM
1125 static int i2s_runtime_suspend(struct device *dev)
1126 {
1127         struct i2s_dai *i2s = dev_get_drvdata(dev);
1128
1129         clk_disable_unprepare(i2s->clk);
1130
1131         return 0;
1132 }
1133
1134 static int i2s_runtime_resume(struct device *dev)
1135 {
1136         struct i2s_dai *i2s = dev_get_drvdata(dev);
1137
1138         clk_prepare_enable(i2s->clk);
1139
1140         return 0;
1141 }
1142 #endif /* CONFIG_PM */
1143
1144 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1145 {
1146         int i;
1147
1148         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1149                 if (!IS_ERR(i2s->clk_table[i]))
1150                         clk_unregister(i2s->clk_table[i]);
1151         }
1152 }
1153
1154 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1155 {
1156         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1157
1158         of_clk_del_provider(pdev->dev.of_node);
1159         i2s_unregister_clocks(i2s);
1160 }
1161
1162 static int i2s_register_clock_provider(struct platform_device *pdev)
1163 {
1164         struct device *dev = &pdev->dev;
1165         struct i2s_dai *i2s = dev_get_drvdata(dev);
1166         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1167         const char *p_names[2] = { NULL };
1168         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1169         struct clk *rclksrc;
1170         int ret, i;
1171
1172         /* Register the clock provider only if it's expected in the DTB */
1173         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1174                 return 0;
1175
1176         /* Get the RCLKSRC mux clock parent clock names */
1177         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1178                 rclksrc = clk_get(dev, clk_name[i]);
1179                 if (IS_ERR(rclksrc))
1180                         continue;
1181                 p_names[i] = __clk_get_name(rclksrc);
1182                 clk_put(rclksrc);
1183         }
1184
1185         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1186                 /* Activate the prescaler */
1187                 u32 val = readl(i2s->addr + I2SPSR);
1188                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1189
1190                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1191                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1192                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1193                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1194                                 1, 0, i2s->lock);
1195
1196                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1197                                 "i2s_presc", "i2s_rclksrc",
1198                                 CLK_SET_RATE_PARENT,
1199                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1200
1201                 p_names[0] = "i2s_presc";
1202                 i2s->clk_data.clk_num = 2;
1203         }
1204         of_property_read_string_index(dev->of_node,
1205                                 "clock-output-names", 0, &clk_name[0]);
1206
1207         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1208                                 p_names[0], CLK_SET_RATE_PARENT,
1209                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1210                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1211
1212         i2s->clk_data.clk_num += 1;
1213         i2s->clk_data.clks = i2s->clk_table;
1214
1215         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1216                                   &i2s->clk_data);
1217         if (ret < 0) {
1218                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1219                 i2s_unregister_clocks(i2s);
1220         }
1221
1222         return ret;
1223 }
1224
1225 static int samsung_i2s_probe(struct platform_device *pdev)
1226 {
1227         struct i2s_dai *pri_dai, *sec_dai = NULL;
1228         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1229         struct samsung_i2s *i2s_cfg = NULL;
1230         struct resource *res;
1231         u32 regs_base, quirks = 0, idma_addr = 0;
1232         struct device_node *np = pdev->dev.of_node;
1233         const struct samsung_i2s_dai_data *i2s_dai_data;
1234         int ret;
1235
1236         /* Call during Seconday interface registration */
1237         i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1238
1239         if (i2s_dai_data->dai_type == TYPE_SEC) {
1240                 sec_dai = dev_get_drvdata(&pdev->dev);
1241                 if (!sec_dai) {
1242                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1243                         return -EFAULT;
1244                 }
1245                 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1246                                                 &samsung_i2s_component,
1247                                                 &sec_dai->i2s_dai_drv, 1);
1248                 if (ret != 0)
1249                         return ret;
1250
1251                 return samsung_asoc_dma_platform_register(&pdev->dev,
1252                                                           sec_dai->filter);
1253         }
1254
1255         pri_dai = i2s_alloc_dai(pdev, false);
1256         if (!pri_dai) {
1257                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1258                 return -ENOMEM;
1259         }
1260
1261         spin_lock_init(&pri_dai->spinlock);
1262         pri_dai->lock = &pri_dai->spinlock;
1263
1264         if (!np) {
1265                 if (i2s_pdata == NULL) {
1266                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1267                         return -EINVAL;
1268                 }
1269
1270                 pri_dai->dma_playback.slave = i2s_pdata->dma_playback;
1271                 pri_dai->dma_capture.slave = i2s_pdata->dma_capture;
1272                 pri_dai->filter = i2s_pdata->dma_filter;
1273
1274                 if (&i2s_pdata->type)
1275                         i2s_cfg = &i2s_pdata->type.i2s;
1276
1277                 if (i2s_cfg) {
1278                         quirks = i2s_cfg->quirks;
1279                         idma_addr = i2s_cfg->idma_addr;
1280                 }
1281         } else {
1282                 quirks = i2s_dai_data->quirks;
1283                 if (of_property_read_u32(np, "samsung,idma-addr",
1284                                          &idma_addr)) {
1285                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1286                                 dev_info(&pdev->dev, "idma address is not"\
1287                                                 "specified");
1288                         }
1289                 }
1290         }
1291
1292         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1293         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1294         if (IS_ERR(pri_dai->addr))
1295                 return PTR_ERR(pri_dai->addr);
1296
1297         regs_base = res->start;
1298
1299         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1300         if (IS_ERR(pri_dai->clk)) {
1301                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1302                 return PTR_ERR(pri_dai->clk);
1303         }
1304
1305         ret = clk_prepare_enable(pri_dai->clk);
1306         if (ret != 0) {
1307                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1308                 return ret;
1309         }
1310         pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1311         pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1312         pri_dai->dma_playback.ch_name = "tx";
1313         pri_dai->dma_capture.ch_name = "rx";
1314         pri_dai->dma_playback.dma_size = 4;
1315         pri_dai->dma_capture.dma_size = 4;
1316         pri_dai->quirks = quirks;
1317         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1318
1319         if (quirks & QUIRK_PRI_6CHAN)
1320                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1321
1322         if (quirks & QUIRK_SEC_DAI) {
1323                 sec_dai = i2s_alloc_dai(pdev, true);
1324                 if (!sec_dai) {
1325                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1326                         return -ENOMEM;
1327                 }
1328
1329                 sec_dai->lock = &pri_dai->spinlock;
1330                 sec_dai->variant_regs = pri_dai->variant_regs;
1331                 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1332                 sec_dai->dma_playback.ch_name = "tx-sec";
1333
1334                 if (!np) {
1335                         sec_dai->dma_playback.slave = i2s_pdata->dma_play_sec;
1336                         sec_dai->filter = i2s_pdata->dma_filter;
1337                 }
1338
1339                 sec_dai->dma_playback.dma_size = 4;
1340                 sec_dai->addr = pri_dai->addr;
1341                 sec_dai->clk = pri_dai->clk;
1342                 sec_dai->quirks = quirks;
1343                 sec_dai->idma_playback.dma_addr = idma_addr;
1344                 sec_dai->pri_dai = pri_dai;
1345                 pri_dai->sec_dai = sec_dai;
1346         }
1347
1348         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1349                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1350                 return -EINVAL;
1351         }
1352
1353         devm_snd_soc_register_component(&pri_dai->pdev->dev,
1354                                         &samsung_i2s_component,
1355                                         &pri_dai->i2s_dai_drv, 1);
1356
1357         pm_runtime_enable(&pdev->dev);
1358
1359         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter);
1360         if (ret != 0)
1361                 return ret;
1362
1363         return i2s_register_clock_provider(pdev);
1364 }
1365
1366 static int samsung_i2s_remove(struct platform_device *pdev)
1367 {
1368         struct i2s_dai *i2s, *other;
1369
1370         i2s = dev_get_drvdata(&pdev->dev);
1371         other = get_other_dai(i2s);
1372
1373         if (other) {
1374                 other->pri_dai = NULL;
1375                 other->sec_dai = NULL;
1376         } else {
1377                 pm_runtime_disable(&pdev->dev);
1378         }
1379
1380         if (!is_secondary(i2s)) {
1381                 i2s_unregister_clock_provider(pdev);
1382                 clk_disable_unprepare(i2s->clk);
1383         }
1384
1385         i2s->pri_dai = NULL;
1386         i2s->sec_dai = NULL;
1387
1388         return 0;
1389 }
1390
1391 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1392         .bfs_off = 1,
1393         .rfs_off = 3,
1394         .sdf_off = 5,
1395         .txr_off = 8,
1396         .rclksrc_off = 10,
1397         .mss_off = 11,
1398         .cdclkcon_off = 12,
1399         .lrp_off = 7,
1400         .bfs_mask = 0x3,
1401         .rfs_mask = 0x3,
1402         .ftx0cnt_off = 8,
1403 };
1404
1405 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1406         .bfs_off = 0,
1407         .rfs_off = 4,
1408         .sdf_off = 6,
1409         .txr_off = 8,
1410         .rclksrc_off = 10,
1411         .mss_off = 11,
1412         .cdclkcon_off = 12,
1413         .lrp_off = 15,
1414         .bfs_mask = 0xf,
1415         .rfs_mask = 0x3,
1416         .ftx0cnt_off = 8,
1417 };
1418
1419 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1420         .bfs_off = 0,
1421         .rfs_off = 4,
1422         .sdf_off = 7,
1423         .txr_off = 9,
1424         .rclksrc_off = 11,
1425         .mss_off = 12,
1426         .cdclkcon_off = 22,
1427         .lrp_off = 15,
1428         .bfs_mask = 0xf,
1429         .rfs_mask = 0x7,
1430         .ftx0cnt_off = 0,
1431 };
1432
1433 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1434         .bfs_off = 0,
1435         .rfs_off = 3,
1436         .sdf_off = 6,
1437         .txr_off = 8,
1438         .rclksrc_off = 10,
1439         .mss_off = 11,
1440         .cdclkcon_off = 12,
1441         .lrp_off = 15,
1442         .bfs_mask = 0x7,
1443         .rfs_mask = 0x7,
1444         .ftx0cnt_off = 8,
1445 };
1446
1447 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1448         .dai_type = TYPE_PRI,
1449         .quirks = QUIRK_NO_MUXPSR,
1450         .i2s_variant_regs = &i2sv3_regs,
1451 };
1452
1453 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1454         .dai_type = TYPE_PRI,
1455         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1456                         QUIRK_SUPPORTS_IDMA,
1457         .i2s_variant_regs = &i2sv3_regs,
1458 };
1459
1460 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1461         .dai_type = TYPE_PRI,
1462         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1463                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1464         .i2s_variant_regs = &i2sv6_regs,
1465 };
1466
1467 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1468         .dai_type = TYPE_PRI,
1469         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1470                         QUIRK_SUPPORTS_TDM,
1471         .i2s_variant_regs = &i2sv7_regs,
1472 };
1473
1474 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1475         .dai_type = TYPE_PRI,
1476         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1477         .i2s_variant_regs = &i2sv5_i2s1_regs,
1478 };
1479
1480 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1481         .dai_type = TYPE_PRI,
1482 };
1483
1484 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1485         .dai_type = TYPE_SEC,
1486 };
1487
1488 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1489         {
1490                 .name           = "samsung-i2s",
1491                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1492         }, {
1493                 .name           = "samsung-i2s-sec",
1494                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1495         }, {
1496                 .name           = "samsung-i2sv4",
1497                 .driver_data    = (kernel_ulong_t)&i2sv5_dai_type,
1498         },
1499         {},
1500 };
1501 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1502
1503 #ifdef CONFIG_OF
1504 static const struct of_device_id exynos_i2s_match[] = {
1505         {
1506                 .compatible = "samsung,s3c6410-i2s",
1507                 .data = &i2sv3_dai_type,
1508         }, {
1509                 .compatible = "samsung,s5pv210-i2s",
1510                 .data = &i2sv5_dai_type,
1511         }, {
1512                 .compatible = "samsung,exynos5420-i2s",
1513                 .data = &i2sv6_dai_type,
1514         }, {
1515                 .compatible = "samsung,exynos7-i2s",
1516                 .data = &i2sv7_dai_type,
1517         }, {
1518                 .compatible = "samsung,exynos7-i2s1",
1519                 .data = &i2sv5_dai_type_i2s1,
1520         },
1521         {},
1522 };
1523 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1524 #endif
1525
1526 static const struct dev_pm_ops samsung_i2s_pm = {
1527         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1528                                 i2s_runtime_resume, NULL)
1529 };
1530
1531 static struct platform_driver samsung_i2s_driver = {
1532         .probe  = samsung_i2s_probe,
1533         .remove = samsung_i2s_remove,
1534         .id_table = samsung_i2s_driver_ids,
1535         .driver = {
1536                 .name = "samsung-i2s",
1537                 .of_match_table = of_match_ptr(exynos_i2s_match),
1538                 .pm = &samsung_i2s_pm,
1539         },
1540 };
1541
1542 module_platform_driver(samsung_i2s_driver);
1543
1544 /* Module information */
1545 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1546 MODULE_DESCRIPTION("Samsung I2S Interface");
1547 MODULE_ALIAS("platform:samsung-i2s");
1548 MODULE_LICENSE("GPL");