1 /* sound/soc/samsung/i2s.c
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
19 #include <linux/module.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
24 #include <sound/soc.h>
25 #include <sound/pcm_params.h>
27 #include <linux/platform_data/asoc-s3c.h>
34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36 enum samsung_dai_type {
41 struct samsung_i2s_variant_regs {
46 unsigned int rclksrc_off;
48 unsigned int cdclkcon_off;
50 unsigned int bfs_mask;
51 unsigned int rfs_mask;
52 unsigned int ftx0cnt_off;
55 struct samsung_i2s_dai_data {
58 const struct samsung_i2s_variant_regs *i2s_variant_regs;
62 /* Platform device for this DAI */
63 struct platform_device *pdev;
64 /* Memory mapped SFR region */
66 /* Rate of RCLK source clock */
67 unsigned long rclk_srcrate;
71 * Specifically requested RCLK,BCLK by MACHINE Driver.
72 * 0 indicates CPU driver is free to choose any value.
75 /* I2S Controller's core clock */
77 /* Clock for generating I2S signals */
79 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
80 struct i2s_dai *pri_dai;
81 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
82 struct i2s_dai *sec_dai;
83 #define DAI_OPENED (1 << 0) /* Dai is opened */
84 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
86 /* Driver for this DAI */
87 struct snd_soc_dai_driver i2s_dai_drv;
89 struct s3c_dma_params dma_playback;
90 struct s3c_dma_params dma_capture;
91 struct s3c_dma_params idma_playback;
97 const struct samsung_i2s_variant_regs *variant_regs;
99 /* Spinlock protecting access to the device's registers */
103 /* Below fields are only valid if this is the primary FIFO */
104 struct clk *clk_table[3];
105 struct clk_onecell_data clk_data;
108 /* Lock for cross i/f checks */
109 static DEFINE_SPINLOCK(lock);
111 /* If this is the 'overlay' stereo DAI */
112 static inline bool is_secondary(struct i2s_dai *i2s)
114 return i2s->pri_dai ? true : false;
117 /* If operating in SoC-Slave mode */
118 static inline bool is_slave(struct i2s_dai *i2s)
120 u32 mod = readl(i2s->addr + I2SMOD);
121 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
124 /* If this interface of the controller is transmitting data */
125 static inline bool tx_active(struct i2s_dai *i2s)
132 active = readl(i2s->addr + I2SCON);
134 if (is_secondary(i2s))
135 active &= CON_TXSDMA_ACTIVE;
137 active &= CON_TXDMA_ACTIVE;
139 return active ? true : false;
142 /* Return pointer to the other DAI */
143 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
145 return i2s->pri_dai ? : i2s->sec_dai;
148 /* If the other interface of the controller is transmitting data */
149 static inline bool other_tx_active(struct i2s_dai *i2s)
151 struct i2s_dai *other = get_other_dai(i2s);
153 return tx_active(other);
156 /* If any interface of the controller is transmitting data */
157 static inline bool any_tx_active(struct i2s_dai *i2s)
159 return tx_active(i2s) || other_tx_active(i2s);
162 /* If this interface of the controller is receiving data */
163 static inline bool rx_active(struct i2s_dai *i2s)
170 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
172 return active ? true : false;
175 /* If the other interface of the controller is receiving data */
176 static inline bool other_rx_active(struct i2s_dai *i2s)
178 struct i2s_dai *other = get_other_dai(i2s);
180 return rx_active(other);
183 /* If any interface of the controller is receiving data */
184 static inline bool any_rx_active(struct i2s_dai *i2s)
186 return rx_active(i2s) || other_rx_active(i2s);
189 /* If the other DAI is transmitting or receiving data */
190 static inline bool other_active(struct i2s_dai *i2s)
192 return other_rx_active(i2s) || other_tx_active(i2s);
195 /* If this DAI is transmitting or receiving data */
196 static inline bool this_active(struct i2s_dai *i2s)
198 return tx_active(i2s) || rx_active(i2s);
201 /* If the controller is active anyway */
202 static inline bool any_active(struct i2s_dai *i2s)
204 return this_active(i2s) || other_active(i2s);
207 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
209 return snd_soc_dai_get_drvdata(dai);
212 static inline bool is_opened(struct i2s_dai *i2s)
214 if (i2s && (i2s->mode & DAI_OPENED))
220 static inline bool is_manager(struct i2s_dai *i2s)
222 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
228 /* Read RCLK of I2S (in multiples of LRCLK) */
229 static inline unsigned get_rfs(struct i2s_dai *i2s)
232 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
233 rfs &= i2s->variant_regs->rfs_mask;
247 /* Write RCLK of I2S (in multiples of LRCLK) */
248 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
250 u32 mod = readl(i2s->addr + I2SMOD);
251 int rfs_shift = i2s->variant_regs->rfs_off;
253 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
257 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
260 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
263 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
266 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
269 mod |= (MOD_RCLK_768FS << rfs_shift);
272 mod |= (MOD_RCLK_512FS << rfs_shift);
275 mod |= (MOD_RCLK_384FS << rfs_shift);
278 mod |= (MOD_RCLK_256FS << rfs_shift);
282 writel(mod, i2s->addr + I2SMOD);
285 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
286 static inline unsigned get_bfs(struct i2s_dai *i2s)
289 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
290 bfs &= i2s->variant_regs->bfs_mask;
305 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
306 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
308 u32 mod = readl(i2s->addr + I2SMOD);
309 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
310 int bfs_shift = i2s->variant_regs->bfs_off;
312 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
313 if (!tdm && bfs > 48) {
314 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
318 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
322 mod |= (MOD_BCLK_48FS << bfs_shift);
325 mod |= (MOD_BCLK_32FS << bfs_shift);
328 mod |= (MOD_BCLK_24FS << bfs_shift);
331 mod |= (MOD_BCLK_16FS << bfs_shift);
334 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
337 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
340 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
343 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
346 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
349 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
353 writel(mod, i2s->addr + I2SMOD);
357 static inline int get_blc(struct i2s_dai *i2s)
359 int blc = readl(i2s->addr + I2SMOD);
361 blc = (blc >> 13) & 0x3;
370 /* TX Channel Control */
371 static void i2s_txctrl(struct i2s_dai *i2s, int on)
373 void __iomem *addr = i2s->addr;
374 int txr_off = i2s->variant_regs->txr_off;
375 u32 con = readl(addr + I2SCON);
376 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
380 con &= ~CON_TXCH_PAUSE;
382 if (is_secondary(i2s)) {
383 con |= CON_TXSDMA_ACTIVE;
384 con &= ~CON_TXSDMA_PAUSE;
386 con |= CON_TXDMA_ACTIVE;
387 con &= ~CON_TXDMA_PAUSE;
390 if (any_rx_active(i2s))
395 if (is_secondary(i2s)) {
396 con |= CON_TXSDMA_PAUSE;
397 con &= ~CON_TXSDMA_ACTIVE;
399 con |= CON_TXDMA_PAUSE;
400 con &= ~CON_TXDMA_ACTIVE;
403 if (other_tx_active(i2s)) {
404 writel(con, addr + I2SCON);
408 con |= CON_TXCH_PAUSE;
410 if (any_rx_active(i2s))
416 writel(mod, addr + I2SMOD);
417 writel(con, addr + I2SCON);
420 /* RX Channel Control */
421 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
423 void __iomem *addr = i2s->addr;
424 int txr_off = i2s->variant_regs->txr_off;
425 u32 con = readl(addr + I2SCON);
426 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
429 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
430 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
432 if (any_tx_active(i2s))
437 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
438 con &= ~CON_RXDMA_ACTIVE;
440 if (any_tx_active(i2s))
446 writel(mod, addr + I2SMOD);
447 writel(con, addr + I2SCON);
450 /* Flush FIFO of an interface */
451 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
459 if (is_secondary(i2s))
460 fic = i2s->addr + I2SFICS;
462 fic = i2s->addr + I2SFIC;
465 writel(readl(fic) | flush, fic);
468 val = msecs_to_loops(1) / 1000; /* 1 usec */
472 writel(readl(fic) & ~flush, fic);
475 static int i2s_set_sysclk(struct snd_soc_dai *dai,
476 int clk_id, unsigned int rfs, int dir)
478 struct i2s_dai *i2s = to_info(dai);
479 struct i2s_dai *other = get_other_dai(i2s);
480 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
481 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
482 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
483 u32 mod, mask, val = 0;
485 spin_lock(i2s->lock);
486 mod = readl(i2s->addr + I2SMOD);
487 spin_unlock(i2s->lock);
490 case SAMSUNG_I2S_OPCLK:
491 mask = MOD_OPCLK_MASK;
494 case SAMSUNG_I2S_CDCLK:
495 mask = 1 << i2s_regs->cdclkcon_off;
496 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497 if (dir == SND_SOC_CLOCK_IN)
500 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
502 (((dir == SND_SOC_CLOCK_IN)
503 && !(mod & cdcon_mask)) ||
504 ((dir == SND_SOC_CLOCK_OUT)
505 && (mod & cdcon_mask))))) {
506 dev_err(&i2s->pdev->dev,
507 "%s:%d Other DAI busy\n", __func__, __LINE__);
511 if (dir == SND_SOC_CLOCK_IN)
512 val = 1 << i2s_regs->cdclkcon_off;
517 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
518 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
519 mask = 1 << i2s_regs->rclksrc_off;
521 if ((i2s->quirks & QUIRK_NO_MUXPSR)
522 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
527 if (!any_active(i2s)) {
528 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
529 if ((clk_id && !(mod & rsrc_mask)) ||
530 (!clk_id && (mod & rsrc_mask))) {
531 clk_disable_unprepare(i2s->op_clk);
532 clk_put(i2s->op_clk);
535 clk_get_rate(i2s->op_clk);
541 i2s->op_clk = clk_get(&i2s->pdev->dev,
544 i2s->op_clk = clk_get(&i2s->pdev->dev,
547 if (WARN_ON(IS_ERR(i2s->op_clk)))
548 return PTR_ERR(i2s->op_clk);
550 clk_prepare_enable(i2s->op_clk);
551 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
553 /* Over-ride the other's */
555 other->op_clk = i2s->op_clk;
556 other->rclk_srcrate = i2s->rclk_srcrate;
558 } else if ((!clk_id && (mod & rsrc_mask))
559 || (clk_id && !(mod & rsrc_mask))) {
560 dev_err(&i2s->pdev->dev,
561 "%s:%d Other DAI busy\n", __func__, __LINE__);
564 /* Call can't be on the active DAI */
565 i2s->op_clk = other->op_clk;
566 i2s->rclk_srcrate = other->rclk_srcrate;
571 val = 1 << i2s_regs->rclksrc_off;
574 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
578 spin_lock(i2s->lock);
579 mod = readl(i2s->addr + I2SMOD);
580 mod = (mod & ~mask) | val;
581 writel(mod, i2s->addr + I2SMOD);
582 spin_unlock(i2s->lock);
587 static int i2s_set_fmt(struct snd_soc_dai *dai,
590 struct i2s_dai *i2s = to_info(dai);
591 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
594 lrp_shift = i2s->variant_regs->lrp_off;
595 sdf_shift = i2s->variant_regs->sdf_off;
596 mod_slave = 1 << i2s->variant_regs->mss_off;
598 sdf_mask = MOD_SDF_MASK << sdf_shift;
599 lrp_rlow = MOD_LR_RLOW << lrp_shift;
601 /* Format is priority */
602 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
603 case SND_SOC_DAIFMT_RIGHT_J:
605 tmp |= (MOD_SDF_MSB << sdf_shift);
607 case SND_SOC_DAIFMT_LEFT_J:
609 tmp |= (MOD_SDF_LSB << sdf_shift);
611 case SND_SOC_DAIFMT_I2S:
612 tmp |= (MOD_SDF_IIS << sdf_shift);
615 dev_err(&i2s->pdev->dev, "Format not supported\n");
620 * INV flag is relative to the FORMAT flag - if set it simply
621 * flips the polarity specified by the Standard
623 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
624 case SND_SOC_DAIFMT_NB_NF:
626 case SND_SOC_DAIFMT_NB_IF:
633 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
637 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
638 case SND_SOC_DAIFMT_CBM_CFM:
641 case SND_SOC_DAIFMT_CBS_CFS:
642 /* Set default source clock in Master mode */
643 if (i2s->rclk_srcrate == 0)
644 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
645 0, SND_SOC_CLOCK_IN);
648 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
652 spin_lock(i2s->lock);
653 mod = readl(i2s->addr + I2SMOD);
655 * Don't change the I2S mode if any controller is active on this
658 if (any_active(i2s) &&
659 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
660 spin_unlock(i2s->lock);
661 dev_err(&i2s->pdev->dev,
662 "%s:%d Other DAI busy\n", __func__, __LINE__);
666 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
668 writel(mod, i2s->addr + I2SMOD);
669 spin_unlock(i2s->lock);
674 static int i2s_hw_params(struct snd_pcm_substream *substream,
675 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
677 struct i2s_dai *i2s = to_info(dai);
678 u32 mod, mask = 0, val = 0;
680 if (!is_secondary(i2s))
681 mask |= (MOD_DC2_EN | MOD_DC1_EN);
683 switch (params_channels(params)) {
690 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
691 i2s->dma_playback.dma_size = 4;
693 i2s->dma_capture.dma_size = 4;
696 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
697 i2s->dma_playback.dma_size = 2;
699 i2s->dma_capture.dma_size = 2;
703 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
704 params_channels(params));
708 if (is_secondary(i2s))
709 mask |= MOD_BLCS_MASK;
711 mask |= MOD_BLCP_MASK;
714 mask |= MOD_BLC_MASK;
716 switch (params_width(params)) {
718 if (is_secondary(i2s))
719 val |= MOD_BLCS_8BIT;
721 val |= MOD_BLCP_8BIT;
726 if (is_secondary(i2s))
727 val |= MOD_BLCS_16BIT;
729 val |= MOD_BLCP_16BIT;
731 val |= MOD_BLC_16BIT;
734 if (is_secondary(i2s))
735 val |= MOD_BLCS_24BIT;
737 val |= MOD_BLCP_24BIT;
739 val |= MOD_BLC_24BIT;
742 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
743 params_format(params));
747 spin_lock(i2s->lock);
748 mod = readl(i2s->addr + I2SMOD);
749 mod = (mod & ~mask) | val;
750 writel(mod, i2s->addr + I2SMOD);
751 spin_unlock(i2s->lock);
753 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
755 i2s->frmclk = params_rate(params);
760 /* We set constraints on the substream acc to the version of I2S */
761 static int i2s_startup(struct snd_pcm_substream *substream,
762 struct snd_soc_dai *dai)
764 struct i2s_dai *i2s = to_info(dai);
765 struct i2s_dai *other = get_other_dai(i2s);
768 spin_lock_irqsave(&lock, flags);
770 i2s->mode |= DAI_OPENED;
772 if (is_manager(other))
773 i2s->mode &= ~DAI_MANAGER;
775 i2s->mode |= DAI_MANAGER;
777 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
778 writel(CON_RSTCLR, i2s->addr + I2SCON);
780 spin_unlock_irqrestore(&lock, flags);
785 static void i2s_shutdown(struct snd_pcm_substream *substream,
786 struct snd_soc_dai *dai)
788 struct i2s_dai *i2s = to_info(dai);
789 struct i2s_dai *other = get_other_dai(i2s);
792 spin_lock_irqsave(&lock, flags);
794 i2s->mode &= ~DAI_OPENED;
795 i2s->mode &= ~DAI_MANAGER;
797 if (is_opened(other))
798 other->mode |= DAI_MANAGER;
800 /* Reset any constraint on RFS and BFS */
804 spin_unlock_irqrestore(&lock, flags);
807 static int config_setup(struct i2s_dai *i2s)
809 struct i2s_dai *other = get_other_dai(i2s);
810 unsigned rfs, bfs, blc;
820 /* Select least possible multiple(2) if no constraint set */
829 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
830 dev_err(&i2s->pdev->dev,
831 "%d-RFS not supported for 24-blc\n", rfs);
836 if (bfs == 16 || bfs == 32)
842 /* If already setup and running */
843 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
844 dev_err(&i2s->pdev->dev,
845 "%s:%d Other DAI busy\n", __func__, __LINE__);
852 /* Don't bother with PSR in Slave mode */
856 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
857 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
858 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
859 dev_dbg(&i2s->pdev->dev,
860 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
861 i2s->rclk_srcrate, psr, rfs, bfs);
867 static int i2s_trigger(struct snd_pcm_substream *substream,
868 int cmd, struct snd_soc_dai *dai)
870 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
871 struct snd_soc_pcm_runtime *rtd = substream->private_data;
872 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
876 case SNDRV_PCM_TRIGGER_START:
877 case SNDRV_PCM_TRIGGER_RESUME:
878 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
879 spin_lock_irqsave(i2s->lock, flags);
881 if (config_setup(i2s)) {
882 spin_unlock_irqrestore(i2s->lock, flags);
891 spin_unlock_irqrestore(i2s->lock, flags);
893 case SNDRV_PCM_TRIGGER_STOP:
894 case SNDRV_PCM_TRIGGER_SUSPEND:
895 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
896 spin_lock_irqsave(i2s->lock, flags);
900 i2s_fifo(i2s, FIC_RXFLUSH);
903 i2s_fifo(i2s, FIC_TXFLUSH);
906 spin_unlock_irqrestore(i2s->lock, flags);
913 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
916 struct i2s_dai *i2s = to_info(dai);
917 struct i2s_dai *other = get_other_dai(i2s);
920 case SAMSUNG_I2S_DIV_BCLK:
921 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
922 || (other && other->bfs && (other->bfs != div))) {
923 dev_err(&i2s->pdev->dev,
924 "%s:%d Other DAI busy\n", __func__, __LINE__);
930 dev_err(&i2s->pdev->dev,
931 "Invalid clock divider(%d)\n", div_id);
938 static snd_pcm_sframes_t
939 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
941 struct i2s_dai *i2s = to_info(dai);
942 u32 reg = readl(i2s->addr + I2SFIC);
943 snd_pcm_sframes_t delay;
944 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
946 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
947 delay = FIC_RXCOUNT(reg);
948 else if (is_secondary(i2s))
949 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
951 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
957 static int i2s_suspend(struct snd_soc_dai *dai)
959 struct i2s_dai *i2s = to_info(dai);
961 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
962 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
963 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
968 static int i2s_resume(struct snd_soc_dai *dai)
970 struct i2s_dai *i2s = to_info(dai);
972 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
973 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
974 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
979 #define i2s_suspend NULL
980 #define i2s_resume NULL
983 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
985 struct i2s_dai *i2s = to_info(dai);
986 struct i2s_dai *other = get_other_dai(i2s);
989 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
990 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
993 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
996 if (i2s->quirks & QUIRK_NEED_RSTCLR)
997 writel(CON_RSTCLR, i2s->addr + I2SCON);
999 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1000 idma_reg_addr_init(i2s->addr,
1001 i2s->sec_dai->idma_playback.dma_addr);
1004 /* Reset any constraint on RFS and BFS */
1007 i2s->rclk_srcrate = 0;
1009 spin_lock_irqsave(i2s->lock, flags);
1012 i2s_fifo(i2s, FIC_TXFLUSH);
1013 i2s_fifo(other, FIC_TXFLUSH);
1014 i2s_fifo(i2s, FIC_RXFLUSH);
1015 spin_unlock_irqrestore(i2s->lock, flags);
1017 /* Gate CDCLK by default */
1018 if (!is_opened(other))
1019 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1020 0, SND_SOC_CLOCK_IN);
1025 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1027 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1029 if (!is_secondary(i2s)) {
1030 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1031 spin_lock(i2s->lock);
1032 writel(0, i2s->addr + I2SCON);
1033 spin_unlock(i2s->lock);
1040 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1041 .trigger = i2s_trigger,
1042 .hw_params = i2s_hw_params,
1043 .set_fmt = i2s_set_fmt,
1044 .set_clkdiv = i2s_set_clkdiv,
1045 .set_sysclk = i2s_set_sysclk,
1046 .startup = i2s_startup,
1047 .shutdown = i2s_shutdown,
1051 static const struct snd_soc_component_driver samsung_i2s_component = {
1052 .name = "samsung-i2s",
1055 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1057 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1058 SNDRV_PCM_FMTBIT_S16_LE | \
1059 SNDRV_PCM_FMTBIT_S24_LE)
1061 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1063 struct i2s_dai *i2s;
1066 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1071 i2s->pri_dai = NULL;
1072 i2s->sec_dai = NULL;
1073 i2s->i2s_dai_drv.symmetric_rates = 1;
1074 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1075 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1076 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1077 i2s->i2s_dai_drv.suspend = i2s_suspend;
1078 i2s->i2s_dai_drv.resume = i2s_resume;
1079 i2s->i2s_dai_drv.playback.channels_min = 1;
1080 i2s->i2s_dai_drv.playback.channels_max = 2;
1081 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1082 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1085 i2s->i2s_dai_drv.capture.channels_min = 1;
1086 i2s->i2s_dai_drv.capture.channels_max = 2;
1087 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1088 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1089 dev_set_drvdata(&i2s->pdev->dev, i2s);
1090 } else { /* Create a new platform_device for Secondary */
1091 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1095 i2s->pdev->dev.parent = &pdev->dev;
1097 platform_set_drvdata(i2s->pdev, i2s);
1098 ret = platform_device_add(i2s->pdev);
1106 static const struct of_device_id exynos_i2s_match[];
1108 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1109 struct platform_device *pdev)
1111 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1112 const struct of_device_id *match;
1113 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1114 return match ? match->data : NULL;
1116 return (struct samsung_i2s_dai_data *)
1117 platform_get_device_id(pdev)->driver_data;
1122 static int i2s_runtime_suspend(struct device *dev)
1124 struct i2s_dai *i2s = dev_get_drvdata(dev);
1126 clk_disable_unprepare(i2s->clk);
1131 static int i2s_runtime_resume(struct device *dev)
1133 struct i2s_dai *i2s = dev_get_drvdata(dev);
1135 clk_prepare_enable(i2s->clk);
1139 #endif /* CONFIG_PM */
1141 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1145 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1146 if (!IS_ERR(i2s->clk_table[i]))
1147 clk_unregister(i2s->clk_table[i]);
1151 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1153 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1155 of_clk_del_provider(pdev->dev.of_node);
1156 i2s_unregister_clocks(i2s);
1159 static int i2s_register_clock_provider(struct platform_device *pdev)
1161 struct device *dev = &pdev->dev;
1162 struct i2s_dai *i2s = dev_get_drvdata(dev);
1163 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1164 const char *p_names[2] = { NULL };
1165 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1166 struct clk *rclksrc;
1169 /* Register the clock provider only if it's expected in the DTB */
1170 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1173 /* Get the RCLKSRC mux clock parent clock names */
1174 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1175 rclksrc = clk_get(dev, clk_name[i]);
1176 if (IS_ERR(rclksrc))
1178 p_names[i] = __clk_get_name(rclksrc);
1182 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1183 /* Activate the prescaler */
1184 u32 val = readl(i2s->addr + I2SPSR);
1185 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1187 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1188 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1189 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1190 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1193 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1194 "i2s_presc", "i2s_rclksrc",
1195 CLK_SET_RATE_PARENT,
1196 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1198 p_names[0] = "i2s_presc";
1199 i2s->clk_data.clk_num = 2;
1201 of_property_read_string_index(dev->of_node,
1202 "clock-output-names", 0, &clk_name[0]);
1204 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1205 p_names[0], CLK_SET_RATE_PARENT,
1206 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1207 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1209 i2s->clk_data.clk_num += 1;
1210 i2s->clk_data.clks = i2s->clk_table;
1212 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1215 dev_err(dev, "failed to add clock provider: %d\n", ret);
1216 i2s_unregister_clocks(i2s);
1222 static int samsung_i2s_probe(struct platform_device *pdev)
1224 struct i2s_dai *pri_dai, *sec_dai = NULL;
1225 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1226 struct samsung_i2s *i2s_cfg = NULL;
1227 struct resource *res;
1228 u32 regs_base, quirks = 0, idma_addr = 0;
1229 struct device_node *np = pdev->dev.of_node;
1230 const struct samsung_i2s_dai_data *i2s_dai_data;
1233 /* Call during Seconday interface registration */
1234 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1236 if (i2s_dai_data->dai_type == TYPE_SEC) {
1237 sec_dai = dev_get_drvdata(&pdev->dev);
1239 dev_err(&pdev->dev, "Unable to get drvdata\n");
1242 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1243 &samsung_i2s_component,
1244 &sec_dai->i2s_dai_drv, 1);
1248 return samsung_asoc_dma_platform_register(&pdev->dev,
1252 pri_dai = i2s_alloc_dai(pdev, false);
1254 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1258 spin_lock_init(&pri_dai->spinlock);
1259 pri_dai->lock = &pri_dai->spinlock;
1262 if (i2s_pdata == NULL) {
1263 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1267 pri_dai->dma_playback.slave = i2s_pdata->dma_playback;
1268 pri_dai->dma_capture.slave = i2s_pdata->dma_capture;
1269 pri_dai->filter = i2s_pdata->dma_filter;
1271 if (&i2s_pdata->type)
1272 i2s_cfg = &i2s_pdata->type.i2s;
1275 quirks = i2s_cfg->quirks;
1276 idma_addr = i2s_cfg->idma_addr;
1279 quirks = i2s_dai_data->quirks;
1280 if (of_property_read_u32(np, "samsung,idma-addr",
1282 if (quirks & QUIRK_SUPPORTS_IDMA) {
1283 dev_info(&pdev->dev, "idma address is not"\
1289 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1290 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1291 if (IS_ERR(pri_dai->addr))
1292 return PTR_ERR(pri_dai->addr);
1294 regs_base = res->start;
1296 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1297 if (IS_ERR(pri_dai->clk)) {
1298 dev_err(&pdev->dev, "Failed to get iis clock\n");
1299 return PTR_ERR(pri_dai->clk);
1302 ret = clk_prepare_enable(pri_dai->clk);
1304 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1307 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1308 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1309 pri_dai->dma_playback.ch_name = "tx";
1310 pri_dai->dma_capture.ch_name = "rx";
1311 pri_dai->dma_playback.dma_size = 4;
1312 pri_dai->dma_capture.dma_size = 4;
1313 pri_dai->quirks = quirks;
1314 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1316 if (quirks & QUIRK_PRI_6CHAN)
1317 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1319 if (quirks & QUIRK_SEC_DAI) {
1320 sec_dai = i2s_alloc_dai(pdev, true);
1322 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1326 sec_dai->lock = &pri_dai->spinlock;
1327 sec_dai->variant_regs = pri_dai->variant_regs;
1328 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1329 sec_dai->dma_playback.ch_name = "tx-sec";
1332 sec_dai->dma_playback.slave = i2s_pdata->dma_play_sec;
1333 sec_dai->filter = i2s_pdata->dma_filter;
1336 sec_dai->dma_playback.dma_size = 4;
1337 sec_dai->addr = pri_dai->addr;
1338 sec_dai->clk = pri_dai->clk;
1339 sec_dai->quirks = quirks;
1340 sec_dai->idma_playback.dma_addr = idma_addr;
1341 sec_dai->pri_dai = pri_dai;
1342 pri_dai->sec_dai = sec_dai;
1345 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1346 dev_err(&pdev->dev, "Unable to configure gpio\n");
1350 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1351 &samsung_i2s_component,
1352 &pri_dai->i2s_dai_drv, 1);
1354 pm_runtime_enable(&pdev->dev);
1356 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter);
1360 return i2s_register_clock_provider(pdev);
1363 static int samsung_i2s_remove(struct platform_device *pdev)
1365 struct i2s_dai *i2s, *other;
1367 i2s = dev_get_drvdata(&pdev->dev);
1368 other = get_other_dai(i2s);
1371 other->pri_dai = NULL;
1372 other->sec_dai = NULL;
1374 pm_runtime_disable(&pdev->dev);
1377 if (!is_secondary(i2s)) {
1378 i2s_unregister_clock_provider(pdev);
1379 clk_disable_unprepare(i2s->clk);
1382 i2s->pri_dai = NULL;
1383 i2s->sec_dai = NULL;
1388 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1402 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1416 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1430 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1444 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1445 .dai_type = TYPE_PRI,
1446 .quirks = QUIRK_NO_MUXPSR,
1447 .i2s_variant_regs = &i2sv3_regs,
1450 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1451 .dai_type = TYPE_PRI,
1452 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1453 QUIRK_SUPPORTS_IDMA,
1454 .i2s_variant_regs = &i2sv3_regs,
1457 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1458 .dai_type = TYPE_PRI,
1459 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1460 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1461 .i2s_variant_regs = &i2sv6_regs,
1464 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1465 .dai_type = TYPE_PRI,
1466 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1468 .i2s_variant_regs = &i2sv7_regs,
1471 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1472 .dai_type = TYPE_PRI,
1473 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1474 .i2s_variant_regs = &i2sv5_i2s1_regs,
1477 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1478 .dai_type = TYPE_PRI,
1481 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1482 .dai_type = TYPE_SEC,
1485 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1487 .name = "samsung-i2s",
1488 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1490 .name = "samsung-i2s-sec",
1491 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
1493 .name = "samsung-i2sv4",
1494 .driver_data = (kernel_ulong_t)&i2sv5_dai_type,
1498 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1501 static const struct of_device_id exynos_i2s_match[] = {
1503 .compatible = "samsung,s3c6410-i2s",
1504 .data = &i2sv3_dai_type,
1506 .compatible = "samsung,s5pv210-i2s",
1507 .data = &i2sv5_dai_type,
1509 .compatible = "samsung,exynos5420-i2s",
1510 .data = &i2sv6_dai_type,
1512 .compatible = "samsung,exynos7-i2s",
1513 .data = &i2sv7_dai_type,
1515 .compatible = "samsung,exynos7-i2s1",
1516 .data = &i2sv5_dai_type_i2s1,
1520 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1523 static const struct dev_pm_ops samsung_i2s_pm = {
1524 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1525 i2s_runtime_resume, NULL)
1528 static struct platform_driver samsung_i2s_driver = {
1529 .probe = samsung_i2s_probe,
1530 .remove = samsung_i2s_remove,
1531 .id_table = samsung_i2s_driver_ids,
1533 .name = "samsung-i2s",
1534 .of_match_table = of_match_ptr(exynos_i2s_match),
1535 .pm = &samsung_i2s_pm,
1539 module_platform_driver(samsung_i2s_driver);
1541 /* Module information */
1542 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1543 MODULE_DESCRIPTION("Samsung I2S Interface");
1544 MODULE_ALIAS("platform:samsung-i2s");
1545 MODULE_LICENSE("GPL");