2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
23 #define DOFF_CTL 0x0004
24 #define DOFF_ST 0x0008
26 #define DIFF_CTL 0x0010
27 #define DIFF_ST 0x0014
32 #define MUTE_ST 0x0028
33 #define REG_END MUTE_ST
36 #define CPU_INT_ST 0x01F4
37 #define CPU_IEMSK 0x01F8
38 #define CPU_IMSK 0x01FC
43 #define CLK_RST 0x0210
44 #define SOFT_RST 0x0214
45 #define FIFO_SZ 0x0218
46 #define MREG_START CPU_INT_ST
47 #define MREG_END FIFO_SZ
51 #define CR_FMT(param) ((param) << 4)
53 # define CR_MONO_D 0x1
61 #define IRQ_HALF 0x00100000
62 #define FIFO_CLR 0x00000001
65 #define ERR_OVER 0x00000010
66 #define ERR_UNDER 0x00000001
67 #define ST_ERR (ERR_OVER | ERR_UNDER)
70 #define B_CLK 0x00000010
71 #define A_CLK 0x00000001
74 #define INT_B_IN (1 << 12)
75 #define INT_B_OUT (1 << 8)
76 #define INT_A_IN (1 << 4)
77 #define INT_A_OUT (1 << 0)
80 #define PBSR (1 << 12) /* Port B Software Reset */
81 #define PASR (1 << 8) /* Port A Software Reset */
82 #define IR (1 << 4) /* Interrupt Reset */
83 #define FSISR (1 << 0) /* Software Reset */
86 #define OUT_SZ_MASK 0x7
90 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
92 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
94 /************************************************************************
100 ************************************************************************/
103 struct snd_pcm_substream *substream;
104 struct fsi_master *master;
124 struct fsi_priv fsia;
125 struct fsi_priv fsib;
126 struct fsi_regs *regs;
127 struct sh_fsi_platform_info *info;
131 /************************************************************************
134 basic read write function
137 ************************************************************************/
138 static void __fsi_reg_write(u32 reg, u32 data)
140 /* valid data area is 24bit */
143 __raw_writel(data, reg);
146 static u32 __fsi_reg_read(u32 reg)
148 return __raw_readl(reg);
151 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
153 u32 val = __fsi_reg_read(reg);
158 __fsi_reg_write(reg, val);
161 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
166 __fsi_reg_write((u32)(fsi->base + reg), data);
169 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
174 return __fsi_reg_read((u32)(fsi->base + reg));
177 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
182 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
185 static void fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
189 if ((reg < MREG_START) ||
193 spin_lock_irqsave(&master->lock, flags);
194 __fsi_reg_write((u32)(master->base + reg), data);
195 spin_unlock_irqrestore(&master->lock, flags);
198 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
203 if ((reg < MREG_START) ||
207 spin_lock_irqsave(&master->lock, flags);
208 ret = __fsi_reg_read((u32)(master->base + reg));
209 spin_unlock_irqrestore(&master->lock, flags);
214 static void fsi_master_mask_set(struct fsi_master *master,
215 u32 reg, u32 mask, u32 data)
219 if ((reg < MREG_START) ||
223 spin_lock_irqsave(&master->lock, flags);
224 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
225 spin_unlock_irqrestore(&master->lock, flags);
228 /************************************************************************
234 ************************************************************************/
235 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
240 static int fsi_is_port_a(struct fsi_priv *fsi)
242 return fsi->master->base == fsi->base;
245 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
247 struct snd_soc_pcm_runtime *rtd = substream->private_data;
248 struct snd_soc_dai_link *machine = rtd->dai;
250 return machine->cpu_dai;
253 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
255 struct snd_soc_dai *dai = fsi_get_dai(substream);
257 return dai->private_data;
260 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
262 int is_porta = fsi_is_port_a(fsi);
263 struct fsi_master *master = fsi_get_master(fsi);
265 return is_porta ? master->info->porta_flags :
266 master->info->portb_flags;
269 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
272 u32 flags = fsi_get_info_flags(fsi);
274 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
281 return (mode & flags) != mode;
284 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
286 int is_porta = fsi_is_port_a(fsi);
290 data = is_play ? (1 << 0) : (1 << 4);
292 data = is_play ? (1 << 8) : (1 << 12);
297 static void fsi_stream_push(struct fsi_priv *fsi,
298 struct snd_pcm_substream *substream,
302 fsi->substream = substream;
303 fsi->buffer_len = buffer_len;
304 fsi->period_len = period_len;
305 fsi->byte_offset = 0;
309 static void fsi_stream_pop(struct fsi_priv *fsi)
311 fsi->substream = NULL;
314 fsi->byte_offset = 0;
318 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
321 u32 reg = is_play ? DOFF_ST : DIFF_ST;
324 status = fsi_reg_read(fsi, reg);
325 residue = 0x1ff & (status >> 8);
326 residue *= fsi->chan;
331 /************************************************************************
337 ************************************************************************/
338 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
340 u32 data = fsi_port_ab_io_bit(fsi, is_play);
341 struct fsi_master *master = fsi_get_master(fsi);
343 fsi_master_mask_set(master, master->regs->imsk, data, data);
344 fsi_master_mask_set(master, master->regs->iemsk, data, data);
347 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
349 u32 data = fsi_port_ab_io_bit(fsi, is_play);
350 struct fsi_master *master = fsi_get_master(fsi);
352 fsi_master_mask_set(master, master->regs->imsk, data, 0);
353 fsi_master_mask_set(master, master->regs->iemsk, data, 0);
356 static u32 fsi_irq_get_status(struct fsi_master *master)
358 return fsi_master_read(master, master->regs->int_st);
361 static void fsi_irq_clear_all_status(struct fsi_master *master)
363 fsi_master_write(master, master->regs->int_st, 0x0000000);
366 static void fsi_irq_clear_status(struct fsi_priv *fsi)
369 struct fsi_master *master = fsi_get_master(fsi);
371 data |= fsi_port_ab_io_bit(fsi, 0);
372 data |= fsi_port_ab_io_bit(fsi, 1);
374 /* clear interrupt factor */
375 fsi_master_mask_set(master, master->regs->int_st, data, 0);
378 /************************************************************************
384 ************************************************************************/
385 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
387 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
388 struct fsi_master *master = fsi_get_master(fsi);
391 fsi_master_mask_set(master, CLK_RST, val, val);
393 fsi_master_mask_set(master, CLK_RST, val, 0);
396 static void fsi_fifo_init(struct fsi_priv *fsi,
398 struct snd_soc_dai *dai)
400 struct fsi_master *master = fsi_get_master(fsi);
403 /* get on-chip RAM capacity */
404 shift = fsi_master_read(master, FIFO_SZ);
405 shift >>= fsi_is_port_a(fsi) ? AO_SZ_SHIFT : BO_SZ_SHIFT;
406 shift &= OUT_SZ_MASK;
407 fsi->fifo_max = 256 << shift;
408 dev_dbg(dai->dev, "fifo = %d words\n", fsi->fifo_max);
411 * The maximum number of sample data varies depending
412 * on the number of channels selected for the format.
414 * FIFOs are used in 4-channel units in 3-channel mode
415 * and in 8-channel units in 5- to 7-channel mode
416 * meaning that more FIFOs than the required size of DPRAM
419 * ex) if 256 words of DP-RAM is connected
420 * 1 channel: 256 (256 x 1 = 256)
421 * 2 channels: 128 (128 x 2 = 256)
422 * 3 channels: 64 ( 64 x 3 = 192)
423 * 4 channels: 64 ( 64 x 4 = 256)
424 * 5 channels: 32 ( 32 x 5 = 160)
425 * 6 channels: 32 ( 32 x 6 = 192)
426 * 7 channels: 32 ( 32 x 7 = 224)
427 * 8 channels: 32 ( 32 x 8 = 256)
429 for (i = 1; i < fsi->chan; i <<= 1)
431 dev_dbg(dai->dev, "%d channel %d store\n", fsi->chan, fsi->fifo_max);
433 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
435 /* set interrupt generation factor */
436 fsi_reg_write(fsi, ctrl, IRQ_HALF);
439 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
442 static void fsi_soft_all_reset(struct fsi_master *master)
445 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
449 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
450 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
454 /* playback interrupt */
455 static int fsi_data_push(struct fsi_priv *fsi, int startup)
457 struct snd_pcm_runtime *runtime;
458 struct snd_pcm_substream *substream = NULL;
468 !fsi->substream->runtime)
472 substream = fsi->substream;
473 runtime = substream->runtime;
475 /* FSI FIFO has limit.
476 * So, this driver can not send periods data at a time
478 if (fsi->byte_offset >=
479 fsi->period_len * (fsi->periods + 1)) {
482 fsi->periods = (fsi->periods + 1) % runtime->periods;
484 if (0 == fsi->periods)
485 fsi->byte_offset = 0;
488 /* get 1 channel data width */
489 width = frames_to_bytes(runtime, 1) / fsi->chan;
491 /* get send size for alsa */
492 send = (fsi->buffer_len - fsi->byte_offset) / width;
494 /* get FIFO free size */
495 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
498 if (fifo_free < send)
501 start = runtime->dma_area;
502 start += fsi->byte_offset;
506 for (i = 0; i < send; i++)
507 fsi_reg_write(fsi, DODT,
508 ((u32)*((u16 *)start + i) << 8));
511 for (i = 0; i < send; i++)
512 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
518 fsi->byte_offset += send * width;
520 status = fsi_reg_read(fsi, DOFF_ST);
522 struct snd_soc_dai *dai = fsi_get_dai(substream);
524 if (status & ERR_OVER)
525 dev_err(dai->dev, "over run\n");
526 if (status & ERR_UNDER)
527 dev_err(dai->dev, "under run\n");
529 fsi_reg_write(fsi, DOFF_ST, 0);
531 fsi_irq_enable(fsi, 1);
534 snd_pcm_period_elapsed(substream);
539 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
541 struct snd_pcm_runtime *runtime;
542 struct snd_pcm_substream *substream = NULL;
552 !fsi->substream->runtime)
556 substream = fsi->substream;
557 runtime = substream->runtime;
559 /* FSI FIFO has limit.
560 * So, this driver can not send periods data at a time
562 if (fsi->byte_offset >=
563 fsi->period_len * (fsi->periods + 1)) {
566 fsi->periods = (fsi->periods + 1) % runtime->periods;
568 if (0 == fsi->periods)
569 fsi->byte_offset = 0;
572 /* get 1 channel data width */
573 width = frames_to_bytes(runtime, 1) / fsi->chan;
575 /* get free space for alsa */
576 free = (fsi->buffer_len - fsi->byte_offset) / width;
579 fifo_fill = fsi_get_fifo_residue(fsi, 0);
581 if (free < fifo_fill)
584 start = runtime->dma_area;
585 start += fsi->byte_offset;
589 for (i = 0; i < fifo_fill; i++)
590 *((u16 *)start + i) =
591 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
594 for (i = 0; i < fifo_fill; i++)
595 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
601 fsi->byte_offset += fifo_fill * width;
603 status = fsi_reg_read(fsi, DIFF_ST);
605 struct snd_soc_dai *dai = fsi_get_dai(substream);
607 if (status & ERR_OVER)
608 dev_err(dai->dev, "over run\n");
609 if (status & ERR_UNDER)
610 dev_err(dai->dev, "under run\n");
612 fsi_reg_write(fsi, DIFF_ST, 0);
614 fsi_irq_enable(fsi, 0);
617 snd_pcm_period_elapsed(substream);
622 static irqreturn_t fsi_interrupt(int irq, void *data)
624 struct fsi_master *master = data;
625 u32 int_st = fsi_irq_get_status(master);
627 /* clear irq status */
628 fsi_master_mask_set(master, SOFT_RST, IR, 0);
629 fsi_master_mask_set(master, SOFT_RST, IR, IR);
631 if (int_st & INT_A_OUT)
632 fsi_data_push(&master->fsia, 0);
633 if (int_st & INT_B_OUT)
634 fsi_data_push(&master->fsib, 0);
635 if (int_st & INT_A_IN)
636 fsi_data_pop(&master->fsia, 0);
637 if (int_st & INT_B_IN)
638 fsi_data_pop(&master->fsib, 0);
640 fsi_irq_clear_all_status(master);
645 /************************************************************************
651 ************************************************************************/
652 static int fsi_dai_startup(struct snd_pcm_substream *substream,
653 struct snd_soc_dai *dai)
655 struct fsi_priv *fsi = fsi_get_priv(substream);
656 u32 flags = fsi_get_info_flags(fsi);
660 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
664 pm_runtime_get_sync(dai->dev);
667 data = is_play ? (1 << 0) : (1 << 4);
668 is_master = fsi_is_master_mode(fsi, is_play);
670 fsi_reg_mask_set(fsi, CKG1, data, data);
672 fsi_reg_mask_set(fsi, CKG1, data, 0);
674 /* clock inversion (CKG2) */
676 if (SH_FSI_LRM_INV & flags)
678 if (SH_FSI_BRM_INV & flags)
680 if (SH_FSI_LRS_INV & flags)
682 if (SH_FSI_BRS_INV & flags)
685 fsi_reg_write(fsi, CKG2, data);
689 reg = is_play ? DO_FMT : DI_FMT;
690 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
692 case SH_FSI_FMT_MONO:
693 data = CR_FMT(CR_MONO);
696 case SH_FSI_FMT_MONO_DELAY:
697 data = CR_FMT(CR_MONO_D);
701 data = CR_FMT(CR_PCM);
705 data = CR_FMT(CR_I2S);
709 fsi->chan = is_play ?
710 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
711 data = CR_FMT(CR_TDM) | (fsi->chan - 1);
713 case SH_FSI_FMT_TDM_DELAY:
714 fsi->chan = is_play ?
715 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
716 data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
719 dev_err(dai->dev, "unknown format.\n");
722 fsi_reg_write(fsi, reg, data);
725 * clear clk reset if master mode
728 fsi_clk_ctrl(fsi, 1);
731 fsi_irq_disable(fsi, is_play);
732 fsi_irq_clear_status(fsi);
735 fsi_fifo_init(fsi, is_play, dai);
740 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
741 struct snd_soc_dai *dai)
743 struct fsi_priv *fsi = fsi_get_priv(substream);
744 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
746 fsi_irq_disable(fsi, is_play);
747 fsi_clk_ctrl(fsi, 0);
749 pm_runtime_put_sync(dai->dev);
752 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
753 struct snd_soc_dai *dai)
755 struct fsi_priv *fsi = fsi_get_priv(substream);
756 struct snd_pcm_runtime *runtime = substream->runtime;
757 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
761 case SNDRV_PCM_TRIGGER_START:
762 fsi_stream_push(fsi, substream,
763 frames_to_bytes(runtime, runtime->buffer_size),
764 frames_to_bytes(runtime, runtime->period_size));
765 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
767 case SNDRV_PCM_TRIGGER_STOP:
768 fsi_irq_disable(fsi, is_play);
776 static struct snd_soc_dai_ops fsi_dai_ops = {
777 .startup = fsi_dai_startup,
778 .shutdown = fsi_dai_shutdown,
779 .trigger = fsi_dai_trigger,
782 /************************************************************************
788 ************************************************************************/
789 static struct snd_pcm_hardware fsi_pcm_hardware = {
790 .info = SNDRV_PCM_INFO_INTERLEAVED |
791 SNDRV_PCM_INFO_MMAP |
792 SNDRV_PCM_INFO_MMAP_VALID |
793 SNDRV_PCM_INFO_PAUSE,
800 .buffer_bytes_max = 64 * 1024,
801 .period_bytes_min = 32,
802 .period_bytes_max = 8192,
808 static int fsi_pcm_open(struct snd_pcm_substream *substream)
810 struct snd_pcm_runtime *runtime = substream->runtime;
813 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
815 ret = snd_pcm_hw_constraint_integer(runtime,
816 SNDRV_PCM_HW_PARAM_PERIODS);
821 static int fsi_hw_params(struct snd_pcm_substream *substream,
822 struct snd_pcm_hw_params *hw_params)
824 return snd_pcm_lib_malloc_pages(substream,
825 params_buffer_bytes(hw_params));
828 static int fsi_hw_free(struct snd_pcm_substream *substream)
830 return snd_pcm_lib_free_pages(substream);
833 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
835 struct snd_pcm_runtime *runtime = substream->runtime;
836 struct fsi_priv *fsi = fsi_get_priv(substream);
839 location = (fsi->byte_offset - 1);
843 return bytes_to_frames(runtime, location);
846 static struct snd_pcm_ops fsi_pcm_ops = {
847 .open = fsi_pcm_open,
848 .ioctl = snd_pcm_lib_ioctl,
849 .hw_params = fsi_hw_params,
850 .hw_free = fsi_hw_free,
851 .pointer = fsi_pointer,
854 /************************************************************************
860 ************************************************************************/
861 #define PREALLOC_BUFFER (32 * 1024)
862 #define PREALLOC_BUFFER_MAX (32 * 1024)
864 static void fsi_pcm_free(struct snd_pcm *pcm)
866 snd_pcm_lib_preallocate_free_for_all(pcm);
869 static int fsi_pcm_new(struct snd_card *card,
870 struct snd_soc_dai *dai,
874 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
875 * in MMAP mode (i.e. aplay -M)
877 return snd_pcm_lib_preallocate_pages_for_all(
879 SNDRV_DMA_TYPE_CONTINUOUS,
880 snd_dma_continuous_data(GFP_KERNEL),
881 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
884 /************************************************************************
890 ************************************************************************/
891 struct snd_soc_dai fsi_soc_dai[] = {
927 EXPORT_SYMBOL_GPL(fsi_soc_dai);
929 struct snd_soc_platform fsi_soc_platform = {
931 .pcm_ops = &fsi_pcm_ops,
932 .pcm_new = fsi_pcm_new,
933 .pcm_free = fsi_pcm_free,
935 EXPORT_SYMBOL_GPL(fsi_soc_platform);
937 /************************************************************************
943 ************************************************************************/
944 static int fsi_probe(struct platform_device *pdev)
946 struct fsi_master *master;
947 const struct platform_device_id *id_entry;
948 struct resource *res;
953 dev_err(&pdev->dev, "current fsi support id 0 only now\n");
957 id_entry = pdev->id_entry;
959 dev_err(&pdev->dev, "unknown fsi device\n");
963 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
964 irq = platform_get_irq(pdev, 0);
965 if (!res || (int)irq <= 0) {
966 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
971 master = kzalloc(sizeof(*master), GFP_KERNEL);
973 dev_err(&pdev->dev, "Could not allocate master\n");
978 master->base = ioremap_nocache(res->start, resource_size(res));
981 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
986 master->info = pdev->dev.platform_data;
987 master->fsia.base = master->base;
988 master->fsia.master = master;
989 master->fsib.base = master->base + 0x40;
990 master->fsib.master = master;
991 master->regs = (struct fsi_regs *)id_entry->driver_data;
992 spin_lock_init(&master->lock);
994 pm_runtime_enable(&pdev->dev);
995 pm_runtime_resume(&pdev->dev);
997 fsi_soc_dai[0].dev = &pdev->dev;
998 fsi_soc_dai[0].private_data = &master->fsia;
999 fsi_soc_dai[1].dev = &pdev->dev;
1000 fsi_soc_dai[1].private_data = &master->fsib;
1002 fsi_soft_all_reset(master);
1004 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1005 id_entry->name, master);
1007 dev_err(&pdev->dev, "irq request err\n");
1011 ret = snd_soc_register_platform(&fsi_soc_platform);
1013 dev_err(&pdev->dev, "cannot snd soc register\n");
1017 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1020 free_irq(irq, master);
1022 iounmap(master->base);
1023 pm_runtime_disable(&pdev->dev);
1031 static int fsi_remove(struct platform_device *pdev)
1033 struct fsi_master *master;
1035 master = fsi_get_master(fsi_soc_dai[0].private_data);
1037 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1038 snd_soc_unregister_platform(&fsi_soc_platform);
1040 pm_runtime_disable(&pdev->dev);
1042 free_irq(master->irq, master);
1044 iounmap(master->base);
1047 fsi_soc_dai[0].dev = NULL;
1048 fsi_soc_dai[0].private_data = NULL;
1049 fsi_soc_dai[1].dev = NULL;
1050 fsi_soc_dai[1].private_data = NULL;
1055 static int fsi_runtime_nop(struct device *dev)
1057 /* Runtime PM callback shared between ->runtime_suspend()
1058 * and ->runtime_resume(). Simply returns success.
1060 * This driver re-initializes all registers after
1061 * pm_runtime_get_sync() anyway so there is no need
1062 * to save and restore registers here.
1067 static struct dev_pm_ops fsi_pm_ops = {
1068 .runtime_suspend = fsi_runtime_nop,
1069 .runtime_resume = fsi_runtime_nop,
1072 static struct fsi_regs fsi_regs = {
1078 static struct fsi_regs fsi2_regs = {
1079 .int_st = CPU_INT_ST,
1084 static struct platform_device_id fsi_id_table[] = {
1085 { "sh_fsi", (kernel_ulong_t)&fsi_regs },
1086 { "sh_fsi2", (kernel_ulong_t)&fsi2_regs },
1089 static struct platform_driver fsi_driver = {
1095 .remove = fsi_remove,
1096 .id_table = fsi_id_table,
1099 static int __init fsi_mobile_init(void)
1101 return platform_driver_register(&fsi_driver);
1104 static void __exit fsi_mobile_exit(void)
1106 platform_driver_unregister(&fsi_driver);
1108 module_init(fsi_mobile_init);
1109 module_exit(fsi_mobile_exit);
1111 MODULE_LICENSE("GPL");
1112 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1113 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");