tools/testing/nvdimm/test/nfit.c

   1 /*
   2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/libnvdimm.h>
  17 #include <linux/vmalloc.h>
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/mutex.h>
  21 #include <linux/ndctl.h>
  22 #include <linux/sizes.h>
  23 #include <linux/list.h>
  24 #include <linux/slab.h>
  25 #include <nfit.h>
  26 #include <nd.h>
  27 #include "nfit_test.h"
  28
  29 /*
  30  * Generate an NFIT table to describe the following topology:
  31  *
  32  * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
  33  *
  34  *                     (a)                       (b)            DIMM   BLK-REGION
  35  *           +----------+--------------+----------+---------+
  36  * +------+  |  blk2.0  |     pm0.0    |  blk2.1  |  pm1.0  |    0      region2
  37  * | imc0 +--+- - - - - region0 - - - -+----------+         +
  38  * +--+---+  |  blk3.0  |     pm0.0    |  blk3.1  |  pm1.0  |    1      region3
  39  *    |      +----------+--------------v----------v         v
  40  * +--+---+                            |                    |
  41  * | cpu0 |                                    region1
  42  * +--+---+                            |                    |
  43  *    |      +-------------------------^----------^         ^
  44  * +--+---+  |                 blk4.0             |  pm1.0  |    2      region4
  45  * | imc1 +--+-------------------------+----------+         +
  46  * +------+  |                 blk5.0             |  pm1.0  |    3      region5
  47  *           +-------------------------+----------+-+-------+
  48  *
  49  * +--+---+
  50  * | cpu1 |
  51  * +--+---+                   (Hotplug DIMM)
  52  *    |      +----------------------------------------------+
  53  * +--+---+  |                 blk6.0/pm7.0                 |    4      region6/7
  54  * | imc0 +--+----------------------------------------------+
  55  * +------+
  56  *
  57  *
  58  * *) In this layout we have four dimms and two memory controllers in one
  59  *    socket.  Each unique interface (BLK or PMEM) to DPA space
  60  *    is identified by a region device with a dynamically assigned id.
  61  *
  62  * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
  63  *    A single PMEM namespace "pm0.0" is created using half of the
  64  *    REGION0 SPA-range.  REGION0 spans dimm0 and dimm1.  PMEM namespace
  65  *    allocate from from the bottom of a region.  The unallocated
  66  *    portion of REGION0 aliases with REGION2 and REGION3.  That
  67  *    unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
  68  *    "blk3.0") starting at the base of each DIMM to offset (a) in those
  69  *    DIMMs.  "pm0.0", "blk2.0" and "blk3.0" are free-form readable
  70  *    names that can be assigned to a namespace.
  71  *
  72  * *) In the last portion of dimm0 and dimm1 we have an interleaved
  73  *    SPA range, REGION1, that spans those two dimms as well as dimm2
  74  *    and dimm3.  Some of REGION1 allocated to a PMEM namespace named
  75  *    "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
  76  *    dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
  77  *    "blk5.0".
  78  *
  79  * *) The portion of dimm2 and dimm3 that do not participate in the
  80  *    REGION1 interleaved SPA range (i.e. the DPA address below offset
  81  *    (b) are also included in the "blk4.0" and "blk5.0" namespaces.
  82  *    Note, that BLK namespaces need not be contiguous in DPA-space, and
  83  *    can consume aliased capacity from multiple interleave sets.
  84  *
  85  * BUS1: Legacy NVDIMM (single contiguous range)
  86  *
  87  *  region2
  88  * +---------------------+
  89  * |---------------------|
  90  * ||       pm2.0       ||
  91  * |---------------------|
  92  * +---------------------+
  93  *
  94  * *) A NFIT-table may describe a simple system-physical-address range
  95  *    with no BLK aliasing.  This type of region may optionally
  96  *    reference an NVDIMM.
  97  */
  98 enum {
  99         NUM_PM  = 3,
 100         NUM_DCR = 5,
 101         NUM_BDW = NUM_DCR,
 102         NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
 103         NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */ + 4 /* spa1 iset */,
 104         DIMM_SIZE = SZ_32M,
 105         LABEL_SIZE = SZ_128K,
 106         SPA0_SIZE = DIMM_SIZE,
 107         SPA1_SIZE = DIMM_SIZE*2,
 108         SPA2_SIZE = DIMM_SIZE,
 109         BDW_SIZE = 64 << 8,
 110         DCR_SIZE = 12,
 111         NUM_NFITS = 2, /* permit testing multiple NFITs per system */
 112 };
 113
 114 struct nfit_test_dcr {
 115         __le64 bdw_addr;
 116         __le32 bdw_status;
 117         __u8 aperature[BDW_SIZE];
 118 };
 119
 120 #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
 121         (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
 122          | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
 123
 124 static u32 handle[NUM_DCR] = {
 125         [0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
 126         [1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
 127         [2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
 128         [3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
 129         [4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
 130 };
 131
 132 struct nfit_test {
 133         struct acpi_nfit_desc acpi_desc;
 134         struct platform_device pdev;
 135         struct list_head resources;
 136         void *nfit_buf;
 137         dma_addr_t nfit_dma;
 138         size_t nfit_size;
 139         int num_dcr;
 140         int num_pm;
 141         void **dimm;
 142         dma_addr_t *dimm_dma;
 143         void **flush;
 144         dma_addr_t *flush_dma;
 145         void **label;
 146         dma_addr_t *label_dma;
 147         void **spa_set;
 148         dma_addr_t *spa_set_dma;
 149         struct nfit_test_dcr **dcr;
 150         dma_addr_t *dcr_dma;
 151         int (*alloc)(struct nfit_test *t);
 152         void (*setup)(struct nfit_test *t);
 153         int setup_hotplug;
 154 };
 155
 156 static struct nfit_test *to_nfit_test(struct device *dev)
 157 {
 158         struct platform_device *pdev = to_platform_device(dev);
 159
 160         return container_of(pdev, struct nfit_test, pdev);
 161 }
 162
 163 static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size *nd_cmd,
 164                 unsigned int buf_len)
 165 {
 166         if (buf_len < sizeof(*nd_cmd))
 167                 return -EINVAL;
 168
 169         nd_cmd->status = 0;
 170         nd_cmd->config_size = LABEL_SIZE;
 171         nd_cmd->max_xfer = SZ_4K;
 172
 173         return 0;
 174 }
 175
 176 static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
 177                 *nd_cmd, unsigned int buf_len, void *label)
 178 {
 179         unsigned int len, offset = nd_cmd->in_offset;
 180         int rc;
 181
 182         if (buf_len < sizeof(*nd_cmd))
 183                 return -EINVAL;
 184         if (offset >= LABEL_SIZE)
 185                 return -EINVAL;
 186         if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len)
 187                 return -EINVAL;
 188
 189         nd_cmd->status = 0;
 190         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 191         memcpy(nd_cmd->out_buf, label + offset, len);
 192         rc = buf_len - sizeof(*nd_cmd) - len;
 193
 194         return rc;
 195 }
 196
 197 static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr *nd_cmd,
 198                 unsigned int buf_len, void *label)
 199 {
 200         unsigned int len, offset = nd_cmd->in_offset;
 201         u32 *status;
 202         int rc;
 203
 204         if (buf_len < sizeof(*nd_cmd))
 205                 return -EINVAL;
 206         if (offset >= LABEL_SIZE)
 207                 return -EINVAL;
 208         if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len)
 209                 return -EINVAL;
 210
 211         status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd);
 212         *status = 0;
 213         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 214         memcpy(label + offset, nd_cmd->in_buf, len);
 215         rc = buf_len - sizeof(*nd_cmd) - (len + 4);
 216
 217         return rc;
 218 }
 219
 220 #define NFIT_TEST_ARS_RECORDS 4
 221
 222 static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap *nd_cmd,
 223                 unsigned int buf_len)
 224 {
 225         if (buf_len < sizeof(*nd_cmd))
 226                 return -EINVAL;
 227
 228         nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status)
 229                 + NFIT_TEST_ARS_RECORDS * sizeof(struct nd_ars_record);
 230         nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16;
 231
 232         return 0;
 233 }
 234
 235 static int nfit_test_cmd_ars_start(struct nd_cmd_ars_start *nd_cmd,
 236                 unsigned int buf_len)
 237 {
 238         if (buf_len < sizeof(*nd_cmd))
 239                 return -EINVAL;
 240
 241         nd_cmd->status = 0;
 242
 243         return 0;
 244 }
 245
 246 static int nfit_test_cmd_ars_status(struct nd_cmd_ars_status *nd_cmd,
 247                 unsigned int buf_len)
 248 {
 249         if (buf_len < sizeof(*nd_cmd))
 250                 return -EINVAL;
 251
 252         nd_cmd->out_length = sizeof(struct nd_cmd_ars_status);
 253         /* TODO: emit error records */
 254         nd_cmd->num_records = 0;
 255         nd_cmd->address = 0;
 256         nd_cmd->length = -1ULL;
 257         nd_cmd->status = 0;
 258
 259         return 0;
 260 }
 261
 262 static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
 263                 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
 264                 unsigned int buf_len)
 265 {
 266         struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
 267         struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
 268         int i, rc = 0;
 269
 270         if (nvdimm) {
 271                 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
 272
 273                 if (!nfit_mem || !test_bit(cmd, &nfit_mem->dsm_mask))
 274                         return -ENOTTY;
 275
 276                 /* lookup label space for the given dimm */
 277                 for (i = 0; i < ARRAY_SIZE(handle); i++)
 278                         if (__to_nfit_memdev(nfit_mem)->device_handle ==
 279                                         handle[i])
 280                                 break;
 281                 if (i >= ARRAY_SIZE(handle))
 282                         return -ENXIO;
 283
 284                 switch (cmd) {
 285                 case ND_CMD_GET_CONFIG_SIZE:
 286                         rc = nfit_test_cmd_get_config_size(buf, buf_len);
 287                         break;
 288                 case ND_CMD_GET_CONFIG_DATA:
 289                         rc = nfit_test_cmd_get_config_data(buf, buf_len,
 290                                 t->label[i]);
 291                         break;
 292                 case ND_CMD_SET_CONFIG_DATA:
 293                         rc = nfit_test_cmd_set_config_data(buf, buf_len,
 294                                 t->label[i]);
 295                         break;
 296                 default:
 297                         return -ENOTTY;
 298                 }
 299         } else {
 300                 if (!nd_desc || !test_bit(cmd, &nd_desc->dsm_mask))
 301                         return -ENOTTY;
 302
 303                 switch (cmd) {
 304                 case ND_CMD_ARS_CAP:
 305                         rc = nfit_test_cmd_ars_cap(buf, buf_len);
 306                         break;
 307                 case ND_CMD_ARS_START:
 308                         rc = nfit_test_cmd_ars_start(buf, buf_len);
 309                         break;
 310                 case ND_CMD_ARS_STATUS:
 311                         rc = nfit_test_cmd_ars_status(buf, buf_len);
 312                         break;
 313                 default:
 314                         return -ENOTTY;
 315                 }
 316         }
 317
 318         return rc;
 319 }
 320
 321 static DEFINE_SPINLOCK(nfit_test_lock);
 322 static struct nfit_test *instances[NUM_NFITS];
 323
 324 static void release_nfit_res(void *data)
 325 {
 326         struct nfit_test_resource *nfit_res = data;
 327         struct resource *res = nfit_res->res;
 328
 329         spin_lock(&nfit_test_lock);
 330         list_del(&nfit_res->list);
 331         spin_unlock(&nfit_test_lock);
 332
 333         if (is_vmalloc_addr(nfit_res->buf))
 334                 vfree(nfit_res->buf);
 335         else
 336                 dma_free_coherent(nfit_res->dev, resource_size(res),
 337                                 nfit_res->buf, res->start);
 338         kfree(res);
 339         kfree(nfit_res);
 340 }
 341
 342 static void *__test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma,
 343                 void *buf)
 344 {
 345         struct device *dev = &t->pdev.dev;
 346         struct resource *res = kzalloc(sizeof(*res) * 2, GFP_KERNEL);
 347         struct nfit_test_resource *nfit_res = kzalloc(sizeof(*nfit_res),
 348                         GFP_KERNEL);
 349         int rc;
 350
 351         if (!res || !buf || !nfit_res)
 352                 goto err;
 353         rc = devm_add_action(dev, release_nfit_res, nfit_res);
 354         if (rc)
 355                 goto err;
 356         INIT_LIST_HEAD(&nfit_res->list);
 357         memset(buf, 0, size);
 358         nfit_res->dev = dev;
 359         nfit_res->buf = buf;
 360         nfit_res->res = res;
 361         res->start = *dma;
 362         res->end = *dma + size - 1;
 363         res->name = "NFIT";
 364         spin_lock(&nfit_test_lock);
 365         list_add(&nfit_res->list, &t->resources);
 366         spin_unlock(&nfit_test_lock);
 367
 368         return nfit_res->buf;
 369  err:
 370         if (buf && !is_vmalloc_addr(buf))
 371                 dma_free_coherent(dev, size, buf, *dma);
 372         else if (buf)
 373                 vfree(buf);
 374         kfree(res);
 375         kfree(nfit_res);
 376         return NULL;
 377 }
 378
 379 static void *test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma)
 380 {
 381         void *buf = vmalloc(size);
 382
 383         *dma = (unsigned long) buf;
 384         return __test_alloc(t, size, dma, buf);
 385 }
 386
 387 static void *test_alloc_coherent(struct nfit_test *t, size_t size,
 388                 dma_addr_t *dma)
 389 {
 390         struct device *dev = &t->pdev.dev;
 391         void *buf = dma_alloc_coherent(dev, size, dma, GFP_KERNEL);
 392
 393         return __test_alloc(t, size, dma, buf);
 394 }
 395
 396 static struct nfit_test_resource *nfit_test_lookup(resource_size_t addr)
 397 {
 398         int i;
 399
 400         for (i = 0; i < ARRAY_SIZE(instances); i++) {
 401                 struct nfit_test_resource *n, *nfit_res = NULL;
 402                 struct nfit_test *t = instances[i];
 403
 404                 if (!t)
 405                         continue;
 406                 spin_lock(&nfit_test_lock);
 407                 list_for_each_entry(n, &t->resources, list) {
 408                         if (addr >= n->res->start && (addr < n->res->start
 409                                                 + resource_size(n->res))) {
 410                                 nfit_res = n;
 411                                 break;
 412                         } else if (addr >= (unsigned long) n->buf
 413                                         && (addr < (unsigned long) n->buf
 414                                                 + resource_size(n->res))) {
 415                                 nfit_res = n;
 416                                 break;
 417                         }
 418                 }
 419                 spin_unlock(&nfit_test_lock);
 420                 if (nfit_res)
 421                         return nfit_res;
 422         }
 423
 424         return NULL;
 425 }
 426
 427 static int nfit_test0_alloc(struct nfit_test *t)
 428 {
 429         size_t nfit_size = sizeof(struct acpi_nfit_system_address) * NUM_SPA
 430                         + sizeof(struct acpi_nfit_memory_map) * NUM_MEM
 431                         + sizeof(struct acpi_nfit_control_region) * NUM_DCR
 432                         + sizeof(struct acpi_nfit_data_region) * NUM_BDW
 433                         + sizeof(struct acpi_nfit_flush_address) * NUM_DCR;
 434         int i;
 435
 436         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 437         if (!t->nfit_buf)
 438                 return -ENOMEM;
 439         t->nfit_size = nfit_size;
 440
 441         t->spa_set[0] = test_alloc_coherent(t, SPA0_SIZE, &t->spa_set_dma[0]);
 442         if (!t->spa_set[0])
 443                 return -ENOMEM;
 444
 445         t->spa_set[1] = test_alloc_coherent(t, SPA1_SIZE, &t->spa_set_dma[1]);
 446         if (!t->spa_set[1])
 447                 return -ENOMEM;
 448
 449         t->spa_set[2] = test_alloc_coherent(t, SPA0_SIZE, &t->spa_set_dma[2]);
 450         if (!t->spa_set[2])
 451                 return -ENOMEM;
 452
 453         for (i = 0; i < NUM_DCR; i++) {
 454                 t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]);
 455                 if (!t->dimm[i])
 456                         return -ENOMEM;
 457
 458                 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
 459                 if (!t->label[i])
 460                         return -ENOMEM;
 461                 sprintf(t->label[i], "label%d", i);
 462
 463                 t->flush[i] = test_alloc(t, 8, &t->flush_dma[i]);
 464                 if (!t->flush[i])
 465                         return -ENOMEM;
 466         }
 467
 468         for (i = 0; i < NUM_DCR; i++) {
 469                 t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]);
 470                 if (!t->dcr[i])
 471                         return -ENOMEM;
 472         }
 473
 474         return 0;
 475 }
 476
 477 static int nfit_test1_alloc(struct nfit_test *t)
 478 {
 479         size_t nfit_size = sizeof(struct acpi_nfit_system_address)
 480                 + sizeof(struct acpi_nfit_memory_map)
 481                 + sizeof(struct acpi_nfit_control_region);
 482
 483         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 484         if (!t->nfit_buf)
 485                 return -ENOMEM;
 486         t->nfit_size = nfit_size;
 487
 488         t->spa_set[0] = test_alloc_coherent(t, SPA2_SIZE, &t->spa_set_dma[0]);
 489         if (!t->spa_set[0])
 490                 return -ENOMEM;
 491
 492         return 0;
 493 }
 494
 495 static void nfit_test0_setup(struct nfit_test *t)
 496 {
 497         struct nvdimm_bus_descriptor *nd_desc;
 498         struct acpi_nfit_desc *acpi_desc;
 499         struct acpi_nfit_memory_map *memdev;
 500         void *nfit_buf = t->nfit_buf;
 501         struct acpi_nfit_system_address *spa;
 502         struct acpi_nfit_control_region *dcr;
 503         struct acpi_nfit_data_region *bdw;
 504         struct acpi_nfit_flush_address *flush;
 505         unsigned int offset;
 506
 507         /*
 508          * spa0 (interleave first half of dimm0 and dimm1, note storage
 509          * does not actually alias the related block-data-window
 510          * regions)
 511          */
 512         spa = nfit_buf;
 513         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 514         spa->header.length = sizeof(*spa);
 515         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 516         spa->range_index = 0+1;
 517         spa->address = t->spa_set_dma[0];
 518         spa->length = SPA0_SIZE;
 519
 520         /*
 521          * spa1 (interleave last half of the 4 DIMMS, note storage
 522          * does not actually alias the related block-data-window
 523          * regions)
 524          */
 525         spa = nfit_buf + sizeof(*spa);
 526         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 527         spa->header.length = sizeof(*spa);
 528         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 529         spa->range_index = 1+1;
 530         spa->address = t->spa_set_dma[1];
 531         spa->length = SPA1_SIZE;
 532
 533         /* spa2 (dcr0) dimm0 */
 534         spa = nfit_buf + sizeof(*spa) * 2;
 535         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 536         spa->header.length = sizeof(*spa);
 537         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 538         spa->range_index = 2+1;
 539         spa->address = t->dcr_dma[0];
 540         spa->length = DCR_SIZE;
 541
 542         /* spa3 (dcr1) dimm1 */
 543         spa = nfit_buf + sizeof(*spa) * 3;
 544         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 545         spa->header.length = sizeof(*spa);
 546         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 547         spa->range_index = 3+1;
 548         spa->address = t->dcr_dma[1];
 549         spa->length = DCR_SIZE;
 550
 551         /* spa4 (dcr2) dimm2 */
 552         spa = nfit_buf + sizeof(*spa) * 4;
 553         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 554         spa->header.length = sizeof(*spa);
 555         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 556         spa->range_index = 4+1;
 557         spa->address = t->dcr_dma[2];
 558         spa->length = DCR_SIZE;
 559
 560         /* spa5 (dcr3) dimm3 */
 561         spa = nfit_buf + sizeof(*spa) * 5;
 562         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 563         spa->header.length = sizeof(*spa);
 564         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 565         spa->range_index = 5+1;
 566         spa->address = t->dcr_dma[3];
 567         spa->length = DCR_SIZE;
 568
 569         /* spa6 (bdw for dcr0) dimm0 */
 570         spa = nfit_buf + sizeof(*spa) * 6;
 571         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 572         spa->header.length = sizeof(*spa);
 573         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 574         spa->range_index = 6+1;
 575         spa->address = t->dimm_dma[0];
 576         spa->length = DIMM_SIZE;
 577
 578         /* spa7 (bdw for dcr1) dimm1 */
 579         spa = nfit_buf + sizeof(*spa) * 7;
 580         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 581         spa->header.length = sizeof(*spa);
 582         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 583         spa->range_index = 7+1;
 584         spa->address = t->dimm_dma[1];
 585         spa->length = DIMM_SIZE;
 586
 587         /* spa8 (bdw for dcr2) dimm2 */
 588         spa = nfit_buf + sizeof(*spa) * 8;
 589         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 590         spa->header.length = sizeof(*spa);
 591         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 592         spa->range_index = 8+1;
 593         spa->address = t->dimm_dma[2];
 594         spa->length = DIMM_SIZE;
 595
 596         /* spa9 (bdw for dcr3) dimm3 */
 597         spa = nfit_buf + sizeof(*spa) * 9;
 598         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 599         spa->header.length = sizeof(*spa);
 600         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 601         spa->range_index = 9+1;
 602         spa->address = t->dimm_dma[3];
 603         spa->length = DIMM_SIZE;
 604
 605         offset = sizeof(*spa) * 10;
 606         /* mem-region0 (spa0, dimm0) */
 607         memdev = nfit_buf + offset;
 608         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 609         memdev->header.length = sizeof(*memdev);
 610         memdev->device_handle = handle[0];
 611         memdev->physical_id = 0;
 612         memdev->region_id = 0;
 613         memdev->range_index = 0+1;
 614         memdev->region_index = 0+1;
 615         memdev->region_size = SPA0_SIZE/2;
 616         memdev->region_offset = t->spa_set_dma[0];
 617         memdev->address = 0;
 618         memdev->interleave_index = 0;
 619         memdev->interleave_ways = 2;
 620
 621         /* mem-region1 (spa0, dimm1) */
 622         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map);
 623         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 624         memdev->header.length = sizeof(*memdev);
 625         memdev->device_handle = handle[1];
 626         memdev->physical_id = 1;
 627         memdev->region_id = 0;
 628         memdev->range_index = 0+1;
 629         memdev->region_index = 1+1;
 630         memdev->region_size = SPA0_SIZE/2;
 631         memdev->region_offset = t->spa_set_dma[0] + SPA0_SIZE/2;
 632         memdev->address = 0;
 633         memdev->interleave_index = 0;
 634         memdev->interleave_ways = 2;
 635
 636         /* mem-region2 (spa1, dimm0) */
 637         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 2;
 638         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 639         memdev->header.length = sizeof(*memdev);
 640         memdev->device_handle = handle[0];
 641         memdev->physical_id = 0;
 642         memdev->region_id = 1;
 643         memdev->range_index = 1+1;
 644         memdev->region_index = 0+1;
 645         memdev->region_size = SPA1_SIZE/4;
 646         memdev->region_offset = t->spa_set_dma[1];
 647         memdev->address = SPA0_SIZE/2;
 648         memdev->interleave_index = 0;
 649         memdev->interleave_ways = 4;
 650
 651         /* mem-region3 (spa1, dimm1) */
 652         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 3;
 653         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 654         memdev->header.length = sizeof(*memdev);
 655         memdev->device_handle = handle[1];
 656         memdev->physical_id = 1;
 657         memdev->region_id = 1;
 658         memdev->range_index = 1+1;
 659         memdev->region_index = 1+1;
 660         memdev->region_size = SPA1_SIZE/4;
 661         memdev->region_offset = t->spa_set_dma[1] + SPA1_SIZE/4;
 662         memdev->address = SPA0_SIZE/2;
 663         memdev->interleave_index = 0;
 664         memdev->interleave_ways = 4;
 665
 666         /* mem-region4 (spa1, dimm2) */
 667         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 4;
 668         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 669         memdev->header.length = sizeof(*memdev);
 670         memdev->device_handle = handle[2];
 671         memdev->physical_id = 2;
 672         memdev->region_id = 0;
 673         memdev->range_index = 1+1;
 674         memdev->region_index = 2+1;
 675         memdev->region_size = SPA1_SIZE/4;
 676         memdev->region_offset = t->spa_set_dma[1] + 2*SPA1_SIZE/4;
 677         memdev->address = SPA0_SIZE/2;
 678         memdev->interleave_index = 0;
 679         memdev->interleave_ways = 4;
 680
 681         /* mem-region5 (spa1, dimm3) */
 682         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 5;
 683         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 684         memdev->header.length = sizeof(*memdev);
 685         memdev->device_handle = handle[3];
 686         memdev->physical_id = 3;
 687         memdev->region_id = 0;
 688         memdev->range_index = 1+1;
 689         memdev->region_index = 3+1;
 690         memdev->region_size = SPA1_SIZE/4;
 691         memdev->region_offset = t->spa_set_dma[1] + 3*SPA1_SIZE/4;
 692         memdev->address = SPA0_SIZE/2;
 693         memdev->interleave_index = 0;
 694         memdev->interleave_ways = 4;
 695
 696         /* mem-region6 (spa/dcr0, dimm0) */
 697         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 6;
 698         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 699         memdev->header.length = sizeof(*memdev);
 700         memdev->device_handle = handle[0];
 701         memdev->physical_id = 0;
 702         memdev->region_id = 0;
 703         memdev->range_index = 2+1;
 704         memdev->region_index = 0+1;
 705         memdev->region_size = 0;
 706         memdev->region_offset = 0;
 707         memdev->address = 0;
 708         memdev->interleave_index = 0;
 709         memdev->interleave_ways = 1;
 710
 711         /* mem-region7 (spa/dcr1, dimm1) */
 712         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 7;
 713         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 714         memdev->header.length = sizeof(*memdev);
 715         memdev->device_handle = handle[1];
 716         memdev->physical_id = 1;
 717         memdev->region_id = 0;
 718         memdev->range_index = 3+1;
 719         memdev->region_index = 1+1;
 720         memdev->region_size = 0;
 721         memdev->region_offset = 0;
 722         memdev->address = 0;
 723         memdev->interleave_index = 0;
 724         memdev->interleave_ways = 1;
 725
 726         /* mem-region8 (spa/dcr2, dimm2) */
 727         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 8;
 728         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 729         memdev->header.length = sizeof(*memdev);
 730         memdev->device_handle = handle[2];
 731         memdev->physical_id = 2;
 732         memdev->region_id = 0;
 733         memdev->range_index = 4+1;
 734         memdev->region_index = 2+1;
 735         memdev->region_size = 0;
 736         memdev->region_offset = 0;
 737         memdev->address = 0;
 738         memdev->interleave_index = 0;
 739         memdev->interleave_ways = 1;
 740
 741         /* mem-region9 (spa/dcr3, dimm3) */
 742         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 9;
 743         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 744         memdev->header.length = sizeof(*memdev);
 745         memdev->device_handle = handle[3];
 746         memdev->physical_id = 3;
 747         memdev->region_id = 0;
 748         memdev->range_index = 5+1;
 749         memdev->region_index = 3+1;
 750         memdev->region_size = 0;
 751         memdev->region_offset = 0;
 752         memdev->address = 0;
 753         memdev->interleave_index = 0;
 754         memdev->interleave_ways = 1;
 755
 756         /* mem-region10 (spa/bdw0, dimm0) */
 757         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 10;
 758         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 759         memdev->header.length = sizeof(*memdev);
 760         memdev->device_handle = handle[0];
 761         memdev->physical_id = 0;
 762         memdev->region_id = 0;
 763         memdev->range_index = 6+1;
 764         memdev->region_index = 0+1;
 765         memdev->region_size = 0;
 766         memdev->region_offset = 0;
 767         memdev->address = 0;
 768         memdev->interleave_index = 0;
 769         memdev->interleave_ways = 1;
 770
 771         /* mem-region11 (spa/bdw1, dimm1) */
 772         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 11;
 773         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 774         memdev->header.length = sizeof(*memdev);
 775         memdev->device_handle = handle[1];
 776         memdev->physical_id = 1;
 777         memdev->region_id = 0;
 778         memdev->range_index = 7+1;
 779         memdev->region_index = 1+1;
 780         memdev->region_size = 0;
 781         memdev->region_offset = 0;
 782         memdev->address = 0;
 783         memdev->interleave_index = 0;
 784         memdev->interleave_ways = 1;
 785
 786         /* mem-region12 (spa/bdw2, dimm2) */
 787         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 12;
 788         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 789         memdev->header.length = sizeof(*memdev);
 790         memdev->device_handle = handle[2];
 791         memdev->physical_id = 2;
 792         memdev->region_id = 0;
 793         memdev->range_index = 8+1;
 794         memdev->region_index = 2+1;
 795         memdev->region_size = 0;
 796         memdev->region_offset = 0;
 797         memdev->address = 0;
 798         memdev->interleave_index = 0;
 799         memdev->interleave_ways = 1;
 800
 801         /* mem-region13 (spa/dcr3, dimm3) */
 802         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 13;
 803         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 804         memdev->header.length = sizeof(*memdev);
 805         memdev->device_handle = handle[3];
 806         memdev->physical_id = 3;
 807         memdev->region_id = 0;
 808         memdev->range_index = 9+1;
 809         memdev->region_index = 3+1;
 810         memdev->region_size = 0;
 811         memdev->region_offset = 0;
 812         memdev->address = 0;
 813         memdev->interleave_index = 0;
 814         memdev->interleave_ways = 1;
 815
 816         offset = offset + sizeof(struct acpi_nfit_memory_map) * 14;
 817         /* dcr-descriptor0 */
 818         dcr = nfit_buf + offset;
 819         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 820         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 821         dcr->region_index = 0+1;
 822         dcr->vendor_id = 0xabcd;
 823         dcr->device_id = 0;
 824         dcr->revision_id = 1;
 825         dcr->serial_number = ~handle[0];
 826         dcr->windows = 1;
 827         dcr->window_size = DCR_SIZE;
 828         dcr->command_offset = 0;
 829         dcr->command_size = 8;
 830         dcr->status_offset = 8;
 831         dcr->status_size = 4;
 832
 833         /* dcr-descriptor1 */
 834         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region);
 835         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 836         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 837         dcr->region_index = 1+1;
 838         dcr->vendor_id = 0xabcd;
 839         dcr->device_id = 0;
 840         dcr->revision_id = 1;
 841         dcr->serial_number = ~handle[1];
 842         dcr->windows = 1;
 843         dcr->window_size = DCR_SIZE;
 844         dcr->command_offset = 0;
 845         dcr->command_size = 8;
 846         dcr->status_offset = 8;
 847         dcr->status_size = 4;
 848
 849         /* dcr-descriptor2 */
 850         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 2;
 851         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 852         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 853         dcr->region_index = 2+1;
 854         dcr->vendor_id = 0xabcd;
 855         dcr->device_id = 0;
 856         dcr->revision_id = 1;
 857         dcr->serial_number = ~handle[2];
 858         dcr->windows = 1;
 859         dcr->window_size = DCR_SIZE;
 860         dcr->command_offset = 0;
 861         dcr->command_size = 8;
 862         dcr->status_offset = 8;
 863         dcr->status_size = 4;
 864
 865         /* dcr-descriptor3 */
 866         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 3;
 867         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 868         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 869         dcr->region_index = 3+1;
 870         dcr->vendor_id = 0xabcd;
 871         dcr->device_id = 0;
 872         dcr->revision_id = 1;
 873         dcr->serial_number = ~handle[3];
 874         dcr->windows = 1;
 875         dcr->window_size = DCR_SIZE;
 876         dcr->command_offset = 0;
 877         dcr->command_size = 8;
 878         dcr->status_offset = 8;
 879         dcr->status_size = 4;
 880
 881         offset = offset + sizeof(struct acpi_nfit_control_region) * 4;
 882         /* bdw0 (spa/dcr0, dimm0) */
 883         bdw = nfit_buf + offset;
 884         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 885         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 886         bdw->region_index = 0+1;
 887         bdw->windows = 1;
 888         bdw->offset = 0;
 889         bdw->size = BDW_SIZE;
 890         bdw->capacity = DIMM_SIZE;
 891         bdw->start_address = 0;
 892
 893         /* bdw1 (spa/dcr1, dimm1) */
 894         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region);
 895         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 896         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 897         bdw->region_index = 1+1;
 898         bdw->windows = 1;
 899         bdw->offset = 0;
 900         bdw->size = BDW_SIZE;
 901         bdw->capacity = DIMM_SIZE;
 902         bdw->start_address = 0;
 903
 904         /* bdw2 (spa/dcr2, dimm2) */
 905         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 2;
 906         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 907         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 908         bdw->region_index = 2+1;
 909         bdw->windows = 1;
 910         bdw->offset = 0;
 911         bdw->size = BDW_SIZE;
 912         bdw->capacity = DIMM_SIZE;
 913         bdw->start_address = 0;
 914
 915         /* bdw3 (spa/dcr3, dimm3) */
 916         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 3;
 917         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 918         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 919         bdw->region_index = 3+1;
 920         bdw->windows = 1;
 921         bdw->offset = 0;
 922         bdw->size = BDW_SIZE;
 923         bdw->capacity = DIMM_SIZE;
 924         bdw->start_address = 0;
 925
 926         offset = offset + sizeof(struct acpi_nfit_data_region) * 4;
 927         /* flush0 (dimm0) */
 928         flush = nfit_buf + offset;
 929         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
 930         flush->header.length = sizeof(struct acpi_nfit_flush_address);
 931         flush->device_handle = handle[0];
 932         flush->hint_count = 1;
 933         flush->hint_address[0] = t->flush_dma[0];
 934
 935         /* flush1 (dimm1) */
 936         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 1;
 937         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
 938         flush->header.length = sizeof(struct acpi_nfit_flush_address);
 939         flush->device_handle = handle[1];
 940         flush->hint_count = 1;
 941         flush->hint_address[0] = t->flush_dma[1];
 942
 943         /* flush2 (dimm2) */
 944         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 2;
 945         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
 946         flush->header.length = sizeof(struct acpi_nfit_flush_address);
 947         flush->device_handle = handle[2];
 948         flush->hint_count = 1;
 949         flush->hint_address[0] = t->flush_dma[2];
 950
 951         /* flush3 (dimm3) */
 952         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 3;
 953         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
 954         flush->header.length = sizeof(struct acpi_nfit_flush_address);
 955         flush->device_handle = handle[3];
 956         flush->hint_count = 1;
 957         flush->hint_address[0] = t->flush_dma[3];
 958
 959         if (t->setup_hotplug) {
 960                 offset = offset + sizeof(struct acpi_nfit_flush_address) * 4;
 961                 /* dcr-descriptor4 */
 962                 dcr = nfit_buf + offset;
 963                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 964                 dcr->header.length = sizeof(struct acpi_nfit_control_region);
 965                 dcr->region_index = 4+1;
 966                 dcr->vendor_id = 0xabcd;
 967                 dcr->device_id = 0;
 968                 dcr->revision_id = 1;
 969                 dcr->serial_number = ~handle[4];
 970                 dcr->windows = 1;
 971                 dcr->window_size = DCR_SIZE;
 972                 dcr->command_offset = 0;
 973                 dcr->command_size = 8;
 974                 dcr->status_offset = 8;
 975                 dcr->status_size = 4;
 976
 977                 offset = offset + sizeof(struct acpi_nfit_control_region);
 978                 /* bdw4 (spa/dcr4, dimm4) */
 979                 bdw = nfit_buf + offset;
 980                 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 981                 bdw->header.length = sizeof(struct acpi_nfit_data_region);
 982                 bdw->region_index = 4+1;
 983                 bdw->windows = 1;
 984                 bdw->offset = 0;
 985                 bdw->size = BDW_SIZE;
 986                 bdw->capacity = DIMM_SIZE;
 987                 bdw->start_address = 0;
 988
 989                 offset = offset + sizeof(struct acpi_nfit_data_region);
 990                 /* spa10 (dcr4) dimm4 */
 991                 spa = nfit_buf + offset;
 992                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 993                 spa->header.length = sizeof(*spa);
 994                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 995                 spa->range_index = 10+1;
 996                 spa->address = t->dcr_dma[4];
 997                 spa->length = DCR_SIZE;
 998
 999                 /*
1000                  * spa11 (single-dimm interleave for hotplug, note storage
1001                  * does not actually alias the related block-data-window
1002                  * regions)
1003                  */
1004                 spa = nfit_buf + offset + sizeof(*spa);
1005                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1006                 spa->header.length = sizeof(*spa);
1007                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1008                 spa->range_index = 11+1;
1009                 spa->address = t->spa_set_dma[2];
1010                 spa->length = SPA0_SIZE;
1011
1012                 /* spa12 (bdw for dcr4) dimm4 */
1013                 spa = nfit_buf + offset + sizeof(*spa) * 2;
1014                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1015                 spa->header.length = sizeof(*spa);
1016                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1017                 spa->range_index = 12+1;
1018                 spa->address = t->dimm_dma[4];
1019                 spa->length = DIMM_SIZE;
1020
1021                 offset = offset + sizeof(*spa) * 3;
1022                 /* mem-region14 (spa/dcr4, dimm4) */
1023                 memdev = nfit_buf + offset;
1024                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1025                 memdev->header.length = sizeof(*memdev);
1026                 memdev->device_handle = handle[4];
1027                 memdev->physical_id = 4;
1028                 memdev->region_id = 0;
1029                 memdev->range_index = 10+1;
1030                 memdev->region_index = 4+1;
1031                 memdev->region_size = 0;
1032                 memdev->region_offset = 0;
1033                 memdev->address = 0;
1034                 memdev->interleave_index = 0;
1035                 memdev->interleave_ways = 1;
1036
1037                 /* mem-region15 (spa0, dimm4) */
1038                 memdev = nfit_buf + offset +
1039                                 sizeof(struct acpi_nfit_memory_map);
1040                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1041                 memdev->header.length = sizeof(*memdev);
1042                 memdev->device_handle = handle[4];
1043                 memdev->physical_id = 4;
1044                 memdev->region_id = 0;
1045                 memdev->range_index = 11+1;
1046                 memdev->region_index = 4+1;
1047                 memdev->region_size = SPA0_SIZE;
1048                 memdev->region_offset = t->spa_set_dma[2];
1049                 memdev->address = 0;
1050                 memdev->interleave_index = 0;
1051                 memdev->interleave_ways = 1;
1052
1053                 /* mem-region16 (spa/dcr4, dimm4) */
1054                 memdev = nfit_buf + offset +
1055                                 sizeof(struct acpi_nfit_memory_map) * 2;
1056                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1057                 memdev->header.length = sizeof(*memdev);
1058                 memdev->device_handle = handle[4];
1059                 memdev->physical_id = 4;
1060                 memdev->region_id = 0;
1061                 memdev->range_index = 12+1;
1062                 memdev->region_index = 4+1;
1063                 memdev->region_size = 0;
1064                 memdev->region_offset = 0;
1065                 memdev->address = 0;
1066                 memdev->interleave_index = 0;
1067                 memdev->interleave_ways = 1;
1068
1069                 offset = offset + sizeof(struct acpi_nfit_memory_map) * 3;
1070                 /* flush3 (dimm4) */
1071                 flush = nfit_buf + offset;
1072                 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1073                 flush->header.length = sizeof(struct acpi_nfit_flush_address);
1074                 flush->device_handle = handle[4];
1075                 flush->hint_count = 1;
1076                 flush->hint_address[0] = t->flush_dma[4];
1077         }
1078
1079         acpi_desc = &t->acpi_desc;
1080         set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_dsm_force_en);
1081         set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1082         set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1083         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1084         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1085         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1086         nd_desc = &acpi_desc->nd_desc;
1087         nd_desc->ndctl = nfit_test_ctl;
1088 }
1089
1090 static void nfit_test1_setup(struct nfit_test *t)
1091 {
1092         size_t offset;
1093         void *nfit_buf = t->nfit_buf;
1094         struct acpi_nfit_memory_map *memdev;
1095         struct acpi_nfit_control_region *dcr;
1096         struct acpi_nfit_system_address *spa;
1097         struct nvdimm_bus_descriptor *nd_desc;
1098         struct acpi_nfit_desc *acpi_desc;
1099
1100         offset = 0;
1101         /* spa0 (flat range with no bdw aliasing) */
1102         spa = nfit_buf + offset;
1103         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1104         spa->header.length = sizeof(*spa);
1105         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1106         spa->range_index = 0+1;
1107         spa->address = t->spa_set_dma[0];
1108         spa->length = SPA2_SIZE;
1109
1110         offset += sizeof(*spa);
1111         /* mem-region0 (spa0, dimm0) */
1112         memdev = nfit_buf + offset;
1113         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1114         memdev->header.length = sizeof(*memdev);
1115         memdev->device_handle = 0;
1116         memdev->physical_id = 0;
1117         memdev->region_id = 0;
1118         memdev->range_index = 0+1;
1119         memdev->region_index = 0+1;
1120         memdev->region_size = SPA2_SIZE;
1121         memdev->region_offset = 0;
1122         memdev->address = 0;
1123         memdev->interleave_index = 0;
1124         memdev->interleave_ways = 1;
1125         memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
1126                 | ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
1127                 | ACPI_NFIT_MEM_NOT_ARMED;
1128
1129         offset += sizeof(*memdev);
1130         /* dcr-descriptor0 */
1131         dcr = nfit_buf + offset;
1132         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1133         dcr->header.length = sizeof(struct acpi_nfit_control_region);
1134         dcr->region_index = 0+1;
1135         dcr->vendor_id = 0xabcd;
1136         dcr->device_id = 0;
1137         dcr->revision_id = 1;
1138         dcr->serial_number = ~0;
1139         dcr->code = 0x201;
1140         dcr->windows = 0;
1141         dcr->window_size = 0;
1142         dcr->command_offset = 0;
1143         dcr->command_size = 0;
1144         dcr->status_offset = 0;
1145         dcr->status_size = 0;
1146
1147         acpi_desc = &t->acpi_desc;
1148         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1149         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1150         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1151         nd_desc = &acpi_desc->nd_desc;
1152         nd_desc->ndctl = nfit_test_ctl;
1153 }
1154
1155 static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
1156                 void *iobuf, u64 len, int rw)
1157 {
1158         struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
1159         struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1160         struct nd_region *nd_region = &ndbr->nd_region;
1161         unsigned int lane;
1162
1163         lane = nd_region_acquire_lane(nd_region);
1164         if (rw)
1165                 memcpy(mmio->addr.base + dpa, iobuf, len);
1166         else {
1167                 memcpy(iobuf, mmio->addr.base + dpa, len);
1168
1169                 /* give us some some coverage of the mmio_flush_range() API */
1170                 mmio_flush_range(mmio->addr.base + dpa, len);
1171         }
1172         nd_region_release_lane(nd_region, lane);
1173
1174         return 0;
1175 }
1176
1177 static int nfit_test_probe(struct platform_device *pdev)
1178 {
1179         struct nvdimm_bus_descriptor *nd_desc;
1180         struct acpi_nfit_desc *acpi_desc;
1181         struct device *dev = &pdev->dev;
1182         struct nfit_test *nfit_test;
1183         int rc;
1184
1185         nfit_test = to_nfit_test(&pdev->dev);
1186
1187         /* common alloc */
1188         if (nfit_test->num_dcr) {
1189                 int num = nfit_test->num_dcr;
1190
1191                 nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *),
1192                                 GFP_KERNEL);
1193                 nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1194                                 GFP_KERNEL);
1195                 nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *),
1196                                 GFP_KERNEL);
1197                 nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1198                                 GFP_KERNEL);
1199                 nfit_test->label = devm_kcalloc(dev, num, sizeof(void *),
1200                                 GFP_KERNEL);
1201                 nfit_test->label_dma = devm_kcalloc(dev, num,
1202                                 sizeof(dma_addr_t), GFP_KERNEL);
1203                 nfit_test->dcr = devm_kcalloc(dev, num,
1204                                 sizeof(struct nfit_test_dcr *), GFP_KERNEL);
1205                 nfit_test->dcr_dma = devm_kcalloc(dev, num,
1206                                 sizeof(dma_addr_t), GFP_KERNEL);
1207                 if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label
1208                                 && nfit_test->label_dma && nfit_test->dcr
1209                                 && nfit_test->dcr_dma && nfit_test->flush
1210                                 && nfit_test->flush_dma)
1211                         /* pass */;
1212                 else
1213                         return -ENOMEM;
1214         }
1215
1216         if (nfit_test->num_pm) {
1217                 int num = nfit_test->num_pm;
1218
1219                 nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *),
1220                                 GFP_KERNEL);
1221                 nfit_test->spa_set_dma = devm_kcalloc(dev, num,
1222                                 sizeof(dma_addr_t), GFP_KERNEL);
1223                 if (nfit_test->spa_set && nfit_test->spa_set_dma)
1224                         /* pass */;
1225                 else
1226                         return -ENOMEM;
1227         }
1228
1229         /* per-nfit specific alloc */
1230         if (nfit_test->alloc(nfit_test))
1231                 return -ENOMEM;
1232
1233         nfit_test->setup(nfit_test);
1234         acpi_desc = &nfit_test->acpi_desc;
1235         acpi_desc->dev = &pdev->dev;
1236         acpi_desc->nfit = nfit_test->nfit_buf;
1237         acpi_desc->blk_do_io = nfit_test_blk_do_io;
1238         nd_desc = &acpi_desc->nd_desc;
1239         nd_desc->attr_groups = acpi_nfit_attribute_groups;
1240         acpi_desc->nvdimm_bus = nvdimm_bus_register(&pdev->dev, nd_desc);
1241         if (!acpi_desc->nvdimm_bus)
1242                 return -ENXIO;
1243
1244         INIT_LIST_HEAD(&acpi_desc->spa_maps);
1245         INIT_LIST_HEAD(&acpi_desc->spas);
1246         INIT_LIST_HEAD(&acpi_desc->dcrs);
1247         INIT_LIST_HEAD(&acpi_desc->bdws);
1248         INIT_LIST_HEAD(&acpi_desc->idts);
1249         INIT_LIST_HEAD(&acpi_desc->flushes);
1250         INIT_LIST_HEAD(&acpi_desc->memdevs);
1251         INIT_LIST_HEAD(&acpi_desc->dimms);
1252         mutex_init(&acpi_desc->spa_map_mutex);
1253         mutex_init(&acpi_desc->init_mutex);
1254
1255         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1256         if (rc) {
1257                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1258                 return rc;
1259         }
1260
1261         if (nfit_test->setup != nfit_test0_setup)
1262                 return 0;
1263
1264         nfit_test->setup_hotplug = 1;
1265         nfit_test->setup(nfit_test);
1266
1267         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1268         if (rc) {
1269                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1270                 return rc;
1271         }
1272
1273         return 0;
1274 }
1275
1276 static int nfit_test_remove(struct platform_device *pdev)
1277 {
1278         struct nfit_test *nfit_test = to_nfit_test(&pdev->dev);
1279         struct acpi_nfit_desc *acpi_desc = &nfit_test->acpi_desc;
1280
1281         nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1282
1283         return 0;
1284 }
1285
1286 static void nfit_test_release(struct device *dev)
1287 {
1288         struct nfit_test *nfit_test = to_nfit_test(dev);
1289
1290         kfree(nfit_test);
1291 }
1292
1293 static const struct platform_device_id nfit_test_id[] = {
1294         { KBUILD_MODNAME },
1295         { },
1296 };
1297
1298 static struct platform_driver nfit_test_driver = {
1299         .probe = nfit_test_probe,
1300         .remove = nfit_test_remove,
1301         .driver = {
1302                 .name = KBUILD_MODNAME,
1303         },
1304         .id_table = nfit_test_id,
1305 };
1306
1307 #ifdef CONFIG_CMA_SIZE_MBYTES
1308 #define CMA_SIZE_MBYTES CONFIG_CMA_SIZE_MBYTES
1309 #else
1310 #define CMA_SIZE_MBYTES 0
1311 #endif
1312
1313 static __init int nfit_test_init(void)
1314 {
1315         int rc, i;
1316
1317         nfit_test_setup(nfit_test_lookup);
1318
1319         for (i = 0; i < NUM_NFITS; i++) {
1320                 struct nfit_test *nfit_test;
1321                 struct platform_device *pdev;
1322                 static int once;
1323
1324                 nfit_test = kzalloc(sizeof(*nfit_test), GFP_KERNEL);
1325                 if (!nfit_test) {
1326                         rc = -ENOMEM;
1327                         goto err_register;
1328                 }
1329                 INIT_LIST_HEAD(&nfit_test->resources);
1330                 switch (i) {
1331                 case 0:
1332                         nfit_test->num_pm = NUM_PM;
1333                         nfit_test->num_dcr = NUM_DCR;
1334                         nfit_test->alloc = nfit_test0_alloc;
1335                         nfit_test->setup = nfit_test0_setup;
1336                         break;
1337                 case 1:
1338                         nfit_test->num_pm = 1;
1339                         nfit_test->alloc = nfit_test1_alloc;
1340                         nfit_test->setup = nfit_test1_setup;
1341                         break;
1342                 default:
1343                         rc = -EINVAL;
1344                         goto err_register;
1345                 }
1346                 pdev = &nfit_test->pdev;
1347                 pdev->name = KBUILD_MODNAME;
1348                 pdev->id = i;
1349                 pdev->dev.release = nfit_test_release;
1350                 rc = platform_device_register(pdev);
1351                 if (rc) {
1352                         put_device(&pdev->dev);
1353                         goto err_register;
1354                 }
1355
1356                 rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1357                 if (rc)
1358                         goto err_register;
1359
1360                 instances[i] = nfit_test;
1361
1362                 if (!once++) {
1363                         dma_addr_t dma;
1364                         void *buf;
1365
1366                         buf = dma_alloc_coherent(&pdev->dev, SZ_128M, &dma,
1367                                         GFP_KERNEL);
1368                         if (!buf) {
1369                                 rc = -ENOMEM;
1370                                 dev_warn(&pdev->dev, "need 128M of free cma\n");
1371                                 goto err_register;
1372                         }
1373                         dma_free_coherent(&pdev->dev, SZ_128M, buf, dma);
1374                 }
1375         }
1376
1377         rc = platform_driver_register(&nfit_test_driver);
1378         if (rc)
1379                 goto err_register;
1380         return 0;
1381
1382  err_register:
1383         for (i = 0; i < NUM_NFITS; i++)
1384                 if (instances[i])
1385                         platform_device_unregister(&instances[i]->pdev);
1386         nfit_test_teardown();
1387         return rc;
1388 }
1389
1390 static __exit void nfit_test_exit(void)
1391 {
1392         int i;
1393
1394         platform_driver_unregister(&nfit_test_driver);
1395         for (i = 0; i < NUM_NFITS; i++)
1396                 platform_device_unregister(&instances[i]->pdev);
1397         nfit_test_teardown();
1398 }
1399
1400 module_init(nfit_test_init);
1401 module_exit(nfit_test_exit);
1402 MODULE_LICENSE("GPL v2");
1403 MODULE_AUTHOR("Intel Corporation");