4 * Copyright (C) 2015 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 #include <linux/kvm_host.h>
17 #include <kvm/arm_vgic.h>
18 #include <linux/uaccess.h>
19 #include <asm/kvm_mmu.h>
24 int vgic_check_ioaddr(struct kvm *kvm, phys_addr_t *ioaddr,
25 phys_addr_t addr, phys_addr_t alignment)
27 if (addr & ~KVM_PHYS_MASK)
30 if (!IS_ALIGNED(addr, alignment))
33 if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
40 * kvm_vgic_addr - set or get vgic VM base addresses
41 * @kvm: pointer to the vm struct
42 * @type: the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
43 * @addr: pointer to address value
44 * @write: if true set the address in the VM address space, if false read the
47 * Set or get the vgic base addresses for the distributor and the virtual CPU
48 * interface in the VM physical address space. These addresses are properties
49 * of the emulated core/SoC and therefore user space initially knows this
51 * Check them for sanity (alignment, double assignment). We can't check for
52 * overlapping regions in case of a virtual GICv3 here, since we don't know
53 * the number of VCPUs yet, so we defer this check to map_resources().
55 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
58 struct vgic_dist *vgic = &kvm->arch.vgic;
60 phys_addr_t *addr_ptr, alignment;
62 mutex_lock(&kvm->lock);
64 case KVM_VGIC_V2_ADDR_TYPE_DIST:
65 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
66 addr_ptr = &vgic->vgic_dist_base;
69 case KVM_VGIC_V2_ADDR_TYPE_CPU:
70 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
71 addr_ptr = &vgic->vgic_cpu_base;
74 #ifdef CONFIG_KVM_ARM_VGIC_V3
75 case KVM_VGIC_V3_ADDR_TYPE_DIST:
76 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
77 addr_ptr = &vgic->vgic_dist_base;
80 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
81 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
82 addr_ptr = &vgic->vgic_redist_base;
91 if (vgic->vgic_model != type_needed) {
97 r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment);
105 mutex_unlock(&kvm->lock);
109 static int vgic_set_common_attr(struct kvm_device *dev,
110 struct kvm_device_attr *attr)
114 switch (attr->group) {
115 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
116 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
118 unsigned long type = (unsigned long)attr->attr;
120 if (copy_from_user(&addr, uaddr, sizeof(addr)))
123 r = kvm_vgic_addr(dev->kvm, type, &addr, true);
124 return (r == -ENODEV) ? -ENXIO : r;
126 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
127 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
131 if (get_user(val, uaddr))
136 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
137 * - at most 1024 interrupts
138 * - a multiple of 32 interrupts
140 if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
141 val > VGIC_MAX_RESERVED ||
145 mutex_lock(&dev->kvm->lock);
147 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
150 dev->kvm->arch.vgic.nr_spis =
151 val - VGIC_NR_PRIVATE_IRQS;
153 mutex_unlock(&dev->kvm->lock);
157 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
158 switch (attr->attr) {
159 case KVM_DEV_ARM_VGIC_CTRL_INIT:
160 mutex_lock(&dev->kvm->lock);
161 r = vgic_init(dev->kvm);
162 mutex_unlock(&dev->kvm->lock);
172 static int vgic_get_common_attr(struct kvm_device *dev,
173 struct kvm_device_attr *attr)
177 switch (attr->group) {
178 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
179 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
181 unsigned long type = (unsigned long)attr->attr;
183 r = kvm_vgic_addr(dev->kvm, type, &addr, false);
185 return (r == -ENODEV) ? -ENXIO : r;
187 if (copy_to_user(uaddr, &addr, sizeof(addr)))
191 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
192 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
194 r = put_user(dev->kvm->arch.vgic.nr_spis +
195 VGIC_NR_PRIVATE_IRQS, uaddr);
203 static int vgic_create(struct kvm_device *dev, u32 type)
205 return kvm_vgic_create(dev->kvm, type);
208 static void vgic_destroy(struct kvm_device *dev)
213 int kvm_register_vgic_device(unsigned long type)
218 case KVM_DEV_TYPE_ARM_VGIC_V2:
219 ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
220 KVM_DEV_TYPE_ARM_VGIC_V2);
222 #ifdef CONFIG_KVM_ARM_VGIC_V3
223 case KVM_DEV_TYPE_ARM_VGIC_V3:
224 ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
225 KVM_DEV_TYPE_ARM_VGIC_V3);
228 ret = kvm_vgic_register_its_device();
236 /** vgic_attr_regs_access: allows user space to read/write VGIC registers
238 * @dev: kvm device handle
239 * @attr: kvm device attribute
240 * @reg: address the value is read or written
241 * @is_write: write flag
244 static int vgic_attr_regs_access(struct kvm_device *dev,
245 struct kvm_device_attr *attr,
246 u32 *reg, bool is_write)
250 struct kvm_vcpu *vcpu, *tmp_vcpu;
251 int vcpu_lock_idx = -1;
253 cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
254 KVM_DEV_ARM_VGIC_CPUID_SHIFT;
255 vcpu = kvm_get_vcpu(dev->kvm, cpuid);
256 addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
258 mutex_lock(&dev->kvm->lock);
260 ret = vgic_init(dev->kvm);
264 if (cpuid >= atomic_read(&dev->kvm->online_vcpus)) {
270 * Any time a vcpu is run, vcpu_load is called which tries to grab the
271 * vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure
272 * that no other VCPUs are run and fiddle with the vgic state while we
276 kvm_for_each_vcpu(c, tmp_vcpu, dev->kvm) {
277 if (!mutex_trylock(&tmp_vcpu->mutex))
282 switch (attr->group) {
283 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
284 ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, reg);
286 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
287 ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, reg);
295 for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) {
296 tmp_vcpu = kvm_get_vcpu(dev->kvm, vcpu_lock_idx);
297 mutex_unlock(&tmp_vcpu->mutex);
300 mutex_unlock(&dev->kvm->lock);
306 static int vgic_v2_set_attr(struct kvm_device *dev,
307 struct kvm_device_attr *attr)
311 ret = vgic_set_common_attr(dev, attr);
315 switch (attr->group) {
316 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
317 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
318 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
321 if (get_user(reg, uaddr))
324 return vgic_attr_regs_access(dev, attr, ®, true);
331 static int vgic_v2_get_attr(struct kvm_device *dev,
332 struct kvm_device_attr *attr)
336 ret = vgic_get_common_attr(dev, attr);
340 switch (attr->group) {
341 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
342 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
343 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
346 ret = vgic_attr_regs_access(dev, attr, ®, false);
349 return put_user(reg, uaddr);
356 static int vgic_v2_has_attr(struct kvm_device *dev,
357 struct kvm_device_attr *attr)
359 switch (attr->group) {
360 case KVM_DEV_ARM_VGIC_GRP_ADDR:
361 switch (attr->attr) {
362 case KVM_VGIC_V2_ADDR_TYPE_DIST:
363 case KVM_VGIC_V2_ADDR_TYPE_CPU:
367 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
368 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
369 return vgic_v2_has_attr_regs(dev, attr);
370 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
372 case KVM_DEV_ARM_VGIC_GRP_CTRL:
373 switch (attr->attr) {
374 case KVM_DEV_ARM_VGIC_CTRL_INIT:
381 struct kvm_device_ops kvm_arm_vgic_v2_ops = {
382 .name = "kvm-arm-vgic-v2",
383 .create = vgic_create,
384 .destroy = vgic_destroy,
385 .set_attr = vgic_v2_set_attr,
386 .get_attr = vgic_v2_get_attr,
387 .has_attr = vgic_v2_has_attr,
392 #ifdef CONFIG_KVM_ARM_VGIC_V3
394 static int vgic_v3_set_attr(struct kvm_device *dev,
395 struct kvm_device_attr *attr)
397 return vgic_set_common_attr(dev, attr);
400 static int vgic_v3_get_attr(struct kvm_device *dev,
401 struct kvm_device_attr *attr)
403 return vgic_get_common_attr(dev, attr);
406 static int vgic_v3_has_attr(struct kvm_device *dev,
407 struct kvm_device_attr *attr)
409 switch (attr->group) {
410 case KVM_DEV_ARM_VGIC_GRP_ADDR:
411 switch (attr->attr) {
412 case KVM_VGIC_V3_ADDR_TYPE_DIST:
413 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
417 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
419 case KVM_DEV_ARM_VGIC_GRP_CTRL:
420 switch (attr->attr) {
421 case KVM_DEV_ARM_VGIC_CTRL_INIT:
428 struct kvm_device_ops kvm_arm_vgic_v3_ops = {
429 .name = "kvm-arm-vgic-v3",
430 .create = vgic_create,
431 .destroy = vgic_destroy,
432 .set_attr = vgic_v3_set_attr,
433 .get_attr = vgic_v3_get_attr,
434 .has_attr = vgic_v3_has_attr,
437 #endif /* CONFIG_KVM_ARM_VGIC_V3 */