Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel...
[cascardo/linux.git] / virt / kvm / irq_comm.c
1 /*
2  * irq_comm.c: Common API for in kernel interrupt controller
3  * Copyright (c) 2007, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16  * Place - Suite 330, Boston, MA 02111-1307 USA.
17  * Authors:
18  *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19  *
20  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
21  */
22
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
27
28 #include <asm/msidef.h>
29 #ifdef CONFIG_IA64
30 #include <asm/iosapic.h>
31 #endif
32
33 #include "irq.h"
34
35 #include "ioapic.h"
36
37 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
38                            struct kvm *kvm, int irq_source_id, int level,
39                            bool line_status)
40 {
41 #ifdef CONFIG_X86
42         struct kvm_pic *pic = pic_irqchip(kvm);
43         return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
44 #else
45         return -1;
46 #endif
47 }
48
49 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
50                               struct kvm *kvm, int irq_source_id, int level,
51                               bool line_status)
52 {
53         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
54         return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
55                                 line_status);
56 }
57
58 inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
59 {
60 #ifdef CONFIG_IA64
61         return irq->delivery_mode ==
62                 (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
63 #else
64         return irq->delivery_mode == APIC_DM_LOWEST;
65 #endif
66 }
67
68 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
69                 struct kvm_lapic_irq *irq, unsigned long *dest_map)
70 {
71         int i, r = -1;
72         struct kvm_vcpu *vcpu, *lowest = NULL;
73
74         if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
75                         kvm_is_dm_lowest_prio(irq)) {
76                 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
77                 irq->delivery_mode = APIC_DM_FIXED;
78         }
79
80         if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
81                 return r;
82
83         kvm_for_each_vcpu(i, vcpu, kvm) {
84                 if (!kvm_apic_present(vcpu))
85                         continue;
86
87                 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
88                                         irq->dest_id, irq->dest_mode))
89                         continue;
90
91                 if (!kvm_is_dm_lowest_prio(irq)) {
92                         if (r < 0)
93                                 r = 0;
94                         r += kvm_apic_set_irq(vcpu, irq, dest_map);
95                 } else if (kvm_lapic_enabled(vcpu)) {
96                         if (!lowest)
97                                 lowest = vcpu;
98                         else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
99                                 lowest = vcpu;
100                 }
101         }
102
103         if (lowest)
104                 r = kvm_apic_set_irq(lowest, irq, dest_map);
105
106         return r;
107 }
108
109 static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
110                                    struct kvm_lapic_irq *irq)
111 {
112         trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
113
114         irq->dest_id = (e->msi.address_lo &
115                         MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
116         irq->vector = (e->msi.data &
117                         MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
118         irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
119         irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
120         irq->delivery_mode = e->msi.data & 0x700;
121         irq->level = 1;
122         irq->shorthand = 0;
123         /* TODO Deal with RH bit of MSI message address */
124 }
125
126 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
127                 struct kvm *kvm, int irq_source_id, int level, bool line_status)
128 {
129         struct kvm_lapic_irq irq;
130
131         if (!level)
132                 return -1;
133
134         kvm_set_msi_irq(e, &irq);
135
136         return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
137 }
138
139
140 static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
141                          struct kvm *kvm)
142 {
143         struct kvm_lapic_irq irq;
144         int r;
145
146         kvm_set_msi_irq(e, &irq);
147
148         if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
149                 return r;
150         else
151                 return -EWOULDBLOCK;
152 }
153
154 /*
155  * Deliver an IRQ in an atomic context if we can, or return a failure,
156  * user can retry in a process context.
157  * Return value:
158  *  -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
159  *  Other values - No need to retry.
160  */
161 int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
162 {
163         struct kvm_kernel_irq_routing_entry *e;
164         int ret = -EINVAL;
165         struct kvm_irq_routing_table *irq_rt;
166         int idx;
167
168         trace_kvm_set_irq(irq, level, irq_source_id);
169
170         /*
171          * Injection into either PIC or IOAPIC might need to scan all CPUs,
172          * which would need to be retried from thread context;  when same GSI
173          * is connected to both PIC and IOAPIC, we'd have to report a
174          * partial failure here.
175          * Since there's no easy way to do this, we only support injecting MSI
176          * which is limited to 1:1 GSI mapping.
177          */
178         idx = srcu_read_lock(&kvm->irq_srcu);
179         irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
180         if (irq < irq_rt->nr_rt_entries)
181                 hlist_for_each_entry(e, &irq_rt->map[irq], link) {
182                         if (likely(e->type == KVM_IRQ_ROUTING_MSI))
183                                 ret = kvm_set_msi_inatomic(e, kvm);
184                         else
185                                 ret = -EWOULDBLOCK;
186                         break;
187                 }
188         srcu_read_unlock(&kvm->irq_srcu, idx);
189         return ret;
190 }
191
192 int kvm_request_irq_source_id(struct kvm *kvm)
193 {
194         unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
195         int irq_source_id;
196
197         mutex_lock(&kvm->irq_lock);
198         irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
199
200         if (irq_source_id >= BITS_PER_LONG) {
201                 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
202                 irq_source_id = -EFAULT;
203                 goto unlock;
204         }
205
206         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
207 #ifdef CONFIG_X86
208         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
209 #endif
210         set_bit(irq_source_id, bitmap);
211 unlock:
212         mutex_unlock(&kvm->irq_lock);
213
214         return irq_source_id;
215 }
216
217 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
218 {
219         ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
220 #ifdef CONFIG_X86
221         ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
222 #endif
223
224         mutex_lock(&kvm->irq_lock);
225         if (irq_source_id < 0 ||
226             irq_source_id >= BITS_PER_LONG) {
227                 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
228                 goto unlock;
229         }
230         clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
231         if (!irqchip_in_kernel(kvm))
232                 goto unlock;
233
234         kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
235 #ifdef CONFIG_X86
236         kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
237 #endif
238 unlock:
239         mutex_unlock(&kvm->irq_lock);
240 }
241
242 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
243                                     struct kvm_irq_mask_notifier *kimn)
244 {
245         mutex_lock(&kvm->irq_lock);
246         kimn->irq = irq;
247         hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
248         mutex_unlock(&kvm->irq_lock);
249 }
250
251 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
252                                       struct kvm_irq_mask_notifier *kimn)
253 {
254         mutex_lock(&kvm->irq_lock);
255         hlist_del_rcu(&kimn->link);
256         mutex_unlock(&kvm->irq_lock);
257         synchronize_srcu(&kvm->irq_srcu);
258 }
259
260 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
261                              bool mask)
262 {
263         struct kvm_irq_mask_notifier *kimn;
264         int idx, gsi;
265
266         idx = srcu_read_lock(&kvm->irq_srcu);
267         gsi = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu)->chip[irqchip][pin];
268         if (gsi != -1)
269                 hlist_for_each_entry_rcu(kimn, &kvm->mask_notifier_list, link)
270                         if (kimn->irq == gsi)
271                                 kimn->func(kimn, mask);
272         srcu_read_unlock(&kvm->irq_srcu, idx);
273 }
274
275 int kvm_set_routing_entry(struct kvm_irq_routing_table *rt,
276                           struct kvm_kernel_irq_routing_entry *e,
277                           const struct kvm_irq_routing_entry *ue)
278 {
279         int r = -EINVAL;
280         int delta;
281         unsigned max_pin;
282
283         switch (ue->type) {
284         case KVM_IRQ_ROUTING_IRQCHIP:
285                 delta = 0;
286                 switch (ue->u.irqchip.irqchip) {
287                 case KVM_IRQCHIP_PIC_MASTER:
288                         e->set = kvm_set_pic_irq;
289                         max_pin = PIC_NUM_PINS;
290                         break;
291                 case KVM_IRQCHIP_PIC_SLAVE:
292                         e->set = kvm_set_pic_irq;
293                         max_pin = PIC_NUM_PINS;
294                         delta = 8;
295                         break;
296                 case KVM_IRQCHIP_IOAPIC:
297                         max_pin = KVM_IOAPIC_NUM_PINS;
298                         e->set = kvm_set_ioapic_irq;
299                         break;
300                 default:
301                         goto out;
302                 }
303                 e->irqchip.irqchip = ue->u.irqchip.irqchip;
304                 e->irqchip.pin = ue->u.irqchip.pin + delta;
305                 if (e->irqchip.pin >= max_pin)
306                         goto out;
307                 rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
308                 break;
309         case KVM_IRQ_ROUTING_MSI:
310                 e->set = kvm_set_msi;
311                 e->msi.address_lo = ue->u.msi.address_lo;
312                 e->msi.address_hi = ue->u.msi.address_hi;
313                 e->msi.data = ue->u.msi.data;
314                 break;
315         default:
316                 goto out;
317         }
318
319         r = 0;
320 out:
321         return r;
322 }
323
324 #define IOAPIC_ROUTING_ENTRY(irq) \
325         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
326           .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
327 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
328
329 #ifdef CONFIG_X86
330 #  define PIC_ROUTING_ENTRY(irq) \
331         { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,  \
332           .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
333 #  define ROUTING_ENTRY2(irq) \
334         IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
335 #else
336 #  define ROUTING_ENTRY2(irq) \
337         IOAPIC_ROUTING_ENTRY(irq)
338 #endif
339
340 static const struct kvm_irq_routing_entry default_routing[] = {
341         ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
342         ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
343         ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
344         ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
345         ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
346         ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
347         ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
348         ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
349         ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
350         ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
351         ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
352         ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
353 #ifdef CONFIG_IA64
354         ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
355         ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
356         ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
357         ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
358         ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
359         ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
360         ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
361         ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
362         ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
363         ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
364         ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
365         ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
366 #endif
367 };
368
369 int kvm_setup_default_irq_routing(struct kvm *kvm)
370 {
371         return kvm_set_irq_routing(kvm, default_routing,
372                                    ARRAY_SIZE(default_routing), 0);
373 }