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Merge tag 'ceph-for-4.9-rc1' of git://github.com/ceph/ceph-client
[cascardo/linux.git]
/
arch
/
arm
/
boot
/
dts
/
omap5.dtsi
diff --git
a/arch/arm/boot/dts/omap5.dtsi
b/arch/arm/boot/dts/omap5.dtsi
index
71a8f54
..
2526211
100644
(file)
--- a/
arch/arm/boot/dts/omap5.dtsi
+++ b/
arch/arm/boot/dts/omap5.dtsi
@@
-12,8
+12,8
@@
#include <dt-bindings/pinctrl/omap.h>
/ {
#include <dt-bindings/pinctrl/omap.h>
/ {
- #address-cells = <
1
>;
- #size-cells = <
1
>;
+ #address-cells = <
2
>;
+ #size-cells = <
2
>;
compatible = "ti,omap5";
interrupt-parent = <&wakeupgen>;
compatible = "ti,omap5";
interrupt-parent = <&wakeupgen>;
@@
-90,10
+90,10
@@
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
- reg = <0
x4821100
0 0x1000>,
- <0
x4821200
0 0x1000>,
- <0
x4821400
0 0x2000>,
- <0
x4821600
0 0x2000>;
+ reg = <0
0x48211000
0 0x1000>,
+ <0
0x48212000
0 0x1000>,
+ <0
0x48214000
0 0x2000>,
+ <0
0x48216000
0 0x2000>;
interrupt-parent = <&gic>;
};
interrupt-parent = <&gic>;
};
@@
-101,7
+101,7
@@
compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
- reg = <0
x4828100
0 0x1000>;
+ reg = <0
0x48281000
0 0x1000>;
interrupt-parent = <&gic>;
};
interrupt-parent = <&gic>;
};
@@
-129,11
+129,11
@@
compatible = "ti,omap5-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,omap5-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
+ ranges
= <0 0 0 0xc0000000>
;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
- reg = <0
x4400000
0 0x2000>,
- <0
x4480000
0 0x3000>,
- <0
x4500000
0 0x4000>;
+ reg = <0
0x44000000
0 0x2000>,
+ <0
0x44800000
0 0x3000>,
+ <0
0x45000000
0 0x4000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@
-863,7
+863,7
@@
#size-cells = <1>;
utmi-mode = <2>;
ranges;
#size-cells = <1>;
utmi-mode = <2>;
ranges;
- dwc3@4a030000 {
+ dwc3
: dwc3
@4a030000 {
compatible = "snps,dwc3";
reg = <0x4a030000 0x10000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
compatible = "snps,dwc3";
reg = <0x4a030000 0x10000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,