Merge tag 'depends/phy-dt-header' into next/dt2

[cascardo/linux.git] / arch / arm / boot / dts / omap-zoom-common.dtsi

diff --git a/arch/arm/boot/dts/omap-zoom-common.dtsi b/arch/arm/boot/dts/omap-zoom-common.dtsi
index 68221fa..46ef3e4 100644 (file)
--- a/arch/arm/boot/dts/omap-zoom-common.dtsi
+++ b/arch/arm/boot/dts/omap-zoom-common.dtsi
@@ -5,7 +5,7 @@
 #include "omap-gpmc-smsc911x.dtsi"
 
 &gpmc {
-       ranges = <3 0 0x10000000 0x00000400>,
+       ranges = <3 0 0x10000000 0x1000000>,    /* CS3: 16MB for UART */
                 <7 0 0x2c000000 0x01000000>;
 
        /*
@@ -15,7 +15,65 @@
         */
        uart@3,0 {
                compatible = "ns16550a";
-               reg = <3 0 0x100>;
+               reg = <3 0 8>;  /* CS3, offset 0, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
+               gpmc,mux-add-data = <0>;
+               gpmc,device-width = <1>;
+               gpmc,wait-pin = <1>;
+               gpmc,cycle2cycle-samecsen = <1>;
+               gpmc,cycle2cycle-diffcsen = <1>;
+               gpmc,cs-on-ns = <5>;
+               gpmc,cs-rd-off-ns = <155>;
+               gpmc,cs-wr-off-ns = <155>;
+               gpmc,adv-on-ns = <15>;
+               gpmc,adv-rd-off-ns = <40>;
+               gpmc,adv-wr-off-ns = <40>;
+               gpmc,oe-on-ns = <45>;
+               gpmc,oe-off-ns = <145>;
+               gpmc,we-on-ns = <45>;
+               gpmc,we-off-ns = <145>;
+               gpmc,rd-cycle-ns = <155>;
+               gpmc,wr-cycle-ns = <155>;
+               gpmc,access-ns = <145>;
+               gpmc,page-burst-access-ns = <20>;
+               gpmc,bus-turnaround-ns = <20>;
+               gpmc,cycle2cycle-delay-ns = <20>;
+               gpmc,wait-monitoring-ns = <0>;
+               gpmc,clk-activation-ns = <0>;
+               gpmc,wr-data-mux-bus-ns = <45>;
+               gpmc,wr-access-ns = <145>;
+       };
+       uart@3,1 {
+               compatible = "ns16550a";
+               reg = <3 0x100 8>;      /* CS3, offset 0x100, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
+       };
+       uart@3,2 {
+               compatible = "ns16550a";
+               reg = <3 0x200 8>;      /* CS3, offset 0x200, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
+       };
+       uart@3,3 {
+               compatible = "ns16550a";
+               reg = <3 0x300 8>;      /* CS3, offset 0x300, IO size 8 */
                bank-width = <2>;
                reg-shift = <1>;
                reg-io-width = <1>;