Merge branch 'v4.9-shared/soc-hdr' into v4.9-armsoc/dts32

[cascardo/linux.git] / arch / arm / boot / dts / r8a7791-porter.dts

diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index a9285d9..6761d11 100644 (file)
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -46,7 +46,7 @@
                reg = <2 0x00000000 0 0x40000000>;
        };
 
-       vcc_sdhi0: regulator@0 {
+       vcc_sdhi0: regulator-vcc-sdhi0 {
                compatible = "regulator-fixed";
 
                regulator-name = "SDHI0 Vcc";
@@ -55,7 +55,7 @@
                regulator-always-on;
        };
 
-       vccq_sdhi0: regulator@1 {
+       vccq_sdhi0: regulator-vccq-sdhi0 {
                compatible = "regulator-gpio";
 
                regulator-name = "SDHI0 VccQ";
@@ -68,7 +68,7 @@
                          1800000 0>;
        };
 
-       vcc_sdhi2: regulator@2 {
+       vcc_sdhi2: regulator-vcc-sdhi2 {
                compatible = "regulator-fixed";
 
                regulator-name = "SDHI2 Vcc";
@@ -77,7 +77,7 @@
                regulator-always-on;
        };
 
-       vccq_sdhi2: regulator@3 {
+       vccq_sdhi2: regulator-vccq-sdhi2 {
                compatible = "regulator-gpio";
 
                regulator-name = "SDHI2 VccQ";
@@ -113,11 +113,10 @@
                clock-frequency = <74250000>;
        };
 
-       x14_clk: x14-clock {
+       x14_clk: audio_clock {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <11289600>;
-               clock-output-names = "audio_clock";
        };
 
        sound {
@@ -143,74 +142,74 @@
 };
 
 &pfc {
-       scif0_pins: serial0 {
-               renesas,groups = "scif0_data_d";
-               renesas,function = "scif0";
+       scif0_pins: scif0 {
+               groups = "scif0_data_d";
+               function = "scif0";
        };
 
        ether_pins: ether {
-               renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
-               renesas,function = "eth";
+               groups = "eth_link", "eth_mdio", "eth_rmii";
+               function = "eth";
        };
 
        phy1_pins: phy1 {
-               renesas,groups = "intc_irq0";
-               renesas,function = "intc";
+               groups = "intc_irq0";
+               function = "intc";
        };
 
        sdhi0_pins: sd0 {
-               renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
-               renesas,function = "sdhi0";
+               groups = "sdhi0_data4", "sdhi0_ctrl";
+               function = "sdhi0";
        };
 
        sdhi2_pins: sd2 {
-               renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
-               renesas,function = "sdhi2";
+               groups = "sdhi2_data4", "sdhi2_ctrl";
+               function = "sdhi2";
        };
 
-       qspi_pins: spi0 {
-               renesas,groups = "qspi_ctrl", "qspi_data4";
-               renesas,function = "qspi";
+       qspi_pins: qspi {
+               groups = "qspi_ctrl", "qspi_data4";
+               function = "qspi";
        };
 
        i2c2_pins: i2c2 {
-               renesas,groups = "i2c2";
-               renesas,function = "i2c2";
+               groups = "i2c2";
+               function = "i2c2";
        };
 
        usb0_pins: usb0 {
-               renesas,groups = "usb0";
-               renesas,function = "usb0";
+               groups = "usb0";
+               function = "usb0";
        };
 
        usb1_pins: usb1 {
-               renesas,groups = "usb1";
-               renesas,function = "usb1";
+               groups = "usb1";
+               function = "usb1";
        };
 
        vin0_pins: vin0 {
-               renesas,groups = "vin0_data8", "vin0_clk";
-               renesas,function = "vin0";
+               groups = "vin0_data8", "vin0_clk";
+               function = "vin0";
        };
 
        can0_pins: can0 {
-               renesas,groups = "can0_data";
-               renesas,function = "can0";
+               groups = "can0_data";
+               function = "can0";
        };
 
        du_pins: du {
-               renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
-               renesas,function = "du";
+               groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+               function = "du";
        };
 
        ssi_pins: sound {
-               renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
-               renesas,function = "ssi";
+               groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+               function = "ssi";
        };
 
        audio_clk_pins: audio_clk {
-               renesas,groups = "audio_clk_a";
-               renesas,function = "audio_clk";
+               groups = "audio_clk_a";
+               function = "audio_clk";
        };
 };