ARM: dts: rockchip: move rk3036 memory definition to board files
[cascardo/linux.git] / arch / arm / boot / dts / rk3036.dtsi
index 609319c..843d2be 100644 (file)
                serial0 = &uart0;
                serial1 = &uart1;
                serial2 = &uart2;
-       };
-
-       memory {
-               device_type = "memory";
-               reg = <0x60000000 0x40000000>;
+               spi = &spi;
        };
 
        cpus {
@@ -94,7 +90,7 @@
        };
 
        amba {
-               compatible = "arm,amba-bus";
+               compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
                        clocks = <&cru ACLK_DMAC2>;
                        clock-names = "apb_pclk";
                };
                interrupt-affinity = <&cpu0>, <&cpu1>;
        };
 
+       display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+       };
+
        timer {
                compatible = "arm,armv7-timer";
                arm,cpu-registers-not-fw-configured;
                };
        };
 
+       vop: vop@10118000 {
+               compatible = "rockchip,rk3036-vop";
+               reg = <0x10118000 0x19c>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>;
+               clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>;
+               reset-names = "axi", "ahb", "dclk";
+               iommus = <&vop_mmu>;
+               status = "disabled";
+
+               vop_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       vop_out_hdmi: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&hdmi_in_vop>;
+                       };
+               };
+       };
+
+       vop_mmu: iommu@10118300 {
+               compatible = "rockchip,iommu";
+               reg = <0x10118300 0x100>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vop_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@10139000 {
                compatible = "arm,gic-400";
                interrupt-controller;
        };
 
        usb_otg: usb@10180000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x10180000 0x40000>;
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        usb_host: usb@101c0000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        emmc: dwmmc@1021c000 {
-               compatible = "rockchip,rk3288-dw-mshc";
+               compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x1021c000 0x4000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-               broken-cd;
                bus-width = <8>;
                cap-mmc-highspeed;
                clock-frequency = <37500000>;
                interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
                dmas = <&pdma 0>, <&pdma 1>;
                dma-names = "tx", "rx";
                pinctrl-names = "default";
                status = "disabled";
        };
 
+       hdmi: hdmi@20034000 {
+               compatible = "rockchip,rk3036-inno-hdmi";
+               reg = <0x20034000 0x4000>;
+               interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru  PCLK_HDMI>;
+               clock-names = "pclk";
+               rockchip,grf = <&grf>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmi_ctl>;
+               status = "disabled";
+
+               hdmi_in: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       hdmi_in_vop: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&vop_out_hdmi>;
+                       };
+               };
+       };
+
        timer: timer@20044000 {
                compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";
                reg = <0x20044000 0x20>;
        };
 
        i2c1: i2c@20056000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20056000 0x1000>;
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c2: i2c@2005a000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x2005a000 0x1000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c0: i2c@20072000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20072000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                status = "disabled";
        };
 
+       spi: spi@20074000 {
+               compatible = "rockchip,rockchip-spi";
+               reg = <0x20074000 0x1000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               clocks =<&cru PCLK_SPI>, <&cru SCLK_SPI>;
+               clock-names = "apb-pclk","spi_pclk";
+               dmas = <&pdma 8>, <&pdma 9>;
+               dma-names = "tx", "rx";
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3036-pinctrl";
                rockchip,grf = <&grf>;
 
                i2s {
                        i2s_bus: i2s-bus {
-                               rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 1 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 2 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 3 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 4 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 5 RK_FUNC_1 &pcfg_pull_none>;
+                               rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 1 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 2 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 3 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 4 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 5 RK_FUNC_1 &pcfg_pull_default>;
+                       };
+               };
+
+               hdmi {
+                       hdmi_ctl: hdmi-ctl {
+                               rockchip,pins = <1 8  RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 9  RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 10 RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 11 RK_FUNC_1 &pcfg_pull_none>;
                        };
                };
 
                        };
                        /* no rts / cts for uart2 */
                };
+
+               spi {
+                       spi_txd:spi-txd {
+                               rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
+                       };
+
+                       spi_rxd:spi-rxd {
+                               rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
+                       };
+
+                       spi_clk:spi-clk {
+                               rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
+                       };
+
+                       spi_cs0:spi-cs0 {
+                               rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
+
+                       };
+
+                       spi_cs1:spi-cs1 {
+                               rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
+
+                       };
+               };
        };
 };