Merge tag 'zynq-dt-for-3.17-3' of git://git.xilinx.com/linux-xlnx into next/dt

[cascardo/linux.git] / arch / arm / boot / dts / rk3xxx.dtsi

diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index ad204da..c6f0561 100644 (file)
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -20,6 +20,14 @@
 / {
        interrupt-parent = <&gic>;
 
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+       };
+
        xin24m: oscillator {
                compatible = "fixed-clock";
                clock-frequency = <24000000>;
@@ -67,7 +75,8 @@
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <1>;
-               clocks = <&cru SCLK_UART0>;
+               clock-names = "baudclk", "apb_pclk";
+               clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
                status = "disabled";
        };
 
@@ -77,7 +86,8 @@
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <1>;
-               clocks = <&cru SCLK_UART1>;
+               clock-names = "baudclk", "apb_pclk";
+               clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
                status = "disabled";
        };
 
@@ -117,13 +127,122 @@
                reg = <0x20008000 0x200>;
        };
 
+       i2c0: i2c@2002d000 {
+               compatible = "rockchip,rk3066-i2c";
+               reg = <0x2002d000 0x1000>;
+               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+               rockchip,bus-index = <0>;
+
+               clock-names = "i2c";
+               clocks = <&cru PCLK_I2C0>;
+
+               status = "disabled";
+       };
+
+       i2c1: i2c@2002f000 {
+               compatible = "rockchip,rk3066-i2c";
+               reg = <0x2002f000 0x1000>;
+               interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+
+               clocks = <&cru PCLK_I2C1>;
+               clock-names = "i2c";
+
+               status = "disabled";
+       };
+
+       pwm0: pwm@20030000 {
+               compatible = "rockchip,rk2928-pwm";
+               reg = <0x20030000 0x10>;
+               #pwm-cells = <2>;
+               clocks = <&cru PCLK_PWM01>;
+               status = "disabled";
+       };
+
+       pwm1: pwm@20030010 {
+               compatible = "rockchip,rk2928-pwm";
+               reg = <0x20030010 0x10>;
+               #pwm-cells = <2>;
+               clocks = <&cru PCLK_PWM01>;
+               status = "disabled";
+       };
+
+       pwm2: pwm@20050020 {
+               compatible = "rockchip,rk2928-pwm";
+               reg = <0x20050020 0x10>;
+               #pwm-cells = <2>;
+               clocks = <&cru PCLK_PWM23>;
+               status = "disabled";
+       };
+
+       pwm3: pwm@20050030 {
+               compatible = "rockchip,rk2928-pwm";
+               reg = <0x20050030 0x10>;
+               #pwm-cells = <2>;
+               clocks = <&cru PCLK_PWM23>;
+               status = "disabled";
+       };
+
+       i2c2: i2c@20056000 {
+               compatible = "rockchip,rk3066-i2c";
+               reg = <0x20056000 0x1000>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+
+               clocks = <&cru PCLK_I2C2>;
+               clock-names = "i2c";
+
+               status = "disabled";
+       };
+
+       i2c3: i2c@2005a000 {
+               compatible = "rockchip,rk3066-i2c";
+               reg = <0x2005a000 0x1000>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+
+               clocks = <&cru PCLK_I2C3>;
+               clock-names = "i2c";
+
+               status = "disabled";
+       };
+
+       i2c4: i2c@2005e000 {
+               compatible = "rockchip,rk3066-i2c";
+               reg = <0x2005e000 0x1000>;
+               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+
+               clocks = <&cru PCLK_I2C4>;
+               clock-names = "i2c";
+
+               status = "disabled";
+       };
+
        uart2: serial@20064000 {
                compatible = "snps,dw-apb-uart";
                reg = <0x20064000 0x400>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <1>;
-               clocks = <&cru SCLK_UART2>;
+               clock-names = "baudclk", "apb_pclk";
+               clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
                status = "disabled";
        };
 
@@ -133,7 +252,8 @@
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <1>;
-               clocks = <&cru SCLK_UART3>;
+               clock-names = "baudclk", "apb_pclk";
+               clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
                status = "disabled";
        };
 };