Merge tag 'please-pull-misc-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git...
[cascardo/linux.git] / arch / arm / boot / dts / sun5i-a13.dtsi
index d910d3a..263d46d 100644 (file)
@@ -61,7 +61,8 @@
                        compatible = "allwinner,simple-framebuffer",
                                     "simple-framebuffer";
                        allwinner,pipeline = "de_be0-lcd0";
-                       clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+                       clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
+                                <&tcon_ch0_clk>, <&dram_gates 26>;
                        status = "disabled";
                };
        };
                                        <10>, <13>,
                                        <14>, <20>,
                                        <21>, <22>,
-                                       <28>, <32>, <36>,
-                                       <40>, <44>,
+                                       <28>, <32>, <34>,
+                                       <36>, <40>, <44>,
                                        <46>, <51>,
                                        <52>;
                        clock-output-names = "ahb_usbotg", "ahb_ehci",
                                             "ahb_mmc2", "ahb_nand",
                                             "ahb_sdram", "ahb_spi0",
                                             "ahb_spi1", "ahb_spi2",
-                                            "ahb_stimer", "ahb_ve", "ahb_lcd",
-                                            "ahb_csi", "ahb_de_be",
+                                            "ahb_stimer", "ahb_ve", "ahb_tve",
+                                            "ahb_lcd", "ahb_csi", "ahb_de_be",
                                             "ahb_de_fe", "ahb_iep",
                                             "ahb_mali400";
                };
                                             "apb1_i2c2", "apb1_uart1",
                                             "apb1_uart3";
                };
+
+               dram_gates: clk@01c20100 {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun5i-a13-dram-gates-clk",
+                                    "allwinner,sun4i-a10-gates-clk";
+                       reg = <0x01c20100 0x4>;
+                       clocks = <&pll5 0>;
+                       clock-indices = <0>,
+                                       <1>,
+                                       <25>,
+                                       <26>,
+                                       <29>,
+                                       <31>;
+                       clock-output-names = "dram_ve",
+                                            "dram_csi",
+                                            "dram_de_fe",
+                                            "dram_de_be",
+                                            "dram_ace",
+                                            "dram_iep";
+               };
+
+               de_be_clk: clk@01c20104 {
+                       #clock-cells = <0>;
+                       #reset-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-display-clk";
+                       reg = <0x01c20104 0x4>;
+                       clocks = <&pll3>, <&pll7>, <&pll5 1>;
+                       clock-output-names = "de-be";
+               };
+
+               de_fe_clk: clk@01c2010c {
+                       #clock-cells = <0>;
+                       #reset-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-display-clk";
+                       reg = <0x01c2010c 0x4>;
+                       clocks = <&pll3>, <&pll7>, <&pll5 1>;
+                       clock-output-names = "de-fe";
+               };
+
+               tcon_ch0_clk: clk@01c20118 {
+                       #clock-cells = <0>;
+                       #reset-cells = <1>;
+                       compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
+                       reg = <0x01c20118 0x4>;
+                       clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+                       clock-output-names = "tcon-ch0-sclk";
+               };
+
+               tcon_ch1_clk: clk@01c2012c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
+                       reg = <0x01c2012c 0x4>;
+                       clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+                       clock-output-names = "tcon-ch1-sclk";
+               };
        };
 
        soc@01c00000 {