Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[cascardo/linux.git] / arch / arm / boot / dts / tegra124.dtsi

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 5b8177a..1e204a6 100644 (file)
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -189,6 +189,9 @@
                clock-names = "gpu", "pwr";
                resets = <&tegra_car 184>;
                reset-names = "gpu";
+
+               iommus = <&mc TEGRA_SWGROUP_GPU>;
+
                status = "disabled";
        };
 
@@ -255,6 +258,7 @@
                gpio-controller;
                #interrupt-cells = <2>;
                interrupt-controller;
+               gpio-ranges = <&pinmux 0 0 251>;
        };
 
        apbdma: dma@0,60020000 {
@@ -947,6 +951,15 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
+
+                       clocks = <&tegra_car TEGRA124_CLK_CCLK_G>,
+                                <&tegra_car TEGRA124_CLK_CCLK_LP>,
+                                <&tegra_car TEGRA124_CLK_PLL_X>,
+                                <&tegra_car TEGRA124_CLK_PLL_P>,
+                                <&dfll>;
+                       clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
+                       /* FIXME: what's the actual transition time? */
+                       clock-latency = <300000>;
                };
 
                cpu@1 {
@@ -968,6 +981,18 @@
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a15-pmu";
+               interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&{/cpus/cpu@0}>,
+                                    <&{/cpus/cpu@1}>,
+                                    <&{/cpus/cpu@2}>,
+                                    <&{/cpus/cpu@3}>;
+       };
+
        thermal-zones {
                cpu {
                        polling-delay-passive = <1000>;