ARM: at91: fix at91_sysirq_mask_rtc for sam9x5 SoCs

[cascardo/linux.git] / arch / arm / mach-at91 / sysirq_mask.c

diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c
index 2ba694f..f8bc351 100644 (file)
--- a/arch/arm/mach-at91/sysirq_mask.c
+++ b/arch/arm/mach-at91/sysirq_mask.c
@@ -25,24 +25,28 @@
 
 #include "generic.h"
 
-#define AT91_RTC_IDR   0x24    /* Interrupt Disable Register */
-#define AT91_RTC_IMR   0x28    /* Interrupt Mask Register */
+#define AT91_RTC_IDR           0x24    /* Interrupt Disable Register */
+#define AT91_RTC_IMR           0x28    /* Interrupt Mask Register */
+#define AT91_RTC_IRQ_MASK      0x1f    /* Available IRQs mask */
 
 void __init at91_sysirq_mask_rtc(u32 rtc_base)
 {
        void __iomem *base;
-       u32 mask;
 
        base = ioremap(rtc_base, 64);
        if (!base)
                return;
 
-       mask = readl_relaxed(base + AT91_RTC_IMR);
-       if (mask) {
-               pr_info("AT91: Disabling rtc irq\n");
-               writel_relaxed(mask, base + AT91_RTC_IDR);
-               (void)readl_relaxed(base + AT91_RTC_IMR);       /* flush */
-       }
+       /*
+        * sam9x5 SoCs have the following errata:
+        * "RTC: Interrupt Mask Register cannot be used
+        *  Interrupt Mask Register read always returns 0."
+        *
+        * Hence we're not relying on IMR values to disable
+        * interrupts.
+        */
+       writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
+       (void)readl_relaxed(base + AT91_RTC_IMR);       /* flush */
 
        iounmap(base);
 }