Merge tag 'trace-seq-buf-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/roste...

[cascardo/linux.git] / arch / arm / mach-exynos / firmware.c

diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index e8797bb..766f57d 100644 (file)
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -14,16 +14,44 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 
+#include <asm/cacheflush.h>
+#include <asm/cputype.h>
 #include <asm/firmware.h>
+#include <asm/suspend.h>
 
 #include <mach/map.h>
 
 #include "common.h"
 #include "smc.h"
 
-static int exynos_do_idle(void)
+#define EXYNOS_SLEEP_MAGIC     0x00000bad
+#define EXYNOS_AFTR_MAGIC      0xfcba0d10
+#define EXYNOS_BOOT_ADDR       0x8
+#define EXYNOS_BOOT_FLAG       0xc
+
+static void exynos_save_cp15(void)
 {
-       exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+       /* Save Power control and Diagnostic registers */
+       asm ("mrc p15, 0, %0, c15, c0, 0\n"
+            "mrc p15, 0, %1, c15, c0, 1\n"
+            : "=r" (cp15_save_power), "=r" (cp15_save_diag)
+            : : "cc");
+}
+
+static int exynos_do_idle(unsigned long mode)
+{
+       switch (mode) {
+       case FW_DO_IDLE_AFTR:
+               if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
+                       exynos_save_cp15();
+               __raw_writel(virt_to_phys(exynos_cpu_resume_ns),
+                            sysram_ns_base_addr + 0x24);
+               __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
+               exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
+               break;
+       case FW_DO_IDLE_SLEEP:
+               exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+       }
        return 0;
 }
 
@@ -69,10 +97,43 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
        return 0;
 }
 
+static int exynos_cpu_suspend(unsigned long arg)
+{
+       flush_cache_all();
+       outer_flush_all();
+
+       exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+
+       pr_info("Failed to suspend the system\n");
+       writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
+       return 1;
+}
+
+static int exynos_suspend(void)
+{
+       if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
+               exynos_save_cp15();
+
+       writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
+       writel(virt_to_phys(exynos_cpu_resume_ns),
+               sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
+
+       return cpu_suspend(0, exynos_cpu_suspend);
+}
+
+static int exynos_resume(void)
+{
+       writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
+
+       return 0;
+}
+
 static const struct firmware_ops exynos_firmware_ops = {
-       .do_idle                = exynos_do_idle,
+       .do_idle                = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,
        .set_cpu_boot_addr      = exynos_set_cpu_boot_addr,
        .cpu_boot               = exynos_cpu_boot,
+       .suspend                = IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,
+       .resume                 = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,
 };
 
 void __init exynos_firmware_init(void)