Merge tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene...

[cascardo/linux.git] / arch / arm / mach-exynos / mcpm-exynos.c

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 0498d0b..13a2108 100644 (file)
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -25,7 +25,6 @@
 
 #define EXYNOS5420_CPUS_PER_CLUSTER    4
 #define EXYNOS5420_NR_CLUSTERS         2
-#define MCPM_BOOT_ADDR_OFFSET          0x1c
 
 /*
  * The common v7_exit_coherency_flush API could not be used because of the
@@ -258,10 +257,46 @@ static int exynos_wait_for_powerdown(unsigned int cpu, unsigned int cluster)
        return -ETIMEDOUT; /* timeout */
 }
 
+static void exynos_powered_up(void)
+{
+       unsigned int mpidr, cpu, cluster;
+
+       mpidr = read_cpuid_mpidr();
+       cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+       cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+
+       arch_spin_lock(&exynos_mcpm_lock);
+       if (cpu_use_count[cpu][cluster] == 0)
+               cpu_use_count[cpu][cluster] = 1;
+       arch_spin_unlock(&exynos_mcpm_lock);
+}
+
+static void exynos_suspend(u64 residency)
+{
+       unsigned int mpidr, cpunr;
+
+       exynos_power_down();
+
+       /*
+        * Execution reaches here only if cpu did not power down.
+        * Hence roll back the changes done in exynos_power_down function.
+        *
+        * CAUTION: "This function requires the stack data to be visible through
+        * power down and can only be executed on processors like A15 and A7
+        * that hit the cache with the C bit clear in the SCTLR register."
+       */
+       mpidr = read_cpuid_mpidr();
+       cpunr = exynos_pmu_cpunr(mpidr);
+
+       exynos_cpu_power_up(cpunr);
+}
+
 static const struct mcpm_platform_ops exynos_power_ops = {
        .power_up               = exynos_power_up,
        .power_down             = exynos_power_down,
        .wait_for_powerdown     = exynos_wait_for_powerdown,
+       .suspend                = exynos_suspend,
+       .powered_up             = exynos_powered_up,
 };
 
 static void __init exynos_mcpm_usage_count_init(void)
@@ -343,11 +378,13 @@ static int __init exynos_mcpm_init(void)
        pr_info("Exynos MCPM support installed\n");
 
        /*
-        * Future entries into the kernel can now go
-        * through the cluster entry vectors.
+        * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
+        * as part of secondary_cpu_start().  Let's redirect it to the
+        * mcpm_entry_point().
         */
-       __raw_writel(virt_to_phys(mcpm_entry_point),
-                       ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET);
+       __raw_writel(0xe59f0000, ns_sram_base_addr);     /* ldr r0, [pc, #0] */
+       __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx  r0 */
+       __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
 
        iounmap(ns_sram_base_addr);