ARM: imx: replace cpu type check with ddr type check

[cascardo/linux.git] / arch / arm / mach-imx / suspend-imx6.S

diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index ca4ea2d..b99987b 100644 (file)
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -45,7 +45,7 @@
  */
 #define PM_INFO_PBASE_OFFSET                   0x0
 #define PM_INFO_RESUME_ADDR_OFFSET             0x4
-#define PM_INFO_CPU_TYPE_OFFSET                        0x8
+#define PM_INFO_DDR_TYPE_OFFSET                        0x8
 #define PM_INFO_PM_INFO_SIZE_OFFSET            0xC
 #define PM_INFO_MX6Q_MMDC_P_OFFSET             0x10
 #define PM_INFO_MX6Q_MMDC_V_OFFSET             0x14
@@ -110,7 +110,7 @@
        ldreq   r11, [r0, #PM_INFO_MX6Q_MMDC_V_OFFSET]
        ldrne   r11, [r0, #PM_INFO_MX6Q_MMDC_P_OFFSET]
 
-       cmp     r3, #MXC_CPU_IMX6SL
+       cmp     r3, #IMX_DDR_TYPE_LPDDR2
        bne     4f
 
        /* reset read FIFO, RST_RD_FIFO */
@@ -151,7 +151,7 @@
 ENTRY(imx6_suspend)
        ldr     r1, [r0, #PM_INFO_PBASE_OFFSET]
        ldr     r2, [r0, #PM_INFO_RESUME_ADDR_OFFSET]
-       ldr     r3, [r0, #PM_INFO_CPU_TYPE_OFFSET]
+       ldr     r3, [r0, #PM_INFO_DDR_TYPE_OFFSET]
        ldr     r4, [r0, #PM_INFO_PM_INFO_SIZE_OFFSET]
 
        /*
@@ -209,8 +209,8 @@ poll_dvfs_set:
        ldr     r7, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET]
        ldr     r8, =PM_INFO_MMDC_IO_VAL_OFFSET
        add     r8, r8, r0
-       /* i.MX6SL's last 3 IOs need special setting */
-       cmp     r3, #MXC_CPU_IMX6SL
+       /* LPDDR2's last 3 IOs need special setting */
+       cmp     r3, #IMX_DDR_TYPE_LPDDR2
        subeq   r7, r7, #0x3
 set_mmdc_io_lpm:
        ldr     r9, [r8], #0x8
@@ -218,7 +218,7 @@ set_mmdc_io_lpm:
        subs    r7, r7, #0x1
        bne     set_mmdc_io_lpm
 
-       cmp     r3, #MXC_CPU_IMX6SL
+       cmp     r3, #IMX_DDR_TYPE_LPDDR2
        bne     set_mmdc_io_lpm_done
        ldr     r6, =0x1000
        ldr     r9, [r8], #0x8
@@ -324,7 +324,7 @@ resume:
        str     r7, [r11, #MX6Q_SRC_GPR1]
        str     r7, [r11, #MX6Q_SRC_GPR2]
 
-       ldr     r3, [r0, #PM_INFO_CPU_TYPE_OFFSET]
+       ldr     r3, [r0, #PM_INFO_DDR_TYPE_OFFSET]
        mov     r5, #0x1
        resume_mmdc