#include <linux/spi/spi.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/regulator/ab8500.h>
+#include <linux/regulator/fixed.h>
#include <linux/mfd/tc3589x.h>
#include <linux/mfd/tps6105x.h>
#include <linux/mfd/abx500/ab8500-gpio.h>
},
};
+static struct fixed_voltage_config snowball_gpio_en_3v3_data = {
+ .supply_name = "EN-3V3",
+ .gpio = SNOWBALL_EN_3V3_ETH_GPIO,
+ .microvolts = 3300000,
+ .enable_high = 1,
+ .init_data = &gpio_en_3v3_regulator,
+ .startup_delay = 5000, /* 1200us */
+};
+
+static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
+ .name = "reg-fixed-voltage",
+ .id = 1,
+ .dev = {
+ .platform_data = &snowball_gpio_en_3v3_data,
+ },
+};
+
static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
.gpio_base = MOP500_AB8500_PIN_GPIO(1),
.irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
};
#endif
-#define PRCC_K_SOFTRST_SET 0x18
-#define PRCC_K_SOFTRST_CLEAR 0x1C
-static void ux500_uart0_reset(void)
-{
- void __iomem *prcc_rst_set, *prcc_rst_clr;
-
- prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
- PRCC_K_SOFTRST_SET);
- prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
- PRCC_K_SOFTRST_CLEAR);
-
- /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
- writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
- udelay(1);
-
- /* Release soft reset PRCC_K_SOFTRST_SET */
- writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
- udelay(1);
-}
-
static struct amba_pl011_data uart0_plat = {
#ifdef CONFIG_STE_DMA40
.dma_filter = stedma40_filter,
.dma_rx_param = &uart0_dma_cfg_rx,
.dma_tx_param = &uart0_dma_cfg_tx,
#endif
- .reset = ux500_uart0_reset,
};
static struct amba_pl011_data uart1_plat = {
&snowball_led_dev,
&snowball_key_dev,
&snowball_sbnet_dev,
+ &snowball_gpio_en_3v3_regulator_dev,
};
static void __init mop500_init_machine(void)