ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size

[cascardo/linux.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 83c025e..8d43e58 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -758,7 +758,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
 config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-                  REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX
+                  REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK
        default y
        select OUTER_CACHE
        help
@@ -771,3 +771,8 @@ config CACHE_XSC3L2
        select OUTER_CACHE
        help
          This option enables the L2 cache on XScale3.
+
+config ARM_L1_CACHE_SHIFT
+       int
+       default 6 if ARCH_OMAP3
+       default 5