arm64: dts: msm8996: add support to blsp2_i2c0

[cascardo/linux.git] / arch / arm64 / boot / dts / qcom / msm8996.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0506fb8..675888f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -151,6 +151,21 @@
                        reg = <0x300000 0x90000>;
                };
 
+               blsp2_i2c0: i2c@075b5000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x075b5000 0x1000>;
+                       interrupts = <GIC_SPI 101 0>;
+                       clocks = <&gcc GCC_BLSP2_AHB_CLK>,
+                               <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp2_i2c0_default>;
+                       pinctrl-1 = <&blsp2_i2c0_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                blsp2_uart1: serial@75b0000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x75b0000 0x1000>;
@@ -161,7 +176,47 @@
                        status = "disabled";
                };
 
-               pinctrl@1010000 {
+               blsp2_i2c1: i2c@075b6000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x075b6000 0x1000>;
+                       interrupts = <GIC_SPI 102 0>;
+                       clocks = <&gcc GCC_BLSP2_AHB_CLK>,
+                               <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp2_i2c1_default>;
+                       pinctrl-1 = <&blsp2_i2c1_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               blsp2_uart2: serial@75b1000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0x075b1000 0x1000>;
+                       interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP2_UART3_APPS_CLK>,
+                                <&gcc GCC_BLSP2_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       status = "disabled";
+               };
+
+               blsp1_i2c2: i2c@07577000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x07577000 0x1000>;
+                       interrupts = <GIC_SPI 97 0>;
+                       clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+                               <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp1_i2c2_default>;
+                       pinctrl-1 = <&blsp1_i2c2_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               msmgpio: pinctrl@1010000 {
                        compatible = "qcom,msm8996-pinctrl";
                        reg = <0x01010000 0x300000>;
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
@@ -267,3 +322,4 @@
                };
        };
 };
+#include "msm8996-pins.dtsi"