frv: Convert genirq namespace

[cascardo/linux.git] / arch / frv / kernel / irq-mb93091.c

diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c
index 4dd9ada..372fe60 100644 (file)
--- a/arch/frv/kernel/irq-mb93091.c
+++ b/arch/frv/kernel/irq-mb93091.c
@@ -36,45 +36,45 @@
 /*
  * on-motherboard FPGA PIC operations
  */
-static void frv_fpga_mask(unsigned int irq)
+static void frv_fpga_mask(struct irq_data *d)
 {
        uint16_t imr = __get_IMR();
 
-       imr |= 1 << (irq - IRQ_BASE_FPGA);
+       imr |= 1 << (d->irq - IRQ_BASE_FPGA);
 
        __set_IMR(imr);
 }
 
-static void frv_fpga_ack(unsigned int irq)
+static void frv_fpga_ack(struct irq_data *d)
 {
        __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
 }
 
-static void frv_fpga_mask_ack(unsigned int irq)
+static void frv_fpga_mask_ack(struct irq_data *d)
 {
        uint16_t imr = __get_IMR();
 
-       imr |= 1 << (irq - IRQ_BASE_FPGA);
+       imr |= 1 << (d->irq - IRQ_BASE_FPGA);
        __set_IMR(imr);
 
-       __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
+       __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
 }
 
-static void frv_fpga_unmask(unsigned int irq)
+static void frv_fpga_unmask(struct irq_data *d)
 {
        uint16_t imr = __get_IMR();
 
-       imr &= ~(1 << (irq - IRQ_BASE_FPGA));
+       imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));
 
        __set_IMR(imr);
 }
 
 static struct irq_chip frv_fpga_pic = {
        .name           = "mb93091",
-       .ack            = frv_fpga_ack,
-       .mask           = frv_fpga_mask,
-       .mask_ack       = frv_fpga_mask_ack,
-       .unmask         = frv_fpga_unmask,
+       .irq_ack        = frv_fpga_ack,
+       .irq_mask       = frv_fpga_mask,
+       .irq_mask_ack   = frv_fpga_mask_ack,
+       .irq_unmask     = frv_fpga_unmask,
 };
 
 /*
@@ -146,9 +146,9 @@ void __init fpga_init(void)
        __clr_IFR(0x0000);
 
        for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++)
-               set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
+               irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
 
-       set_irq_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
+       irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
 
        /* the FPGA drives the first four external IRQ inputs on the CPU PIC */
        setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]);