Merge branch '3.16-fixes' into mips-for-linux-next

[cascardo/linux.git] / arch / mips / kernel / r4k_switch.S

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index abacac7..4c4ec18 100644 (file)
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -28,6 +28,7 @@
  */
 #define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
 
+#ifndef USE_ALTERNATE_RESUME_IMPL
 /*
  * task_struct *resume(task_struct *prev, task_struct *next,
  *                    struct thread_info *next_ti, s32 fp_save)
@@ -63,8 +64,10 @@
        /* Check whether we're saving scalar or vector context. */
        bgtz    a3, 1f
 
-       /* Save 128b MSA vector context. */
+       /* Save 128b MSA vector context + scalar FP control & status. */
+       cfc1    t1, fcr31
        msa_save_all    a0
+       sw      t1, THREAD_FCR31(a0)
        b       2f
 
 1:     /* Save 32b/64b scalar FP context. */
@@ -87,18 +90,6 @@
 
        PTR_ADDU        t0, $28, _THREAD_SIZE - 32
        set_saved_sp    t0, t1, t2
-#ifdef CONFIG_MIPS_MT_SMTC
-       /* Read-modify-writes of Status must be atomic on a VPE */
-       mfc0    t2, CP0_TCSTATUS
-       ori     t1, t2, TCSTATUS_IXMT
-       mtc0    t1, CP0_TCSTATUS
-       andi    t2, t2, TCSTATUS_IXMT
-       _ehb
-       DMT     8                               # dmt   t0
-       move    t1,ra
-       jal     mips_ihb
-       move    ra,t1
-#endif /* CONFIG_MIPS_MT_SMTC */
        mfc0    t1, CP0_STATUS          /* Do we really need this? */
        li      a3, 0xff01
        and     t1, a3
@@ -107,22 +98,12 @@
        and     a2, a3
        or      a2, t1
        mtc0    a2, CP0_STATUS
-#ifdef CONFIG_MIPS_MT_SMTC
-       _ehb
-       andi    t0, t0, VPECONTROL_TE
-       beqz    t0, 1f
-       emt
-1:
-       mfc0    t1, CP0_TCSTATUS
-       xori    t1, t1, TCSTATUS_IXMT
-       or      t1, t1, t2
-       mtc0    t1, CP0_TCSTATUS
-       _ehb
-#endif /* CONFIG_MIPS_MT_SMTC */
        move    v0, a0
        jr      ra
        END(resume)
 
+#endif /* USE_ALTERNATE_RESUME_IMPL */
+
 /*
  * Save a thread's fp context.
  */
@@ -163,6 +144,11 @@ LEAF(_restore_msa)
        jr      ra
        END(_restore_msa)
 
+LEAF(_init_msa_upper)
+       msa_init_all_upper
+       jr      ra
+       END(_init_msa_upper)
+
 #endif
 
 /*
@@ -176,19 +162,10 @@ LEAF(_restore_msa)
 #define FPU_DEFAULT  0x00000000
 
 LEAF(_init_fpu)
-#ifdef CONFIG_MIPS_MT_SMTC
-       /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
-       mfc0    t0, CP0_TCSTATUS
-       /* Bit position is the same for Status, TCStatus */
-       li      t1, ST0_CU1
-       or      t0, t1
-       mtc0    t0, CP0_TCSTATUS
-#else /* Normal MIPS CU1 enable */
        mfc0    t0, CP0_STATUS
        li      t1, ST0_CU1
        or      t0, t1
        mtc0    t0, CP0_STATUS
-#endif /* CONFIG_MIPS_MT_SMTC */
        enable_fpu_hazard
 
        li      t1, FPU_DEFAULT