[MIPS] Allow setting of the cache attribute at run time.

[cascardo/linux.git] / arch / mips / philips / pnx8550 / jbs / board_setup.c

diff --git a/arch/mips/philips/pnx8550/jbs/board_setup.c b/arch/mips/philips/pnx8550/jbs/board_setup.c
index f92826e..e550a3e 100644 (file)
--- a/arch/mips/philips/pnx8550/jbs/board_setup.c
+++ b/arch/mips/philips/pnx8550/jbs/board_setup.c
@@ -53,8 +53,8 @@ void __init board_setup(void)
 
        /* clear all three cache coherency fields */
        config0 &= ~(0x7 | (7<<25) | (7<<28));
-       config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
-                       (CONF_CM_DEFAULT<<28));
+       config0 |= (_page_cachable_default >> _CACHE_SHIFT) |
+                  (CONF_CM_DEFAULT << 25) | (CONF_CM_DEFAULT << 28);
        write_c0_config(config0);
        BARRIER;