powerpc/fsl: Add fsl,portid-mapping to corenet1-cf chips

[cascardo/linux.git] / arch / powerpc / boot / dts / fsl / p5020si-post.dtsi

diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index f7ca9f4..4c4a2b0 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -294,6 +294,7 @@
                interrupts = <
                        24 2 0 0
                        16 2 1 30>;
+               fsl,portid-mapping = <0x3c000000>;
 
                pamu0: pamu@0 {
                        reg = <0 0x1000>;